Skip to content

Instantly share code, notes, and snippets.

View pgavlin's full-sized avatar
🤷‍♂️
¯\_(ツ)_/¯

Pat Gavlin pgavlin

🤷‍♂️
¯\_(ツ)_/¯
View GitHub Profile
@pgavlin
pgavlin / gist:cd9f77ff5115d3d60085
Last active August 29, 2015 14:19
LLILC patch to normalize bad X86-64 calling conventions
diff --git a/lib/Reader/abisignature.cpp b/lib/Reader/abisignature.cpp
index 140c248..55e8635 100644
--- a/lib/Reader/abisignature.cpp
+++ b/lib/Reader/abisignature.cpp
@@ -42,6 +42,21 @@ static CallingConv::ID getLLVMCallingConv(CorInfoCallConv CC) {
}
}
+static CorInfoCallConv
+getNormalizedCallingConvention(const ReaderCallSignature &Signature) {
diff --git a/src/jit/decomposelongs.cpp b/src/jit/decomposelongs.cpp
index 15198e3..35dea9d 100644
--- a/src/jit/decomposelongs.cpp
+++ b/src/jit/decomposelongs.cpp
@@ -409,7 +409,7 @@ GenTree* DecomposeLongs::DecomposeStoreLclVar(LIR::Use& use)
// itself should not have any. The lo and hi rhs parts could, at least
// in theory, have different side effects so we can't simply copy the
// original store's side effecs to both parts.
- unsigned flags = tree->gtFlags & ~GTF_ALL_EFFECT;
+ unsigned flags = (tree->gtFlags & ~GTF_ALL_EFFECT) | GTF_ASG;
diff --git a/src/jit/lowerxarch.cpp b/src/jit/lowerxarch.cpp
index 389f9a5..a1e3aa3 100644
--- a/src/jit/lowerxarch.cpp
+++ b/src/jit/lowerxarch.cpp
@@ -239,9 +239,9 @@ void Lowering::TreeNodeInfoInit(GenTree* tree)
#if !defined(_TARGET_64BIT_)
case GT_LONG:
- if (tree->gtNext == nullptr)
+ if ((tree->gtLIRFlags & LIR::Flags::IsUnusedValue) != 0)
; Assembly listing for method Program:Test(ref,ref)
; Emitting BLENDED_CODE for generic X86 CPU
; optimized code
; ebp based frame
; fully interruptible
; Final local variable assignments
;
; V00 arg0 [V00,T02] ( 4, 7 ) ref -> ecx
; V01 arg1 [V01,T03] ( 4, 7 ) ref -> edx
; V02 loc0 [V02,T00] ( 8, 29 ) int -> eax
; Assembly listing for method Program:Test(ref,ref)
; Emitting BLENDED_CODE for generic X86 CPU
; optimized code
; ebp based frame
; fully interruptible
; Final local variable assignments
;
; V00 arg0 [V00,T03] ( 3, 4 ) ref -> ebx
; V01 arg1 [V01,T02] ( 3, 4 ) ref -> edi
; V02 loc0 [V02,T00] ( 5, 15 ) int -> esi
BEGIN EXECUTION
"c:\dev\coreclr\bin\tests\Windows_NT.x86.Checked\Tests\Core_Root\corerun.exe" _speed_dbgunsafe-4.exe
****** START compiling TestApp:test_25(int,ref,long,ubyte):long (MethodHash=e5bcc669)
Generating code for Windows x86
OPTIONS: compCodeOpt = BLENDED_CODE
OPTIONS: compDbgCode = false
OPTIONS: compDbgInfo = true
OPTIONS: compDbgEnC = false
OPTIONS: compProcedureSplitting = false
OPTIONS: compProcedureSplittingEH = false
@pgavlin
pgavlin / ghquery.py
Created October 19, 2016 16:10
Query GitHub issues
#!/usr/bin/env python
from __future__ import print_function
import argparse, csv, itertools, json, os, requests, sys, urllib
from datetime import datetime
def write_csv(writer, milestone):
for i in milestone['issues']:
row = { 'Issue Number': i['number'], 'Description': i['title'], 'Assigned To': i['assignees_list'], 'Link': i['url'], 'Milestone': milestone['title'] }
diff --git a/src/jit/importer.cpp b/src/jit/importer.cpp
index 5c21f08..2555e1f 100644
--- a/src/jit/importer.cpp
+++ b/src/jit/importer.cpp
@@ -1389,202 +1389,202 @@ GenTreePtr Compiler::impAssignStructPtr(GenTreePtr destAddr,
Given a struct value, and the class handle for that structure, return
the expression for the address for that structure value.
willDeref - does the caller guarantee to dereference the pointer.
*/
@pgavlin
pgavlin / index.generated.ts
Last active March 31, 2020 03:46
Terraform to Pulumi migration
import * as pulumi from "@pulumi/pulumi";
import * as aws from "@pulumi/aws";
import * as fs from "fs";
const config = new pulumi.Config();
const var_availability_zones = config.require("availabilityZones");
const var_public_key = config.get("publicKey") || "";
const aws_security_group_default = new aws.ec2.SecurityGroup("default", {
namePrefix: "example_sg",
@pgavlin
pgavlin / gtemu.c
Last active April 27, 2019 18:39
Emulating a GT1 on a GT1 using a very, very slightly modified gtemu.c
#define NULL 0
typedef unsigned uint16_t;
typedef unsigned char uint8_t;
void cls();
void putchar(uint8_t c);
typedef struct { // TTL state that the CPU controls
uint16_t PC;