Videocore llvm conditionals test

input.c

int main()
{
  unsigned int a = 0;
  int b = 1;
  int c = 2;
  int d = 3;
  int e = 4;
  int f = 5;
  int g = 6;
  int h = 7;
  int i = 8;
  
  if (a == 0) {
    a++;
  }
  if (b != 0) {
    b++;
  }
  if (c > 0) {
    c++;
  }
  if (d >= 0) {
    d++;
  }
  if (e < 0) {
    e++;
  }
  if (f <= 0) {
    f++;
  }
  if (g <= 1) {
    g++;
  }
  if (h >= 1) {
    h++;
  }
  if (i < h) {
    i++;
  }
  if (a != b) {
    a++;
  }
  
  return a;
}

output.s

	.file	"cmp2.ll"
	.text
	.globl	main
	.align	4
	.type	main,@function
main:                                   # @main
# BB#0:
	mov r1, 0
	st r1, -4(sp)
	st r1, -8(sp)
	mov r0, 1
	st r0, -12(sp)
	mov r2, 2
	st r2, -16(sp)
	mov r2, 3
	st r2, -20(sp)
	mov r2, 4
	st r2, -24(sp)
	mov r2, 5
	st r2, -28(sp)
	mov r2, 6
	st r2, -32(sp)
	mov r2, 7
	st r2, -36(sp)
	mov r2, 8
	st r2, -40(sp)
	ld r2, -8(sp)
	cmp r2, r2, 0
	bne .BB0_2
	b .BB0_1
.BB0_1:
	ld r2, -8(sp)
	add r2, 1
	st r2, -8(sp)
.BB0_2:
	ld r2, -12(sp)
	cmp r2, r2, 0
	beq .BB0_4
	b .BB0_3
.BB0_3:
	ld r2, -12(sp)
	add r2, 1
	st r2, -12(sp)
.BB0_4:
	ld r2, -16(sp)
	cmp r2, r2, r0
	blt .BB0_6
	b .BB0_5
.BB0_5:
	ld r2, -16(sp)
	add r2, 1
	st r2, -16(sp)
.BB0_6:
	ld r2, -20(sp)
	cmp r2, r2, r1
	blt .BB0_8
	b .BB0_7
.BB0_7:
	ld r2, -20(sp)
	add r2, 1
	st r2, -20(sp)
.BB0_8:
	mov r2, -1
	ld r3, -24(sp)
	cmp r2, r3, r2
	bgt .BB0_10
	b .BB0_9
.BB0_9:
	ld r2, -24(sp)
	add r2, 1
	st r2, -24(sp)
.BB0_10:
	ld r2, -28(sp)
	cmp r1, r2, r1
	bgt .BB0_12
	b .BB0_11
.BB0_11:
	ld r1, -28(sp)
	add r1, 1
	st r1, -28(sp)
.BB0_12:
	ld r1, -32(sp)
	cmp r1, r1, r0
	bgt .BB0_14
	b .BB0_13
.BB0_13:
	ld r1, -32(sp)
	add r1, 1
	st r1, -32(sp)
.BB0_14:
	ld r1, -36(sp)
	cmp r0, r1, r0
	blt .BB0_16
	b .BB0_15
.BB0_15:
	ld r0, -36(sp)
	add r0, 1
	st r0, -36(sp)
.BB0_16:
	ld r0, -36(sp)
	ld r1, -40(sp)
	cmp r0, r1, r0
	bge .BB0_18
	b .BB0_17
.BB0_17:
	ld r0, -40(sp)
	add r0, 1
	st r0, -40(sp)
.BB0_18:
	ld r0, -12(sp)
	ld r1, -8(sp)
	cmp r0, r1, r0
	beq .BB0_20
	b .BB0_19
.BB0_19:
	ld r0, -8(sp)
	add r0, 1
	st r0, -8(sp)
.BB0_20:
	ld r0, -8(sp)
	blr
.tmp0:
	.size	main, .tmp0-main