Created
October 7, 2019 06:46
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#![no_main] | |
#![no_std] | |
// set the panic handler | |
extern crate panic_semihosting; | |
pub mod midi; | |
use core::sync::atomic::{AtomicBool, Ordering}; | |
use cortex_m::{ | |
peripheral::syst::SystClkSource, | |
}; | |
use cortex_m_semihosting::hprintln; | |
use cortex_m_rt::{entry, exception}; | |
use nb::block; | |
use stm32f1xx_hal::{ | |
pac, | |
prelude::*, | |
serial::{Config, Serial}, | |
}; | |
use midi::*; | |
#[entry] | |
fn main() -> ! { | |
let device = pac::Peripherals::take().unwrap(); | |
let mut rcc = device.RCC.constrain(); | |
let mut flash = device.FLASH.constrain(); | |
let clocks = rcc.cfgr.freeze(&mut flash.acr); | |
let mut afio = device.AFIO.constrain(&mut rcc.apb2); | |
let mut gpioa = device.GPIOA.split(&mut rcc.apb2); | |
let tx = gpioa.pa9.into_alternate_push_pull(&mut gpioa.crh); | |
let rx = gpioa.pa10; | |
// Set up the usart device. Taks ownership over the USART register and tx/rx pins. The rest of | |
// the registers are used to enable and configure the device. | |
let serial = Serial::usart1( | |
device.USART1, | |
(tx, rx), | |
&mut afio.mapr, | |
Config::default().baudrate(31_250.bps()), | |
clocks, | |
&mut rcc.apb2, | |
); | |
let (mut tx, mut rx) = serial.split(); | |
for note in 0..0x7F { | |
let msg2 = NoteOn::new(0, note, 0x7F).unwrap().to_bytes(); | |
for &byte in &msg2 { | |
block!(tx.write(byte)).ok(); | |
let received = block!(rx.read()).unwrap(); | |
assert_eq!(received, byte); | |
} | |
} | |
loop {} | |
} |
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