flashrom-skyportsystems-add-MX25L25735E.patch

diff --git a/flash.h b/flash.h
index dfda9d2..48fe551 100644
--- a/flash.h
+++ b/flash.h
@@ -30,6 +30,7 @@
 #include <stdio.h>
 #include <stdint.h>
 #include <stddef.h>
+#include <sys/io.h>
 #include <stdarg.h>
 #include <stdbool.h>
 #if IS_WINDOWS
diff --git a/flashchips.c b/flashchips.c
index c4f9ca3..2824f0c 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -8262,6 +8262,52 @@ const struct flashchip flashchips[] = {
                .voltage        = {2700, 3600},
        },
 
+
+
+
+
+       {
+               .vendor         = "Macronix",
+               .name           = "MX25L25735E",
+               .bustype        = BUS_SPI,
+               .manufacture_id = MACRONIX_ID,
+               .model_id       = MACRONIX_MX25L25635F,
+               .total_size     = 32768,
+               .page_size      = 256,
+               .feature_bits   = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT,
+               {
+                       .read_nbyte = spi_nbyte_read_4ba,
+                       .program_byte = spi_byte_program_4ba,
+                       .program_nbyte = spi_nbyte_program_4ba
+               },
+               .tested         = TEST_OK_PREW,
+               .probe          = probe_spi_rdid,
+               .probe_timing   = TIMING_ZERO,
+               .block_erasers  =
+               {
+                       {
+                               .eraseblocks = { {4 * 1024, 8192} },
+                               .block_erase = spi_block_erase_20_4ba,
+                       }, {
+                               .eraseblocks = { {32 * 1024, 1024} },
+                               .block_erase = spi_block_erase_52_4ba,
+                       }, {
+                               .eraseblocks = { {64 * 1024, 512} },
+                               .block_erase = spi_block_erase_d8_4ba,
+                       }
+               },
+               .printlock      = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */
+               .unlock         = spi_disable_blockprotect_bp3_srwd,
+               .write          = spi_chip_write_256,
+               .read           = spi_chip_read, /* Fast read (0x0B) supported */
+               .voltage        = {2700, 3600},
+       },
+
+
+
+
+
+
        {
                .vendor         = "Macronix",
                .name           = "MX29F001B",
diff --git a/spi.c b/spi.c
index 0a4a618..68d532d 100644
--- a/spi.c
+++ b/spi.c
@@ -122,7 +122,8 @@ int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
        /* Check if alignment is native (at least the largest power of two which
         * is a factor of the mapped size of the chip).
         */
-       if (ffs(flash->chip->total_size * 1024) > (ffs(addrbase) ? : 33)) {
+       /* if (ffs(flash->chip->total_size * 1024) > (ffs(addrbase) ? : 33)) { */
+       if (__builtin_ffs(flash->chip->total_size * 1024) > (__builtin_ffs(addrbase) ? : 33)) {
                msg_perr("Flash chip is not aligned natively in the allowed "
                         "access window.\n");
                msg_perr("Read will probably return garbage.\n");