How a computer works...slide info

how-computer-works.txt

CPU
  Control Unit
  - Portillos Manager
  - Tells input, output, memory and alu how to respond to instruction
  - Here are those binary logic gates that we know and love 
  - When we say a computer is 1HZ it means it can execute a single instuction 1
    time per second. A 2.4 Ghz machine is 2.4B instructions per unit. Times 4
    cores!!
  Algorithm/Logic Unit
  - Algorithmic: add, substract, multiple, divide
  - Logic: 
    - 3 primitives: equality, greater than, less than
    - 6 combos: ==, !=, >=, >, <, <=
  Registers
  - On board temporary memory
  - Stores instructions or data
  - When we say a "32-bit" (whatever) we are generally referring to the size of
    the register, which in turn points to equal size bus and memory addressing
  - Used by control unit to accept, hold, transfer data or instructions, perform
    logic

    mov AX, 0001h   ; move 1 intro A register
    jmp BL         ;jump to instruction in lower-half of B register
  - Registers have terse names depending on the size and architecture. Hoswell
    processors have a 256-bit AVX (advanced vector extensions) register. I used
    to programming with a 32-bit AX.
  - Because of this naming, there is a convention to use certain registers in
    certain ways:
    Accumulator register - computation results
    Address register - Points to instruction address
    Storage - to/from memory
    General - anything goes

The basic cycle of a single CORE processor:
1. The control unit grades an instruction from memory or register
2. "" decodes instruction set, according to system architecture, and moves data
from RAM to ALU
3. ALU takes control and performs operation on data
4. ALU stores result in memory or register
CPUs have an internal clock that pulses at a fixed rate. Instructions generally
have sub-instructions written according to the processor architecture. Intels
instruction set will be different from AMDs. Assembly code may look very
different while ANSI-C or ISO-C code would look the same regardless of processor

CPU Cache  (Money, Cache, Respect)
  - Used to reduce cost (time/energy) data between CPU and RAM (Main memory)
  - Frequently used data
  - Instruction Cache
  - Data Cache
    L1
    L2 
    L3 

  - Multicore processors
    - Parallel processing power
    - Each core has dedicated local L1 cache
    - L2, and L3 if available would be shared

  - 
- Moore's Law:  Transisters double every two years.
- Moore Cores! The upper-bound of 2.4 Ghz. More ticks "generally" mean more
  power and more heat. We have currently reached the point where heat of cpu is
  impacting the ability to shoehorn in more transisters and keep the cpu
  operating smoothely. Add more cores.

GPU - 
  - 100+ cores
  - Blazing fast parallelized operations on memory
  - Not the same instruction set or general purpose of a CPU

Hyperthreading
  - A core is split into two logical instruction cores that can work on the same
    data
  - Front load instructions that operate on sets of data (while I work on this
    code, go read the next set of data to operate on)
  - Hyper-Threading Technology (priority Intel)
  - Intel says it can improve performance 15-30%, but can have negligible or
    negative impact on processing as well. Dependings on the program
Ports -
Bus
  IO
  RAM - Memory (main memory / primary storage)
    - Instructions and data
    - volatile vs non-volitile, requires power to storge memory. RAM is
      volatile, HD is non-voltatile.
    - Kernel handles ram de/re/allocation, "system call"
    
Secondard Storage:
  HD (HDD v SDD)
  CD
  Zipdrive!
  Thumbdrive
Swap (There it is!)
  - When memory is full pages of written to a harddrive
  - This is great of 640K machines back in the early 90s, and has it's
    applications for personal computing.
  - Hitting swap is the harbinger of death for a server.