Created
October 29, 2012 16:38
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signnz
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| 000242d8 <boost::simd::ext::implement<boost::simd::tag::signnz_ (boost::dispatch::meta::simd_<boost::dispatch::meta::floating_<boost::simd::native<float, boost::simd::tag::simd_emulation_<16u>, void> >, boost::simd::tag::simd_emulation_<16u> >), boost::dispatch::tag::cpu_, void>::operator()(boost::simd::native<float, boost::simd::tag::simd_emulation_<16u>, void> const&) const>: | |
| _ZNK5boost4simd3ext9implementIFNS0_3tag7signnz_ENS_8dispatch4meta5simd_INS6_9floating_INS0_6nativeIfNS3_15simd_emulation_ILj16EEEvEEEESB_EEENS5_3tag4cpu_EvEclERKSC_(): | |
| 242d8: e92d41f0 push {r4, r5, r6, r7, r8, lr} | |
| 242dc: e24dd090 sub sp, sp, #144 ; 0x90 | |
| 242e0: e92d4000 push {lr} | |
| 242e4: fa001e6c blx 2bc9c <__gnu_mcount_nc> | |
| 242e8: e1a05000 mov r5, r0 | |
| 242ec: e1a01002 mov r1, r2 | |
| 242f0: e28d0050 add r0, sp, #80 ; 0x50 | |
| 242f4: e1a04002 mov r4, r2 | |
| 242f8: ebff8fd1 bl 8244 <_ZN5boost4simd3ext9implementIFNS0_3tag4map_ENS_8dispatch4meta12unspecified_INS5_7functorINS3_9is_unord_ENS5_3tag4cpu_EEEEENS6_8generic_INS7_INS0_6nativeIfNS3_15simd_emulation_ILj16EEEvEEEEEESK_ESB_vE6resultIFSM_RKSC_RKSI_SR_EE4implINS0_7logicalIfEEvE4callESP_SR_SR_.constprop.1102> | |
| 242fc: eebf3a00 vmov.f32 s6, #240 ; 0xf0 | |
| 24300: e894000c ldm r4, {r2, r3} | |
| 24304: eddf0b4b vldr d16, [pc, #300] ; 24438 <boost::simd::ext::implement<boost::simd::tag::signnz_ (boost::dispatch::meta::simd_<boost::dispatch::meta::floating_<boost::simd::native<float, boost::simd::tag::simd_emulation_<16u>, void> >, boost::simd::tag::simd_emulation_<16u> >), boost::dispatch::tag::cpu_, void>::operator()(boost::simd::native<float, boost::simd::tag::simd_emulation_<16u>, void> const&) const+0x160> | |
| 24308: e5948008 ldr r8, [r4, #8] | |
| 2430c: e202c102 and ip, r2, #-2147483648 ; 0x80000000 | |
| 24310: e58dc030 str ip, [sp, #48] ; 0x30 | |
| 24314: e59d7030 ldr r7, [sp, #48] ; 0x30 | |
| 24318: e3a0c102 mov ip, #-2147483648 ; 0x80000000 | |
| 2431c: e003300c and r3, r3, ip | |
| 24320: e58d3034 str r3, [sp, #52] ; 0x34 | |
| 24324: e38775fe orr r7, r7, #1065353216 ; 0x3f800000 | |
| 24328: ee027a90 vmov s5, r7 | |
| 2432c: e59d6034 ldr r6, [sp, #52] ; 0x34 | |
| 24330: edcd0b10 vstr d16, [sp, #64] ; 0x40 | |
| 24334: ed9d2a11 vldr s4, [sp, #68] ; 0x44 | |
| 24338: e00c2008 and r2, ip, r8 | |
| 2433c: e38665fe orr r6, r6, #1065353216 ; 0x3f800000 | |
| 24340: ee016a90 vmov s3, r6 | |
| 24344: e58d2038 str r2, [sp, #56] ; 0x38 | |
| 24348: ed9f7a3c vldr s14, [pc, #240] ; 24440 <boost::simd::ext::implement<boost::simd::tag::signnz_ (boost::dispatch::meta::simd_<boost::dispatch::meta::floating_<boost::simd::native<float, boost::simd::tag::simd_emulation_<16u>, void> >, boost::simd::tag::simd_emulation_<16u> >), boost::dispatch::tag::cpu_, void>::operator()(boost::simd::native<float, boost::simd::tag::simd_emulation_<16u>, void> const&) const+0x168> | |
| 2434c: eef42a43 vcmp.f32 s5, s6 | |
| 24350: e59d1038 ldr r1, [sp, #56] ; 0x38 | |
| 24354: e594000c ldr r0, [r4, #12] | |
| 24358: eddf7a39 vldr s15, [pc, #228] ; 24444 <boost::simd::ext::implement<boost::simd::tag::signnz_ (boost::dispatch::meta::simd_<boost::dispatch::meta::floating_<boost::simd::native<float, boost::simd::tag::simd_emulation_<16u>, void> >, boost::simd::tag::simd_emulation_<16u> >), boost::dispatch::tag::cpu_, void>::operator()(boost::simd::native<float, boost::simd::tag::simd_emulation_<16u>, void> const&) const+0x16c> | |
| 2435c: e381e5fe orr lr, r1, #1065353216 ; 0x3f800000 | |
| 24360: ee00ea90 vmov s1, lr | |
| 24364: e000300c and r3, r0, ip | |
| 24368: e58d303c str r3, [sp, #60] ; 0x3c | |
| 2436c: eef1fa10 vmrs APSR_nzcv, fpscr | |
| 24370: eef41a42 vcmp.f32 s3, s4 | |
| 24374: e59d803c ldr r8, [sp, #60] ; 0x3c | |
| 24378: edcd0b12 vstr d16, [sp, #72] ; 0x48 | |
| 2437c: ed9d0a13 vldr s0, [sp, #76] ; 0x4c | |
| 24380: e28d0070 add r0, sp, #112 ; 0x70 | |
| 24384: e38885fe orr r8, r8, #1065353216 ; 0x3f800000 | |
| 24388: ee058a10 vmov s10, r8 | |
| 2438c: 0ef05a67 vmoveq.f32 s11, s15 | |
| 24390: 1ef05a47 vmovne.f32 s11, s14 | |
| 24394: eef1fa10 vmrs APSR_nzcv, fpscr | |
| 24398: e1a0100d mov r1, sp | |
| 2439c: e28d2010 add r2, sp, #16 | |
| 243a0: e28d3060 add r3, sp, #96 ; 0x60 | |
| 243a4: e58de028 str lr, [sp, #40] ; 0x28 | |
| 243a8: edcd0b04 vstr d16, [sp, #16] | |
| 243ac: edcd0b06 vstr d16, [sp, #24] | |
| 243b0: eef40a43 vcmp.f32 s1, s6 | |
| 243b4: edcd5a00 vstr s11, [sp] | |
| 243b8: e58dc080 str ip, [sp, #128] ; 0x80 | |
| 243bc: e58dc084 str ip, [sp, #132] ; 0x84 | |
| 243c0: e58dc088 str ip, [sp, #136] ; 0x88 | |
| 243c4: 0eb06a67 vmoveq.f32 s12, s15 | |
| 243c8: 1eb06a47 vmovne.f32 s12, s14 | |
| 243cc: eef1fa10 vmrs APSR_nzcv, fpscr | |
| 243d0: e58dc08c str ip, [sp, #140] ; 0x8c | |
| 243d4: e3a0c5fe mov ip, #1065353216 ; 0x3f800000 | |
| 243d8: e58d7020 str r7, [sp, #32] | |
| 243dc: ed8d6a01 vstr s12, [sp, #4] | |
| 243e0: e58dc060 str ip, [sp, #96] ; 0x60 | |
| 243e4: eeb45a40 vcmp.f32 s10, s0 | |
| 243e8: e58dc064 str ip, [sp, #100] ; 0x64 | |
| 243ec: e58dc068 str ip, [sp, #104] ; 0x68 | |
| 243f0: e58d6024 str r6, [sp, #36] ; 0x24 | |
| 243f4: e58d802c str r8, [sp, #44] ; 0x2c | |
| 243f8: 0ef06a67 vmoveq.f32 s13, s15 | |
| 243fc: 1ef06a47 vmovne.f32 s13, s14 | |
| 24400: eef1fa10 vmrs APSR_nzcv, fpscr | |
| 24404: edcd6a02 vstr s13, [sp, #8] | |
| 24408: 1ef07a47 vmovne.f32 s15, s14 | |
| 2440c: edcd7a03 vstr s15, [sp, #12] | |
| 24410: e58dc06c str ip, [sp, #108] ; 0x6c | |
| 24414: ebff9000 bl 841c <_ZNK5boost4simd3ext9implementIFNS0_3tag15bitwise_select_ENS_8dispatch4meta5simd_INS6_11arithmetic_INS0_6nativeIfNS3_15simd_emulation_ILj16EEEvEEEESB_EESE_SE_ENS5_3tag4cpu_EvEclERKSC_SK_SK_.constprop.1091> | |
| 24418: e1a00005 mov r0, r5 | |
| 2441c: e28d1050 add r1, sp, #80 ; 0x50 | |
| 24420: e1a02004 mov r2, r4 | |
| 24424: e28d3070 add r3, sp, #112 ; 0x70 | |
| 24428: ebff8ffb bl 841c <_ZNK5boost4simd3ext9implementIFNS0_3tag15bitwise_select_ENS_8dispatch4meta5simd_INS6_11arithmetic_INS0_6nativeIfNS3_15simd_emulation_ILj16EEEvEEEESB_EESE_SE_ENS5_3tag4cpu_EvEclERKSC_SK_SK_.constprop.1091> | |
| 2442c: e1a00005 mov r0, r5 | |
| 24430: e28dd090 add sp, sp, #144 ; 0x90 | |
| 24434: e8bd81f0 pop {r4, r5, r6, r7, r8, pc} | |
| 24438: bf800000 .word 0xbf800000 | |
| 2443c: bf800000 .word 0xbf800000 | |
| 24440: 00000000 .word 0x00000000 | |
| 24444: ffffffff .word 0xffffffff |
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