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psiha/gist:4038653

Created November 8, 2012 12:59
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signnz#3
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gistfile1.asm
00019448 <boost::simd::ext::implement<boost::simd::tag::signnz_ (boost::dispatch::meta::simd_<boost::dispatch::meta::floating_<boost::simd::native<float, boost::simd::tag::simd_emulation_<16u>, void> >, boost::simd::tag::simd_emulation_<16u> >), boost::dispatch::tag::cpu_, void>::operator()(boost::simd::native<float, boost::simd::tag::simd_emulation_<16u>, void> const&) const>:
19448: e92d49f8 push {r3, r4, r5, r6, r7, r8, fp, lr}
1944c: e28db01c add fp, sp, #28
19450: e92d4000 push {lr}
19454: fa0010d6 blx 1d7b4 <__gnu_mcount_nc>
19458: e24dd060 sub sp, sp, #96 ; 0x60
1945c: e28d500f add r5, sp, #15
19460: e1a04000 mov r4, r0
19464: e3c5500f bic r5, r5, #15
19468: e1a06002 mov r6, r2
1946c: e2857040 add r7, r5, #64 ; 0x40
19470: e2858010 add r8, r5, #16
19474: e1a01002 mov r1, r2
19478: e1a00007 mov r0, r7
1947c: ebffbb3c bl 8174 <_ZN5boost4simd3ext9implementIFNS0_3tag4map_ENS_8dispatch4meta12unspecified_INS5_7functorINS3_9is_unord_ENS5_3tag4cpu_EEEEENS6_8generic_INS7_INS0_6nativeIfNS3_15simd_emulation_ILj16EEEvEEEEEESK_ESB_vE6resultIFSM_RKSC_RKSI_SR_EE4implINS0_7logicalIfEEvE4callESP_SR_SR_.isra.755>
19480: e1a00008 mov r0, r8
19484: e2851020 add r1, r5, #32
19488: e1a02006 mov r2, r6
1948c: e3a03102 mov r3, #-2147483648 ; 0x80000000
19490: eddf0b12 vldr d16, [pc, #72] ; 194e0 <boost::simd::ext::implement<boost::simd::tag::signnz_ (boost::dispatch::meta::simd_<boost::dispatch::meta::floating_<boost::simd::native<float, boost::simd::tag::simd_emulation_<16u>, void> >, boost::simd::tag::simd_emulation_<16u> >), boost::dispatch::tag::cpu_, void>::operator()(boost::simd::native<float, boost::simd::tag::simd_emulation_<16u>, void> const&) const+0x98>
19494: e5853020 str r3, [r5, #32]
19498: edc50b0c vstr d16, [r5, #48] ; 0x30
1949c: edc50b0e vstr d16, [r5, #56] ; 0x38
194a0: e5853024 str r3, [r5, #36] ; 0x24
194a4: e5853028 str r3, [r5, #40] ; 0x28
194a8: e585302c str r3, [r5, #44] ; 0x2c
194ac: ebffba37 bl 7d90 <_ZN5boost4simd3ext9implementIFNS0_3tag4map_ENS_8dispatch4meta12unspecified_INS5_7functorINS3_12bitwise_and_ENS5_3tag4cpu_EEEEENS6_8generic_INS7_INS0_6nativeIfNS3_15simd_emulation_ILj16EEEvEEEEEESK_ESB_vE6resultIFSM_RKSC_RKSI_SR_EE4implIfvE4callESP_SR_SR_.isra.678>
194b0: e1a00005 mov r0, r5
194b4: e2851030 add r1, r5, #48 ; 0x30
194b8: e1a02008 mov r2, r8
194bc: ebffba5f bl 7e40 <_ZN5boost4simd3ext9implementIFNS0_3tag4map_ENS_8dispatch4meta12unspecified_INS5_7functorINS3_11bitwise_or_ENS5_3tag4cpu_EEEEENS6_8generic_INS7_INS0_6nativeIfNS3_15simd_emulation_ILj16EEEvEEEEEESK_ESB_vE6resultIFSM_RKSC_RKSI_SR_EE4implIfvE4callESP_SR_SR_.isra.680>
194c0: e1a00004 mov r0, r4
194c4: e1a01007 mov r1, r7
194c8: e1a02006 mov r2, r6
194cc: e1a03005 mov r3, r5
194d0: ebffbb3d bl 81cc <_ZNK5boost4simd3ext9implementIFNS0_3tag15bitwise_select_ENS_8dispatch4meta5simd_INS6_11arithmetic_INS0_6nativeIfNS3_15simd_emulation_ILj16EEEvEEEESB_EESE_SE_ENS5_3tag4cpu_EvEclERKSC_SK_SK_.isra.493>
194d4: e1a00004 mov r0, r4
194d8: e24bd01c sub sp, fp, #28
194dc: e8bd89f8 pop {r3, r4, r5, r6, r7, r8, fp, pc}
194e0: 3f800000 .word 0x3f800000
194e4: 3f800000 .word 0x3f800000
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