Created
July 27, 2018 07:07
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diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi | |
index 48be188..7fa135d 100644 | |
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi | |
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi | |
@@ -62,6 +62,12 @@ | |
clocks = <&gcc GCC_APPS_CLK_SRC>; | |
clock-frequency = <0>; | |
operating-points-v2 = <&cpu0_opp_table>; | |
+ | |
+ L2: l2-cache { | |
+ compatible = "qcom,arch-cache"; | |
+ cache-level = <2>; | |
+ qcom,saw = <&saw_l2>; | |
+ }; | |
}; | |
cpu@1 { | |
@@ -124,11 +130,6 @@ | |
opp-hz = /bits/ 64 <716000000>; | |
clock-latency-ns = <256000>; | |
}; | |
- | |
- L2: l2-cache { | |
- compatible = "cache"; | |
- cache-level = <2>; | |
- }; | |
}; | |
pmu { | |
@@ -341,6 +342,12 @@ | |
regulator; | |
}; | |
+ saw_l2: regulator@b012000 { | |
+ compatible = "qcom,saw2"; | |
+ reg = <0xb012000 0x1000>; | |
+ regulator; | |
+ }; | |
+ | |
serial@78af000 { | |
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; | |
reg = <0x78af000 0x200>; |
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