sample.hs

module Test where

import CLaSH.Prelude

ram_data :: Vec 5 (BitVector 3)
ram_data =    0b000
           :> 0b011
           :> 0b101
           :> 0b110
           :> 0b111
           :> Nil
           



getDat pos dat = dat !! pos

{-# ANN topEntity
  (defTop
    { t_name      = "test"
    , t_outputs   = ["LED"]
    , t_extraIn   = [ ("CLOCK_50", 1)
                    , ("RESET"   , 1)
                    ]
    , t_clocks    = [altpll "altpll50" "CLOCK_50(0)" "not RESET(0)"]
    })#-}

topEntity :: Signal (BitVector 3)
topEntity = s
  where
    s = mealy counterT (0, 1, 0b011) 0

counterT (cntr, pos, leds) z = ((cntr', pos', leds'), leds)
  where
    cntr_max = 16650000

    cntr' | cntr == cntr_max = 0
          | otherwise        = cntr + 1

    pos'  | pos == 5  = 1
          | cntr == 0 = pos + 1
          | otherwise = pos

    leds' | cntr == 0 = getDat pos ram_data
          | otherwise = leds