How PCI-e bandwidth and actual true data bandwidth can be calculated.
PCI-e 1.x uses an 8/10b encoding scheme, so to send 8 bits, 10 bits of encoded data must be transfered. 2 of those bits are there as error checking and correction bits to account for interference which is very common on fast buses. SATA btw also uses 8b/10b encoding, you loose 20% of bandwidth (1-8/10) to get the data across.
PCI-e 1.0 is clocked at 2.5Ghz, it sends 1 bit per clock cycle and each lane corresponds to a 1 bit bi-directional serial channel. Which is kind of neat since here 'Gigatransfers' indicate 1 bit transfered for every clock cycle. This should immediately tell us that unlike FSB which transfers multiple bts per cycle in a parallel fashion, PCI-e is serial, since we are sequentially throwing 1 bit of data per cycle onto the bus and it takes multiple cycles to send a full byte. While on a parallel bus multiple bytes can be sent per cycle.