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@ryan-summers
Created July 7, 2020 05:30
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Finished dev [unoptimized + debuginfo] target(s) in 0.02s
DEBUG cargo_project > Project::query(path=/home/ryan/repositories/quartiq/minimq/examples/minimq-stm32h7): root=/home/ryan/repositories/quartiq/minimq/examples/minimq-stm32h7
DEBUG cargo_project > workspace search: cwd=/home/ryan/repositories/quartiq/minimq/examples
DEBUG cargo_project > workspace search: cwd=/home/ryan/repositories/quartiq
Flashing /home/ryan/repositories/quartiq/minimq/examples/minimq-stm32h7/target/thumbv7em-none-eabihf/debug/minimq-stm32h7
DEBUG jaylink > libusb 1.0.23.11397
DEBUG jaylink > libusb has capability API: true
DEBUG jaylink > libusb has HID access: true
DEBUG jaylink > libusb has hotplug support: true
DEBUG jaylink > libusb can detach kernel driver: true
DEBUG probe_rs::probe::daplink::tools > Attempting to open 0483:374e in CMSIS-DAP v1 mode
DEBUG probe_rs::probe::stlink::usb_interface > Acquired libusb context.
DEBUG probe_rs::probe::stlink::usb_interface > Aquired handle for probe
DEBUG probe_rs::probe::stlink::usb_interface > Active config descriptor: ConfigDescriptor { bLength: 9, bDescriptorType: 2, wTotalLength: 128, bNumInterfaces: 4, bConfigurationValue: 1, iConfiguration: 4, bmAttributes: 128, bMaxPower: 250, extra: None }
DEBUG probe_rs::probe::stlink::usb_interface > Device descriptor: DeviceDescriptor { bLength: 18, bDescriptorType: 1, bcdUSB: 512, bDeviceClass: 239, bDeviceSubClass: 2, bDeviceProtocol: 1, bMaxPacketSize: 64, idVendor: 1155, idProduct: 14158, bcdDevice: 256, iManufacturer: 1, iProduct: 2, iSerialNumber: 3, bNumConfigurations: 1 }
DEBUG probe_rs::probe::stlink::usb_interface > Claimed interface 0 of USB device.
DEBUG probe_rs::probe::stlink::usb_interface > Succesfully attached to STLink.
DEBUG probe_rs::probe::stlink > Initializing STLink...
DEBUG probe_rs::probe::stlink > Current device mode: Jtag
DEBUG probe_rs::probe::stlink > STLink version: (3, 2)
INFO cargo_flash > Protocol speed 8000 kHz
DEBUG probe_rs::probe::stlink > attach(Swd)
DEBUG probe_rs::probe::stlink > Current device mode: Jtag
DEBUG probe_rs::probe::stlink > Switching protocol to SWD
WARN probe_rs::probe::stlink > check_status failed: Other(196)
DEBUG probe_rs::probe::stlink > Current device mode: Jtag
Error failed attaching to target
Caused by:
0: An error with the usage of the probe occured
1: An error specific to a probe type occured
2: Command failed with status Other(196)
Finished dev [unoptimized + debuginfo] target(s) in 0.02s
DEBUG cargo_project > Project::query(path=/home/ryan/repositories/quartiq/minimq/examples/minimq-stm32h7): root=/home/ryan/repositories/quartiq/minimq/examples/minimq-stm32h7
DEBUG cargo_project > workspace search: cwd=/home/ryan/repositories/quartiq/minimq/examples
DEBUG cargo_project > workspace search: cwd=/home/ryan/repositories/quartiq
Flashing /home/ryan/repositories/quartiq/minimq/examples/minimq-stm32h7/target/thumbv7em-none-eabihf/debug/minimq-stm32h7
DEBUG jaylink > libusb 1.0.23.11397
DEBUG jaylink > libusb has capability API: true
DEBUG jaylink > libusb has HID access: true
DEBUG jaylink > libusb has hotplug support: true
DEBUG jaylink > libusb can detach kernel driver: true
DEBUG probe_rs::probe::daplink::tools > Attempting to open 0483:374e in CMSIS-DAP v1 mode
DEBUG probe_rs::probe::stlink::usb_interface > Acquired libusb context.
DEBUG probe_rs::probe::stlink::usb_interface > Aquired handle for probe
DEBUG probe_rs::probe::stlink::usb_interface > Active config descriptor: ConfigDescriptor { bLength: 9, bDescriptorType: 2, wTotalLength: 128, bNumInterfaces: 4, bConfigurationValue: 1, iConfiguration: 4, bmAttributes: 128, bMaxPower: 250, extra: None }
DEBUG probe_rs::probe::stlink::usb_interface > Device descriptor: DeviceDescriptor { bLength: 18, bDescriptorType: 1, bcdUSB: 512, bDeviceClass: 239, bDeviceSubClass: 2, bDeviceProtocol: 1, bMaxPacketSize: 64, idVendor: 1155, idProduct: 14158, bcdDevice: 256, iManufacturer: 1, iProduct: 2, iSerialNumber: 3, bNumConfigurations: 1 }
DEBUG probe_rs::probe::stlink::usb_interface > Claimed interface 0 of USB device.
DEBUG probe_rs::probe::stlink::usb_interface > Succesfully attached to STLink.
DEBUG probe_rs::probe::stlink > Initializing STLink...
DEBUG probe_rs::probe::stlink > Current device mode: MassStorage
DEBUG probe_rs::probe::stlink > STLink version: (3, 2)
INFO cargo_flash > Protocol speed 8000 kHz
DEBUG probe_rs::probe::stlink > attach(Swd)
DEBUG probe_rs::probe::stlink > Current device mode: MassStorage
DEBUG probe_rs::probe::stlink > Switching protocol to SWD
DEBUG probe_rs::probe::stlink > Successfully initialized SWD.
DEBUG probe_rs::architecture::arm::communication_interface > Debug Port version: DPv2
DEBUG probe_rs::architecture::arm::communication_interface > Reading DP register DPIDR
DEBUG probe_rs::architecture::arm::communication_interface > Read DP register DPIDR, value=0x6ba02477
DEBUG probe_rs::architecture::arm::communication_interface > DebugPort ID: DebugPortId {
revision: 0x6,
part_no: 0xba,
version: DPv2,
min_dp_support: NotImplemented,
designer: JEP106Code({ cc: 0x04, id: 0x3b } => Some("ARM Ltd")),
}
DEBUG probe_rs::architecture::arm::communication_interface > Writing DP register ABORT, value=0x0000003c
DEBUG probe_rs::architecture::arm::communication_interface > Writing DP register SELECT, value=0x00000000
DEBUG probe_rs::architecture::arm::communication_interface > Requesting debug power
DEBUG probe_rs::architecture::arm::communication_interface > Writing DP register CTRL/STAT, value=0x50000000
DEBUG probe_rs::architecture::arm::communication_interface > Reading DP register CTRL/STAT
DEBUG probe_rs::architecture::arm::communication_interface > Read DP register CTRL/STAT, value=0xf8000040
DEBUG probe_rs::session > Autodetect: Trying DAP interface...
DEBUG probe_rs::architecture::arm::communication_interface > Reading register IDR
DEBUG probe_rs::architecture::arm::communication_interface > Changing AP to 0, AP_BANK_SEL to 15
DEBUG probe_rs::architecture::arm::communication_interface > Writing DP register SELECT, value=0x000000f0
DEBUG probe_rs::architecture::arm::communication_interface > Read register IDR, value=0x84770001
DEBUG probe_rs::architecture::arm::communication_interface > Reading register IDR
DEBUG probe_rs::architecture::arm::communication_interface > Changing AP to 1, AP_BANK_SEL to 15
DEBUG probe_rs::architecture::arm::communication_interface > Writing DP register SELECT, value=0x010000f0
DEBUG probe_rs::architecture::arm::communication_interface > Read register IDR, value=0x84770001
DEBUG probe_rs::architecture::arm::communication_interface > Reading register IDR
DEBUG probe_rs::architecture::arm::communication_interface > Changing AP to 2, AP_BANK_SEL to 15
DEBUG probe_rs::architecture::arm::communication_interface > Writing DP register SELECT, value=0x020000f0
DEBUG probe_rs::architecture::arm::communication_interface > Read register IDR, value=0x54770002
DEBUG probe_rs::architecture::arm::communication_interface > Reading register IDR
DEBUG probe_rs::architecture::arm::communication_interface > Changing AP to 3, AP_BANK_SEL to 15
DEBUG probe_rs::architecture::arm::communication_interface > Writing DP register SELECT, value=0x030000f0
DEBUG probe_rs::architecture::arm::communication_interface > Read register IDR, value=0x00000000
DEBUG probe_rs::architecture::arm::communication_interface > Reading register IDR
DEBUG probe_rs::architecture::arm::communication_interface > Changing AP to 0, AP_BANK_SEL to 15
DEBUG probe_rs::architecture::arm::communication_interface > Writing DP register SELECT, value=0x000000f0
DEBUG probe_rs::architecture::arm::communication_interface > Read register IDR, value=0x84770001
DEBUG probe_rs::architecture::arm::communication_interface > IDR {
REVISION: 0x8,
DESIGNER: 0x23b,
CLASS: MEMAP,
_RES0: 0x0,
VARIANT: 0x0,
TYPE: AMBA_AHB3,
}
DEBUG probe_rs::architecture::arm::communication_interface > Reading register BASE
DEBUG probe_rs::architecture::arm::communication_interface > Read register BASE, value=0xe00fe003
DEBUG probe_rs::architecture::arm::communication_interface > Reading register BASE2
DEBUG probe_rs::architecture::arm::communication_interface > Read register BASE2, value=0x00000000
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000010
DEBUG probe_rs::architecture::arm::communication_interface > Changing AP to 0, AP_BANK_SEL to 0
DEBUG probe_rs::architecture::arm::communication_interface > Writing DP register SELECT, value=0x00000000
DEBUG probe_rs::architecture::arm::communication_interface > Reading register CSW
DEBUG probe_rs::architecture::arm::communication_interface > Read register CSW, value=0x43800050
INFO probe_rs::architecture::arm::memory::romtable > Reading component data at: e00fe000
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FEFF0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe00feff0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > CIDR: [d, 10, 5, b1]
DEBUG probe_rs::architecture::arm::memory::romtable > Reading debug id from address: e00fefd0
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FEFD0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe00fefd0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FEFE0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe00fefe0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Raw peripheral id: [50, 4, a, 0, 0, 0, 0, 0]
INFO probe_rs::architecture::arm::memory::romtable > Component class: RomTable
INFO probe_rs::architecture::arm::memory::romtable > Component peripheral id: PeripheralID { REVAND: 0, CMOD: No, REVISION: 0, JEP106: Some(JEP106Code({ cc: 0x00, id: 0x20 } => Some("STMicroelectronics"))), PART: 450, SIZE: 1 }
INFO probe_rs::architecture::arm::memory::romtable > Reading rom table entry at e00fe000
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FE000
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 4 at address 0xe00fe000
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=1 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Parsing raw rom table entry: 0x01003
INFO probe_rs::architecture::arm::memory::romtable > Reading rom table entry at e00fe004
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FE004
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 4 at address 0xe00fe004
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=1 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Parsing raw rom table entry: 0xfff43003
INFO probe_rs::architecture::arm::memory::romtable > Reading rom table entry at e00fe008
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FE008
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 4 at address 0xe00fe008
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=1 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Parsing raw rom table entry: 0xfff45003
INFO probe_rs::architecture::arm::memory::romtable > Reading rom table entry at e00fe00c
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FE00C
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 4 at address 0xe00fe00c
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=1 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Parsing raw rom table entry: 0x1ff02002
INFO probe_rs::architecture::arm::memory::romtable > Reading rom table entry at e00fe010
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FE010
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 4 at address 0xe00fe010
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=1 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
INFO probe_rs::architecture::arm::memory::romtable > Entry consists of all zeroes, stopping.
INFO probe_rs::architecture::arm::memory::romtable > Reading component data at: e00ff000
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FFFF0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe00ffff0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > CIDR: [d, 10, 5, b1]
DEBUG probe_rs::architecture::arm::memory::romtable > Reading debug id from address: e00fffd0
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FFFD0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe00fffd0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FFFE0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe00fffe0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Raw peripheral id: [c7, b4, b, 0, 4, 0, 0, 0]
INFO probe_rs::architecture::arm::memory::romtable > Component class: RomTable
INFO probe_rs::architecture::arm::memory::romtable > Component peripheral id: PeripheralID { REVAND: 0, CMOD: No, REVISION: 0, JEP106: Some(JEP106Code({ cc: 0x04, id: 0x3b } => Some("ARM Ltd"))), PART: 4c7, SIZE: 1 }
INFO probe_rs::architecture::arm::memory::romtable > Reading rom table entry at e00ff000
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FF000
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 4 at address 0xe00ff000
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=1 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Parsing raw rom table entry: 0xfff0f003
INFO probe_rs::architecture::arm::memory::romtable > Reading rom table entry at e00ff004
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FF004
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 4 at address 0xe00ff004
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=1 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Parsing raw rom table entry: 0xfff02003
INFO probe_rs::architecture::arm::memory::romtable > Reading rom table entry at e00ff008
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FF008
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 4 at address 0xe00ff008
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=1 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Parsing raw rom table entry: 0xfff03003
INFO probe_rs::architecture::arm::memory::romtable > Reading rom table entry at e00ff00c
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FF00C
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 4 at address 0xe00ff00c
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=1 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Parsing raw rom table entry: 0xfff01003
INFO probe_rs::architecture::arm::memory::romtable > Reading rom table entry at e00ff010
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FF010
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 4 at address 0xe00ff010
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=1 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Parsing raw rom table entry: 0xfff41002
INFO probe_rs::architecture::arm::memory::romtable > Reading rom table entry at e00ff014
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FF014
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 4 at address 0xe00ff014
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=1 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Parsing raw rom table entry: 0xfff42002
INFO probe_rs::architecture::arm::memory::romtable > Reading rom table entry at e00ff018
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE00FF018
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 4 at address 0xe00ff018
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=1 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
INFO probe_rs::architecture::arm::memory::romtable > Entry consists of all zeroes, stopping.
INFO probe_rs::architecture::arm::memory::romtable > Reading component data at: e000e000
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE000EFF0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe000eff0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > CIDR: [d, e0, 5, b1]
DEBUG probe_rs::architecture::arm::memory::romtable > Reading debug id from address: e000efd0
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE000EFD0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe000efd0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE000EFE0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe000efe0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Raw peripheral id: [c, b0, b, 0, 4, 0, 0, 0]
INFO probe_rs::architecture::arm::memory::romtable > Component class: GenericIPComponent
INFO probe_rs::architecture::arm::memory::romtable > Component peripheral id: PeripheralID { REVAND: 0, CMOD: No, REVISION: 0, JEP106: Some(JEP106Code({ cc: 0x04, id: 0x3b } => Some("ARM Ltd"))), PART: c, SIZE: 1 }
INFO probe_rs::architecture::arm::memory::romtable > Reading component data at: e0001000
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE0001FF0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe0001ff0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > CIDR: [d, e0, 5, b1]
DEBUG probe_rs::architecture::arm::memory::romtable > Reading debug id from address: e0001fd0
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE0001FD0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe0001fd0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE0001FE0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe0001fe0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Raw peripheral id: [2, b0, b, 0, 4, 0, 0, 0]
INFO probe_rs::architecture::arm::memory::romtable > Component class: GenericIPComponent
INFO probe_rs::architecture::arm::memory::romtable > Component peripheral id: PeripheralID { REVAND: 0, CMOD: No, REVISION: 0, JEP106: Some(JEP106Code({ cc: 0x04, id: 0x3b } => Some("ARM Ltd"))), PART: 2, SIZE: 1 }
INFO probe_rs::architecture::arm::memory::romtable > Reading component data at: e0002000
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE0002FF0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe0002ff0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > CIDR: [d, e0, 5, b1]
DEBUG probe_rs::architecture::arm::memory::romtable > Reading debug id from address: e0002fd0
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE0002FD0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe0002fd0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE0002FE0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe0002fe0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Raw peripheral id: [e, b0, b, 0, 4, 0, 0, 0]
INFO probe_rs::architecture::arm::memory::romtable > Component class: GenericIPComponent
INFO probe_rs::architecture::arm::memory::romtable > Component peripheral id: PeripheralID { REVAND: 0, CMOD: No, REVISION: 0, JEP106: Some(JEP106Code({ cc: 0x04, id: 0x3b } => Some("ARM Ltd"))), PART: e, SIZE: 1 }
INFO probe_rs::architecture::arm::memory::romtable > Reading component data at: e0000000
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE0000FF0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe0000ff0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > CIDR: [d, e0, 5, b1]
DEBUG probe_rs::architecture::arm::memory::romtable > Reading debug id from address: e0000fd0
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE0000FD0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe0000fd0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE0000FE0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe0000fe0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Raw peripheral id: [1, b0, b, 0, 4, 0, 0, 0]
INFO probe_rs::architecture::arm::memory::romtable > Component class: GenericIPComponent
INFO probe_rs::architecture::arm::memory::romtable > Component peripheral id: PeripheralID { REVAND: 0, CMOD: No, REVISION: 0, JEP106: Some(JEP106Code({ cc: 0x04, id: 0x3b } => Some("ARM Ltd"))), PART: 1, SIZE: 1 }
INFO probe_rs::architecture::arm::memory::romtable > Reading component data at: e0041000
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE0041FF0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe0041ff0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > CIDR: [d, 90, 5, b1]
DEBUG probe_rs::architecture::arm::memory::romtable > Reading debug id from address: e0041fd0
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE0041FD0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe0041fd0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE0041FE0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe0041fe0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Raw peripheral id: [75, b9, 1b, 0, 4, 0, 0, 0]
INFO probe_rs::architecture::arm::memory::romtable > Component class: CoreSightComponent
INFO probe_rs::architecture::arm::memory::romtable > Component peripheral id: PeripheralID { REVAND: 0, CMOD: No, REVISION: 1, JEP106: Some(JEP106Code({ cc: 0x04, id: 0x3b } => Some("ARM Ltd"))), PART: 975, SIZE: 1 }
INFO probe_rs::architecture::arm::memory::romtable > Reading component data at: e0043000
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE0043FF0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe0043ff0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > CIDR: [d, 90, 5, b1]
DEBUG probe_rs::architecture::arm::memory::romtable > Reading debug id from address: e0043fd0
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE0043FD0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe0043fd0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::communication_interface > Writing register CSW, value=0x63000012
DEBUG probe_rs::architecture::arm::communication_interface > Writing register TAR, value=0xE0043FE0
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Read first block with len 16 at address 0xe0043fe0
DEBUG probe_rs::architecture::arm::communication_interface > Reading register DRW, block with len=4 words
DEBUG probe_rs::architecture::arm::memory::adi_v5_memory_interface > Finished reading block
DEBUG probe_rs::architecture::arm::memory::romtable > Raw peripheral id: [6, b9, 4b, 0, 4, 0, 0, 0]
INFO probe_rs::architecture::arm::memory::romtable > Component class: CoreSightComponent
INFO probe_rs::architecture::arm::memory::romtable > Component peripheral id: PeripheralID { REVAND: 0, CMOD: No, REVISION: 4, JEP106: Some(JEP106Code({ cc: 0x04, id: 0x3b } => Some("ARM Ltd"))), PART: 906, SIZE: 1 }
DEBUG probe_rs::probe::stlink > Current device mode: Jtag
Error failed attaching to target
Caused by:
0: Unable to load specification for chip
1: The connected chip could not automatically be determined.
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