Created
October 23, 2020 05:54
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sceFpu library for Sony PSP mips floating point unit
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| 0x00015a2c <sceFpuGetFCR31+0>: cfc1 v0,$31 | |
| 0x00015a30 <sceFpuGetFCR31+4>: jr ra | |
| 0x00015a34 <sceFpuGetFCR31+8>: nop | |
| 0x00015a38 <sceFpuSetFCR31+0>: cfc1 v0,$31 | |
| 0x00015a3c <sceFpuSetFCR31+4>: ctc1 zero,$31 | |
| 0x00015a40 <sceFpuSetFCR31+8>: nop | |
| 0x00015a44 <sceFpuSetFCR31+12>: ctc1 a0,$31 | |
| 0x00015a48 <sceFpuSetFCR31+16>: jr ra | |
| 0x00015a4c <sceFpuSetFCR31+20>: nop | |
| 0x00015a50 <sceFpuAbs+0>: jr ra | |
| 0x00015a54 <sceFpuAbs+4>: abs.s $f0,$f12 | |
| 0x00015a58 <sceFpuCeil+0>: ceil.w.s $f1,$f12 | |
| 0x00015a5c <sceFpuCeil+4>: mfc1 v0,$f1 | |
| 0x00015a60 <sceFpuCeil+8>: jr ra | |
| 0x00015a64 <sceFpuCeil+12>: nop | |
| 0x00015a68 <sceFpuFloor+0>: floor.w.s $f1,$f12 | |
| 0x00015a6c <sceFpuFloor+4>: mfc1 v0,$f1 | |
| 0x00015a70 <sceFpuFloor+8>: jr ra | |
| 0x00015a74 <sceFpuFloor+12>: nop | |
| 0x00015a78 <sceFpuMax+0>: c.lt.s $f13,$f12 | |
| 0x00015a7c <sceFpuMax+4>: nop | |
| 0x00015a80 <sceFpuMax+8>: bc1t 0x15a8c <sceFpuMax+20> | |
| 0x00015a84 <sceFpuMax+12>: mov.s $f0,$f12 | |
| 0x00015a88 <sceFpuMax+16>: mov.s $f0,$f13 | |
| 0x00015a8c <sceFpuMax+20>: jr ra | |
| 0x00015a90 <sceFpuMax+24>: nop | |
| 0x00015a94 <sceFpuMin+0>: c.lt.s $f12,$f13 | |
| 0x00015a98 <sceFpuMin+4>: nop | |
| 0x00015a9c <sceFpuMin+8>: bc1t 0x15aa8 <sceFpuMin+20> | |
| 0x00015aa0 <sceFpuMin+12>: mov.s $f0,$f12 | |
| 0x00015aa4 <sceFpuMin+16>: mov.s $f0,$f13 | |
| 0x00015aa8 <sceFpuMin+20>: jr ra | |
| 0x00015aac <sceFpuMin+24>: nop | |
| 0x00015ab0 <sceFpuNeg+0>: jr ra | |
| 0x00015ab4 <sceFpuNeg+4>: neg.s $f0,$f12 | |
| 0x00015ab8 <sceFpuRound+0>: round.w.s $f1,$f12 | |
| 0x00015abc <sceFpuRound+4>: mfc1 v0,$f1 | |
| 0x00015ac0 <sceFpuRound+8>: jr ra | |
| 0x00015ac4 <sceFpuRound+12>: nop | |
| 0x00015ac8 <sceFpuRsqrt+0>: sqrt.s $f2,$f12 | |
| 0x00015acc <sceFpuRsqrt+4>: lui v1,0xd | |
| 0x00015ad0 <sceFpuRsqrt+8>: lwc1 $f1,31256(v1) | |
| 0x00015ad4 <sceFpuRsqrt+12>: jr ra | |
| 0x00015ad8 <sceFpuRsqrt+16>: div.s $f0,$f1,$f2 | |
| 0x00015adc <sceFpuSqrt+0>: jr ra | |
| 0x00015ae0 <sceFpuSqrt+4>: sqrt.s $f0,$f12 | |
| 0x00015ae4 <sceFpuTrunc+0>: trunc.w.s $f1,$f12 | |
| 0x00015ae8 <sceFpuTrunc+4>: mfc1 v0,$f1 | |
| 0x00015aec <sceFpuTrunc+8>: jr ra | |
| 0x00015af0 <sceFpuTrunc+12>: nop | |
| 0x00015af4 <sceFpuFmod+0>: div.s $f0,$f12,$f13 | |
| 0x00015af8 <sceFpuFmod+4>: trunc.w.s $f0,$f0 | |
| 0x00015afc <sceFpuFmod+8>: cvt.s.w $f0,$f0 | |
| 0x00015b00 <sceFpuFmod+12>: mul.s $f0,$f0,$f13 | |
| 0x00015b04 <sceFpuFmod+16>: sub.s $f0,$f12,$f0 | |
| 0x00015b08 <sceFpuFmod+20>: jr ra | |
| 0x00015b0c <sceFpuFmod+24>: nop | |
| 0x00015b10 <sceFpuFrac+0>: trunc.w.s $f0,$f12 | |
| 0x00015b14 <sceFpuFrac+4>: cvt.s.w $f0,$f0 | |
| 0x00015b18 <sceFpuFrac+8>: sub.s $f0,$f12,$f0 | |
| 0x00015b1c <sceFpuFrac+12>: jr ra | |
| 0x00015b20 <sceFpuFrac+16>: nop | |
| 0x00015b24 <sceFpuReinterpretFloat+0>: mtc1 a0,$f0 | |
| 0x00015b28 <sceFpuReinterpretFloat+4>: jr ra | |
| 0x00015b2c <sceFpuReinterpretFloat+8>: nop | |
| 0x00015b30 <sceFpuReinterpretUint+0>: mfc1 v0,$f12 | |
| 0x00015b34 <sceFpuReinterpretUint+4>: jr ra | |
| 0x00015b38 <sceFpuReinterpretUint+8>: nop | |
| 0x00015b3c <sceFpuIsEqual+0>: c.eq.s $f13,$f12 | |
| 0x00015b40 <sceFpuIsEqual+4>: move v0,zero | |
| 0x00015b44 <sceFpuIsEqual+8>: bc1tl 0x15b4c <sceFpuIsEqual+16> | |
| 0x00015b48 <sceFpuIsEqual+12>: li v0,1 | |
| 0x00015b4c <sceFpuIsEqual+16>: jr ra | |
| 0x00015b50 <sceFpuIsEqual+20>: nop | |
| 0x00015b54 <sceFpuSignFloat+0>: mfc1 t0,$f12 | |
| 0x00015b58 <sceFpuSignFloat+4>: lui t2,0x3f80 | |
| 0x00015b5c <sceFpuSignFloat+8>: srl t1,t0,0x17 | |
| 0x00015b60 <sceFpuSignFloat+12>: srl t0,t0,0x1f | |
| 0x00015b64 <sceFpuSignFloat+16>: andi t1,t1,0xff | |
| 0x00015b68 <sceFpuSignFloat+20>: sll t0,t0,0x1f | |
| 0x00015b6c <sceFpuSignFloat+24>: movz t2,zero,t1 | |
| 0x00015b70 <sceFpuSignFloat+28>: or t2,t2,t0 | |
| 0x00015b74 <sceFpuSignFloat+32>: mtc1 t2,$f0 | |
| 0x00015b78 <sceFpuSignFloat+36>: jr ra | |
| 0x00015b7c <sceFpuSignFloat+40>: nop | |
| 0x00015b80 <sceFpuSignInt+0>: mfc1 v0,$f12 | |
| 0x00015b84 <sceFpuSignInt+4>: lui t0,0x7f80 | |
| 0x00015b88 <sceFpuSignInt+8>: and t0,t0,v0 | |
| 0x00015b8c <sceFpuSignInt+12>: sra v0,v0,0x1e | |
| 0x00015b90 <sceFpuSignInt+16>: ori v0,v0,0x1 | |
| 0x00015b94 <sceFpuSignInt+20>: movz v0,zero,t0 | |
| 0x00015b98 <sceFpuSignInt+24>: jr ra | |
| 0x00015b9c <sceFpuSignInt+28>: nop | |
| 0x00015ba0 <sceFpuPositiveZero+0>: mtc1 zero,$f0 | |
| 0x00015ba4 <sceFpuPositiveZero+4>: jr ra | |
| 0x00015ba8 <sceFpuPositiveZero+8>: nop | |
| 0x00015bac <sceFpuNegativeZero+0>: lui t0,0x8000 | |
| 0x00015bb0 <sceFpuNegativeZero+4>: mtc1 t0,$f0 | |
| 0x00015bb4 <sceFpuNegativeZero+8>: jr ra | |
| 0x00015bb8 <sceFpuNegativeZero+12>: nop | |
| 0x00015bbc <sceFpuIsZero+0>: mfc1 t0,$f12 | |
| 0x00015bc0 <sceFpuIsZero+4>: sra v0,t0,0x1e | |
| 0x00015bc4 <sceFpuIsZero+8>: sll t0,t0,0x1 | |
| 0x00015bc8 <sceFpuIsZero+12>: ori v0,v0,0x1 | |
| 0x00015bcc <sceFpuIsZero+16>: movn v0,zero,t0 | |
| 0x00015bd0 <sceFpuIsZero+20>: jr ra | |
| 0x00015bd4 <sceFpuIsZero+24>: nop | |
| 0x00015bd8 <sceFpuIsPositiveZero+0>: mfc1 v0,$f12 | |
| 0x00015bdc <sceFpuIsPositiveZero+4>: sltiu v0,v0,1 | |
| 0x00015be0 <sceFpuIsPositiveZero+8>: jr ra | |
| 0x00015be4 <sceFpuIsPositiveZero+12>: nop | |
| 0x00015be8 <sceFpuIsNegativeZero+0>: mfc1 v0,$f12 | |
| 0x00015bec <sceFpuIsNegativeZero+4>: lui t0,0x8000 | |
| 0x00015bf0 <sceFpuIsNegativeZero+8>: xor v0,v0,t0 | |
| 0x00015bf4 <sceFpuIsNegativeZero+12>: sltiu v0,v0,1 | |
| 0x00015bf8 <sceFpuIsNegativeZero+16>: jr ra | |
| 0x00015bfc <sceFpuIsNegativeZero+20>: nop | |
| 0x00015c00 <sceFpuIsDenormal+0>: mfc1 t0,$f12 | |
| 0x00015c04 <sceFpuIsDenormal+4>: lui t1,0x7f80 | |
| 0x00015c08 <sceFpuIsDenormal+8>: or v0,t0,t1 | |
| 0x00015c0c <sceFpuIsDenormal+12>: and t1,t0,t1 | |
| 0x00015c10 <sceFpuIsDenormal+16>: sra v0,v0,0x1e | |
| 0x00015c14 <sceFpuIsDenormal+20>: sll t0,t0,0x9 | |
| 0x00015c18 <sceFpuIsDenormal+24>: movn v0,zero,t1 | |
| 0x00015c1c <sceFpuIsDenormal+28>: movz v0,zero,t0 | |
| 0x00015c20 <sceFpuIsDenormal+32>: jr ra | |
| 0x00015c24 <sceFpuIsDenormal+36>: nop | |
| 0x00015c28 <sceFpuIsZeroOrDenormal+0>: mfc1 t0,$f12 | |
| 0x00015c2c <sceFpuIsZeroOrDenormal+4>: lui t1,0x7f80 | |
| 0x00015c30 <sceFpuIsZeroOrDenormal+8>: or v0,t0,t1 | |
| 0x00015c34 <sceFpuIsZeroOrDenormal+12>: and t1,t0,t1 | |
| 0x00015c38 <sceFpuIsZeroOrDenormal+16>: sra v0,v0,0x1e | |
| 0x00015c3c <sceFpuIsZeroOrDenormal+20>: movn v0,zero,t1 | |
| 0x00015c40 <sceFpuIsZeroOrDenormal+24>: jr ra | |
| 0x00015c44 <sceFpuIsZeroOrDenormal+28>: nop | |
| 0x00015c48 <sceFpuPositiveInf+0>: lui t0,0x7f80 | |
| 0x00015c4c <sceFpuPositiveInf+4>: mtc1 t0,$f0 | |
| 0x00015c50 <sceFpuPositiveInf+8>: jr ra | |
| 0x00015c54 <sceFpuPositiveInf+12>: nop | |
| 0x00015c58 <sceFpuNegativeInf+0>: lui t0,0xff80 | |
| 0x00015c5c <sceFpuNegativeInf+4>: mtc1 t0,$f0 | |
| 0x00015c60 <sceFpuNegativeInf+8>: jr ra | |
| 0x00015c64 <sceFpuNegativeInf+12>: nop | |
| 0x00015c68 <sceFpuIsInf+0>: mfc1 t0,$f12 | |
| 0x00015c6c <sceFpuIsInf+4>: sll t1,t0,0x1 | |
| 0x00015c70 <sceFpuIsInf+8>: sra v0,t0,0x1e | |
| 0x00015c74 <sceFpuIsInf+12>: srl t1,t1,0x18 | |
| 0x00015c78 <sceFpuIsInf+16>: sll t0,t0,0x9 | |
| 0x00015c7c <sceFpuIsInf+20>: ori v0,v0,0x1 | |
| 0x00015c80 <sceFpuIsInf+24>: sltiu t1,t1,255 | |
| 0x00015c84 <sceFpuIsInf+28>: movn v0,zero,t0 | |
| 0x00015c88 <sceFpuIsInf+32>: movn v0,zero,t1 | |
| 0x00015c8c <sceFpuIsInf+36>: jr ra | |
| 0x00015c90 <sceFpuIsInf+40>: nop | |
| 0x00015c94 <sceFpuPositiveNaN+0>: lui t0,0x7f80 | |
| 0x00015c98 <sceFpuPositiveNaN+4>: ori t0,t0,0x1 | |
| 0x00015c9c <sceFpuPositiveNaN+8>: mtc1 t0,$f0 | |
| 0x00015ca0 <sceFpuPositiveNaN+12>: jr ra | |
| 0x00015ca4 <sceFpuPositiveNaN+16>: nop | |
| 0x00015ca8 <sceFpuNegativeNaN+0>: lui t0,0xff80 | |
| 0x00015cac <sceFpuNegativeNaN+4>: ori t0,t0,0x1 | |
| 0x00015cb0 <sceFpuNegativeNaN+8>: mtc1 t0,$f0 | |
| 0x00015cb4 <sceFpuNegativeNaN+12>: jr ra | |
| 0x00015cb8 <sceFpuNegativeNaN+16>: nop | |
| 0x00015cbc <sceFpuPositiveQNaN+0>: lui t0,0x7fc0 | |
| 0x00015cc0 <sceFpuPositiveQNaN+4>: mtc1 t0,$f0 | |
| 0x00015cc4 <sceFpuPositiveQNaN+8>: jr ra | |
| 0x00015cc8 <sceFpuPositiveQNaN+12>: nop | |
| 0x00015ccc <sceFpuNegativeQNaN+0>: lui t0,0xffc0 | |
| 0x00015cd0 <sceFpuNegativeQNaN+4>: mtc1 t0,$f0 | |
| 0x00015cd4 <sceFpuNegativeQNaN+8>: jr ra | |
| 0x00015cd8 <sceFpuNegativeQNaN+12>: nop | |
| 0x00015cdc <sceFpuPositiveSNaN+0>: li t1,1 | |
| 0x00015ce0 <sceFpuPositiveSNaN+4>: ext t0,a0,0x0,0x16 | |
| 0x00015ce4 <sceFpuPositiveSNaN+8>: movn t1,t0,t0 | |
| 0x00015ce8 <sceFpuPositiveSNaN+12>: lui t0,0x7f80 | |
| 0x00015cec <sceFpuPositiveSNaN+16>: or t1,t1,t0 | |
| 0x00015cf0 <sceFpuPositiveSNaN+20>: mtc1 t1,$f0 | |
| 0x00015cf4 <sceFpuPositiveSNaN+24>: jr ra | |
| 0x00015cf8 <sceFpuPositiveSNaN+28>: nop | |
| 0x00015cfc <sceFpuNegativeSNaN+0>: li t1,1 | |
| 0x00015d00 <sceFpuNegativeSNaN+4>: ext t0,a0,0x0,0x16 | |
| 0x00015d04 <sceFpuNegativeSNaN+8>: movn t1,t0,t0 | |
| 0x00015d08 <sceFpuNegativeSNaN+12>: lui t0,0xff80 | |
| 0x00015d0c <sceFpuNegativeSNaN+16>: or t1,t1,t0 | |
| 0x00015d10 <sceFpuNegativeSNaN+20>: mtc1 t1,$f0 | |
| 0x00015d14 <sceFpuNegativeSNaN+24>: jr ra | |
| 0x00015d18 <sceFpuNegativeSNaN+28>: nop | |
| 0x00015d1c <sceFpuIsNaN+0>: lui v0,0x807f | |
| 0x00015d20 <sceFpuIsNaN+4>: mfc1 t0,$f12 | |
| 0x00015d24 <sceFpuIsNaN+8>: ori v0,v0,0xffff | |
| 0x00015d28 <sceFpuIsNaN+12>: sll t1,t0,0x1 | |
| 0x00015d2c <sceFpuIsNaN+16>: and v0,v0,t0 | |
| 0x00015d30 <sceFpuIsNaN+20>: srl t1,t1,0x18 | |
| 0x00015d34 <sceFpuIsNaN+24>: sll t0,t0,0x9 | |
| 0x00015d38 <sceFpuIsNaN+28>: sltiu t1,t1,255 | |
| 0x00015d3c <sceFpuIsNaN+32>: movz v0,zero,t0 | |
| 0x00015d40 <sceFpuIsNaN+36>: movn v0,zero,t1 | |
| 0x00015d44 <sceFpuIsNaN+40>: jr ra | |
| 0x00015d48 <sceFpuIsNaN+44>: nop | |
| 0x00015d4c <sceFpuIsInfOrNaN+0>: mfc1 v0,$f12 | |
| 0x00015d50 <sceFpuIsInfOrNaN+4>: sll t0,v0,0x1 | |
| 0x00015d54 <sceFpuIsInfOrNaN+8>: sra v0,v0,0x1e | |
| 0x00015d58 <sceFpuIsInfOrNaN+12>: srl t0,t0,0x18 | |
| 0x00015d5c <sceFpuIsInfOrNaN+16>: ori v0,v0,0x1 | |
| 0x00015d60 <sceFpuIsInfOrNaN+20>: sltiu t0,t0,255 | |
| 0x00015d64 <sceFpuIsInfOrNaN+24>: movn v0,zero,t0 | |
| 0x00015d68 <sceFpuIsInfOrNaN+28>: jr ra | |
| 0x00015d6c <sceFpuIsInfOrNaN+32>: nop | |
| 0x00015d70 <sceFpuNormalizePhase+0>: lui v1,0xd | |
| 0x00015d74 <sceFpuNormalizePhase+4>: lwc1 $f2,31260(v1) | |
| 0x00015d78 <sceFpuNormalizePhase+8>: div.s $f0,$f12,$f2 | |
| 0x00015d7c <sceFpuNormalizePhase+12>: round.w.s $f0,$f0 | |
| 0x00015d80 <sceFpuNormalizePhase+16>: cvt.s.w $f0,$f0 | |
| 0x00015d84 <sceFpuNormalizePhase+20>: mul.s $f0,$f0,$f2 | |
| 0x00015d88 <sceFpuNormalizePhase+24>: sub.s $f3,$f12,$f0 | |
| 0x00015d8c <sceFpuNormalizePhase+28>: jr ra | |
| 0x00015d90 <sceFpuNormalizePhase+32>: mov.s $f0,$f3 | |
| 0x00015d94 <sceFpuSin+0>: c.eq.s $f12,$f12 | |
| 0x00015d98 <sceFpuSin+4>: li v1,1 | |
| 0x00015d9c <sceFpuSin+8>: bc1f 0x15ec0 <sceFpuSin+300> | |
| 0x00015da0 <sceFpuSin+12>: mov.s $f0,$f12 | |
| 0x00015da4 <sceFpuSin+16>: mtc1 zero,$f1 | |
| 0x00015da8 <sceFpuSin+20>: lui a0,0xd | |
| 0x00015dac <sceFpuSin+24>: c.lt.s $f12,$f1 | |
| 0x00015db0 <sceFpuSin+28>: nop | |
| 0x00015db4 <sceFpuSin+32>: bc1f 0x15dc4 <sceFpuSin+48> | |
| 0x00015db8 <sceFpuSin+36>: lwc1 $f3,31264(a0) | |
| 0x00015dbc <sceFpuSin+40>: neg.s $f12,$f12 | |
| 0x00015dc0 <sceFpuSin+44>: li v1,-1 | |
| 0x00015dc4 <sceFpuSin+48>: c.lt.s $f3,$f12 | |
| 0x00015dc8 <sceFpuSin+52>: nop | |
| 0x00015dcc <sceFpuSin+56>: bc1f 0x15de8 <sceFpuSin+84> | |
| 0x00015dd0 <sceFpuSin+60>: lui a1,0xd | |
| 0x00015dd4 <sceFpuSin+64>: div.s $f2,$f12,$f3 | |
| 0x00015dd8 <sceFpuSin+68>: trunc.w.s $f1,$f2 | |
| 0x00015ddc <sceFpuSin+72>: cvt.s.w $f4,$f1 | |
| 0x00015de0 <sceFpuSin+76>: mul.s $f0,$f4,$f3 | |
| 0x00015de4 <sceFpuSin+80>: sub.s $f12,$f12,$f0 | |
| 0x00015de8 <sceFpuSin+84>: lwc1 $f2,31268(a1) | |
| 0x00015dec <sceFpuSin+88>: mul.s $f3,$f3,$f2 | |
| 0x00015df0 <sceFpuSin+92>: c.lt.s $f3,$f12 | |
| 0x00015df4 <sceFpuSin+96>: nop | |
| 0x00015df8 <sceFpuSin+100>: bc1f 0x15e08 <sceFpuSin+116> | |
| 0x00015dfc <sceFpuSin+104>: mul.s $f2,$f3,$f2 | |
| 0x00015e00 <sceFpuSin+108>: sub.s $f12,$f12,$f3 | |
| 0x00015e04 <sceFpuSin+112>: negu v1,v1 | |
| 0x00015e08 <sceFpuSin+116>: c.lt.s $f2,$f12 | |
| 0x00015e0c <sceFpuSin+120>: nop | |
| 0x00015e10 <sceFpuSin+124>: bc1tl 0x15e18 <sceFpuSin+132> | |
| 0x00015e14 <sceFpuSin+128>: sub.s $f12,$f3,$f12 | |
| 0x00015e18 <sceFpuSin+132>: lui a2,0xd | |
| 0x00015e1c <sceFpuSin+136>: lwc1 $f3,31272(a2) | |
| 0x00015e20 <sceFpuSin+140>: c.lt.s $f3,$f12 | |
| 0x00015e24 <sceFpuSin+144>: nop | |
| 0x00015e28 <sceFpuSin+148>: bc1fl 0x15e80 <sceFpuSin+236> | |
| 0x00015e2c <sceFpuSin+152>: mul.s $f6,$f12,$f12 | |
| 0x00015e30 <sceFpuSin+156>: sub.s $f18,$f2,$f12 | |
| 0x00015e34 <sceFpuSin+160>: lui t1,0xd | |
| 0x00015e38 <sceFpuSin+164>: lwc1 $f17,31276(t1) | |
| 0x00015e3c <sceFpuSin+168>: lui t0,0xd | |
| 0x00015e40 <sceFpuSin+172>: mul.s $f10,$f18,$f18 | |
| 0x00015e44 <sceFpuSin+176>: lwc1 $f15,31280(t0) | |
| 0x00015e48 <sceFpuSin+180>: lui a3,0xd | |
| 0x00015e4c <sceFpuSin+184>: lwc1 $f12,31284(a3) | |
| 0x00015e50 <sceFpuSin+188>: mul.s $f14,$f10,$f17 | |
| 0x00015e54 <sceFpuSin+192>: mtc1 v1,$f16 | |
| 0x00015e58 <sceFpuSin+196>: lui v1,0xd | |
| 0x00015e5c <sceFpuSin+200>: lwc1 $f8,31288(v1) | |
| 0x00015e60 <sceFpuSin+204>: add.s $f13,$f14,$f15 | |
| 0x00015e64 <sceFpuSin+208>: cvt.s.w $f6,$f16 | |
| 0x00015e68 <sceFpuSin+212>: mul.s $f11,$f13,$f10 | |
| 0x00015e6c <sceFpuSin+216>: add.s $f9,$f11,$f12 | |
| 0x00015e70 <sceFpuSin+220>: mul.s $f7,$f9,$f10 | |
| 0x00015e74 <sceFpuSin+224>: add.s $f5,$f7,$f8 | |
| 0x00015e78 <sceFpuSin+228>: jr ra | |
| 0x00015e7c <sceFpuSin+232>: mul.s $f0,$f5,$f6 | |
| 0x00015e80 <sceFpuSin+236>: lui t4,0xd | |
| 0x00015e84 <sceFpuSin+240>: lwc1 $f13,31292(t4) | |
| 0x00015e88 <sceFpuSin+244>: lui t3,0xd | |
| 0x00015e8c <sceFpuSin+248>: lwc1 $f10,31296(t3) | |
| 0x00015e90 <sceFpuSin+252>: mul.s $f9,$f6,$f13 | |
| 0x00015e94 <sceFpuSin+256>: lui t2,0xd | |
| 0x00015e98 <sceFpuSin+260>: lwc1 $f7,31300(t2) | |
| 0x00015e9c <sceFpuSin+264>: mtc1 v1,$f11 | |
| 0x00015ea0 <sceFpuSin+268>: add.s $f8,$f9,$f10 | |
| 0x00015ea4 <sceFpuSin+272>: cvt.s.w $f4,$f11 | |
| 0x00015ea8 <sceFpuSin+276>: mul.s $f2,$f8,$f6 | |
| 0x00015eac <sceFpuSin+280>: add.s $f5,$f2,$f7 | |
| 0x00015eb0 <sceFpuSin+284>: mul.s $f3,$f5,$f6 | |
| 0x00015eb4 <sceFpuSin+288>: mul.s $f1,$f3,$f12 | |
| 0x00015eb8 <sceFpuSin+292>: add.s $f19,$f1,$f12 | |
| 0x00015ebc <sceFpuSin+296>: mul.s $f0,$f19,$f4 | |
| 0x00015ec0 <sceFpuSin+300>: jr ra | |
| 0x00015ec4 <sceFpuSin+304>: nop | |
| 0x00015ec8 <sceFpuCos+0>: c.eq.s $f12,$f12 | |
| 0x00015ecc <sceFpuCos+4>: li v1,1 | |
| 0x00015ed0 <sceFpuCos+8>: bc1f 0x15ff4 <sceFpuCos+300> | |
| 0x00015ed4 <sceFpuCos+12>: mov.s $f0,$f12 | |
| 0x00015ed8 <sceFpuCos+16>: mtc1 zero,$f1 | |
| 0x00015edc <sceFpuCos+20>: lui a0,0xd | |
| 0x00015ee0 <sceFpuCos+24>: c.lt.s $f12,$f1 | |
| 0x00015ee4 <sceFpuCos+28>: nop | |
| 0x00015ee8 <sceFpuCos+32>: bc1f 0x15ef4 <sceFpuCos+44> | |
| 0x00015eec <sceFpuCos+36>: lwc1 $f4,31304(a0) | |
| 0x00015ef0 <sceFpuCos+40>: neg.s $f12,$f12 | |
| 0x00015ef4 <sceFpuCos+44>: c.lt.s $f4,$f12 | |
| 0x00015ef8 <sceFpuCos+48>: nop | |
| 0x00015efc <sceFpuCos+52>: bc1f 0x15f18 <sceFpuCos+80> | |
| 0x00015f00 <sceFpuCos+56>: lui a1,0xd | |
| 0x00015f04 <sceFpuCos+60>: div.s $f2,$f12,$f4 | |
| 0x00015f08 <sceFpuCos+64>: trunc.w.s $f1,$f2 | |
| 0x00015f0c <sceFpuCos+68>: cvt.s.w $f3,$f1 | |
| 0x00015f10 <sceFpuCos+72>: mul.s $f0,$f3,$f4 | |
| 0x00015f14 <sceFpuCos+76>: sub.s $f12,$f12,$f0 | |
| 0x00015f18 <sceFpuCos+80>: lwc1 $f3,31308(a1) | |
| 0x00015f1c <sceFpuCos+84>: mul.s $f4,$f4,$f3 | |
| 0x00015f20 <sceFpuCos+88>: c.lt.s $f4,$f12 | |
| 0x00015f24 <sceFpuCos+92>: nop | |
| 0x00015f28 <sceFpuCos+96>: bc1f 0x15f38 <sceFpuCos+112> | |
| 0x00015f2c <sceFpuCos+100>: mul.s $f3,$f4,$f3 | |
| 0x00015f30 <sceFpuCos+104>: sub.s $f12,$f12,$f4 | |
| 0x00015f34 <sceFpuCos+108>: li v1,-1 | |
| 0x00015f38 <sceFpuCos+112>: c.lt.s $f3,$f12 | |
| 0x00015f3c <sceFpuCos+116>: nop | |
| 0x00015f40 <sceFpuCos+120>: bc1f 0x15f50 <sceFpuCos+136> | |
| 0x00015f44 <sceFpuCos+124>: lui a2,0xd | |
| 0x00015f48 <sceFpuCos+128>: sub.s $f12,$f4,$f12 | |
| 0x00015f4c <sceFpuCos+132>: negu v1,v1 | |
| 0x00015f50 <sceFpuCos+136>: lwc1 $f4,31312(a2) | |
| 0x00015f54 <sceFpuCos+140>: c.lt.s $f4,$f12 | |
| 0x00015f58 <sceFpuCos+144>: nop | |
| 0x00015f5c <sceFpuCos+148>: bc1fl 0x15fb0 <sceFpuCos+232> | |
| 0x00015f60 <sceFpuCos+152>: mul.s $f6,$f12,$f12 | |
| 0x00015f64 <sceFpuCos+156>: sub.s $f8,$f3,$f12 | |
| 0x00015f68 <sceFpuCos+160>: lui t0,0xd | |
| 0x00015f6c <sceFpuCos+164>: lwc1 $f18,31316(t0) | |
| 0x00015f70 <sceFpuCos+168>: lui a3,0xd | |
| 0x00015f74 <sceFpuCos+172>: mul.s $f11,$f8,$f8 | |
| 0x00015f78 <sceFpuCos+176>: lwc1 $f16,31320(a3) | |
| 0x00015f7c <sceFpuCos+180>: mtc1 v1,$f17 | |
| 0x00015f80 <sceFpuCos+184>: lui v1,0xd | |
| 0x00015f84 <sceFpuCos+188>: mul.s $f15,$f11,$f18 | |
| 0x00015f88 <sceFpuCos+192>: lwc1 $f13,31324(v1) | |
| 0x00015f8c <sceFpuCos+196>: cvt.s.w $f6,$f17 | |
| 0x00015f90 <sceFpuCos+200>: add.s $f14,$f15,$f16 | |
| 0x00015f94 <sceFpuCos+204>: mul.s $f12,$f14,$f11 | |
| 0x00015f98 <sceFpuCos+208>: add.s $f10,$f12,$f13 | |
| 0x00015f9c <sceFpuCos+212>: mul.s $f9,$f10,$f11 | |
| 0x00015fa0 <sceFpuCos+216>: mul.s $f7,$f9,$f8 | |
| 0x00015fa4 <sceFpuCos+220>: add.s $f5,$f7,$f8 | |
| 0x00015fa8 <sceFpuCos+224>: jr ra | |
| 0x00015fac <sceFpuCos+228>: mul.s $f0,$f5,$f6 | |
| 0x00015fb0 <sceFpuCos+232>: lui t4,0xd | |
| 0x00015fb4 <sceFpuCos+236>: lwc1 $f1,31332(t4) | |
| 0x00015fb8 <sceFpuCos+240>: lui t3,0xd | |
| 0x00015fbc <sceFpuCos+244>: lwc1 $f12,31336(t3) | |
| 0x00015fc0 <sceFpuCos+248>: mul.s $f11,$f6,$f1 | |
| 0x00015fc4 <sceFpuCos+252>: lui t2,0xd | |
| 0x00015fc8 <sceFpuCos+256>: lwc1 $f8,31340(t2) | |
| 0x00015fcc <sceFpuCos+260>: lui t1,0xd | |
| 0x00015fd0 <sceFpuCos+264>: add.s $f9,$f11,$f12 | |
| 0x00015fd4 <sceFpuCos+268>: mtc1 v1,$f10 | |
| 0x00015fd8 <sceFpuCos+272>: lwc1 $f2,31328(t1) | |
| 0x00015fdc <sceFpuCos+276>: mul.s $f7,$f9,$f6 | |
| 0x00015fe0 <sceFpuCos+280>: cvt.s.w $f4,$f10 | |
| 0x00015fe4 <sceFpuCos+284>: add.s $f5,$f7,$f8 | |
| 0x00015fe8 <sceFpuCos+288>: mul.s $f3,$f5,$f6 | |
| 0x00015fec <sceFpuCos+292>: add.s $f19,$f3,$f2 | |
| 0x00015ff0 <sceFpuCos+296>: mul.s $f0,$f19,$f4 | |
| 0x00015ff4 <sceFpuCos+300>: jr ra | |
| 0x00015ff8 <sceFpuCos+304>: nop | |
| 0x00015ffc <sceFpuAtan+0>: c.eq.s $f12,$f12 | |
| 0x00016000 <sceFpuAtan+4>: li v1,1 | |
| 0x00016004 <sceFpuAtan+8>: bc1f 0x160a8 <sceFpuAtan+172> | |
| 0x00016008 <sceFpuAtan+12>: mov.s $f0,$f12 | |
| 0x0001600c <sceFpuAtan+16>: mtc1 zero,$f1 | |
| 0x00016010 <sceFpuAtan+20>: c.lt.s $f12,$f1 | |
| 0x00016014 <sceFpuAtan+24>: nop | |
| 0x00016018 <sceFpuAtan+28>: bc1f 0x16028 <sceFpuAtan+44> | |
| 0x0001601c <sceFpuAtan+32>: lui a0,0xd | |
| 0x00016020 <sceFpuAtan+36>: neg.s $f12,$f12 | |
| 0x00016024 <sceFpuAtan+40>: li v1,-1 | |
| 0x00016028 <sceFpuAtan+44>: lwc1 $f4,31344(a0) | |
| 0x0001602c <sceFpuAtan+48>: c.le.s $f4,$f12 | |
| 0x00016030 <sceFpuAtan+52>: nop | |
| 0x00016034 <sceFpuAtan+56>: bc1f 0x16170 <sceFpuAtan+372> | |
| 0x00016038 <sceFpuAtan+60>: lui a2,0xd | |
| 0x0001603c <sceFpuAtan+64>: div.s $f12,$f4,$f12 | |
| 0x00016040 <sceFpuAtan+68>: lui a1,0xd | |
| 0x00016044 <sceFpuAtan+72>: lwc1 $f1,31348(a1) | |
| 0x00016048 <sceFpuAtan+76>: c.lt.s $f12,$f1 | |
| 0x0001604c <sceFpuAtan+80>: nop | |
| 0x00016050 <sceFpuAtan+84>: bc1f 0x160b0 <sceFpuAtan+180> | |
| 0x00016054 <sceFpuAtan+88>: lui t1,0xd | |
| 0x00016058 <sceFpuAtan+92>: mul.s $f7,$f12,$f12 | |
| 0x0001605c <sceFpuAtan+96>: lui t0,0xd | |
| 0x00016060 <sceFpuAtan+100>: lwc1 $f13,31352(t0) | |
| 0x00016064 <sceFpuAtan+104>: lui a3,0xd | |
| 0x00016068 <sceFpuAtan+108>: lwc1 $f11,31356(a3) | |
| 0x0001606c <sceFpuAtan+112>: mul.s $f10,$f7,$f13 | |
| 0x00016070 <sceFpuAtan+116>: lui a2,0xd | |
| 0x00016074 <sceFpuAtan+120>: lwc1 $f8,31360(a2) | |
| 0x00016078 <sceFpuAtan+124>: add.s $f9,$f10,$f11 | |
| 0x0001607c <sceFpuAtan+128>: mul.s $f2,$f9,$f7 | |
| 0x00016080 <sceFpuAtan+132>: add.s $f6,$f2,$f8 | |
| 0x00016084 <sceFpuAtan+136>: mul.s $f5,$f6,$f7 | |
| 0x00016088 <sceFpuAtan+140>: add.s $f3,$f5,$f4 | |
| 0x0001608c <sceFpuAtan+144>: mul.s $f2,$f12,$f3 | |
| 0x00016090 <sceFpuAtan+148>: lui a1,0xd | |
| 0x00016094 <sceFpuAtan+152>: lwc1 $f4,31380(a1) | |
| 0x00016098 <sceFpuAtan+156>: sub.s $f12,$f4,$f2 | |
| 0x0001609c <sceFpuAtan+160>: mtc1 v1,$f11 | |
| 0x000160a0 <sceFpuAtan+164>: cvt.s.w $f4,$f11 | |
| 0x000160a4 <sceFpuAtan+168>: mul.s $f0,$f12,$f4 | |
| 0x000160a8 <sceFpuAtan+172>: jr ra | |
| 0x000160ac <sceFpuAtan+176>: nop | |
| 0x000160b0 <sceFpuAtan+180>: lwc1 $f14,31364(t1) | |
| 0x000160b4 <sceFpuAtan+184>: c.lt.s $f12,$f14 | |
| 0x000160b8 <sceFpuAtan+188>: nop | |
| 0x000160bc <sceFpuAtan+192>: bc1fl 0x16124 <sceFpuAtan+296> | |
| 0x000160c0 <sceFpuAtan+196>: add.s $f2,$f12,$f4 | |
| 0x000160c4 <sceFpuAtan+200>: lui t6,0xd | |
| 0x000160c8 <sceFpuAtan+204>: lwc1 $f0,31368(t6) | |
| 0x000160cc <sceFpuAtan+208>: lui t5,0xd | |
| 0x000160d0 <sceFpuAtan+212>: lwc1 $f1,31352(t5) | |
| 0x000160d4 <sceFpuAtan+216>: mul.s $f10,$f12,$f0 | |
| 0x000160d8 <sceFpuAtan+220>: sub.s $f8,$f12,$f0 | |
| 0x000160dc <sceFpuAtan+224>: lui t4,0xd | |
| 0x000160e0 <sceFpuAtan+228>: lwc1 $f7,31356(t4) | |
| 0x000160e4 <sceFpuAtan+232>: add.s $f9,$f10,$f4 | |
| 0x000160e8 <sceFpuAtan+236>: lui t3,0xd | |
| 0x000160ec <sceFpuAtan+240>: lwc1 $f3,31360(t3) | |
| 0x000160f0 <sceFpuAtan+244>: lui t2,0xd | |
| 0x000160f4 <sceFpuAtan+248>: div.s $f12,$f8,$f9 | |
| 0x000160f8 <sceFpuAtan+252>: lwc1 $f0,31372(t2) | |
| 0x000160fc <sceFpuAtan+256>: mul.s $f18,$f12,$f12 | |
| 0x00016100 <sceFpuAtan+260>: mul.s $f6,$f18,$f1 | |
| 0x00016104 <sceFpuAtan+264>: add.s $f5,$f6,$f7 | |
| 0x00016108 <sceFpuAtan+268>: mul.s $f19,$f5,$f18 | |
| 0x0001610c <sceFpuAtan+272>: add.s $f17,$f19,$f3 | |
| 0x00016110 <sceFpuAtan+276>: mul.s $f16,$f17,$f18 | |
| 0x00016114 <sceFpuAtan+280>: add.s $f15,$f16,$f4 | |
| 0x00016118 <sceFpuAtan+284>: mul.s $f2,$f12,$f15 | |
| 0x0001611c <sceFpuAtan+288>: j 0x16090 <sceFpuAtan+148> | |
| 0x00016120 <sceFpuAtan+292>: add.s $f2,$f2,$f0 | |
| 0x00016124 <sceFpuAtan+296>: sub.s $f6,$f12,$f4 | |
| 0x00016128 <sceFpuAtan+300>: lui a0,0xd | |
| 0x0001612c <sceFpuAtan+304>: lwc1 $f5,31352(a0) | |
| 0x00016130 <sceFpuAtan+308>: lui t9,0xd | |
| 0x00016134 <sceFpuAtan+312>: div.s $f11,$f6,$f2 | |
| 0x00016138 <sceFpuAtan+316>: lwc1 $f3,31356(t9) | |
| 0x0001613c <sceFpuAtan+320>: lui t8,0xd | |
| 0x00016140 <sceFpuAtan+324>: lwc1 $f17,31360(t8) | |
| 0x00016144 <sceFpuAtan+328>: lui t7,0xd | |
| 0x00016148 <sceFpuAtan+332>: lwc1 $f0,31376(t7) | |
| 0x0001614c <sceFpuAtan+336>: mul.s $f15,$f11,$f11 | |
| 0x00016150 <sceFpuAtan+340>: mul.s $f19,$f15,$f5 | |
| 0x00016154 <sceFpuAtan+344>: add.s $f18,$f19,$f3 | |
| 0x00016158 <sceFpuAtan+348>: mul.s $f16,$f18,$f15 | |
| 0x0001615c <sceFpuAtan+352>: add.s $f12,$f16,$f17 | |
| 0x00016160 <sceFpuAtan+356>: mul.s $f14,$f12,$f15 | |
| 0x00016164 <sceFpuAtan+360>: add.s $f13,$f14,$f4 | |
| 0x00016168 <sceFpuAtan+364>: j 0x1611c <sceFpuAtan+288> | |
| 0x0001616c <sceFpuAtan+368>: mul.s $f2,$f11,$f13 | |
| 0x00016170 <sceFpuAtan+372>: lwc1 $f7,31348(a2) | |
| 0x00016174 <sceFpuAtan+376>: c.lt.s $f12,$f7 | |
| 0x00016178 <sceFpuAtan+380>: nop | |
| 0x0001617c <sceFpuAtan+384>: bc1f 0x161c0 <sceFpuAtan+452> | |
| 0x00016180 <sceFpuAtan+388>: lui t2,0xd | |
| 0x00016184 <sceFpuAtan+392>: mul.s $f10,$f12,$f12 | |
| 0x00016188 <sceFpuAtan+396>: lui t1,0xd | |
| 0x0001618c <sceFpuAtan+400>: lwc1 $f17,31352(t1) | |
| 0x00016190 <sceFpuAtan+404>: lui t0,0xd | |
| 0x00016194 <sceFpuAtan+408>: lwc1 $f16,31356(t0) | |
| 0x00016198 <sceFpuAtan+412>: mul.s $f15,$f10,$f17 | |
| 0x0001619c <sceFpuAtan+416>: lui a3,0xd | |
| 0x000161a0 <sceFpuAtan+420>: lwc1 $f13,31360(a3) | |
| 0x000161a4 <sceFpuAtan+424>: add.s $f14,$f15,$f16 | |
| 0x000161a8 <sceFpuAtan+428>: mul.s $f11,$f14,$f10 | |
| 0x000161ac <sceFpuAtan+432>: add.s $f9,$f11,$f13 | |
| 0x000161b0 <sceFpuAtan+436>: mul.s $f8,$f9,$f10 | |
| 0x000161b4 <sceFpuAtan+440>: add.s $f1,$f8,$f4 | |
| 0x000161b8 <sceFpuAtan+444>: j 0x1609c <sceFpuAtan+160> | |
| 0x000161bc <sceFpuAtan+448>: mul.s $f12,$f12,$f1 | |
| 0x000161c0 <sceFpuAtan+452>: lwc1 $f18,31364(t2) | |
| 0x000161c4 <sceFpuAtan+456>: c.lt.s $f12,$f18 | |
| 0x000161c8 <sceFpuAtan+460>: nop | |
| 0x000161cc <sceFpuAtan+464>: bc1fl 0x16234 <sceFpuAtan+568> | |
| 0x000161d0 <sceFpuAtan+468>: add.s $f2,$f12,$f4 | |
| 0x000161d4 <sceFpuAtan+472>: lui t7,0xd | |
| 0x000161d8 <sceFpuAtan+476>: lwc1 $f0,31368(t7) | |
| 0x000161dc <sceFpuAtan+480>: lui t6,0xd | |
| 0x000161e0 <sceFpuAtan+484>: lwc1 $f1,31352(t6) | |
| 0x000161e4 <sceFpuAtan+488>: mul.s $f15,$f12,$f0 | |
| 0x000161e8 <sceFpuAtan+492>: sub.s $f13,$f12,$f0 | |
| 0x000161ec <sceFpuAtan+496>: lui t5,0xd | |
| 0x000161f0 <sceFpuAtan+500>: lwc1 $f11,31356(t5) | |
| 0x000161f4 <sceFpuAtan+504>: add.s $f14,$f15,$f4 | |
| 0x000161f8 <sceFpuAtan+508>: lui t4,0xd | |
| 0x000161fc <sceFpuAtan+512>: lwc1 $f8,31360(t4) | |
| 0x00016200 <sceFpuAtan+516>: lui t3,0xd | |
| 0x00016204 <sceFpuAtan+520>: div.s $f12,$f13,$f14 | |
| 0x00016208 <sceFpuAtan+524>: lwc1 $f0,31372(t3) | |
| 0x0001620c <sceFpuAtan+528>: mul.s $f7,$f12,$f12 | |
| 0x00016210 <sceFpuAtan+532>: mul.s $f10,$f7,$f1 | |
| 0x00016214 <sceFpuAtan+536>: add.s $f9,$f10,$f11 | |
| 0x00016218 <sceFpuAtan+540>: mul.s $f3,$f9,$f7 | |
| 0x0001621c <sceFpuAtan+544>: add.s $f6,$f3,$f8 | |
| 0x00016220 <sceFpuAtan+548>: mul.s $f5,$f6,$f7 | |
| 0x00016224 <sceFpuAtan+552>: add.s $f19,$f5,$f4 | |
| 0x00016228 <sceFpuAtan+556>: mul.s $f2,$f12,$f19 | |
| 0x0001622c <sceFpuAtan+560>: j 0x1609c <sceFpuAtan+160> | |
| 0x00016230 <sceFpuAtan+564>: add.s $f12,$f2,$f0 | |
| 0x00016234 <sceFpuAtan+568>: sub.s $f10,$f12,$f4 | |
| 0x00016238 <sceFpuAtan+572>: lui a1,0xd | |
| 0x0001623c <sceFpuAtan+576>: lwc1 $f9,31352(a1) | |
| 0x00016240 <sceFpuAtan+580>: lui a0,0xd | |
| 0x00016244 <sceFpuAtan+584>: div.s $f16,$f10,$f2 | |
| 0x00016248 <sceFpuAtan+588>: lwc1 $f8,31356(a0) | |
| 0x0001624c <sceFpuAtan+592>: lui t9,0xd | |
| 0x00016250 <sceFpuAtan+596>: lwc1 $f6,31360(t9) | |
| 0x00016254 <sceFpuAtan+600>: lui t8,0xd | |
| 0x00016258 <sceFpuAtan+604>: lwc1 $f0,31376(t8) | |
| 0x0001625c <sceFpuAtan+608>: mul.s $f19,$f16,$f16 | |
| 0x00016260 <sceFpuAtan+612>: mul.s $f3,$f19,$f9 | |
| 0x00016264 <sceFpuAtan+616>: add.s $f7,$f3,$f8 | |
| 0x00016268 <sceFpuAtan+620>: mul.s $f5,$f7,$f19 | |
| 0x0001626c <sceFpuAtan+624>: add.s $f12,$f5,$f6 | |
| 0x00016270 <sceFpuAtan+628>: mul.s $f18,$f12,$f19 | |
| 0x00016274 <sceFpuAtan+632>: add.s $f17,$f18,$f4 | |
| 0x00016278 <sceFpuAtan+636>: j 0x1622c <sceFpuAtan+560> | |
| 0x0001627c <sceFpuAtan+640>: mul.s $f2,$f16,$f17 | |
| 0x00016280 <sceFpuAsin+0>: mul.s $f2,$f12,$f12 | |
| 0x00016284 <sceFpuAsin+4>: lui v1,0xd | |
| 0x00016288 <sceFpuAsin+8>: lwc1 $f1,31384(v1) | |
| 0x0001628c <sceFpuAsin+12>: addiu sp,sp,-16 | |
| 0x00016290 <sceFpuAsin+16>: sw ra,0(sp) | |
| 0x00016294 <sceFpuAsin+20>: sub.s $f3,$f1,$f2 | |
| 0x00016298 <sceFpuAsin+24>: div.s $f1,$f2,$f3 | |
| 0x0001629c <sceFpuAsin+28>: jal 0x15ffc <sceFpuAtan> | |
| 0x000162a0 <sceFpuAsin+32>: sqrt.s $f12,$f1 | |
| 0x000162a4 <sceFpuAsin+36>: lw ra,0(sp) | |
| 0x000162a8 <sceFpuAsin+40>: jr ra | |
| 0x000162ac <sceFpuAsin+44>: addiu sp,sp,16 | |
| 0x000162b0 <sceFpuAcos+0>: mul.s $f3,$f12,$f12 | |
| 0x000162b4 <sceFpuAcos+4>: lui v1,0xd | |
| 0x000162b8 <sceFpuAcos+8>: lwc1 $f1,31388(v1) | |
| 0x000162bc <sceFpuAcos+12>: addiu sp,sp,-16 | |
| 0x000162c0 <sceFpuAcos+16>: sw ra,0(sp) | |
| 0x000162c4 <sceFpuAcos+20>: sub.s $f2,$f1,$f3 | |
| 0x000162c8 <sceFpuAcos+24>: div.s $f1,$f2,$f3 | |
| 0x000162cc <sceFpuAcos+28>: jal 0x15ffc <sceFpuAtan> | |
| 0x000162d0 <sceFpuAcos+32>: sqrt.s $f12,$f1 | |
| 0x000162d4 <sceFpuAcos+36>: lw ra,0(sp) | |
| 0x000162d8 <sceFpuAcos+40>: jr ra |
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