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/Users/niklas/development/ekiwi_xpcc/build/gpio_blinking/gpio_blinking.elf: file format elf32-avr | |
Sections: | |
Idx Name Size VMA LMA File off Algn | |
0 .text 000003fa 00000000 00000000 00000074 2**1 | |
CONTENTS, ALLOC, LOAD, READONLY, CODE | |
1 .data 00000000 00802000 000003fa 0000046e 2**0 | |
CONTENTS, ALLOC, LOAD, DATA | |
2 .stab 00000714 00000000 00000000 00000470 2**2 | |
CONTENTS, READONLY, DEBUGGING | |
3 .stabstr 00000081 00000000 00000000 00000b84 2**0 | |
CONTENTS, READONLY, DEBUGGING | |
4 .debug_aranges 000000a0 00000000 00000000 00000c08 2**3 | |
CONTENTS, READONLY, DEBUGGING | |
5 .debug_info 00002887 00000000 00000000 00000ca8 2**0 | |
CONTENTS, READONLY, DEBUGGING | |
6 .debug_abbrev 000004aa 00000000 00000000 0000352f 2**0 | |
CONTENTS, READONLY, DEBUGGING | |
7 .debug_line 000008ac 00000000 00000000 000039d9 2**0 | |
CONTENTS, READONLY, DEBUGGING | |
8 .debug_frame 00000078 00000000 00000000 00004288 2**2 | |
CONTENTS, READONLY, DEBUGGING | |
9 .debug_str 00003836 00000000 00000000 00004300 2**0 | |
CONTENTS, READONLY, DEBUGGING | |
10 .debug_loc 00000153 00000000 00000000 00007b36 2**0 | |
CONTENTS, READONLY, DEBUGGING | |
11 .debug_ranges 00000138 00000000 00000000 00007c89 2**0 | |
CONTENTS, READONLY, DEBUGGING | |
Disassembly of section .text: | |
00000000 <__vectors>: | |
0: fd c0 rjmp .+506 ; 0x1fc <__ctors_end> | |
2: 00 00 nop | |
4: 1f c1 rjmp .+574 ; 0x244 <__bad_interrupt> | |
6: 00 00 nop | |
8: 1d c1 rjmp .+570 ; 0x244 <__bad_interrupt> | |
a: 00 00 nop | |
c: 1b c1 rjmp .+566 ; 0x244 <__bad_interrupt> | |
e: 00 00 nop | |
10: 19 c1 rjmp .+562 ; 0x244 <__bad_interrupt> | |
12: 00 00 nop | |
14: 17 c1 rjmp .+558 ; 0x244 <__bad_interrupt> | |
16: 00 00 nop | |
18: 15 c1 rjmp .+554 ; 0x244 <__bad_interrupt> | |
1a: 00 00 nop | |
1c: 13 c1 rjmp .+550 ; 0x244 <__bad_interrupt> | |
1e: 00 00 nop | |
20: 11 c1 rjmp .+546 ; 0x244 <__bad_interrupt> | |
22: 00 00 nop | |
24: 0f c1 rjmp .+542 ; 0x244 <__bad_interrupt> | |
26: 00 00 nop | |
28: 0d c1 rjmp .+538 ; 0x244 <__bad_interrupt> | |
2a: 00 00 nop | |
2c: 0b c1 rjmp .+534 ; 0x244 <__bad_interrupt> | |
2e: 00 00 nop | |
30: 09 c1 rjmp .+530 ; 0x244 <__bad_interrupt> | |
32: 00 00 nop | |
34: 07 c1 rjmp .+526 ; 0x244 <__bad_interrupt> | |
36: 00 00 nop | |
38: 05 c1 rjmp .+522 ; 0x244 <__bad_interrupt> | |
3a: 00 00 nop | |
3c: 03 c1 rjmp .+518 ; 0x244 <__bad_interrupt> | |
3e: 00 00 nop | |
40: 01 c1 rjmp .+514 ; 0x244 <__bad_interrupt> | |
42: 00 00 nop | |
44: ff c0 rjmp .+510 ; 0x244 <__bad_interrupt> | |
46: 00 00 nop | |
48: fd c0 rjmp .+506 ; 0x244 <__bad_interrupt> | |
4a: 00 00 nop | |
4c: fb c0 rjmp .+502 ; 0x244 <__bad_interrupt> | |
4e: 00 00 nop | |
50: f9 c0 rjmp .+498 ; 0x244 <__bad_interrupt> | |
52: 00 00 nop | |
54: f7 c0 rjmp .+494 ; 0x244 <__bad_interrupt> | |
56: 00 00 nop | |
58: f5 c0 rjmp .+490 ; 0x244 <__bad_interrupt> | |
5a: 00 00 nop | |
5c: f3 c0 rjmp .+486 ; 0x244 <__bad_interrupt> | |
5e: 00 00 nop | |
60: f1 c0 rjmp .+482 ; 0x244 <__bad_interrupt> | |
62: 00 00 nop | |
64: ef c0 rjmp .+478 ; 0x244 <__bad_interrupt> | |
66: 00 00 nop | |
68: ed c0 rjmp .+474 ; 0x244 <__bad_interrupt> | |
6a: 00 00 nop | |
6c: eb c0 rjmp .+470 ; 0x244 <__bad_interrupt> | |
6e: 00 00 nop | |
70: e9 c0 rjmp .+466 ; 0x244 <__bad_interrupt> | |
72: 00 00 nop | |
74: e7 c0 rjmp .+462 ; 0x244 <__bad_interrupt> | |
76: 00 00 nop | |
78: e5 c0 rjmp .+458 ; 0x244 <__bad_interrupt> | |
7a: 00 00 nop | |
7c: e3 c0 rjmp .+454 ; 0x244 <__bad_interrupt> | |
7e: 00 00 nop | |
80: e1 c0 rjmp .+450 ; 0x244 <__bad_interrupt> | |
82: 00 00 nop | |
84: df c0 rjmp .+446 ; 0x244 <__bad_interrupt> | |
86: 00 00 nop | |
88: dd c0 rjmp .+442 ; 0x244 <__bad_interrupt> | |
8a: 00 00 nop | |
8c: db c0 rjmp .+438 ; 0x244 <__bad_interrupt> | |
8e: 00 00 nop | |
90: d9 c0 rjmp .+434 ; 0x244 <__bad_interrupt> | |
92: 00 00 nop | |
94: d7 c0 rjmp .+430 ; 0x244 <__bad_interrupt> | |
96: 00 00 nop | |
98: d5 c0 rjmp .+426 ; 0x244 <__bad_interrupt> | |
9a: 00 00 nop | |
9c: d3 c0 rjmp .+422 ; 0x244 <__bad_interrupt> | |
9e: 00 00 nop | |
a0: d1 c0 rjmp .+418 ; 0x244 <__bad_interrupt> | |
a2: 00 00 nop | |
a4: cf c0 rjmp .+414 ; 0x244 <__bad_interrupt> | |
a6: 00 00 nop | |
a8: cd c0 rjmp .+410 ; 0x244 <__bad_interrupt> | |
aa: 00 00 nop | |
ac: cb c0 rjmp .+406 ; 0x244 <__bad_interrupt> | |
ae: 00 00 nop | |
b0: c9 c0 rjmp .+402 ; 0x244 <__bad_interrupt> | |
b2: 00 00 nop | |
b4: c7 c0 rjmp .+398 ; 0x244 <__bad_interrupt> | |
b6: 00 00 nop | |
b8: c5 c0 rjmp .+394 ; 0x244 <__bad_interrupt> | |
ba: 00 00 nop | |
bc: c3 c0 rjmp .+390 ; 0x244 <__bad_interrupt> | |
be: 00 00 nop | |
c0: c1 c0 rjmp .+386 ; 0x244 <__bad_interrupt> | |
c2: 00 00 nop | |
c4: bf c0 rjmp .+382 ; 0x244 <__bad_interrupt> | |
c6: 00 00 nop | |
c8: bd c0 rjmp .+378 ; 0x244 <__bad_interrupt> | |
ca: 00 00 nop | |
cc: bb c0 rjmp .+374 ; 0x244 <__bad_interrupt> | |
ce: 00 00 nop | |
d0: b9 c0 rjmp .+370 ; 0x244 <__bad_interrupt> | |
d2: 00 00 nop | |
d4: b7 c0 rjmp .+366 ; 0x244 <__bad_interrupt> | |
d6: 00 00 nop | |
d8: b5 c0 rjmp .+362 ; 0x244 <__bad_interrupt> | |
da: 00 00 nop | |
dc: b3 c0 rjmp .+358 ; 0x244 <__bad_interrupt> | |
de: 00 00 nop | |
e0: b1 c0 rjmp .+354 ; 0x244 <__bad_interrupt> | |
e2: 00 00 nop | |
e4: af c0 rjmp .+350 ; 0x244 <__bad_interrupt> | |
e6: 00 00 nop | |
e8: ad c0 rjmp .+346 ; 0x244 <__bad_interrupt> | |
ea: 00 00 nop | |
ec: ab c0 rjmp .+342 ; 0x244 <__bad_interrupt> | |
ee: 00 00 nop | |
f0: a9 c0 rjmp .+338 ; 0x244 <__bad_interrupt> | |
f2: 00 00 nop | |
f4: a7 c0 rjmp .+334 ; 0x244 <__bad_interrupt> | |
f6: 00 00 nop | |
f8: a5 c0 rjmp .+330 ; 0x244 <__bad_interrupt> | |
fa: 00 00 nop | |
fc: a3 c0 rjmp .+326 ; 0x244 <__bad_interrupt> | |
fe: 00 00 nop | |
100: a1 c0 rjmp .+322 ; 0x244 <__bad_interrupt> | |
102: 00 00 nop | |
104: 9f c0 rjmp .+318 ; 0x244 <__bad_interrupt> | |
106: 00 00 nop | |
108: 9d c0 rjmp .+314 ; 0x244 <__bad_interrupt> | |
10a: 00 00 nop | |
10c: 9b c0 rjmp .+310 ; 0x244 <__bad_interrupt> | |
10e: 00 00 nop | |
110: 99 c0 rjmp .+306 ; 0x244 <__bad_interrupt> | |
112: 00 00 nop | |
114: 97 c0 rjmp .+302 ; 0x244 <__bad_interrupt> | |
116: 00 00 nop | |
118: 95 c0 rjmp .+298 ; 0x244 <__bad_interrupt> | |
11a: 00 00 nop | |
11c: 93 c0 rjmp .+294 ; 0x244 <__bad_interrupt> | |
11e: 00 00 nop | |
120: 91 c0 rjmp .+290 ; 0x244 <__bad_interrupt> | |
122: 00 00 nop | |
124: 8f c0 rjmp .+286 ; 0x244 <__bad_interrupt> | |
126: 00 00 nop | |
128: 8d c0 rjmp .+282 ; 0x244 <__bad_interrupt> | |
12a: 00 00 nop | |
12c: 8b c0 rjmp .+278 ; 0x244 <__bad_interrupt> | |
12e: 00 00 nop | |
130: 89 c0 rjmp .+274 ; 0x244 <__bad_interrupt> | |
132: 00 00 nop | |
134: 87 c0 rjmp .+270 ; 0x244 <__bad_interrupt> | |
136: 00 00 nop | |
138: 85 c0 rjmp .+266 ; 0x244 <__bad_interrupt> | |
13a: 00 00 nop | |
13c: 83 c0 rjmp .+262 ; 0x244 <__bad_interrupt> | |
13e: 00 00 nop | |
140: 81 c0 rjmp .+258 ; 0x244 <__bad_interrupt> | |
142: 00 00 nop | |
144: 7f c0 rjmp .+254 ; 0x244 <__bad_interrupt> | |
146: 00 00 nop | |
148: 7d c0 rjmp .+250 ; 0x244 <__bad_interrupt> | |
14a: 00 00 nop | |
14c: 7b c0 rjmp .+246 ; 0x244 <__bad_interrupt> | |
14e: 00 00 nop | |
150: 79 c0 rjmp .+242 ; 0x244 <__bad_interrupt> | |
152: 00 00 nop | |
154: 77 c0 rjmp .+238 ; 0x244 <__bad_interrupt> | |
156: 00 00 nop | |
158: 75 c0 rjmp .+234 ; 0x244 <__bad_interrupt> | |
15a: 00 00 nop | |
15c: 73 c0 rjmp .+230 ; 0x244 <__bad_interrupt> | |
15e: 00 00 nop | |
160: 71 c0 rjmp .+226 ; 0x244 <__bad_interrupt> | |
162: 00 00 nop | |
164: 6f c0 rjmp .+222 ; 0x244 <__bad_interrupt> | |
166: 00 00 nop | |
168: 6d c0 rjmp .+218 ; 0x244 <__bad_interrupt> | |
16a: 00 00 nop | |
16c: 6b c0 rjmp .+214 ; 0x244 <__bad_interrupt> | |
16e: 00 00 nop | |
170: 69 c0 rjmp .+210 ; 0x244 <__bad_interrupt> | |
172: 00 00 nop | |
174: 67 c0 rjmp .+206 ; 0x244 <__bad_interrupt> | |
176: 00 00 nop | |
178: 65 c0 rjmp .+202 ; 0x244 <__bad_interrupt> | |
17a: 00 00 nop | |
17c: 63 c0 rjmp .+198 ; 0x244 <__bad_interrupt> | |
17e: 00 00 nop | |
180: 61 c0 rjmp .+194 ; 0x244 <__bad_interrupt> | |
182: 00 00 nop | |
184: 5f c0 rjmp .+190 ; 0x244 <__bad_interrupt> | |
186: 00 00 nop | |
188: 5d c0 rjmp .+186 ; 0x244 <__bad_interrupt> | |
18a: 00 00 nop | |
18c: 5b c0 rjmp .+182 ; 0x244 <__bad_interrupt> | |
18e: 00 00 nop | |
190: 59 c0 rjmp .+178 ; 0x244 <__bad_interrupt> | |
192: 00 00 nop | |
194: 57 c0 rjmp .+174 ; 0x244 <__bad_interrupt> | |
196: 00 00 nop | |
198: 55 c0 rjmp .+170 ; 0x244 <__bad_interrupt> | |
19a: 00 00 nop | |
19c: 53 c0 rjmp .+166 ; 0x244 <__bad_interrupt> | |
19e: 00 00 nop | |
1a0: 51 c0 rjmp .+162 ; 0x244 <__bad_interrupt> | |
1a2: 00 00 nop | |
1a4: 4f c0 rjmp .+158 ; 0x244 <__bad_interrupt> | |
1a6: 00 00 nop | |
1a8: 4d c0 rjmp .+154 ; 0x244 <__bad_interrupt> | |
1aa: 00 00 nop | |
1ac: 4b c0 rjmp .+150 ; 0x244 <__bad_interrupt> | |
1ae: 00 00 nop | |
1b0: 49 c0 rjmp .+146 ; 0x244 <__bad_interrupt> | |
1b2: 00 00 nop | |
1b4: 47 c0 rjmp .+142 ; 0x244 <__bad_interrupt> | |
1b6: 00 00 nop | |
1b8: 45 c0 rjmp .+138 ; 0x244 <__bad_interrupt> | |
1ba: 00 00 nop | |
1bc: 43 c0 rjmp .+134 ; 0x244 <__bad_interrupt> | |
1be: 00 00 nop | |
1c0: 41 c0 rjmp .+130 ; 0x244 <__bad_interrupt> | |
1c2: 00 00 nop | |
1c4: 3f c0 rjmp .+126 ; 0x244 <__bad_interrupt> | |
1c6: 00 00 nop | |
1c8: 3d c0 rjmp .+122 ; 0x244 <__bad_interrupt> | |
1ca: 00 00 nop | |
1cc: 3b c0 rjmp .+118 ; 0x244 <__bad_interrupt> | |
1ce: 00 00 nop | |
1d0: 39 c0 rjmp .+114 ; 0x244 <__bad_interrupt> | |
1d2: 00 00 nop | |
1d4: 37 c0 rjmp .+110 ; 0x244 <__bad_interrupt> | |
1d6: 00 00 nop | |
1d8: 35 c0 rjmp .+106 ; 0x244 <__bad_interrupt> | |
1da: 00 00 nop | |
1dc: 33 c0 rjmp .+102 ; 0x244 <__bad_interrupt> | |
1de: 00 00 nop | |
1e0: 31 c0 rjmp .+98 ; 0x244 <__bad_interrupt> | |
1e2: 00 00 nop | |
1e4: 2f c0 rjmp .+94 ; 0x244 <__bad_interrupt> | |
1e6: 00 00 nop | |
1e8: 2d c0 rjmp .+90 ; 0x244 <__bad_interrupt> | |
1ea: 00 00 nop | |
1ec: 2b c0 rjmp .+86 ; 0x244 <__bad_interrupt> | |
1ee: 00 00 nop | |
1f0: 29 c0 rjmp .+82 ; 0x244 <__bad_interrupt> | |
1f2: 00 00 nop | |
1f4: 27 c0 rjmp .+78 ; 0x244 <__bad_interrupt> | |
1f6: 00 00 nop | |
1f8: 25 c0 rjmp .+74 ; 0x244 <__bad_interrupt> | |
... | |
000001fc <__ctors_end>: | |
1fc: 11 24 eor r1, r1 | |
1fe: 1f be out 0x3f, r1 ; 63 | |
200: cf ef ldi r28, 0xFF ; 255 | |
202: df e3 ldi r29, 0x3F ; 63 | |
204: de bf out 0x3e, r29 ; 62 | |
206: cd bf out 0x3d, r28 ; 61 | |
208: 00 e0 ldi r16, 0x00 ; 0 | |
20a: 0c bf out 0x3c, r16 ; 60 | |
20c: 18 be out 0x38, r1 ; 56 | |
20e: 19 be out 0x39, r1 ; 57 | |
210: 1a be out 0x3a, r1 ; 58 | |
212: 1b be out 0x3b, r1 ; 59 | |
00000214 <__do_copy_data>: | |
214: 10 e2 ldi r17, 0x20 ; 32 | |
216: a0 e0 ldi r26, 0x00 ; 0 | |
218: b0 e2 ldi r27, 0x20 ; 32 | |
21a: ea ef ldi r30, 0xFA ; 250 | |
21c: f3 e0 ldi r31, 0x03 ; 3 | |
21e: 00 e0 ldi r16, 0x00 ; 0 | |
220: 0b bf out 0x3b, r16 ; 59 | |
222: 02 c0 rjmp .+4 ; 0x228 <__do_copy_data+0x14> | |
224: 07 90 elpm r0, Z+ | |
226: 0d 92 st X+, r0 | |
228: a0 30 cpi r26, 0x00 ; 0 | |
22a: b1 07 cpc r27, r17 | |
22c: d9 f7 brne .-10 ; 0x224 <__do_copy_data+0x10> | |
22e: 1b be out 0x3b, r1 ; 59 | |
00000230 <__do_clear_bss>: | |
230: 10 e2 ldi r17, 0x20 ; 32 | |
232: a0 e0 ldi r26, 0x00 ; 0 | |
234: b0 e2 ldi r27, 0x20 ; 32 | |
236: 01 c0 rjmp .+2 ; 0x23a <.do_clear_bss_start> | |
00000238 <.do_clear_bss_loop>: | |
238: 1d 92 st X+, r1 | |
0000023a <.do_clear_bss_start>: | |
23a: a0 30 cpi r26, 0x00 ; 0 | |
23c: b1 07 cpc r27, r17 | |
23e: e1 f7 brne .-8 ; 0x238 <.do_clear_bss_loop> | |
240: 9e d0 rcall .+316 ; 0x37e <main> | |
242: d9 c0 rjmp .+434 ; 0x3f6 <_exit> | |
00000244 <__bad_interrupt>: | |
244: dd ce rjmp .-582 ; 0x0 <__vectors> | |
00000246 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E5writeEh>: | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
246: 20 e4 ldi r18, 0x40 ; 64 | |
} | |
ALWAYS_INLINE static void set(bool status) { | |
if (status) { set(); } | |
248: 86 ff sbrs r24, 6 | |
24a: 03 c0 rjmp .+6 ; 0x252 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E5writeEh+0xc> | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
24c: 20 93 25 06 sts 0x0625, r18 | |
250: 02 c0 rjmp .+4 ; 0x256 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E5writeEh+0x10> | |
if (status) { set(); } | |
else { reset(); } | |
} | |
ALWAYS_INLINE static void reset() { | |
PORTB_OUTCLR = mask; | |
252: 20 93 26 06 sts 0x0626, r18 | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
256: 20 e2 ldi r18, 0x20 ; 32 | |
} | |
ALWAYS_INLINE static void set(bool status) { | |
if (status) { set(); } | |
258: 85 ff sbrs r24, 5 | |
25a: 03 c0 rjmp .+6 ; 0x262 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E5writeEh+0x1c> | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
25c: 20 93 25 06 sts 0x0625, r18 | |
260: 02 c0 rjmp .+4 ; 0x266 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E5writeEh+0x20> | |
if (status) { set(); } | |
else { reset(); } | |
} | |
ALWAYS_INLINE static void reset() { | |
PORTB_OUTCLR = mask; | |
262: 20 93 26 06 sts 0x0626, r18 | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
266: 20 e1 ldi r18, 0x10 ; 16 | |
} | |
ALWAYS_INLINE static void set(bool status) { | |
if (status) { set(); } | |
268: 84 ff sbrs r24, 4 | |
26a: 03 c0 rjmp .+6 ; 0x272 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E5writeEh+0x2c> | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
26c: 20 93 25 06 sts 0x0625, r18 | |
270: 02 c0 rjmp .+4 ; 0x276 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E5writeEh+0x30> | |
if (status) { set(); } | |
else { reset(); } | |
} | |
ALWAYS_INLINE static void reset() { | |
PORTB_OUTCLR = mask; | |
272: 20 93 26 06 sts 0x0626, r18 | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
276: 28 e0 ldi r18, 0x08 ; 8 | |
} | |
ALWAYS_INLINE static void set(bool status) { | |
if (status) { set(); } | |
278: 83 ff sbrs r24, 3 | |
27a: 03 c0 rjmp .+6 ; 0x282 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E5writeEh+0x3c> | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
27c: 20 93 25 06 sts 0x0625, r18 | |
280: 02 c0 rjmp .+4 ; 0x286 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E5writeEh+0x40> | |
if (status) { set(); } | |
else { reset(); } | |
} | |
ALWAYS_INLINE static void reset() { | |
PORTB_OUTCLR = mask; | |
282: 20 93 26 06 sts 0x0626, r18 | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
286: 24 e0 ldi r18, 0x04 ; 4 | |
} | |
ALWAYS_INLINE static void set(bool status) { | |
if (status) { set(); } | |
288: 82 ff sbrs r24, 2 | |
28a: 03 c0 rjmp .+6 ; 0x292 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E5writeEh+0x4c> | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
28c: 20 93 25 06 sts 0x0625, r18 | |
290: 02 c0 rjmp .+4 ; 0x296 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E5writeEh+0x50> | |
if (status) { set(); } | |
else { reset(); } | |
} | |
ALWAYS_INLINE static void reset() { | |
PORTB_OUTCLR = mask; | |
292: 20 93 26 06 sts 0x0626, r18 | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
296: 22 e0 ldi r18, 0x02 ; 2 | |
} | |
ALWAYS_INLINE static void set(bool status) { | |
if (status) { set(); } | |
298: 81 ff sbrs r24, 1 | |
29a: 03 c0 rjmp .+6 ; 0x2a2 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E5writeEh+0x5c> | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
29c: 20 93 25 06 sts 0x0625, r18 | |
2a0: 02 c0 rjmp .+4 ; 0x2a6 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E5writeEh+0x60> | |
if (status) { set(); } | |
else { reset(); } | |
} | |
ALWAYS_INLINE static void reset() { | |
PORTB_OUTCLR = mask; | |
2a2: 20 93 26 06 sts 0x0626, r18 | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
} | |
ALWAYS_INLINE static void set(bool status) { | |
if (status) { set(); } | |
2a6: 80 ff sbrs r24, 0 | |
2a8: 04 c0 rjmp .+8 ; 0x2b2 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E5writeEh+0x6c> | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
2aa: 81 e0 ldi r24, 0x01 ; 1 | |
2ac: 80 93 25 06 sts 0x0625, r24 | |
2b0: 08 95 ret | |
if (status) { set(); } | |
else { reset(); } | |
} | |
ALWAYS_INLINE static void reset() { | |
PORTB_OUTCLR = mask; | |
2b2: 81 e0 ldi r24, 0x01 ; 1 | |
2b4: 80 93 26 06 sts 0x0626, r24 | |
2b8: 08 95 ret | |
000002ba <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E4readEv>: | |
PORTB_DIRCLR = mask; | |
} | |
ALWAYS_INLINE static bool read() { | |
(void) 6; | |
return (PORTB_IN & mask); | |
2ba: 80 91 28 06 lds r24, 0x0628 | |
if (T11::read()) { value |= 0b0000100000000000; } | |
if (T10::read()) { value |= 0b0000010000000000; } | |
if (T9::read()) { value |= 0b0000001000000000; } | |
if (T8::read()) { value |= 0b0000000100000000; } | |
if (T7::read()) { value |= 0b0000000010000000; } | |
if (T6::read()) { value |= 0b0000000001000000; } | |
2be: 86 fd sbrc r24, 6 | |
2c0: 02 c0 rjmp .+4 ; 0x2c6 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E4readEv+0xc> | |
2c2: 80 e0 ldi r24, 0x00 ; 0 | |
2c4: 01 c0 rjmp .+2 ; 0x2c8 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E4readEv+0xe> | |
2c6: 80 e4 ldi r24, 0x40 ; 64 | |
PORTB_DIRCLR = mask; | |
} | |
ALWAYS_INLINE static bool read() { | |
(void) 5; | |
return (PORTB_IN & mask); | |
2c8: 90 91 28 06 lds r25, 0x0628 | |
if (T5::read()) { value |= 0b0000000000100000; } | |
2cc: 95 fd sbrc r25, 5 | |
2ce: 80 62 ori r24, 0x20 ; 32 | |
PORTB_DIRCLR = mask; | |
} | |
ALWAYS_INLINE static bool read() { | |
(void) 4; | |
return (PORTB_IN & mask); | |
2d0: 90 91 28 06 lds r25, 0x0628 | |
if (T4::read()) { value |= 0b0000000000010000; } | |
2d4: 94 fd sbrc r25, 4 | |
2d6: 80 61 ori r24, 0x10 ; 16 | |
PORTB_DIRCLR = mask; | |
} | |
ALWAYS_INLINE static bool read() { | |
(void) 3; | |
return (PORTB_IN & mask); | |
2d8: 90 91 28 06 lds r25, 0x0628 | |
if (T3::read()) { value |= 0b0000000000001000; } | |
2dc: 93 fd sbrc r25, 3 | |
2de: 88 60 ori r24, 0x08 ; 8 | |
PORTB_DIRCLR = mask; | |
} | |
ALWAYS_INLINE static bool read() { | |
(void) 2; | |
return (PORTB_IN & mask); | |
2e0: 90 91 28 06 lds r25, 0x0628 | |
if (T2::read()) { value |= 0b0000000000000100; } | |
2e4: 92 fd sbrc r25, 2 | |
2e6: 84 60 ori r24, 0x04 ; 4 | |
PORTB_DIRCLR = mask; | |
} | |
ALWAYS_INLINE static bool read() { | |
(void) 1; | |
return (PORTB_IN & mask); | |
2e8: 90 91 28 06 lds r25, 0x0628 | |
if (T1::read()) { value |= 0b0000000000000010; } | |
2ec: 91 fd sbrc r25, 1 | |
2ee: 82 60 ori r24, 0x02 ; 2 | |
PORTB_DIRCLR = mask; | |
} | |
ALWAYS_INLINE static bool read() { | |
(void) 0; | |
return (PORTB_IN & mask); | |
2f0: 90 91 28 06 lds r25, 0x0628 | |
if (T0::read()) { value |= 0b0000000000000001; } | |
2f4: 90 fd sbrc r25, 0 | |
2f6: 81 60 ori r24, 0x01 ; 1 | |
return value; | |
} | |
2f8: 08 95 ret | |
000002fa <_ZN4xpcc16SoftwareGpioPortIINS_5xmega6GpioB5ENS1_6GpioB4ENS1_6GpioB3ENS1_6GpioB2ENS1_6GpioB1ENS1_6GpioB0EEE4readEv>: | |
2fa: 80 91 28 06 lds r24, 0x0628 | |
} | |
static Size | |
read() | |
{ | |
Size data = SoftwareGpioPort<Gpios...>::read(); | |
2fe: 81 70 andi r24, 0x01 ; 1 | |
PORTB_DIRCLR = mask; | |
} | |
ALWAYS_INLINE static bool read() { | |
(void) 1; | |
return (PORTB_IN & mask); | |
300: 90 91 28 06 lds r25, 0x0628 | |
if (Gpio::read()) { | |
304: 91 fd sbrc r25, 1 | |
data |= (1 << (width-1)); | |
306: 82 60 ori r24, 0x02 ; 2 | |
PORTB_DIRCLR = mask; | |
} | |
ALWAYS_INLINE static bool read() { | |
(void) 2; | |
return (PORTB_IN & mask); | |
308: 90 91 28 06 lds r25, 0x0628 | |
static Size | |
read() | |
{ | |
Size data = SoftwareGpioPort<Gpios...>::read(); | |
if (Gpio::read()) { | |
30c: 92 fd sbrc r25, 2 | |
data |= (1 << (width-1)); | |
30e: 84 60 ori r24, 0x04 ; 4 | |
PORTB_DIRCLR = mask; | |
} | |
ALWAYS_INLINE static bool read() { | |
(void) 3; | |
return (PORTB_IN & mask); | |
310: 90 91 28 06 lds r25, 0x0628 | |
static Size | |
read() | |
{ | |
Size data = SoftwareGpioPort<Gpios...>::read(); | |
if (Gpio::read()) { | |
314: 93 fd sbrc r25, 3 | |
data |= (1 << (width-1)); | |
316: 88 60 ori r24, 0x08 ; 8 | |
PORTB_DIRCLR = mask; | |
} | |
ALWAYS_INLINE static bool read() { | |
(void) 4; | |
return (PORTB_IN & mask); | |
318: 90 91 28 06 lds r25, 0x0628 | |
static Size | |
read() | |
{ | |
Size data = SoftwareGpioPort<Gpios...>::read(); | |
if (Gpio::read()) { | |
31c: 94 fd sbrc r25, 4 | |
data |= (1 << (width-1)); | |
31e: 80 61 ori r24, 0x10 ; 16 | |
PORTB_DIRCLR = mask; | |
} | |
ALWAYS_INLINE static bool read() { | |
(void) 5; | |
return (PORTB_IN & mask); | |
320: 90 91 28 06 lds r25, 0x0628 | |
static Size | |
read() | |
{ | |
Size data = SoftwareGpioPort<Gpios...>::read(); | |
if (Gpio::read()) { | |
324: 95 fd sbrc r25, 5 | |
data |= (1 << (width-1)); | |
326: 80 62 ori r24, 0x20 ; 32 | |
} | |
return data; | |
} | |
328: 08 95 ret | |
0000032a <_ZN4xpcc16SoftwareGpioPortIINS_5xmega6GpioB4ENS1_6GpioB3ENS1_6GpioB2ENS1_6GpioB1ENS1_6GpioB0EEE5writeEh>: | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
32a: 20 e1 ldi r18, 0x10 ; 16 | |
} | |
ALWAYS_INLINE static void set(bool status) { | |
if (status) { set(); } | |
32c: 84 ff sbrs r24, 4 | |
32e: 03 c0 rjmp .+6 ; 0x336 <_ZN4xpcc16SoftwareGpioPortIINS_5xmega6GpioB4ENS1_6GpioB3ENS1_6GpioB2ENS1_6GpioB1ENS1_6GpioB0EEE5writeEh+0xc> | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
330: 20 93 25 06 sts 0x0625, r18 | |
334: 02 c0 rjmp .+4 ; 0x33a <_ZN4xpcc16SoftwareGpioPortIINS_5xmega6GpioB4ENS1_6GpioB3ENS1_6GpioB2ENS1_6GpioB1ENS1_6GpioB0EEE5writeEh+0x10> | |
if (status) { set(); } | |
else { reset(); } | |
} | |
ALWAYS_INLINE static void reset() { | |
PORTB_OUTCLR = mask; | |
336: 20 93 26 06 sts 0x0626, r18 | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
33a: 28 e0 ldi r18, 0x08 ; 8 | |
} | |
ALWAYS_INLINE static void set(bool status) { | |
if (status) { set(); } | |
33c: 83 ff sbrs r24, 3 | |
33e: 03 c0 rjmp .+6 ; 0x346 <_ZN4xpcc16SoftwareGpioPortIINS_5xmega6GpioB4ENS1_6GpioB3ENS1_6GpioB2ENS1_6GpioB1ENS1_6GpioB0EEE5writeEh+0x1c> | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
340: 20 93 25 06 sts 0x0625, r18 | |
344: 02 c0 rjmp .+4 ; 0x34a <_ZN4xpcc16SoftwareGpioPortIINS_5xmega6GpioB4ENS1_6GpioB3ENS1_6GpioB2ENS1_6GpioB1ENS1_6GpioB0EEE5writeEh+0x20> | |
if (status) { set(); } | |
else { reset(); } | |
} | |
ALWAYS_INLINE static void reset() { | |
PORTB_OUTCLR = mask; | |
346: 20 93 26 06 sts 0x0626, r18 | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
34a: 24 e0 ldi r18, 0x04 ; 4 | |
} | |
ALWAYS_INLINE static void set(bool status) { | |
if (status) { set(); } | |
34c: 82 ff sbrs r24, 2 | |
34e: 03 c0 rjmp .+6 ; 0x356 <_ZN4xpcc16SoftwareGpioPortIINS_5xmega6GpioB4ENS1_6GpioB3ENS1_6GpioB2ENS1_6GpioB1ENS1_6GpioB0EEE5writeEh+0x2c> | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
350: 20 93 25 06 sts 0x0625, r18 | |
354: 02 c0 rjmp .+4 ; 0x35a <_ZN4xpcc16SoftwareGpioPortIINS_5xmega6GpioB4ENS1_6GpioB3ENS1_6GpioB2ENS1_6GpioB1ENS1_6GpioB0EEE5writeEh+0x30> | |
if (status) { set(); } | |
else { reset(); } | |
} | |
ALWAYS_INLINE static void reset() { | |
PORTB_OUTCLR = mask; | |
356: 20 93 26 06 sts 0x0626, r18 | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
35a: 22 e0 ldi r18, 0x02 ; 2 | |
} | |
ALWAYS_INLINE static void set(bool status) { | |
if (status) { set(); } | |
35c: 81 ff sbrs r24, 1 | |
35e: 03 c0 rjmp .+6 ; 0x366 <_ZN4xpcc16SoftwareGpioPortIINS_5xmega6GpioB4ENS1_6GpioB3ENS1_6GpioB2ENS1_6GpioB1ENS1_6GpioB0EEE5writeEh+0x3c> | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
360: 20 93 25 06 sts 0x0625, r18 | |
364: 02 c0 rjmp .+4 ; 0x36a <_ZN4xpcc16SoftwareGpioPortIINS_5xmega6GpioB4ENS1_6GpioB3ENS1_6GpioB2ENS1_6GpioB1ENS1_6GpioB0EEE5writeEh+0x40> | |
if (status) { set(); } | |
else { reset(); } | |
} | |
ALWAYS_INLINE static void reset() { | |
PORTB_OUTCLR = mask; | |
366: 20 93 26 06 sts 0x0626, r18 | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
} | |
ALWAYS_INLINE static void set(bool status) { | |
if (status) { set(); } | |
36a: 80 ff sbrs r24, 0 | |
36c: 04 c0 rjmp .+8 ; 0x376 <_ZN4xpcc16SoftwareGpioPortIINS_5xmega6GpioB4ENS1_6GpioB3ENS1_6GpioB2ENS1_6GpioB1ENS1_6GpioB0EEE5writeEh+0x4c> | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
36e: 81 e0 ldi r24, 0x01 ; 1 | |
370: 80 93 25 06 sts 0x0625, r24 | |
374: 08 95 ret | |
if (status) { set(); } | |
else { reset(); } | |
} | |
ALWAYS_INLINE static void reset() { | |
PORTB_OUTCLR = mask; | |
376: 81 e0 ldi r24, 0x01 ; 1 | |
378: 80 93 26 06 sts 0x0626, r24 | |
37c: 08 95 ret | |
0000037e <main>: | |
} | |
#endif//*/ | |
int | |
main(void) | |
{ | |
37e: cf 93 push r28 | |
380: df 93 push r29 | |
382: 0f 92 push r0 | |
384: 0f 92 push r0 | |
386: cd b7 in r28, 0x3d ; 61 | |
388: de b7 in r29, 0x3e ; 62 | |
configure(config, invert); | |
} | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
38a: 90 e4 ldi r25, 0x40 ; 64 | |
38c: 90 93 21 06 sts 0x0621, r25 | |
configure(config, invert); | |
} | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
390: 80 e2 ldi r24, 0x20 ; 32 | |
392: 80 93 21 06 sts 0x0621, r24 | |
configure(config, invert); | |
} | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
396: 80 e1 ldi r24, 0x10 ; 16 | |
398: 80 93 21 06 sts 0x0621, r24 | |
configure(config, invert); | |
} | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
39c: 88 e0 ldi r24, 0x08 ; 8 | |
39e: 80 93 21 06 sts 0x0621, r24 | |
configure(config, invert); | |
} | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
3a2: 84 e0 ldi r24, 0x04 ; 4 | |
3a4: 80 93 21 06 sts 0x0621, r24 | |
configure(config, invert); | |
} | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
3a8: 82 e0 ldi r24, 0x02 ; 2 | |
3aa: 80 93 21 06 sts 0x0621, r24 | |
configure(config, invert); | |
} | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
3ae: 81 e0 ldi r24, 0x01 ; 1 | |
3b0: 80 93 21 06 sts 0x0621, r24 | |
Data3::setOutput(); | |
volatile uint8_t write = 0xff; | |
3b4: 8f ef ldi r24, 0xFF ; 255 | |
3b6: 8a 83 std Y+2, r24 ; 0x02 | |
volatile uint8_t read = 0; | |
3b8: 19 82 std Y+1, r1 ; 0x01 | |
Data3::write(write); | |
3ba: 8a 81 ldd r24, Y+2 ; 0x02 | |
static void | |
write(Size data) | |
{ | |
Gpio::set(data & (1 << (width-1))); | |
3bc: 28 2f mov r18, r24 | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
} | |
ALWAYS_INLINE static void set(bool status) { | |
if (status) { set(); } | |
3be: 86 ff sbrs r24, 6 | |
3c0: 03 c0 rjmp .+6 ; 0x3c8 <main+0x4a> | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
3c2: 90 93 25 06 sts 0x0625, r25 | |
3c6: 02 c0 rjmp .+4 ; 0x3cc <main+0x4e> | |
if (status) { set(); } | |
else { reset(); } | |
} | |
ALWAYS_INLINE static void reset() { | |
PORTB_OUTCLR = mask; | |
3c8: 90 93 26 06 sts 0x0626, r25 | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
3cc: 90 e2 ldi r25, 0x20 ; 32 | |
} | |
ALWAYS_INLINE static void set(bool status) { | |
if (status) { set(); } | |
3ce: 25 ff sbrs r18, 5 | |
3d0: 03 c0 rjmp .+6 ; 0x3d8 <main+0x5a> | |
ALWAYS_INLINE static void setOutput() { | |
PORTB_DIRSET = mask; | |
} | |
ALWAYS_INLINE static void set() { | |
PORTB_OUTSET = mask; | |
3d2: 90 93 25 06 sts 0x0625, r25 | |
3d6: 02 c0 rjmp .+4 ; 0x3dc <main+0x5e> | |
if (status) { set(); } | |
else { reset(); } | |
} | |
ALWAYS_INLINE static void reset() { | |
PORTB_OUTCLR = mask; | |
3d8: 90 93 26 06 sts 0x0626, r25 | |
SoftwareGpioPort<Gpios...>::write(data); | |
3dc: a6 df rcall .-180 ; 0x32a <_ZN4xpcc16SoftwareGpioPortIINS_5xmega6GpioB4ENS1_6GpioB3ENS1_6GpioB2ENS1_6GpioB1ENS1_6GpioB0EEE5writeEh> | |
3de: 8a 81 ldd r24, Y+2 ; 0x02 | |
Data4::write(write); | |
3e0: 32 df rcall .-412 ; 0x246 <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E5writeEh> | |
3e2: 8b df rcall .-234 ; 0x2fa <_ZN4xpcc16SoftwareGpioPortIINS_5xmega6GpioB5ENS1_6GpioB4ENS1_6GpioB3ENS1_6GpioB2ENS1_6GpioB1ENS1_6GpioB0EEE4readEv> | |
3e4: 90 91 28 06 lds r25, 0x0628 | |
} | |
static Size | |
read() | |
{ | |
Size data = SoftwareGpioPort<Gpios...>::read(); | |
3e8: 96 fd sbrc r25, 6 | |
PORTB_DIRCLR = mask; | |
} | |
ALWAYS_INLINE static bool read() { | |
(void) 6; | |
return (PORTB_IN & mask); | |
3ea: 80 64 ori r24, 0x40 ; 64 | |
3ec: 89 83 std Y+1, r24 ; 0x01 | |
if (Gpio::read()) { | |
3ee: 65 df rcall .-310 ; 0x2ba <_ZN4xpcc16SoftwareGpioWordINS_5xmega6GpioB0ENS1_6GpioB1ENS1_6GpioB2ENS1_6GpioB3ENS1_6GpioB4ENS1_6GpioB5ENS1_6GpioB6ENS_10GpioUnusedES9_S9_S9_S9_S9_S9_S9_S9_E4readEv> | |
data |= (1 << (width-1)); | |
3f0: 89 83 std Y+1, r24 ; 0x01 | |
read = Data3::read(); | |
3f2: 89 81 ldd r24, Y+1 ; 0x01 | |
read = Data4::read(); | |
3f4: ff cf rjmp .-2 ; 0x3f4 <main+0x76> | |
000003f6 <_exit>: | |
3f6: f8 94 cli | |
000003f8 <__stop_program>: | |
3f8: ff cf rjmp .-2 ; 0x3f8 <__stop_program> |
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