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| OVERVIEW: LLVM code coverage tool | |
| USAGE: llvm-cov show [options] Covered executable or object file. <Source files> | |
| OPTIONS: | |
| -Xdemangler=<string> - <demangler-path>|<demangler-option> | |
| -aarch64-a57-fp-load-balancing-force-all - Always modify dest registers regardless of color | |
| -aarch64-a57-fp-load-balancing-override=<uint> - Ignore balance information, always return (1: Even, 2: Odd). | |
| -aarch64-bcc-offset-bits=<uint> - Restrict range of Bcc instructions (DEBUG) | |
| -aarch64-cbz-offset-bits=<uint> - Restrict range of CB[N]Z instructions (DEBUG) | |
| -aarch64-ccmp-limit=<uint> - Maximum number of instructions per speculated block. | |
| -aarch64-early-ifcvt - Enable the early if converter pass | |
| -aarch64-elf-ldtls-generation - Allow AArch64 Local Dynamic TLS code generation | |
| -aarch64-enable-atomic-cfg-tidy - Run SimplifyCFG after expanding atomic operations to make use of cmpxchg flow-based information | |
| -aarch64-enable-branch-relax - Relax out of range conditional branches | |
| -aarch64-enable-ccmp - Enable the CCMP formation pass | |
| -aarch64-enable-collect-loh - Enable the pass that emits the linker optimization hints (LOH) | |
| -aarch64-enable-condopt - Enable the condition optimizer pass | |
| -aarch64-enable-copyelim - Enable the redundant copy elimination pass | |
| -aarch64-enable-dead-defs - Enable the pass that removes dead definitons and replaces stores to them with stores to the zero register | |
| -aarch64-enable-early-ifcvt - Run early if-conversion | |
| -aarch64-enable-gep-opt - Enable optimizations on complex GEPs | |
| -aarch64-enable-global-isel-at-O=<int> - Enable GlobalISel at or below an opt level (-1 to disable) | |
| -aarch64-enable-global-merge - Enable the global merge pass | |
| -aarch64-enable-ldst-opt - Enable the load/store pair optimization pass | |
| -aarch64-enable-loop-data-prefetch - Enable the loop data prefetch pass | |
| -aarch64-enable-mcr - Enable the machine combiner pass | |
| -aarch64-enable-promote-const - Enable the promote constant pass | |
| -aarch64-enable-simd-scalar - Enable use of AdvSIMD scalar integer instructions | |
| -aarch64-enable-stp-suppress - Suppress STP for AArch64 | |
| -aarch64-enable-type-promotion - Enable the type promotion pass | |
| -aarch64-fix-cortex-a53-835769 - Work around Cortex-A53 erratum 835769 | |
| -aarch64-load-store-scan-limit=<uint> - | |
| -aarch64-misched-fusion - Enable scheduling for macro fusion. | |
| -aarch64-neon-syntax - Choose style of NEON code to emit from AArch64 backend: | |
| =generic - Emit generic NEON assembly | |
| =apple - Emit Apple-style NEON assembly | |
| -aarch64-redzone - enable use of redzone on AArch64 | |
| -aarch64-shift-insert-generation - Allow AArch64 SLI/SRI formation | |
| -aarch64-simd-scalar-force-all - Force use of AdvSIMD scalar instructions everywhere | |
| -aarch64-stress-ccmp - Turn all knobs to 11 | |
| -aarch64-stress-promote-const - Promote all vector constants | |
| -aarch64-tbz-offset-bits=<uint> - Restrict range of TB[N]Z instructions (DEBUG) | |
| -aarch64-type-promotion-merge - Enable merging of redundant sexts when one is dominating the other. | |
| -aarch64-update-scan-limit=<uint> - | |
| -aarch64-use-tbi - Assume that top byte of an address is ignored | |
| -adce-remove-control-flow - | |
| -adce-remove-loops - | |
| -addr-sink-using-gep - Address sinking in CGP using GEPs. | |
| -agg-antidep-debugdiv=<int> - Debug control for aggressive anti-dep breaker | |
| -agg-antidep-debugmod=<int> - Debug control for aggressive anti-dep breaker | |
| -aggregate-extracted-args - Aggregate arguments to code-extracted functions | |
| -aggressive-ext-opt - Aggressive extension optimization | |
| -alias-set-saturation-threshold=<uint> - The maximum number of pointers may-alias sets may contain before degradation | |
| -align-all-blocks=<uint> - Force the alignment of all blocks in the function. | |
| -align-all-functions=<uint> - Force the alignment of all functions. | |
| -align-all-nofallthru-blocks=<uint> - Force the alignment of all blocks that have no fall-through predecessors (i.e. don't add nops that are executed). | |
| -align-neon-spills - Align ARM NEON spills in prolog and epilog | |
| -amdgpu-dump-comd - Dump AMDGPU Code Object Metadata | |
| -amdgpu-early-ifcvt - Run early if-conversion | |
| -amdgpu-early-inline-all - Inline all functions early | |
| -amdgpu-internalize-symbols - Enable elimination of non-kernel functions and unused globals | |
| -amdgpu-load-store-vectorizer - Enable load store vectorizer | |
| -amdgpu-scalarize-global-loads - Enable global load scalarization | |
| -amdgpu-sdwa-peephole - Enable SDWA peepholer | |
| -amdgpu-skip-threshold=<uint> - Number of instructions before jumping over divergent control flow | |
| -amdgpu-spill-sgpr-to-smem - Use scalar stores to spill SGPRs if supported by subtarget | |
| -amdgpu-unroll-threshold-local=<uint> - Unroll threshold for AMDGPU if local memory used in a loop | |
| -amdgpu-unroll-threshold-private=<uint> - Unroll threshold for AMDGPU if private memory used in a loop | |
| -amdgpu-verify-comd - Verify AMDGPU Code Object Metadata | |
| -amdgpu-vgpr-index-mode - Use GPR indexing mode instead of movrel for vector indexing | |
| -arch=<string> - architecture of the coverage mapping binary | |
| -arm-adjust-jump-tables - Adjust basic block layout to better use TB[BH] | |
| -arm-assume-misaligned-load-store - Be more conservative in ARM load/store opt | |
| -arm-atomic-cfg-tidy - Run SimplifyCFG after expanding atomic operations to make use of cmpxchg flow-based information | |
| -arm-constant-island-max-iteration=<uint> - The max number of iteration for converge | |
| -arm-execute-only - | |
| -arm-force-fast-isel - | |
| -arm-global-merge - Enable the global merge pass | |
| -arm-implicit-it - Allow conditional instructions outdside of an IT block | |
| =always - Accept in both ISAs, emit implicit ITs in Thumb | |
| =never - Warn in ARM, reject in Thumb | |
| =arm - Accept in ARM, reject in Thumb | |
| =thumb - Warn in ARM, emit implicit ITs in Thumb | |
| -arm-interworking - Enable / disable ARM interworking (for debugging only) | |
| -arm-load-store-opt - Enable ARM load/store optimization pass | |
| IT block support | |
| -arm-default-it - Generate IT block based on arch | |
| -arm-restrict-it - Disallow deprecated IT based on ARMv8 | |
| -arm-no-restrict-it - Allow IT blocks based on ARMv7 | |
| -arm-promote-constant - Enable / disable promotion of unnamed_addr constants into constant pools | |
| -arm-promote-constant-max-size=<uint> - Maximum size of constant to promote into a constant pool | |
| -arm-promote-constant-max-total=<uint> - Maximum size of ALL constants to promote into a constant pool | |
| -arm-synthesize-thumb-1-tbb - Use compressed jump tables in Thumb-1 by synthesizing an equivalent to the TBB/TBH instructions | |
| -arm-use-mulops - | |
| -as-secure-log-file-name - As secure log file name (initialized from AS_SECURE_LOG_FILE env variable) | |
| -asan-always-slow-path - use instrumentation with slow path for all accesses | |
| -asan-debug=<int> - debug | |
| -asan-debug-func=<string> - Debug func | |
| -asan-debug-max=<int> - Debug max inst | |
| -asan-debug-min=<int> - Debug min inst | |
| -asan-debug-stack=<int> - debug stack | |
| -asan-detect-invalid-pointer-pair - Instrument <, <=, >, >=, - with pointer operands | |
| -asan-force-dynamic-shadow - Load shadow address into a local variable for each function | |
| -asan-force-experiment=<uint> - Force optimization experiment (for testing) | |
| -asan-globals - Handle global objects | |
| -asan-globals-live-support - Use linker features to support dead code stripping of globals (Mach-O only) | |
| -asan-initialization-order - Handle C++ initializer order | |
| -asan-instrument-assembly - instrument assembly with AddressSanitizer checks | |
| -asan-instrument-atomics - instrument atomic instructions (rmw, cmpxchg) | |
| -asan-instrument-dynamic-allocas - instrument dynamic allocas | |
| -asan-instrument-reads - instrument read instructions | |
| -asan-instrument-writes - instrument write instructions | |
| -asan-instrumentation-with-call-threshold=<int> - If the function being instrumented contains more than this number of memory accesses, use callbacks instead of inline checks (-1 means never use callbacks). | |
| -asan-kernel - Enable KernelAddressSanitizer instrumentation | |
| -asan-mapping-offset=<uint> - offset of asan shadow mapping [EXPERIMENTAL] | |
| -asan-mapping-scale=<int> - scale of asan shadow mapping | |
| -asan-max-inline-poisoning-size=<uint> - Inline shadow poisoning for blocks up to the given size in bytes. | |
| -asan-max-ins-per-bb=<int> - maximal number of instructions to instrument in any given BB | |
| -asan-memory-access-callback-prefix=<string> - Prefix for memory access callbacks | |
| -asan-opt - Optimize instrumentation | |
| -asan-opt-globals - Don't instrument scalar globals | |
| -asan-opt-same-temp - Instrument the same temp just once | |
| -asan-opt-stack - Don't instrument scalar stack variables | |
| -asan-realign-stack=<uint> - Realign stack to the value of this flag (power of two) | |
| -asan-recover - Enable recovery mode (continue-after-error). | |
| -asan-skip-promotable-allocas - Do not instrument promotable allocas | |
| -asan-stack - Handle stack memory | |
| -asan-stack-dynamic-alloca - Use dynamic alloca to represent stack variables | |
| -asan-use-after-return - Check stack-use-after-return | |
| -asan-use-after-scope - Check stack-use-after-scope | |
| -asan-use-private-alias - Use private aliases for global variables | |
| -asm-macro-max-nesting-depth=<uint> - The maximum nesting depth allowed for assembly macros. | |
| -available-load-scan-limit=<uint> - Use this to specify the default maximum number of instructions to scan backward from a given instruction, when searching for available loaded value | |
| -avoid-speculation - MachineLICM should avoid speculation | |
| -basicaa-recphi - | |
| -bb-vectorize-aligned-only - Only generate aligned loads and stores | |
| -bb-vectorize-fast-dep - Use a fast instruction dependency analysis | |
| -bb-vectorize-ignore-target-info - Ignore target information | |
| -bb-vectorize-max-cycle-check-pairs=<uint> - The maximum number of candidate pairs with which to use a full cycle check | |
| -bb-vectorize-max-instr-per-group=<uint> - The maximum number of pairable instructions per group | |
| -bb-vectorize-max-iter=<uint> - The maximum number of pairing iterations | |
| -bb-vectorize-max-pairs-per-group=<uint> - The maximum number of candidate instruction pairs per group | |
| -bb-vectorize-no-bitmanip - Don't try to vectorize BitManipulation intrinsics | |
| -bb-vectorize-no-bools - Don't try to vectorize boolean (i1) values | |
| -bb-vectorize-no-casts - Don't try to vectorize casting (conversion) operations | |
| -bb-vectorize-no-cmp - Don't try to vectorize comparison instructions | |
| -bb-vectorize-no-floats - Don't try to vectorize floating-point values | |
| -bb-vectorize-no-fma - Don't try to vectorize the fused-multiply-add intrinsic | |
| -bb-vectorize-no-gep - Don't try to vectorize getelementptr instructions | |
| -bb-vectorize-no-ints - Don't try to vectorize integer values | |
| -bb-vectorize-no-math - Don't try to vectorize floating-point math intrinsics | |
| -bb-vectorize-no-mem-op-boost - Don't boost the chain-depth contribution of loads and stores | |
| -bb-vectorize-no-mem-ops - Don't try to vectorize loads and stores | |
| -bb-vectorize-no-pointers - Don't try to vectorize pointer values | |
| -bb-vectorize-no-select - Don't try to vectorize select instructions | |
| -bb-vectorize-pow2-len-only - Don't try to form non-2^n-length vectors | |
| -bb-vectorize-req-chain-depth=<uint> - The required chain depth for vectorization | |
| -bb-vectorize-search-limit=<uint> - The maximum search distance for instruction pairs | |
| -bb-vectorize-splat-breaks-chain - Replicating one element to a pair breaks the chain | |
| -bb-vectorize-use-chain-depth - Use the chain depth requirement with target information | |
| -bb-vectorize-vector-bits=<uint> - The size of the native vector registers | |
| -bitcode-mdindex-threshold=<uint> - Number of metadatas above which we emit an index to enable lazy-loading | |
| -block-placement-exit-block-bias=<uint> - Block frequency percentage a loop exit block needs over the original exit to be considered the new exit. | |
| -bonus-inst-threshold=<uint> - Control the number of bonus instructions (default = 1) | |
| -bot-use-shorter-tie - | |
| -bounds-checking-single-trap - Use one trap block per function | |
| -branch-fold-placement - Perform branch folding during placement. Reduces code size. | |
| -branch-relax-asm-large - branch relax asm | |
| -branch-relax-safety-buffer=<uint> - safety buffer size | |
| -break-anti-dependencies=<string> - Break post-RA scheduling anti-dependencies: "critical", "all", or "none" | |
| -cgp-freq-ratio-to-skip-merge=<uint> - Skip merging empty blocks if (frequency of empty block) / (frequency of destination block) is greater than this ratio | |
| -cgp-type-promotion-merge - Enable merging of redundant sexts when one is dominating the other. | |
| -check-early-avail - | |
| -color - use colored syntax highlighting (default=autodetect) | |
| -combine-loads - Run the load combining pass | |
| -combiner-global-alias-analysis - Enable DAG combiner's use of IR alias analysis | |
| -combiner-split-load-index - DAG combiner may split indexing from loads | |
| -combiner-stress-load-slicing - Bypass the profitability model of load slicing | |
| -combiner-use-tbaa - Enable DAG combiner's use of TBAA | |
| -commgep-const - | |
| -commgep-inv - | |
| -commgep-speculate - | |
| -compile-time-mem-idiom-threshold=<uint> - Threshold (in bytes) to perform the transformation, if the runtime loop count (mem transfer size) is known at compile-time. | |
| -compute-dead - Compute dead symbols | |
| -costmodel-reduxcost - Recognize reduction patterns. | |
| -crash-on-ppc-vsx-self-copy - Causes the backend to crash instead of generating a nop VSX copy | |
| -cvp-dont-process-adds - | |
| -da-delinearize - Try to delinearize array references. | |
| -dag-dump-verbose - Display more information when dumping selection DAG nodes. | |
| -dag-maps-huge-region=<uint> - The limit to use while constructing the DAG prior to scheduling, at which point a trade-off is made to avoid excessive compile time. | |
| -dag-maps-reduction-size=<uint> - A huge scheduling region will have maps reduced by this many nodes at a time. Defaults to HugeRegion / 2. | |
| -debug-compile - Compile for debugging | |
| -debug-counter - Comma separated list of debug counter skip and count | |
| =predicateinfo-rename - Controls which variables are renamed with predicateinfo | |
| =newgvn-vn - Controls which instructions are value numbered | |
| -debug-pass - Print PassManager debugging information | |
| =Disabled - disable debug output | |
| =Arguments - print pass arguments to pass to 'opt' | |
| =Structure - print pass structure before run() | |
| =Executions - print pass name before it is executed | |
| =Details - print pass details when it is executed | |
| -default-gcov-version=<string> - | |
| -dfa-hazard-rec - Use the DFA based hazard recognizer. | |
| -dfa-instr-limit=<uint> - If present, stops packetizing after N instructions | |
| -dfa-sched-reg-pressure-threshold=<int> - Track reg pressure and switch priority to in-depth | |
| -dfsan-abilist=<string> - File listing native ABI functions and how the pass treats them | |
| -dfsan-args-abi - Use the argument ABI rather than the TLS ABI | |
| -dfsan-combine-pointer-labels-on-load - Combine the label of the pointer with the label of the data when loading from memory. | |
| -dfsan-combine-pointer-labels-on-store - Combine the label of the pointer with the label of the data when storing in memory. | |
| -dfsan-debug-nonzero-labels - Insert calls to __dfsan_nonzero_label on observing a parameter, load or return with a nonzero label | |
| -dfsan-preserve-alignment - respect alignment requirements provided by input IR | |
| -disable-2addr-hack - Disable scheduler's two-address hack | |
| -disable-a15-sd-optimization - Inhibit optimization of S->D register accesses on A15 | |
| -disable-adv-copy-opt - Disable advanced copy optimization | |
| -disable-basicaa - | |
| -disable-block-placement - Disable probability-driven block placement | |
| -disable-branch-fold - Disable branch folding | |
| -disable-cgp - Disable Codegen Prepare | |
| -disable-cgp-branch-opts - Disable branch optimizations in CodeGenPrepare | |
| -disable-cgp-ext-ld-promotion - Disable ext(promotable(ld)) -> promoted(ext(ld)) optimization in CodeGenPrepare | |
| -disable-cgp-gc-opts - Disable GC optimizations in CodeGenPrepare | |
| -disable-cgp-select2branch - Disable select to branch conversion. | |
| -disable-cgp-store-extract - Disable store(extract) optimizations in CodeGenPrepare | |
| -disable-cleanups - Do not remove implausible terminators or other similar cleanups | |
| -disable-const64 - Disable generation of const64 | |
| -disable-constant-hoisting - Disable ConstantHoisting | |
| -disable-copyprop - Disable Copy Propagation pass | |
| -disable-debug-info-print - Disable debug info printing | |
| -disable-demotion - Clone multicolor basic blocks but do not demote cross funclet values | |
| -disable-dfa-sched - Disable use of DFA during scheduling | |
| -disable-early-ifcvt - Disable Early If-conversion | |
| -disable-early-taildup - Disable pre-register allocation tail duplication | |
| -disable-hcp - Disable Hexagon constant propagation | |
| -disable-hexagon-amodeopt - Disable Hexagon Addressing Mode Optimization | |
| -disable-hexagon-cfgopt - Disable Hexagon CFG Optimization | |
| -disable-hexagon-dealloc-ret - Disable Dealloc Return for Hexagon target | |
| -disable-hexagon-hwloops - Disable Hardware Loops for Hexagon target | |
| -disable-hexagon-memops - Do not generate V4 MEMOP in code generation for Hexagon target | |
| -disable-hexagon-misched - Disable Hexagon MI Scheduling | |
| -disable-hexagon-nv-schedule - Disable schedule adjustment for new value stores. | |
| -disable-hexagon-opt-ext-to-64 - Disable Optimization of extensions to i64. | |
| -disable-hexagon-optszext - Disable Optimization of Sign/Zero Extends | |
| -disable-hexagon-peephole - Disable Peephole Optimization | |
| -disable-hexagon-pnotp - Disable Optimization of PNotP | |
| -disable-hexagon-shuffle - Disable Hexagon instruction shuffling | |
| -disable-hexagon-volatile-memcpy - Enable Hexagon-specific memcpy for volatile destination. | |
| -disable-hsdr - Disable splitting double registers | |
| -disable-icp - Disable indirect call promotion | |
| -disable-ifcvt-diamond - | |
| -disable-ifcvt-forked-diamond - | |
| -disable-ifcvt-simple - | |
| -disable-ifcvt-simple-false - | |
| -disable-ifcvt-triangle - | |
| -disable-ifcvt-triangle-false - | |
| -disable-ifcvt-triangle-false-rev - | |
| -disable-ifcvt-triangle-rev - | |
| -disable-inlined-alloca-merging - | |
| -disable-lanai-mem-alu-combiner - Do not combine ALU and memory operators | |
| -disable-libcalls-shrinkwrap - Disable shrink-wrap library calls | |
| -disable-licm-promotion - Disable memory promotion in LICM pass | |
| -disable-lsr - Disable Loop Strength Reduction Pass | |
| -disable-machine-cse - Disable Machine Common Subexpression Elimination | |
| -disable-machine-dce - Disable Machine Dead Code Elimination | |
| -disable-machine-licm - Disable Machine LICM | |
| -disable-machine-sink - Disable Machine Sinking | |
| -disable-memcpy-idiom - Disable generation of memcpy in loop idiom recognition | |
| -disable-memmove-idiom - Disable generation of memmove in loop idiom recognition | |
| -disable-memop-opt - Disable optimize | |
| -disable-merge-into-combines - Disable merging into combines | |
| -disable-mips-delay-filler - Fill all delay slots with NOPs. | |
| -disable-mips-df-backward-search - Disallow MIPS delay filler to search backward. | |
| -disable-mips-df-forward-search - Disallow MIPS delay filler to search forward. | |
| -disable-mips-df-succbb-search - Disallow MIPS delay filler to search successor basic blocks. | |
| -disable-non-allocatable-phys-copy-opt - Disable non-allocatable physical register copy optimization | |
| -disable-nvjump - Disable New Value Jumps | |
| -disable-nvptx-load-store-vectorizer - Disable load/store vectorizer | |
| -disable-ondemand-mds-loading - Force disable the lazy-loading on-demand of metadata when loading bitcode for importing. | |
| -disable-packetizer - Disable Hexagon packetizer pass | |
| -disable-partial-libcall-inlining - Disable Partial Libcall Inlining | |
| -disable-peephole - Disable the peephole optimizer | |
| -disable-phi-elim-edge-splitting - Disable critical edge splitting during PHI elimination | |
| -disable-post-ra - Disable Post Regalloc Scheduler | |
| -disable-postra-machine-licm - Disable Machine LICM | |
| -disable-ppc-cmp-opt - Disable compare instruction optimization | |
| -disable-ppc-constant-hoisting - disable constant hoisting on PPC | |
| -disable-ppc-ctrloop-analysis - Disable analysis for CTR loops | |
| -disable-ppc-ctrloops - Disable CTR loops for PPC | |
| -disable-ppc-ilp-pref - disable setting the node scheduling preference to ILP on PPC | |
| -disable-ppc-peephole - Disable machine peepholes for PPC | |
| -disable-ppc-preinc - disable preincrement load/store generation on PPC | |
| -disable-ppc-preinc-prep - Disable PPC loop preinc prep | |
| -disable-ppc-qpx-load-splat - Disable QPX load splat simplification | |
| -disable-ppc-sco - disable sibling call optimization on ppc | |
| -disable-ppc-unaligned - disable unaligned load/store generation on PPC | |
| -disable-ppc-vsx-fma-mutation - Disable VSX FMA instruction mutation | |
| -disable-ppc-vsx-swap-removal - Disable VSX Swap Removal for PPC | |
| -disable-preheader-prot - Disable protection against removing loop preheaders | |
| -disable-preinline - Disable pre-instrumentation inliner | |
| -disable-sched-critical-path - Disable critical path priority in sched=list-ilp | |
| -disable-sched-cycles - Disable cycle-level precision during preRA scheduling | |
| -disable-sched-hazard - Disable hazard detection during preRA scheduling | |
| -disable-sched-height - Disable scheduled-height priority in sched=list-ilp | |
| -disable-sched-live-uses - Disable live use priority in sched=list-ilp | |
| -disable-sched-physreg-join - Disable physreg def-use affinity | |
| -disable-sched-reg-pressure - Disable regpressure priority in sched=list-ilp | |
| -disable-sched-stalls - Disable no-stall priority in sched=list-ilp | |
| -disable-sched-vrcycle - Disable virtual register cycle interference checks | |
| -disable-separate-const-offset-from-gep - Do not separate the constant offset from a GEP instruction | |
| -disable-shifter-op - Disable isel of shifter-op | |
| -disable-sparc-delay-filler - Disable the Sparc delay slot filler. | |
| -disable-sparc-leaf-proc - Disable Sparc leaf procedure optimization. | |
| -disable-spill-fusing - Disable fusing of spill code into instructions | |
| -disable-spill-hoist - Disable inline spill hoisting | |
| -disable-ssc - Disable Stack Slot Coloring | |
| -disable-store-widen - Disable store widening | |
| -disable-tail-duplicate - Disable tail duplication | |
| -disable-tc-tie - | |
| -disable-vecdbl-nv-stores - Disable vector double new-value-stores | |
| -disable-vp - Disable Value Profiling | |
| -disable-x86-lea-opt - X86: Disable LEA optimizations. | |
| -do-comdat-renaming - Append function hash to the name of COMDAT function to avoid function hash mismatch due to the preinliner | |
| -dom-conditions-max-uses=<uint> - | |
| -dont-improve-non-negative-phi-bits - | |
| -dump - Show internal debug dump | |
| -dump-collected-paths - Show the collected paths to source files | |
| -dwarf-accel-tables - Output prototype dwarf accelerator tables. | |
| =Default - Default for platform | |
| =Enable - Enabled | |
| =Disable - Disabled | |
| -dwarf-linkage-names - Which DWARF linkage-name attributes to emit. | |
| =Default - Default for platform | |
| =All - All | |
| =Abstract - Abstract subprograms | |
| -early-ifcvt-limit=<uint> - Maximum number of instructions per speculated block. | |
| -early-live-intervals - Run live interval analysis earlier in the pipeline | |
| -eif-limit=<uint> - Size limit in Hexagon early if-conversion | |
| -eif-no-loop-exit - Do not convert branches that may exit the loop | |
| -enable-aa-sched-mi - Enable use of AA during MI DAG construction | |
| -enable-acc-forwarding - Enable vec acc forwarding | |
| -enable-alu-forwarding - Enable vec alu forwarding | |
| -enable-amdgpu-aa - Enable AMDGPU Alias Analysis | |
| -enable-andcmp-sinking - Enable sinkinig and/cmp into branches. | |
| -enable-arm-3-addr-conv - Enable ARM 2-addr to 3-addr conv | |
| -enable-block-placement-stats - Collect probability-driven block placement stats | |
| -enable-branch-coalesce - enable coalescing of duplicate branches | |
| -enable-bsb-sched - | |
| -enable-cond-stores-vec - Enable if predication of stores during vectorization. | |
| -enable-cur-sched - Enable the scheduler to generate .cur | |
| -enable-deferred-spilling - Instead of spilling a variable right away, defer the actual code insertion to the end of the allocation. That way the allocator might still find a suitable coloring for this variable because of other evicted variables. | |
| -enable-double-float-shrink - Enable unsafe double to float shrinking for math lib calls | |
| -enable-dse-partial-overwrite-tracking - Enable partial-overwrite tracking in DSE | |
| -enable-evec-frwd-sched - | |
| -enable-gen-insn - Generate all instruction with TC | |
| -enable-global-merge - Enable the global merge pass | |
| -enable-gvn-hoist - Enable the GVN hoisting pass | |
| -enable-hexagon-br-prob - Enable branch probability info | |
| -enable-hexagon-hvx - Enable Hexagon Vector eXtensions | |
| -enable-hexagon-hvx-double - Enable Hexagon Double Vector eXtensions | |
| -enable-hexagon-ieee-rnd-near - Generate non-chopped conversion from fp to int. | |
| -enable-hexagon-memops - Generate V4 MEMOP in code generation for Hexagon target | |
| -enable-hexagon-sdnode-sched - Enable Hexagon SDNode scheduling | |
| -enable-hexagon-vector-print - Enable Hexagon Vector print instr pass | |
| -enable-if-conversion - Enable if-conversion during vectorization. | |
| -enable-implicit-null-checks - Fold null checks into faulting memory operations | |
| -enable-import-metadata - Enable import metadata like 'thinlto_src_module' | |
| -enable-ind-var-reg-heur - Count the induction variable only once when interleaving | |
| -enable-interleaved-mem-accesses - Enable vectorization on interleaved memory accesses in a loop | |
| -enable-ipra - Enable interprocedural register allocation to reduce load/store at procedure calls. | |
| -enable-legalize-types-checking - | |
| -enable-load-pre - | |
| -enable-loadstore-runtime-interleave - Enable runtime interleaving until load/store ports are saturated | |
| -enable-local-reassign - Local reassignment can yield better allocation decisions, but may be compile time intensive | |
| -enable-loop-distribute - Enable the new, experimental LoopDistribution Pass | |
| -enable-loop-load-elim - Enable the LoopLoadElimination Pass | |
| -enable-loop-versioning-licm - Enable the experimental Loop Versioning LICM pass | |
| -enable-loopinterchange - Enable the new, experimental LoopInterchange Pass | |
| -enable-lsr-phielim - Enable LSR phi elimination | |
| -enable-machine-outliner - Enable machine outliner | |
| -enable-mem-access-versioning - Enable symbolic stride memory access versioning | |
| -enable-misched - Enable the machine instruction scheduling pass. | |
| -enable-name-compression - Enable name string compression | |
| -enable-newgvn - Run the NewGVN pass | |
| -enable-noalias-to-md-conversion - Convert noalias attributes to metadata during inlining. | |
| -enable-non-lto-gmr - Enable the GlobalsModRef AliasAnalysis outside of the LTO pipeline. | |
| -enable-nonnull-arg-prop - Try to propagate nonnull argument attributes from callsites to caller functions. | |
| -enable-objc-arc-opts - enable/disable all ARC Optimizations | |
| -enable-patchpoint-liveness - Enable PatchPoint Liveness Analysis Pass | |
| -enable-pipeliner - Enable Software Pipelining | |
| -enable-pipeliner-opt-size - Enable SWP at Os. | |
| -enable-post-misched - Enable the post-ra machine instruction scheduling pass. | |
| -enable-ppc-extra-toc-reg-deps - Add extra TOC register dependencies | |
| -enable-ppc-prefetching - disable software prefetching on PPC | |
| -enable-pre - | |
| -enable-save-restore-long - Enable long calls for save-restore stubs. | |
| -enable-scoped-noalias - | |
| -enable-selectiondag-sp - | |
| -enable-shrink-wrap - enable the shrink-wrapping pass | |
| -enable-stackovf-sanitizer - Enable runtime checks for stack overflow. | |
| -enable-subreg-liveness - Enable subregister liveness tracking. | |
| -enable-tail-merge - | |
| -enable-tbaa - | |
| -enable-tc-latency-sched - | |
| -enable-timing-class-latency - Enable timing class latency | |
| -enable-unsafe-globalsmodref-alias-results - | |
| -error-reporting-is-cold - Treat error-reporting calls as cold | |
| -esan-assume-intra-cache-line - Assume each memory access touches just one cache line, for better performance but with a potential loss of accuracy. | |
| -esan-aux-field-info - Generate binary with auxiliary struct field information | |
| -esan-cache-frag - Detect data cache fragmentation | |
| -esan-instrument-fastpath - Instrument fastpath | |
| -esan-instrument-loads-and-stores - Instrument loads and stores | |
| -esan-instrument-memintrinsics - Instrument memintrinsics (memset/memcpy/memmove) | |
| -esan-working-set - Measure the working set size | |
| -exhaustive-register-search - Exhaustive Search for registers bypassing the depth and interference cutoffs of last chance recoloring | |
| -expand-all-fp-mlx - | |
| -expand-condsets-coa-limit=<uint> - Max number of segment coalescings | |
| -expand-condsets-tfr-limit=<uint> - Max number of mux expansions | |
| -expand-limit=<uint> - | |
| -expensive-combines - Enable expensive instruction combines | |
| -expose-ppc-andi-glue-bug - expose the ANDI glue bug on PPC | |
| -extra-vectorizer-passes - Run cleanup optimization passes after vectorization. | |
| -extract-blocks-file=<filename> - A file containing list of basic blocks to not extract | |
| -extract-cutoff=<uint> - Cutoff for generating "extract" instructions | |
| -extract-needand - Require & in extract patterns | |
| -extract-nosr0 - No extract instruction with offset 0 | |
| -fast-isel - Enable the "fast" instruction selector | |
| -fast-isel-abort=<int> - Enable abort calls when "fast" instruction selection fails to lower an instruction: 0 disable the abort, 1 will abort but for args, calls and terminators, 2 will also abort for argument lowering, and 3 will never fallback to SelectionDAG. | |
| -fast-isel-report-on-fallback - Emit a diagnostic when "fast" instruction selection falls back to SelectionDAG. | |
| -ffast-math - Enable Fast Math processing | |
| -filename-equivalence - Treat source files as equivalent to paths in the coverage data when the file names match, even if the full paths do not | |
| -filter-print-funcs=<function names> - Only print IR for functions whose name match this for all print-[before|after][-all] options | |
| -fixup-byte-word-insts - Change byte and word instructions to larger sizes | |
| -flat-loop-tripcount-threshold=<uint> - If the runtime tripcount for the loop is lower than the threshold, the loop is considered as flat and will be less aggressively unrolled. | |
| -float2int-max-integer-bw=<uint> - Max integer bitwidth to consider in float2int(default=64) | |
| -force-attribute=<string> - Add an attribute to a function. This should be a pair of 'function-name:attribute-name', for example -force-attribute=foo:noinline. This option can be specified multiple times. | |
| -force-mips-long-branch - MIPS: Expand all branches to long format. | |
| -force-precise-rotation-cost - Force the use of precise cost loop rotation strategy. | |
| -force-split-store - Force store splitting no matter what the target query says. | |
| -force-target-instruction-cost=<uint> - A flag that overrides the target's expected cost for an instruction to a single constant value. Mostly useful for getting consistent testing. | |
| -force-target-max-scalar-interleave=<uint> - A flag that overrides the target's max interleave factor for scalar loops. | |
| -force-target-max-vector-interleave=<uint> - A flag that overrides the target's max interleave factor for vectorized loops. | |
| -force-target-num-scalar-regs=<uint> - A flag that overrides the target's number of scalar registers. | |
| -force-target-num-vector-regs=<uint> - A flag that overrides the target's number of vector registers. | |
| -force-vector-interleave=<uint> - Sets the vectorization interleave count. Zero is autoselect. | |
| -force-vector-width=<uint> - Sets the SIMD width. Zero is autoselect. | |
| -format - Output format for line-based coverage reports | |
| =text - Text output | |
| =html - HTML output | |
| -gcov-exit-block-before-body - | |
| -generate-arange-section - Generate dwarf aranges | |
| -generate-dwarf-pub-sections - Generate DWARF pubnames and pubtypes sections | |
| =Default - Default for platform | |
| =Enable - Enabled | |
| =Disable - Disabled | |
| -generate-gnu-dwarf-pub-sections - Generate GNU-style pubnames and pubtypes | |
| -generate-type-units - Generate DWARF4 type units. | |
| -global-isel - Enable the "global" instruction selector | |
| -global-isel-abort=<int> - Enable abort calls when "global" instruction selection fails to lower/select an instruction: 0 disable the abort, 1 enable the abort, and 2 disable the abort but emit a diagnostic on failure | |
| -global-merge-group-by-use - Improve global merge pass to look at uses | |
| -global-merge-ignore-single-use - Improve global merge pass to ignore globals only used alone | |
| -global-merge-max-offset=<uint> - Set maximum offset for global merge pass | |
| -global-merge-on-const - Enable global merge pass on constants | |
| -global-merge-on-external - Enable global merge pass on external linkage | |
| -gpsize=<uint> - Global Pointer Addressing Size. The default size is 8. | |
| -guards-predicate-pass-branch-weight=<uint> - The probability of a guard failing is assumed to be the reciprocal of this value (default = 1 << 20) | |
| -gvn-hoist-max-bbs=<int> - Max number of basic blocks on the path between hoisting locations (default = 4, unlimited = -1) | |
| -gvn-hoist-max-chain-length=<int> - Maximum length of dependent chains to hoist (default = 10, unlimited = -1) | |
| -gvn-hoist-max-depth=<int> - Hoist instructions from the beginning of the BB up to the maximum specified depth (default = 100, unlimited = -1) | |
| -gvn-max-hoisted=<int> - Max number of instructions to hoist (default unlimited = -1) | |
| -hash-based-counter-split - Rename counter variable of a comdat function based on cfg hash | |
| -help - Display available options (-help-hidden for more) | |
| -help-hidden - Display all available options | |
| -help-list - Display list of available options (-help-list-hidden for more) | |
| -help-list-hidden - Display list of all available options | |
| -hexagon-align-calls - Insert falign after call instruction for Hexagon target | |
| -hexagon-amode-growth-limit=<int> - Code growth limit for address mode optimization | |
| -hexagon-bit - Bit simplification | |
| -hexagon-commgep - Enable commoning of GEP instructions | |
| -hexagon-eif - Enable early if-conversion | |
| -hexagon-emit-jump-tables - Control jump table emission on Hexagon target | |
| -hexagon-enable-branch-prediction - Enable branch prediction | |
| -hexagon-expand-condsets - Early expansion of MUX | |
| -hexagon-extract - Generate "extract" instructions | |
| -hexagon-gen-pred - Enable conversion of arithmetic operations to predicate instructions | |
| -hexagon-hwloop-preheader - Add a preheader to a hardware loop if one doesn't exist | |
| -hexagon-insert - Generate "insert" instructions | |
| -hexagon-long-calls - If present, forces/disables the use of long calls | |
| -hexagon-loop-prefetch - Enable loop data prefetch on Hexagon | |
| -hexagon-loop-range=<uint> - Restrict range of loopN instructions (testing only) | |
| -hexagon-loop-resched - Loop rescheduling | |
| -hexagon-mux - Enable converting conditional transfers into MUX instructions | |
| -hexagon-noopt - Disable backend optimizations | |
| -hexagon-opt-spill - Optimize spill slots | |
| -hexagon-packetize-volatiles - Allow non-solo packetization of volatile memory references | |
| -hexagon-sched-inline-asm - Do not consider inline-asm a scheduling/packetization boundary. | |
| -hexagon-shrink-frame - Enable stack frame shrink wrapping | |
| -hexagon-small-data-threshold=<uint> - The maximum size of an object in the sdata section | |
| -hexagon-statics-in-small-data - Allow static variables in .sdata | |
| -hexagon-subreg-liveness - Enable subregister liveness tracking for Hexagon | |
| -hexbit-bitsplit - Generate bitsplit instructions | |
| -hexbit-extract - Generate extract instructions | |
| -hexbit-keep-tied - Preserve subregisters in tied operands | |
| -hexbit-max-bitsplit=<uint> - | |
| -hexbit-max-extract=<uint> - | |
| -hoist-cheap-insts - MachineLICM should hoist even cheap instructions | |
| -hot-callsite-threshold=<int> - Threshold for hot callsites | |
| -hsdr-no-mem - Do not split loads or stores | |
| -hwloop-spec-preheader - Allow speculation of preheader instructions | |
| -icp-call-only - Run indirect-call promotion for call instructions only | |
| -icp-count-threshold=<uint> - The minimum count to the direct call target for the promotion | |
| -icp-csskip=<uint> - Skip Callsite up to this number for this compilaiton | |
| -icp-cutoff=<uint> - Max number of promotions for this compilaiton | |
| -icp-dumpafter - Dump IR after transformation happens | |
| -icp-invoke-only - Run indirect-call promotion for invoke instruction only | |
| -icp-lto - Run indirect-call promotion in LTO mode | |
| -icp-max-annotations=<uint> - Max number of annotations for a single indirect call callsite | |
| -icp-max-prom=<uint> - Max number of promotions for a single indirect call callsite | |
| -icp-percent-threshold=<uint> - The percentage threshold for the promotion | |
| -icp-samplepgo - Run indirect-call promotion in SamplePGO mode | |
| -ifcvt-branch-fold - | |
| -ifcvt-fn-start=<int> - | |
| -ifcvt-fn-stop=<int> - | |
| -ifcvt-limit=<int> - | |
| -ignore-bb-reg-pressure - | |
| -ignore-empty-index-file - Ignore an empty index file and perform non-ThinLTO compilation | |
| -imp-null-check-page-size=<int> - The page size of the target in bytes | |
| -imp-null-max-insts-to-consider=<uint> - The max number of instructions to consider hoisting loads over (the algorithm is quadratic over this number) | |
| -import-cold-multiplier=<N> - Multiply the `import-instr-limit` threshold for cold callsites | |
| -import-full-type-definitions - Import full type definitions for ThinLTO. | |
| -import-hot-evolution-factor=<x> - As we import functions called from hot callsite, multiply the `import-instr-limit` threshold by this factor before processing newly imported functions | |
| -import-hot-multiplier=<x> - Multiply the `import-instr-limit` threshold for hot callsites | |
| -import-instr-evolution-factor=<x> - As we import functions, multiply the `import-instr-limit` threshold by this factor before processing newly imported functions | |
| -import-instr-limit=<N> - Only import functions with less than N instructions | |
| -indvars-post-increment-ranges - Use post increment control-dependent ranges in IndVarSimplify | |
| -info-output-file=<filename> - File to append -stats and -timer output to | |
| -inline-cold-callsite-threshold=<int> - Threshold for inlining cold callsites | |
| -inline-threshold=<int> - Control the amount of inlining to perform (default = 225) | |
| -inlinecold-threshold=<int> - Threshold for inlining functions with cold attribute | |
| -inlinehint-threshold=<int> - Threshold for inlining functions with inline hint | |
| -inliner-function-import-stats - Enable inliner stats for imported functions | |
| =basic - basic statistics | |
| =verbose - printing of statistics for each inlined function | |
| -insert-all0 - | |
| -insert-const - | |
| -insert-dist-cutoff=<uint> - Vreg distance cutoff for insert generation. | |
| -insert-has0 - | |
| -insert-timing - Enable timing of insert generation | |
| -insert-timing-detail - Enable detailed timing of insert generation | |
| -insert-vreg-cutoff=<uint> - Vreg# cutoff for insert generation. | |
| -instcombine-maxarray-size=<uint> - Maximum array size considered when doing a combine | |
| -instr-profile=<string> - File with the profile data obtained after an instrumented run | |
| -internalize-public-api-file=<filename> - A file containing list of symbol names to preserve | |
| -internalize-public-api-list=<list> - A list of symbol names to preserve | |
| -interpreter-print-volatile - make the interpreter print every volatile load and store | |
| -irce-loop-size-cutoff=<uint> - | |
| -irce-max-exit-prob-reciprocal=<int> - | |
| -irce-print-changed-loops - | |
| -irce-print-range-checks - | |
| -irce-skip-profitability-checks - | |
| -isel-rebalance-addr - Rebalance address calculation trees to improve instruction selection | |
| -join-globalcopies - Coalesce copies that span blocks (default=subtarget) | |
| -join-liveintervals - Coalesce copies (default=true) | |
| -join-splitedges - Coalesce copies on split edges (default=subtarget) | |
| -jump-inst-cost=<uint> - Cost of jump instructions. | |
| -jump-is-expensive - Do not create extra branches to split comparison logic. | |
| -jump-table-density=<uint> - Minimum density for building a jump table in a normal function | |
| -jump-threading-implication-search-threshold=<uint> - The number of predecessors to search for a stronger condition to use to thread over a weaker condition | |
| -jump-threading-threshold=<uint> - Max block size to duplicate for jump threading | |
| -lanai-constant-mul-threshold=<int> - Maximum number of instruction to generate when lowering constant multiplication instead of calling library function [default=14] | |
| -lanai-nop-delay-filler - Fill Lanai delay slots with NOPs. | |
| -lanai-ssection-threshold=<uint> - Small data and bss section threshold size (default=0) | |
| -lcr-max-depth=<uint> - Last chance recoloring max depth | |
| -lcr-max-interf=<uint> - Last chance recoloring maximum number of considered interference at a time | |
| -libcalls-shrinkwrap-domain-error - Perform shrink-wrap on lib calls with domain errors | |
| -libcalls-shrinkwrap-pole-error - Perform shrink-wrap on lib calls with pole errors | |
| -libcalls-shrinkwrap-range-error - Perform shrink-wrap on lib calls with range errors | |
| -licm-max-num-uses-traversed=<uint> - Max num uses visited for identifying load invariance in loop using invariant start (default = 8) | |
| -licm-versioning-invariant-threshold=<number> - LoopVersioningLICM's minimum allowed percentageof possible invariant instructions per loop | |
| -licm-versioning-max-depth-threshold=<uint> - LoopVersioningLICM's threshold for maximum allowed loop nest/depth | |
| -likely-branch-weight=<uint> - Weight of the branch likely to be taken (default = 2000) | |
| -limit-float-precision=<uint> - Generate low-precision inline sequences for some float libcalls | |
| -line-coverage-gt=<number> - Show code coverage only for functions with line coverage greater than the given threshold | |
| -line-coverage-lt=<number> - Show code coverage only for functions with line coverage less than the given threshold | |
| -live-debug-variables - Enable the live debug variables pass | |
| -loop-distribute-non-if-convertible - Whether to distribute into a loop that may not be if-convertible by the loop vectorizer | |
| -loop-distribute-scev-check-threshold=<uint> - The maximum number of SCEV checks allowed for Loop Distribution | |
| -loop-distribute-scev-check-threshold-with-pragma=<uint> - The maximum number of SCEV checks allowed for Loop Distribution for loop marked with #pragma loop distribute(enable) | |
| -loop-distribute-verify - Turn on DominatorTree and LoopInfo verification after Loop Distribution | |
| -loop-interchange-threshold=<int> - Interchange if you gain more than this number | |
| -loop-load-elimination-scev-check-threshold=<uint> - The maximum number of SCEV checks allowed for Loop Load Elimination | |
| -loop-prefetch-writes - Prefetch write addresses | |
| -loop-to-cold-block-ratio=<uint> - Outline loop blocks from loop chain if (frequency of loop) / (frequency of block) is greater than this ratio | |
| -loop-unswitch-threshold=<uint> - Max loop size to unswitch | |
| -loop-vectorize-with-block-frequency - Enable the use of the block frequency analysis to access PGO heuristics minimizing code growth in cold regions and being more aggressive in hot regions. | |
| -loop-version-annotate-no-alias - Add no-alias annotation for instructions that are disambiguated by memchecks | |
| -lower-interleaved-accesses - Enable lowering interleaved accesses to intrinsics | |
| -lowertypetests-avoid-reuse - Try to avoid reuse of byte array addresses using aliases | |
| -lowertypetests-read-summary=<string> - Read summary from given YAML file before running pass | |
| -lowertypetests-summary-action - What to do with the summary when running this pass | |
| =none - Do nothing | |
| =import - Import typeid resolutions from summary and globals | |
| =export - Export typeid resolutions to summary and globals | |
| -lowertypetests-write-summary=<string> - Write summary to given YAML file after running pass | |
| -lsr-exp-narrow - Narrow LSR complex solution using expectation of registers number | |
| -lsr-insns-cost - Add instruction count to a LSR cost model | |
| -lto-discard-value-names - Strip names from Value during LTO (other than GlobalValue). | |
| -lto-pass-remarks-output=<filename> - Output filename for pass remarks | |
| -lto-pass-remarks-with-hotness - With PGO, include profile count in optimization remarks | |
| -lto-strip-invalid-debug-info - Strip invalid debug info metadata during LTO instead of aborting. | |
| -lto-use-new-pm - Run LTO passes using the new pass manager | |
| -machine-sink-bfi - Use block frequency info to find successors to sink | |
| -machine-sink-split - Split critical edges during machine sinking | |
| -machine-sink-split-probability-threshold=<uint> - Percentage threshold for splitting single-instruction critical edge. If the branch threshold is higher than this threshold, we allow speculative execution of up to 1 instruction to avoid branching to splitted critical edge | |
| -mark-data-regions - Mark code section jump table data regions. | |
| -max-dependences=<uint> - Maximum number of dependences collected by loop-access analysis (default = 100) | |
| -max-hsdr=<int> - Maximum number of split partitions | |
| -max-interleave-group-factor=<uint> - Maximum factor for an interleaved access group (default = 8) | |
| -max-jump-table-size=<uint> - Set maximum size of jump tables; zero for no limit. | |
| -max-nested-scalar-reduction-interleave=<uint> - The maximum interleave count to use when interleaving a scalar reduction in a nested loop. | |
| -max-num-inst-between-tfr-and-nv-store=<uint> - Maximum distance between a tfr feeding a store we consider the store still to be newifiable | |
| -max-prefetch-iters-ahead=<uint> - Max number of iterations to prefetch ahead | |
| -max-recurse-depth=<uint> - Max recurse depth (default = 1000) | |
| -max-reroll-increment=<uint> - The maximum increment for loop rerolling | |
| -max-sched-reorder=<int> - Number of instructions to allow ahead of the critical path in sched=list-ilp | |
| -max-speculation-depth=<uint> - Limit maximum recursion depth when calculating costs of speculatively executed instructions | |
| -max-store-memcpy=<int> - Max #stores to inline memcpy | |
| -max-store-memcpy-Os=<int> - Max #stores to inline memcpy | |
| -max-store-memmove=<int> - Max #stores to inline memmove | |
| -max-store-memmove-Os=<int> - Max #stores to inline memmove | |
| -max-store-memset=<int> - Max #stores to inline memset | |
| -max-store-memset-Os=<int> - Max #stores to inline memset | |
| -max-uses-for-sinking=<uint> - Do not sink instructions that have too many uses. | |
| -memdep-block-number-limit=<uint> - The number of blocks to scan during memory dependency analysis (default = 1000) | |
| -memdep-block-scan-limit=<uint> - The number of instructions to scan in a block in memory dependency analysis (default = 100) | |
| -memop-max-annotations=<uint> - Max number of preicise value annotations for a single memopintrinsic | |
| -memop-size-large=<uint> - Set large value thresthold in memory intrinsic size profiling. Value of 0 disables the large value profiling. | |
| -memop-size-range=<string> - Set the range of size in memory intrinsic calls to be profiled precisely, in a format of <start_val>:<end_val> | |
| -memory-check-merge-threshold=<uint> - Maximum number of comparisons done when trying to merge runtime memory checks. (default = 100) | |
| -memssa-check-limit=<uint> - The maximum number of stores/phis MemorySSAwill consider trying to walk past (default = 100) | |
| -mergefunc-preserve-debug-info - Preserve debug info in thunk when mergefunc transformations are made. | |
| -mergefunc-sanity=<uint> - How many functions in module could be used for MergeFunctions pass sanity check. '0' disables this check. Works only with '-debug' key. | |
| -merror-missing-parenthesis - Error for missing parenthesis around predicate registers | |
| -merror-noncontigious-register - Error for register names that aren't contigious | |
| -mextern-sdata - MIPS: Use gp_rel for data that is not defined by the current object. | |
| -mfuture-regs - Enable future registers | |
| -mgpopt - Enable gp-relative addressing of mips small data items | |
| -mhvx - Enable Hexagon Vector Extension (HVX) | |
| -min-jump-table-entries=<uint> - Set minimum number of entries to use a jump table. | |
| -min-predictable-branch=<int> - Minimum percentage (0-100) that a condition must be either true or false to assume that the condition is predictable | |
| -min-prefetch-stride=<uint> - Min stride to add prefetches | |
| -minimum-jump-tables=<int> - Set minimum jump tables | |
| -mips-align-constant-islands - Align constant islands in code | |
| -mips-compact-branches - MIPS Specific: Compact branch policy. | |
| =never - Do not use compact branches if possible. | |
| =optimal - Use compact branches where appropiate (default). | |
| =always - Always use compact branches if possible. | |
| -mips-constant-islands-no-load-relaxation - Don't relax loads to long loads - for testing purposes | |
| -mips-constant-islands-small-offset=<int> - Make small offsets be this amount for testing purposes | |
| -mips-erase-gp-opnd - Erase GP Operand | |
| -mips-fix-global-base-reg - Always use $gp as the global base register. | |
| -mips-load-target-from-got - Load target address from GOT | |
| -mips-mixed-16-32 - Allow for a mixture of Mips16 and Mips32 code in a single output file | |
| -mips-os16 - Compile all functions that don't use floating point as Mips 16 | |
| -mips-round-section-sizes - Round section sizes up to the section alignment | |
| -mips-ssection-threshold=<uint> - Small data and bss section threshold size (default=8) | |
| -mips-tail-calls - MIPS: permit tail calls. | |
| -mips16-constant-islands - Enable mips16 constant islands. | |
| -mips16-dont-expand-cond-pseudo - Don't expand conditional move related pseudos for Mips 16 | |
| -mips16-hard-float - Enable mips16 hard float. | |
| -mips32-function-mask=<string> - Force function to be mips32 | |
| -misched - Machine instruction scheduler to use | |
| =default - Use the target's default scheduler choice. | |
| =converge - Standard converging scheduler. | |
| =ilpmax - Schedule bottom-up for max ILP | |
| =ilpmin - Schedule bottom-up for min ILP | |
| =r600 - Run R600's custom scheduler | |
| =si - Run SI's custom scheduler | |
| =gcn-max-occupancy - Run GCN scheduler to maximize occupancy | |
| =gcn-max-occupancy-experimental - Run GCN scheduler to maximize occupancy (experimental) | |
| =gcn-minreg - Run GCN iterative scheduler for minimal register usage (experimental) | |
| =hexagon - Run Hexagon's custom scheduler | |
| -misched-bottomup - Force bottom-up list scheduling | |
| -misched-cluster - Enable memop clustering. | |
| -misched-cyclicpath - Enable cyclic critical path analysis. | |
| -misched-dcpl - Print critical path length to stdout | |
| -misched-limit=<uint> - Limit ready list to N instructions | |
| -misched-postra - Run MachineScheduler post regalloc (independent of preRA sched) | |
| -misched-regpressure - Enable register pressure scheduling. | |
| -misched-topdown - Force top-down list scheduling | |
| -misched-verbose-level=<uint> - | |
| -misfetch-cost=<uint> - Cost that models the probabilistic risk of an instruction misfetch due to a jump comparing to falling through, whose cost is zero. | |
| -mlocal-sdata - MIPS: Use gp_rel for object-local data. | |
| -mno-check-zero-division - MIPS: Don't trap on integer division by zero. | |
| -mno-compound - Disable looking for compound instructions for Hexagon | |
| -mno-fixup - Disable fixing up resolved relocations for Hexagon | |
| -mno-ldc1-sdc1 - Expand double precision loads and stores to their single precision counterparts | |
| -mno-pairing - Disable looking for duplex instructions for Hexagon | |
| -mno-sort-sda - Disable small data sections sorting | |
| -msan-check-access-address - report accesses through a pointer which has poisoned shadow | |
| -msan-check-constant-shadow - Insert checks for constant shadow values | |
| -msan-dump-strict-instructions - print out instructions with default strict semantics | |
| -msan-handle-icmp - propagate shadow through ICmpEQ and ICmpNE | |
| -msan-handle-icmp-exact - exact handling of relational integer ICmp | |
| -msan-instrumentation-with-call-threshold=<int> - If the function being instrumented requires more than this number of checks and origin stores, use callbacks instead of inline checks (-1 means never use callbacks). | |
| -msan-keep-going - keep going after reporting a UMR | |
| -msan-poison-stack - poison uninitialized stack variables | |
| -msan-poison-stack-pattern=<int> - poison uninitialized stack variables with the given pattern | |
| -msan-poison-stack-with-call - poison uninitialized stack variables with a call | |
| -msan-poison-undef - poison undef temps | |
| -msan-track-origins=<int> - Track origins (allocation sites) of poisoned memory | |
| -msan-with-comdat - Place MSan constructors in comdat sections | |
| -msp430-branch-select - Expand out of range branches | |
| -msp430-hwmult-mode - Hardware multiplier use mode | |
| =no - Do not use hardware multiplier | |
| =interrupts - Assume hardware multiplier can be used inside interrupts | |
| =use - Assume hardware multiplier cannot be used inside interrupts | |
| -mv4 - Build for Hexagon V4 | |
| -mv5 - Build for Hexagon V5 | |
| -mv55 - Build for Hexagon V55 | |
| -mv60 - Build for Hexagon V60 | |
| -mv62 - Build for Hexagon V62 | |
| -mwarn-missing-parenthesis - Warn for missing parenthesis around predicate registers | |
| -mwarn-noncontigious-register - Warn for register names that arent contigious | |
| -mwarn-sign-mismatch - Warn for mismatching a signed and unsigned value | |
| -mxgot - MIPS: Enable GOT larger than 64k. | |
| -name=<string> - Show code coverage only for functions with the given name | |
| -name-regex=<string> - Show code coverage only for functions that match the given regular expression | |
| -no-discriminators - Disable generation of discriminator information. | |
| -no-pgo-warn-mismatch - Use this option to turn off/on warnings about profile cfg mismatch. | |
| -no-pgo-warn-mismatch-comdat - The option is used to turn on/off warnings about hash mismatch for comdat functions. | |
| -no-phi-elim-live-out-early-exit - Do not use an early exit if isLiveOutPastPHIs returns true. | |
| -no-stack-coloring - Disable stack coloring | |
| -no-stack-slot-sharing - Suppress slot sharing during stack coloring | |
| -no-x86-call-frame-opt - Avoid optimizing x86 call frames for size | |
| -number-scavenger-slots=<uint> - Set the number of scavenger slots | |
| -nvj-count=<int> - Maximum number of predicated jumps to be converted to New Value Jump | |
| -nvptx-emit-line-numbers - NVPTX Specific: Emit Line numbers even without -G | |
| -nvptx-emit-src - NVPTX Specific: Emit source line in ptx file | |
| -nvptx-f32ftz - NVPTX Specific: Flush f32 subnormals to sign-preserving zero. | |
| -nvptx-fma-level=<uint> - NVPTX Specific: FMA contraction (0: don't do it 1: do it 2: do it aggressively | |
| -nvptx-no-f16-math - NVPTX Specific: Disable generation of f16 math ops. | |
| -nvptx-prec-divf32=<int> - NVPTX Specifies: 0 use div.approx, 1 use div.full, 2 use IEEE Compliant F32 div.rnd if available. | |
| -nvptx-prec-sqrtf32 - NVPTX Specific: 0 use sqrt.approx, 1 use sqrt.rn. | |
| -nvptx-sched4reg - NVPTX Specific: schedule for register pressue | |
| -nvvm-intr-range-sm=<uint> - SM variant | |
| -nvvm-reflect-enable - NVVM reflection, enabled by default | |
| -o - Alias for --output-dir | |
| -object=<string> - Coverage executable or object file | |
| -old-thumb2-ifcvt - Use old-style Thumb2 if-conversion heuristics | |
| -only-nonnested-memmove-idiom - Only enable generating memmove in non-nested loops | |
| -only-simple-regions - Show only simple regions in the graphviz viewer | |
| -opt-bisect-limit=<int> - Maximum optimization to perform | |
| -optimize-regalloc - Enable optimized register allocation compilation path. | |
| -optsize-jump-table-density=<uint> - Minimum density for building a jump table in an optsize function | |
| -output-dir=<string> - Directory in which coverage information is written out | |
| -partial-reg-update-clearance=<uint> - Clearance between two register writes for inserting XOR to avoid partial register update | |
| -partial-unrolling-threshold=<uint> - Threshold for partial unrolling | |
| -pass-remarks=<pattern> - Enable optimization remarks from passes whose name match the given regular expression | |
| -pass-remarks-analysis=<pattern> - Enable optimization analysis remarks from passes whose name match the given regular expression | |
| -pass-remarks-missed=<pattern> - Enable missed optimization remarks from passes whose name match the given regular expression | |
| -pbqp-coalescing - Attempt coalescing during PBQP register allocation. | |
| -pgo-instr-memop - Use this option to turn on/off memory instrinsic size profiling. | |
| -pgo-instr-select - Use this option to turn on/off SELECT instruction instrumentation. | |
| -pgo-memop-count-threshold=<uint> - The minimum count to optimize memory intrinsic calls | |
| -pgo-memop-max-version=<uint> - The max version for the optimized memory intrinsic calls | |
| -pgo-memop-percent-threshold=<uint> - The percentage threshold for the memory intrinsic calls optimization | |
| -pgo-memop-scale-count - Scale the memop size counts using the basic block count value | |
| -pgo-test-profile-file=<filename> - Specify the path of profile data file. This ismainly for test purpose. | |
| -pgo-view-counts - A boolean option to show CFG dag with block profile counts and branch probabilities right after PGO profile annotation step. The profile counts are computed using branch probabilities from the runtime profile data and block frequency propagation algorithm. To view the raw counts from the profile, use option -pgo-view-raw-counts instead. To limit graph display to only one function, use filtering option -view-bfi-func-name. | |
| -pgo-view-raw-counts - A boolean option to show CFG dag with raw profile counts from profile data. See also option -pgo-view-counts. To limit graph display to only one function, use filtering option -view-bfi-func-name. | |
| -pgo-warn-missing-function - Use this option to turn on/off warnings about missing profile data for functions. | |
| -phi-elim-split-all-critical-edges - Split all critical edges during PHI elimination | |
| -phi-node-folding-threshold=<uint> - Control the amount of phi node folding to perform (default = 2) | |
| -pipeliner-max-mii=<int> - Size limit for the the MII. | |
| -pipeliner-max-stages=<int> - Maximum stages allowed in the generated scheduled. | |
| -pipeliner-prune-deps - Prune dependences between unrelated Phi nodes. | |
| -pipeliner-prune-loop-carried - Prune loop carried order dependences. | |
| -post-RA-scheduler - Enable scheduling after register allocation | |
| -postra-sched-debugdiv=<int> - Debug control MBBs that are scheduled | |
| -postra-sched-debugmod=<int> - Debug control MBBs that are scheduled | |
| -ppc-always-use-base-pointer - Force the use of a base pointer in every function | |
| -ppc-asm-full-reg-names - Use full register names when printing assembly | |
| -ppc-bit-perm-rewriter-stress-rotates - stress rotate selection in aggressive ppc isel for bit permutations | |
| -ppc-gen-isel - Enable generating the ISEL instruction. | |
| -ppc-gep-opt - Enable optimizations on complex GEPs | |
| -ppc-loop-prefetch-cache-line=<uint> - The loop prefetch cache line size | |
| -ppc-machine-combiner - Enable the machine combiner pass | |
| -ppc-old-latency-calc - Use the old (incorrect) instruction latency calculation | |
| -ppc-preinc-prep-max-vars=<uint> - Potential PHI threshold for PPC preinc loop prep | |
| -ppc-track-subreg-liveness - Enable subregister liveness tracking for PPC | |
| -ppc-use-base-pointer - Enable use of a base pointer for complex stack frames | |
| -ppc-use-bit-perm-rewriter - use aggressive ppc isel for bit permutations | |
| -ppc-use-branch-hint - Enable static hinting of branches on ppc | |
| -ppc-vsr-nums-as-vr - Prints full register names with vs{31-63} as v{0-31} | |
| -pragma-unroll-threshold=<uint> - Unrolled size limit for loops with an unroll(full) or unroll_count pragma. | |
| -pragma-vectorize-memory-check-threshold=<uint> - The maximum allowed number of runtime memory checks with a vectorize(enable) pragma. | |
| -pragma-vectorize-scev-check-threshold=<uint> - The maximum number of SCEV checks allowed with a vectorize(enable) pragma | |
| -pre-RA-sched - Instruction schedulers available (before register allocation): | |
| =vliw-td - VLIW scheduler | |
| =list-ilp - Bottom-up register pressure aware list scheduling which tries to balance ILP and register pressure | |
| =list-hybrid - Bottom-up register pressure aware list scheduling which tries to balance latency and register pressure | |
| =source - Similar to list-burr but schedules in source order when possible | |
| =list-burr - Bottom-up register reduction list scheduling | |
| =linearize - Linearize DAG, no scheduling | |
| =fast - Fast suboptimal list scheduling | |
| =default - Best scheduler for the target | |
| -precise-rotation-cost - Model the cost of loop rotation more precisely by using profile data. | |
| -prefetch-distance=<uint> - Number of instructions to prefetch ahead | |
| -preinline-threshold=<int> - Control the amount of inlining in pre-instrumentation inliner (default = 75) | |
| -prepare-for-thinlto - Enable preparation for ThinLTO. | |
| -preserve-alignment-assumptions-during-inlining - Convert align attributes to assumptions during inlining. | |
| -print-after - Print IR after specified passes | |
| -print-after-all - Print IR after each pass | |
| -print-all-options - Print all option values after command line parsing | |
| -print-before - Print IR before specified passes | |
| -print-before-all - Print IR before each pass | |
| -print-failed-fuse-candidates - Print instructions that the allocator wants to fuse, but the X86 backend currently can't | |
| -print-gc - Dump garbage collector data | |
| -print-imports - Print imported functions | |
| -print-isel-input - Print LLVM IR input to isel pass | |
| -print-lsr-output - Print LLVM IR produced by the loop-reduce pass | |
| -print-machineinstrs=<pass-name> - Print machine instrs | |
| -print-options - Print non-default options after command line parsing | |
| -print-region-style - style of printing regions | |
| =none - print no details | |
| =bb - print regions in detail with block_iterator | |
| =rn - print regions in detail with element_iterator | |
| -print-regusage - print register usage details collected for analysis. | |
| -print-summary-global-ids - Print the global id for each value when reading the module summary | |
| -print-whole-regmask - Print the full contents of regmask operands in IR dumps | |
| -procres-cost-lim=<int> - The OOO window for processor resources during scheduling. | |
| -profile-generate - Enable PGO instrumentation. | |
| -profile-generate-file=<string> - Specify the path of profile data file. | |
| -profile-guided-section-prefix - Use profile info to add section prefix for hot/cold functions | |
| -profile-likely-prob=<uint> - branch probability threshold in percentage to be considered very likely when profile is available | |
| -profile-summary-cutoff-cold=<int> - A count is cold if it is below the minimum count to reach this percentile of total counts. | |
| -profile-summary-cutoff-hot=<int> - A count is hot if it exceeds the minimum count to reach this percentile of total counts. | |
| -profile-use=<filename> - Enable use phase of PGO instrumentation and specify the path of profile data file | |
| -project-title=<string> - Set project title for the coverage report | |
| -protect-from-escaped-allocas - Do not optimize lifetime zones that are broken | |
| -qpx-stack-unaligned - Even when QPX is enabled the stack is not 32-byte aligned | |
| -r600-ir-structurize - Use StructurizeCFG IR pass | |
| -rdf-dump - | |
| -rdf-limit=<uint> - | |
| -rdf-liveness-max-rec=<uint> - Maximum recursion level | |
| -rdf-opt - Enable RDF-based optimizations | |
| -reassociate-geps-verify-no-dead-code - Verify this pass produces no dead code | |
| -rebalance-only-imbal - Rebalance address tree only if it is imbalanced | |
| -rebalance-only-opt - Rebalance address tree only if this allows optimizations | |
| -regalloc - Register allocator to use | |
| =default - pick register allocator based on -O option | |
| =pbqp - PBQP register allocator | |
| =greedy - greedy register allocator | |
| =fast - fast register allocator | |
| =basic - basic register allocator | |
| -regalloc-csr-first-time-cost=<uint> - Cost for first time use of callee-saved register. | |
| Mode of the RegBankSelect pass | |
| -regbankselect-fast - Run the Fast mode (default mapping) | |
| -regbankselect-greedy - Use the Greedy mode (best local mapping) | |
| -region-coverage-gt=<number> - Show code coverage only for functions with region coverage greater than the given threshold | |
| -region-coverage-lt=<number> - Show code coverage only for functions with region coverage less than the given threshold | |
| -relax-nv-checks - Relax checks of new-value validity | |
| -remat-pic-stub-load - Re-materialize load from stub in PIC mode | |
| -replexitval - Choose the strategy to replace exit value in IndVarSimplify | |
| =never - never replace exit value | |
| =cheap - only replace exit value when the cost is cheap | |
| =always - always replace exit value whenever possible | |
| -reroll-loops - Run the loop rerolling pass | |
| -reroll-num-tolerated-failed-matches=<uint> - The maximum number of failures to tolerate during fuzzy matching. (default: 400) | |
| -rewrite-map-file=<filename> - Symbol Rewrite Map | |
| -rewrite-phi-limit=<uint> - Limit the length of PHI chains to lookup | |
| -rng-seed=<seed> - Seed for the random number generator | |
| -rotation-max-header-size=<uint> - The default maximum header size for automatic loop rotation | |
| -rs4gc-allow-statepoint-with-no-deopt-info - | |
| -rs4gc-clobber-non-live - | |
| -run-slp-after-loop-vectorization - Run the SLP vectorizer (and BB vectorizer) after the Loop vectorizer instead of before | |
| -runtime-check-per-loop-load-elim=<uint> - Max number of memchecks allowed per eliminated load on average | |
| -runtime-mem-idiom-threshold=<uint> - Threshold (in bytes) for the runtime check guarding the memmove. | |
| -runtime-memory-check-threshold=<uint> - When performing memory disambiguation checks at runtime do not generate more than this number of comparisons (default = 8). | |
| -safe-stack-coloring - enable safe stack coloring | |
| -safe-stack-layout - enable safe stack layout | |
| -sample-profile-check-record-coverage=<N> - Emit a warning if less than N% of records in the input profile are matched to the IR. | |
| -sample-profile-check-sample-coverage=<N> - Emit a warning if less than N% of samples in the input profile are matched to the IR. | |
| -sample-profile-file=<filename> - Profile file loaded by -sample-profile | |
| -sample-profile-inline-hot-threshold=<N> - Inlined functions that account for more than N% of all samples collected in the parent function, will be inlined again. | |
| -sample-profile-max-propagate-iterations=<uint> - Maximum number of iterations to go through when propagating sample block/edge weights through the CFG. | |
| -sanitizer-coverage-8bit-counters - Experimental 8-bit counters | |
| -sanitizer-coverage-block-threshold=<uint> - Use a callback with a guard check inside it if there are more than this number of blocks. | |
| -sanitizer-coverage-experimental-tracing - Experimental basic-block tracing: insert callbacks at every basic block | |
| -sanitizer-coverage-level=<int> - Sanitizer Coverage. 0: none, 1: entry block, 2: all blocks, 3: all blocks and critical edges, 4: above plus indirect calls | |
| -sanitizer-coverage-prune-blocks - Reduce the number of instrumented blocks | |
| -sanitizer-coverage-trace-compares - Tracing of CMP and similar instructions | |
| -sanitizer-coverage-trace-divs - Tracing of DIV instructions | |
| -sanitizer-coverage-trace-geps - Tracing of GEP instructions | |
| -sanitizer-coverage-trace-pc - Experimental pc tracing | |
| -sanitizer-coverage-trace-pc-guard - pc tracing with a guard | |
| -scalar-evolution-max-addexpr-depth=<uint> - Maximum depth of recursive AddExpr | |
| -scalar-evolution-max-constant-evolving-depth=<uint> - Maximum depth of recursive constant evolving | |
| -scalar-evolution-max-scev-compare-depth=<uint> - Maximum depth of recursive SCEV complexity comparisons | |
| -scalar-evolution-max-scev-operations-implication-depth=<uint> - Maximum depth of recursive SCEV operations implication analysis | |
| -scalar-evolution-max-value-compare-depth=<uint> - Maximum depth of recursive value complexity comparisons | |
| -scev-addops-inline-threshold=<uint> - Threshold for inlining multiplication operands into a SCEV | |
| -scev-mulops-inline-threshold=<uint> - Threshold for inlining multiplication operands into a SCEV | |
| -sched-avg-ipc=<uint> - Average inst/cycle whan no target itinerary exists. | |
| -sched-high-latency-cycles=<int> - Roughly estimate the number of cycles that 'long latency'instructions take for targets with no itinerary | |
| -sched-preds-closer - | |
| -sched-retval-optimization - | |
| -scheditins - Use InstrItineraryData for latency lookup | |
| -schedmodel - Use TargetSchedModel for latency lookup | |
| -schedule-ppc-vsx-fma-mutation-early - Schedule VSX FMA instruction mutation early | |
| -show-expansions - Show expanded source regions | |
| -show-instantiations - Show function instantiations | |
| -show-line-counts - Show the execution counts for each line | |
| -show-line-counts-or-regions - Show the execution counts for each line, or the execution counts for each region on lines that have multiple regions | |
| -show-regions - Show the execution counts for each region | |
| -shrink-frame-limit=<uint> - Max count of stack frame shrink-wraps | |
| -simplifycfg-dup-ret - Duplicate return instructions into unconditional branches | |
| -simplifycfg-hoist-cond-stores - Hoist conditional stores if an unconditional store precedes | |
| -simplifycfg-merge-cond-stores - Hoist conditional stores even if an unconditional store does not precede - hoist multiple conditional stores into a single predicated store | |
| -simplifycfg-merge-cond-stores-aggressively - When merging conditional stores, do so even if the resultant basic blocks are unlikely to be if-converted as a result | |
| -simplifycfg-sink-common - Sink common instructions down to the end block | |
| -sink-freq-percent-threshold=<uint> - Do not sink instructions that require cloning unless they execute less than this percent of the time. | |
| -sink-insts-to-avoid-spills - MachineLICM should sink instructions into loops to avoid register spills | |
| -skip-mips-long-branch - MIPS: Skip long branch pass. | |
| -slp-max-reg-size=<int> - Attempt to vectorize for this register size in bits | |
| -slp-min-reg-size=<int> - Attempt to vectorize for this register size in bits | |
| -slp-min-tree-size=<uint> - Only vectorize small trees if they are fully vectorizable | |
| -slp-recursion-max-depth=<uint> - Limit the recursion depth when building a vectorizable tree | |
| -slp-schedule-budget=<int> - Limit the size of the SLP scheduling region per block | |
| -slp-threshold=<int> - Only vectorize if you gain more than this number | |
| -slp-vectorize-hor - Attempt to vectorize horizontal reductions | |
| -slp-vectorize-hor-store - Attempt to vectorize horizontal reductions feeding into a store | |
| -small-loop-cost=<uint> - The cost of a loop that is considered 'small' by the interleaver. | |
| -sparc-reserve-app-registers - Reserve application registers (%g2-%g4) | |
| -spec-exec-max-not-hoisted=<uint> - Speculative execution is not applied to basic blocks where the number of instructions that would not be speculatively executed exceeds this limit. | |
| -spec-exec-max-speculation-cost=<uint> - Speculative execution is not applied to basic blocks where the cost of the instructions to speculatively execute exceeds this limit. | |
| -spec-exec-only-if-divergent-target - Speculative execution is applied only to targets with divergent branches, even if the pass was configured to apply only to all targets. | |
| -speculate-one-expensive-inst - Allow exactly one expensive instruction to be speculatively executed | |
| -spill-func-threshold=<int> - Specify O2(not Os) spill func threshold | |
| -spill-func-threshold-Os=<int> - Specify Os spill func threshold | |
| -split-dwarf - Output DWARF5 split debug info. | |
| =Default - Default for platform | |
| =Enable - Enabled | |
| =Disable - Disabled | |
| -split-spill-mode - Spill mode for splitting live ranges | |
| =default - Default | |
| =size - Optimize for size | |
| =speed - Optimize for speed | |
| -spp-all-backedges - | |
| -spp-counted-loop-trip-width=<int> - | |
| -spp-no-backedge - | |
| -spp-no-call - | |
| -spp-no-entry - | |
| -spp-print-base-pointers - | |
| -spp-print-liveset - | |
| -spp-print-liveset-size - | |
| -spp-rematerialization-threshold=<uint> - | |
| -spp-split-backedge - | |
| -sroa-random-shuffle-slices - | |
| -sroa-strict-inbounds - | |
| -ssc-dce-limit=<int> - | |
| -stackcoloring-lifetime-start-on-first-use - Treat stack lifetimes as starting on first use, not on START marker. | |
| -stackmap-version=<int> - Specify the stackmap encoding version (default = 2) | |
| -static-func-full-module-prefix - Use full module build paths in the profile counter names for static functions. | |
| -static-func-strip-dirname-prefix=<uint> - Strip specified level of directory name from source path in the profile counter name for static functions. | |
| -static-likely-prob=<uint> - branch probability threshold in percentageto be considered very likely | |
| -stats - Enable statistics output from program (available with Asserts) | |
| -stats-json - Display statistics as json data | |
| -store-to-load-forwarding-conflict-detection - Enable conflict detection in loop-access analysis | |
| -stress-cgp-ext-ld-promotion - Stress test ext(promotable(ld)) -> promoted(ext(ld)) optimization in CodeGenPrepare | |
| -stress-cgp-store-extract - Stress test store(extract) optimizations in CodeGenPrepare | |
| -stress-early-ifcvt - Turn all knobs to 11 | |
| -stress-regalloc=<N> - Limit all regclasses to N registers | |
| -summary-file=<string> - The summary file to use for function importing. | |
| -t2-reduce-limit=<int> - | |
| -t2-reduce-limit2=<int> - | |
| -t2-reduce-limit3=<int> - | |
| -tab-size=<uint> - Set tab expansion size for html coverage reports (default = 2) | |
| -tail-dup-indirect-size=<uint> - Maximum instructions to consider tail duplicating blocks that end with indirect branches. | |
| -tail-dup-limit=<uint> - | |
| -tail-dup-placement - Perform tail duplication during placement. Creates more fallthrough opportunites in outline branches. | |
| -tail-dup-placement-penalty=<uint> - Cost penalty for blocks that can avoid breaking CFG by copying. Copying can increase fallthrough, but it also increases icache pressure. This parameter controls the penalty to account for that. Percent as integer. | |
| -tail-dup-placement-threshold=<uint> - Instruction cutoff for tail duplication during layout. Tail merging during layout is forced to have a threshold that won't conflict. | |
| -tail-dup-size=<uint> - Maximum instructions to consider tail duplicating | |
| -tail-dup-verify - Verify sanity of PHI instructions during taildup | |
| -tail-merge-size=<uint> - Min number of instructions to consider tail merging | |
| -tail-merge-threshold=<uint> - Max number of predecessors to consider tail merging | |
| -terminal-rule - Apply the terminal rule | |
| -threads=<int> - | |
| -time-passes - Time each pass, printing elapsed time for each on exit | |
| -top-use-shorter-tie - | |
| -trace-gv-placement - Trace global value placement | |
| -trace-hex-vector-stores-only - Enables tracing of vector stores | |
| -track-memory - Enable -time-passes memory tracking (this may be slow) | |
| -triangle-chain-count=<uint> - Number of triangle-shaped-CFG's that need to be in a row for the triangle tail duplication heuristic to kick in. 0 to disable. | |
| -tsan-handle-cxx-exceptions - Handle C++ exceptions (insert cleanup blocks for unwinding) | |
| -tsan-instrument-atomics - Instrument atomics | |
| -tsan-instrument-func-entry-exit - Instrument function entry and exit | |
| -tsan-instrument-memintrinsics - Instrument memintrinsics (memset/memcpy/memmove) | |
| -tsan-instrument-memory-accesses - Instrument memory accesses | |
| -twoaddr-reschedule - Coalesce copies by rescheduling (default=true) | |
| -undef-reg-clearance=<uint> - How many idle instructions we would like before certain undef register reads | |
| -unfold-element-atomic-memcpy-max-elements=<uint> - Maximum number of elements in atomic memcpy the optimizer is allowed to unfold | |
| -unlikely-branch-weight=<uint> - Weight of the branch unlikely to be taken (default = 1) | |
| -unroll-allow-partial - Allows loops to be partially unrolled until -unroll-threshold loop size is reached. | |
| -unroll-allow-peeling - Allows loops to be peeled when the dynamic trip count is known to be low. | |
| -unroll-allow-remainder - Allow generation of a loop remainder (extra iterations) when unrolling a loop. | |
| -unroll-count=<uint> - Use this unroll count for all loops including those with unroll_count pragma values, for testing purposes | |
| -unroll-force-peel-count=<uint> - Force a peel count regardless of profiling information. | |
| -unroll-full-max-count=<uint> - Set the max unroll count for full unrolling, for testing purposes | |
| -unroll-max-count=<uint> - Set the max unroll count for partial and runtime unrolling, fortesting purposes | |
| -unroll-max-iteration-count-to-analyze=<uint> - Don't allow loop unrolling to simulate more than this number ofiterations when checking full unroll profitability | |
| -unroll-max-percent-threshold-boost=<uint> - The maximum 'boost' (represented as a percentage >= 100) applied to the threshold when aggressively unrolling a loop due to the dynamic cost savings. If completely unrolling a loop will reduce the total runtime from X to Y, we boost the loop unroll threshold to DefaultThreshold*std::min(MaxPercentThresholdBoost, X/Y). This limit avoids excessive code bloat. | |
| -unroll-max-upperbound=<uint> - The max of trip count upper bound that is considered in unrolling | |
| -unroll-partial-threshold=<uint> - The cost threshold for partial loop unrolling | |
| -unroll-peel-max-count=<uint> - Max average trip count which will cause loop peeling. | |
| -unroll-revisit-child-loops - Enqueue and re-visit child loops in the loop PM after unrolling. This shouldn't typically be needed as child loops (or their clones) were already visited. | |
| -unroll-runtime - Unroll loops with run-time trip counts | |
| -unroll-runtime-epilog - Allow runtime unrolled loops to be unrolled with epilog instead of prolog. | |
| -unroll-threshold=<uint> - The cost threshold for loop unrolling | |
| -unroll-verify-domtree - Verify domtree after unrolling | |
| -use-allocframe - Use allocframe more conservatively | |
| -use-cfl-aa - Enable the new, experimental CFL alias analysis | |
| =none - Disable CFL-AA | |
| =steens - Enable unification-based CFL-AA | |
| =anders - Enable inclusion-based CFL-AA | |
| =both - Enable both variants of CFL-AA | |
| -use-cfl-aa-in-codegen - Enable the new, experimental CFL alias analysis in CodeGen | |
| =none - Disable CFL-AA | |
| =steens - Enable unification-based CFL-AA | |
| =anders - Enable inclusion-based CFL-AA | |
| =both - Enable both variants of CFL-AA | |
| -use-color - Emit colored output (default=autodetect) | |
| -use-gvn-after-vectorization - Run GVN instead of Early CSE after vectorization passes | |
| -use-lir-code-size-heurs - Use loop idiom recognition code size heuristics when compilingwith -Os/-Oz | |
| -use-mbpi - use Machine Branch Probability Info | |
| -use-segment-set-for-physregs - Use segment set for the computation of the live ranges of physregs. | |
| -use-tbaa-in-sched-mi - Enable use of TBAA during MI DAG construction | |
| -use-unknown-locations - Make an absence of debug location information explicit. | |
| =Default - At top of block or after label | |
| =Enable - In all cases | |
| =Disable - Never | |
| -vector-library - Vector functions library | |
| =none - No vector functions library | |
| =Accelerate - Accelerate framework | |
| =SVML - Intel SVML library | |
| -vectorize-loops - Run the Loop vectorization passes | |
| -vectorize-num-stores-pred=<uint> - Max number of stores to be predicated behind an if. | |
| -vectorize-scev-check-threshold=<uint> - The maximum number of SCEV checks allowed. | |
| -vectorize-slp - Run the SLP vectorization passes | |
| -vectorize-slp-aggressive - Run the BB vectorization passes | |
| -vectorizer-maximize-bandwidth - Maximize bandwidth when selecting vectorization factor which will be determined by the smallest type in loop. | |
| -vectorizer-min-trip-count=<uint> - Don't vectorize loops with a constant trip count that is smaller than this value. | |
| -verify-arm-pseudo-expand - Verify machine code after expanding ARM pseudos | |
| -verify-assumption-cache - Enable verification of assumption cache | |
| -verify-coalescing - Verify machine instrs before and after register coalescing | |
| -verify-debug-info - | |
| -verify-dom-info - Verify dominator info (time consuming) | |
| -verify-indvars - Verify the ScalarEvolution result after running indvars | |
| -verify-loop-info - Verify loop info (time consuming) | |
| -verify-loop-lcssa - Verify loop lcssa form (time consuming) | |
| -verify-machine-dom-info - Verify machine dominator info (time consuming) | |
| -verify-machineinstrs - Verify generated machine code | |
| -verify-memoryssa - Verify MemorySSA in legacy printer pass. | |
| -verify-misched - Verify machine instrs before and after machine scheduling | |
| -verify-predicateinfo - Verify PredicateInfo in legacy printer pass. | |
| -verify-regalloc - Verify during register allocation | |
| -verify-region-info - Verify region info (time consuming) | |
| -verify-scev - Verify ScalarEvolution's backedge taken counts (slow) | |
| -verify-scev-maps - Verify no dangling value in ScalarEvolution's ExprValueMap (slow) | |
| -version - Display the version of this program | |
| -view-background - Execute graph viewer in the background. Creates tmp file litter. | |
| -view-bfi-func-name=<string> - The option to specify the name of the function whose CFG will be displayed. | |
| -view-block-freq-propagation-dags - Pop up a window to show a dag displaying how block frequencies propagation through the CFG. | |
| =none - do not display graphs. | |
| =fraction - display a graph using the fractional block frequency representation. | |
| =integer - display a graph using the raw integer fractional block frequency representation. | |
| =count - display a graph using the real profile count if available. | |
| -view-block-layout-with-bfi - Pop up a window to show a dag displaying MBP layout and associated block frequencies of the CFG. | |
| =none - do not display graphs. | |
| =fraction - display a graph using the fractional block frequency representation. | |
| =integer - display a graph using the raw integer fractional block frequency representation. | |
| =count - display a graph using the real profile count if available. | |
| -view-edge-bundles - Pop up a window to show edge bundle graphs | |
| -view-hot-freq-percent=<uint> - An integer in percent used to specify the hot blocks/edges to be displayed in red: a block or edge whose frequency is no less than the max frequency of the function multiplied by this percent. | |
| -view-machine-block-freq-propagation-dags - Pop up a window to show a dag displaying how machine block frequencies propagate through the CFG. | |
| =none - do not display graphs. | |
| =fraction - display a graph using the fractional block frequency representation. | |
| =integer - display a graph using the raw integer fractional block frequency representation. | |
| =count - display a graph using the real profile count if available. | |
| -view-slp-tree - Display the SLP trees with Graphviz | |
| -vp-counters-per-site=<number> - The average number of profile counters allocated per value profiling site. | |
| -vp-static-alloc - Do static counter allocation for value profiler | |
| -warn-stack-size=<uint> - Warn for stack size bigger than the given number | |
| -wholeprogramdevirt-read-summary=<string> - Read summary from given YAML file before running pass | |
| -wholeprogramdevirt-summary-action - What to do with the summary when running this pass | |
| =none - Do nothing | |
| =import - Import typeid resolutions from summary and globals | |
| =export - Export typeid resolutions to summary and globals | |
| -wholeprogramdevirt-write-summary=<string> - Write summary to given YAML file after running pass | |
| -x86-asm-syntax - Choose style of code to emit from X86 backend: | |
| =att - Emit AT&T-style assembly | |
| =intel - Emit Intel-style assembly | |
| -x86-early-ifcvt - Enable early if-conversion on X86 | |
| -x86-experimental-pref-loop-alignment=<int> - Sets the preferable loop alignment for experiments (the last x86-experimental-pref-loop-alignment bits of the loop header PC will be 0). | |
| -x86-experimental-vector-widening-legalization - Enable an experimental vector type legalization through widening rather than promotion. | |
| -x86-machine-combiner - Enable the machine combiner pass | |
| -x86-misched-fusion - Enable scheduling for macro fusion. | |
| -x86-use-base-pointer - Enable use of a base pointer for complex stack frames | |
| -x86-use-vzeroupper - Minimize AVX to SSE transition penalty | |
| -xcore-max-threads=<number> - Maximum number of threads (for emulation thread-local storage) |
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