annotated Racket disassembly

doc.md

Annotations by @mflatt.

For the function (define (add m n) (+ m n)), in Aarch64:

 0: ff0a00f1         (subs xzr x23 #x2)          ; are there two arguments?
 4: 01040054         (b.ne (+ pc #x80)) ; => 84  ; jump to slow path if not
 8: 1e0001aa         (orr x30 x0 x1)             ; "or" to combine mask bits
 c: df0b40f2         (ands xzr x30 #x7)          ; zero low bits => both are fixnums
10: a1000054         (b.ne (+ pc #x14)) ; => 24  ; jump to slow path if not
14: 170001ab         (adds x23 x0 x1)            ; add
18: 66000054         (b.vs (+ pc #xc)) ; => 24   ; jump to slow path on overflow
1c: 8a0240f8         (ldur x10 (mem+ x20))       ; load return address
20: 40011fd6         (br x10)                    ; return

24: d60600f1         (subs x22 x22 #x1) ; <=     ; decr. engine counter
28: 41020054         (b.ne (+ pc #x48)) ; => 70  ; continue if not checking events
2c: 800600f9         (str x0 (mem+ x20 (lsl #x1 #x3))) ; start saving context...
30: 810a00f9         (str x1 (mem+ x20 (lsl #x2 #x3)))
34: 94620091         (add x20 x20 #x18)
38: 7e010010         (adr x30 (+ pc #x2c)) ; => 64
3c: 9e0200f9         (str x30 (mem+ x20 (lsl #x0 #x3)))
40: 0a7684d2         (movz x10 #x23b0) ; load address of event-checking code
44: ca5fa0f2         (movk x10 (lsl #x2fe #x10))
48: 2a00c0f2         (movk x10 (lsl #x1 #x20))
4c: 0a00e0f2         (movk x10 (lsl #x0 #x30))
50: 40011fd6         (br x10)                    ; jump to event-checking code

54: 9500000000000000               (data)        ; data for GC and stack unwind
5c: 8d01000000000000               (data)
64: 946200d1         (sub x20 x20 #x18) ; <=     ; return from event-checking code
68: 800640f9         (ldr x0 (mem+ x20 (lsl #x1 #x3)))
6c: 810a40f9         (ldr x1 (mem+ x20 (lsl #x2 #x3)))
70: 0afa8cd2         (movz x10 #x67d0) ; #<code +> ; load address of general `+`
74: aa5fa0f2         (movk x10 (lsl #x2fd #x10))
78: 2a00c0f2         (movk x10 (lsl #x1 #x20))
7c: 0a00e0f2         (movk x10 (lsl #x0 #x30))
80: 40011fd6         (br x10)                      ; jump to generate `+`
84: 0a6693d2         (movz x10 #x9b30) ; load address of bad-arity function
88: 6a5fa0f2         (movk x10 (lsl #x2fb #x10))
8c: 2a00c0f2         (movk x10 (lsl #x1 #x20))
90: 0a00e0f2         (movk x10 (lsl #x0 #x30))
94: 40011fd6         (br x10)                      ; jump to bad arity

Note: The block there from 24-50 is often a more compact event-detour pattern, but this longer form tends to be used if the function starts with a short way out.

For the function (define (add m n) (unsafe-fx+ m n)) in x86-64:

  0: 4883fd02                  (cmp rbp #x2)     ; are there two arguments?
  4: 7508                      (jnz (+ rip #x8)) ; if not, jump to call doargerr
  6: 4a8d2c07                  (lea rbp (mem+ rdi (* r8 #x1))) ; add arguments
  a: 41ff6500                  (jmp (mem64+ r13 #x0))   ; jump to return address
  e: e9fde473fc                (jmp (+ rip #x-38c1b03)) ; call doargerr
 13: 0f1f8000000000            (data)             ; info for GC and stack unwinding