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9900K CPU 5.0GHz Core 4.7GHz Uncore, 2-channel IMC 4x8GB DDR4-4000 16-17-17-36 2T Dual Rank
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| tinymembench v0.4.9 (simple benchmark for memory throughput and latency) | |
| ========================================================================== | |
| == Memory bandwidth tests == | |
| == == | |
| == Note 1: 1MB = 1000000 bytes == | |
| == Note 2: Results for 'copy' tests show how many bytes can be == | |
| == copied per second (adding together read and writen == | |
| == bytes would have provided twice higher numbers) == | |
| == Note 3: 2-pass copy means that we are using a small temporary buffer == | |
| == to first fetch data into it, and only then write it to the == | |
| == destination (source -> L1 cache, L1 cache -> destination) == | |
| == Note 4: If sample standard deviation exceeds 0.1%, it is shown in == | |
| == brackets == | |
| ========================================================================== | |
| C copy backwards : 15185.9 MB/s (6.4%) | |
| C copy backwards (32 byte blocks) : 15146.4 MB/s (0.9%) | |
| C copy backwards (64 byte blocks) : 15192.8 MB/s (1.4%) | |
| C copy : 15843.7 MB/s (0.5%) | |
| C copy prefetched (32 bytes step) : 16704.5 MB/s (0.5%) | |
| C copy prefetched (64 bytes step) : 16676.4 MB/s (0.6%) | |
| C 2-pass copy : 11386.6 MB/s (0.7%) | |
| C 2-pass copy prefetched (32 bytes step) : 11428.3 MB/s (0.4%) | |
| C 2-pass copy prefetched (64 bytes step) : 11474.7 MB/s (0.4%) | |
| C fill : 27484.5 MB/s (2.2%) | |
| C fill (shuffle within 16 byte blocks) : 27483.6 MB/s (2.1%) | |
| C fill (shuffle within 32 byte blocks) : 27465.2 MB/s (2.0%) | |
| C fill (shuffle within 64 byte blocks) : 27466.1 MB/s (2.2%) | |
| --- | |
| standard memcpy : 26474.3 MB/s (1.3%) | |
| standard memset : 38470.1 MB/s | |
| --- | |
| MOVSB copy : 15805.1 MB/s (0.2%) | |
| MOVSD copy : 15811.9 MB/s (0.2%) | |
| SSE2 copy : 17238.0 MB/s (0.5%) | |
| SSE2 nontemporal copy : 23659.0 MB/s (1.0%) | |
| SSE2 copy prefetched (32 bytes step) : 17593.6 MB/s (0.4%) | |
| SSE2 copy prefetched (64 bytes step) : 17566.7 MB/s (0.3%) | |
| SSE2 nontemporal copy prefetched (32 bytes step) : 21573.4 MB/s | |
| SSE2 nontemporal copy prefetched (64 bytes step) : 21799.6 MB/s (0.1%) | |
| SSE2 2-pass copy : 13506.9 MB/s (0.5%) | |
| SSE2 2-pass copy prefetched (32 bytes step) : 13363.9 MB/s (0.5%) | |
| SSE2 2-pass copy prefetched (64 bytes step) : 13406.3 MB/s (0.4%) | |
| SSE2 2-pass nontemporal copy : 8802.2 MB/s (0.6%) | |
| SSE2 fill : 30872.4 MB/s (1.0%) | |
| SSE2 nontemporal fill : 57256.4 MB/s (0.1%) | |
| ========================================================================== | |
| == Memory latency test == | |
| == == | |
| == Average time is measured for random memory accesses in the buffers == | |
| == of different sizes. The larger is the buffer, the more significant == | |
| == are relative contributions of TLB, L1/L2 cache misses and SDRAM == | |
| == accesses. For extremely large buffer sizes we are expecting to see == | |
| == page table walk with several requests to SDRAM for almost every == | |
| == memory access (though 64MiB is not nearly large enough to experience == | |
| == this effect to its fullest). == | |
| == == | |
| == Note 1: All the numbers are representing extra time, which needs to == | |
| == be added to L1 cache latency. The cycle timings for L1 cache == | |
| == latency can be usually found in the processor documentation. == | |
| == Note 2: Dual random read means that we are simultaneously performing == | |
| == two independent memory accesses at a time. In the case if == | |
| == the memory subsystem can't handle multiple outstanding == | |
| == requests, dual random read has the same timings as two == | |
| == single reads performed one after another. == | |
| ========================================================================== | |
| block size : single random read / dual random read, [MADV_NOHUGEPAGE] | |
| 1024 : 0.0 ns / 0.0 ns | |
| 2048 : 0.0 ns / 0.0 ns | |
| 4096 : 0.0 ns / 0.0 ns | |
| 8192 : 0.0 ns / 0.0 ns | |
| 16384 : 0.0 ns / 0.0 ns | |
| 32768 : 0.0 ns / 0.0 ns | |
| 65536 : 0.7 ns / 1.0 ns | |
| 131072 : 1.1 ns / 1.3 ns | |
| 262144 : 2.0 ns / 2.8 ns | |
| 524288 : 5.4 ns / 7.2 ns | |
| 1048576 : 7.4 ns / 9.1 ns | |
| 2097152 : 8.5 ns / 9.7 ns | |
| 4194304 : 8.9 ns / 10.0 ns | |
| 8388608 : 10.2 ns / 11.5 ns | |
| 16777216 : 16.1 ns / 21.2 ns | |
| 33554432 : 33.1 ns / 43.8 ns | |
| 67108864 : 44.3 ns / 53.2 ns | |
| block size : single random read / dual random read, [MADV_HUGEPAGE] | |
| 1024 : 0.0 ns / 0.0 ns | |
| 2048 : 0.0 ns / 0.0 ns | |
| 4096 : 0.0 ns / 0.0 ns | |
| 8192 : 0.0 ns / 0.0 ns | |
| 16384 : 0.0 ns / 0.0 ns | |
| 32768 : 0.0 ns / 0.0 ns | |
| 65536 : 0.7 ns / 1.0 ns | |
| 131072 : 1.1 ns / 1.3 ns | |
| 262144 : 1.3 ns / 1.4 ns | |
| 524288 : 4.4 ns / 6.2 ns | |
| 1048576 : 6.0 ns / 7.6 ns | |
| 2097152 : 6.9 ns / 8.1 ns | |
| 4194304 : 7.3 ns / 8.2 ns | |
| 8388608 : 7.7 ns / 8.3 ns | |
| 16777216 : 8.7 ns / 9.2 ns | |
| 33554432 : 27.3 ns / 37.6 ns | |
| 67108864 : 36.7 ns / 45.4 ns |
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