A6 gsm dev board mcu onboard

gistfile1.txt

DIP switch for accesing MCU
1 ON
2 OFF
3 ON
4 OFF
5 OFF
6 OFF

Using tool https://github.com/grigorig/stcgal

$ python stcgal.py -P stc15 -p COM15
Waiting for MCU, please cycle power: done
Target model:
  Name: STC15L2K32S2
  Magic: F484
  Code flash: 32.0 KB
  EEPROM flash: 29.0 KB
Target frequency: 22.093 MHz
Target BSL version: 7.2.5S
Target wakeup frequency: 27.263 KHz
Target options:
  reset_pin_enabled=False
  clock_source=internal
  clock_gain=high
  watchdog_por_enabled=False
  watchdog_stop_idle=True
  watchdog_prescale=256
  low_voltage_reset=True
  low_voltage_threshold=2
  eeprom_lvd_inhibit=True
  eeprom_erase_enabled=False
  bsl_pindetect_enabled=False
  por_reset_delay=long
  rstout_por_state=high
  uart2_passthrough=False
  uart2_pin_mode=normal
  cpu_core_voltage=unknown
Disconnected!

Dump from STC-ISP
Checking target MCU ... 
  MCU type: STC15L2K32S2
  F/W version: 7.2.5S

Current H/W Option:
  . Current system clock source is internal IRC oscillator
  . IRC frequency: 22.093MHz
  . Oscillator gain is HIGH
  . Wakeup Timer frequency: 27.263KHz
  . Do not detect the level of P3.2 and P3.3 next download
  . Power-on reset, use the extra power-on delay
  . RESET pin behaves as I/O pin
  . Reset while detect a Low-Voltage
  . Thresh voltage level of the built-in LVD : 2.61 V
  . Inhibit EEPROM operation under Low-Voltage
  . Hardware do not enable Watch-Dog-Timer
  . Watch-Dog-Timer pre-scalar : 256
  . Watch-Dog-Timer stop count in idle mode
  . Program can modify the Watch-Dog-Timer scalar
  . Do not erase user EEPROM area at next download
  . Do not control 485 at next download
  . Do not check user password next download
  . TXD is independent IO
  . TXD pin as quasi-bidirectional mode after reset
  . P2.0 output HIGH level after reset

  . MCU type: STC15L2K32S2
  F/W version: 7.2.5S


  Complete !(2017-01-28 19:18:42)