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| / { | |
| model = "Novatek NA51055"; | |
| compatible = "novatek,na51055\0nvt,ca9"; | |
| interrupt-parent = <0x01>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| cpus { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| cpu@0 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a9"; | |
| reg = <0x00>; | |
| next-level-cache = <0x02>; | |
| clock-frequency = "98p"; | |
| linux,phandle = <0x04>; | |
| phandle = <0x04>; | |
| }; | |
| }; | |
| cg@f0020000 { | |
| compatible = "nvt,core_clk"; | |
| reg = <0xf0020000 0x1000>; | |
| }; | |
| periph_clk { | |
| compatible = "nvt,periph_clk"; | |
| #clock-cells = <0x00>; | |
| clock-output-names = "periph_clk"; | |
| linux,phandle = <0x03>; | |
| phandle = <0x03>; | |
| }; | |
| global_timer@ffd00200 { | |
| compatible = "arm,cortex-a9-global-timer"; | |
| reg = <0xffd00200 0x20>; | |
| interrupts = <0x01 0x0b 0xf01>; | |
| clocks = <0x03>; | |
| }; | |
| private_timer@ffd00600 { | |
| compatible = "arm,cortex-a9-twd-timer"; | |
| reg = <0xffd00600 0x20>; | |
| interrupts = <0x01 0x0d 0xf01>; | |
| clocks = <0x03>; | |
| }; | |
| pmu { | |
| compatible = "arm,cortex-a9-pmu"; | |
| interrupts = <0x00 0x50 0x04>; | |
| interrupt-affinity = <0x04>; | |
| }; | |
| cache-controller@ffe00000 { | |
| compatible = "arm,pl310-cache"; | |
| reg = <0xffe00000 0x1000>; | |
| interrupts = <0x00 0x60 0x04>; | |
| cache-unified; | |
| arm,shared-override; | |
| cache-level = <0x02>; | |
| arm,data-latency = <0x02 0x02 0x02>; | |
| arm,tag-latency = <0x02 0x02 0x02>; | |
| linux,phandle = <0x02>; | |
| phandle = <0x02>; | |
| }; | |
| interrupt-controller@0xffd00000 { | |
| compatible = "arm,cortex-a9-gic"; | |
| #interrupt-cells = <0x03>; | |
| interrupt-controller; | |
| reg = <0xffd01000 0x1000 0xffd00100 0x1000>; | |
| linux,phandle = <0x01>; | |
| phandle = <0x01>; | |
| }; | |
| chosen { | |
| bootargs = " "; | |
| }; | |
| aliases { | |
| mmc0 = "/mmc@f0420000"; | |
| mmc1 = "/mmc@f0500000"; | |
| }; | |
| uart@f0290000 { | |
| compatible = "ns16550a"; | |
| reg = <0xf0290000 0x1000>; | |
| interrupts = <0x00 0x2b 0x04>; | |
| baud = <0x1c200>; | |
| reg-shift = <0x02>; | |
| reg-io-width = <0x04>; | |
| no-loopback-test = <0x01>; | |
| clock-frequency = <0x16e3600>; | |
| fifo-size = <0x10>; | |
| uart_id = <0x00>; | |
| }; | |
| uart@f0300000 { | |
| compatible = "ns16550a"; | |
| reg = <0xf0300000 0x1000>; | |
| interrupts = <0x00 0x2c 0x04>; | |
| baud = <0x1c200>; | |
| reg-shift = <0x02>; | |
| reg-io-width = <0x04>; | |
| no-loopback-test = <0x01>; | |
| clock-frequency = <0x2dc6c00>; | |
| fifo-size = <0x40>; | |
| hw_flowctrl = <0x00>; | |
| rx_trig_level = <0x03>; | |
| uart_id = <0x01>; | |
| }; | |
| uart@f0310000 { | |
| compatible = "ns16550a"; | |
| reg = <0xf0310000 0x1000>; | |
| interrupts = <0x00 0x2d 0x04>; | |
| baud = <0x1c200>; | |
| reg-shift = <0x02>; | |
| reg-io-width = <0x04>; | |
| no-loopback-test = <0x01>; | |
| clock-frequency = <0x2dc6c00>; | |
| fifo-size = <0x40>; | |
| hw_flowctrl = <0x00>; | |
| rx_trig_level = <0x03>; | |
| uart_id = <0x02>; | |
| }; | |
| cc@f0090000 { | |
| compatible = "kdrv_rpc"; | |
| reg = <0xf0090000 0x300>; | |
| interrupts = <0x00 0x3b 0x04>; | |
| }; | |
| mmc@f0420000 { | |
| compatible = "nvt,nvt_mmc"; | |
| reg = <0xf0420000 0x1000>; | |
| interrupts = <0x00 0x1e 0x04>; | |
| max-frequency = <0x2dc6c00>; | |
| voltage-switch = <0x00>; | |
| max-voltage = <0xce4>; | |
| bus-width = <0x04>; | |
| neg-sample-edge = <0x00>; | |
| driving = <0x0a 0x0a 0x0a 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19 0x19>; | |
| }; | |
| mmc@f0500000 { | |
| compatible = "nvt,nvt_mmc2"; | |
| reg = <0xf0500000 0x1000>; | |
| interrupts = <0x00 0x1f 0x04>; | |
| max-frequency = <0x2dc6c00>; | |
| voltage-switch = <0x00>; | |
| max-voltage = <0xce4>; | |
| bus-width = <0x04>; | |
| neg-sample-edge = <0x00>; | |
| driving = <0x0a 0x06 0x06 0x0f 0x06 0x06 0x0f 0x06 0x06 0x0f 0x06 0x06>; | |
| cd_gpio = <0x00 0x00 0x01>; | |
| }; | |
| nand@f0400000 { | |
| #address-cells = <0x02>; | |
| #size-cells = <0x02>; | |
| compatible = "nvt,nvt_spinand"; | |
| reg = <0xf0400000 0x1000>; | |
| interrupts = <0x00 0x1d 0x04>; | |
| clock-frequency = <0x4c4b400>; | |
| nvt-devname = "spi_nand.0"; | |
| partition_loader { | |
| label = "loader"; | |
| reg = <0x00 0x00 0x00 0x40000>; | |
| }; | |
| partition_fdt { | |
| label = "fdt"; | |
| reg = <0x00 0x40000 0x00 0x40000>; | |
| }; | |
| partition_fdt.restore { | |
| label = "fdt.restore"; | |
| reg = <0x00 0x80000 0x00 0x40000>; | |
| }; | |
| partition_uboot { | |
| label = "uboot"; | |
| reg = <0x00 0xc0000 0x00 0x180000>; | |
| }; | |
| partition_uenv { | |
| label = "uenv"; | |
| reg = <0x00 0x240000 0x00 0x40000>; | |
| }; | |
| partition_kernel { | |
| label = "kernel"; | |
| reg = <0x00 0x280000 0x00 0x480000>; | |
| }; | |
| partition_rootfs { | |
| label = "rootfs"; | |
| reg = <0x00 0x700000 0x00 0x2000000>; | |
| }; | |
| partition_app { | |
| label = "app"; | |
| reg = <0x00 0x2700000 0x00 0x1500000>; | |
| }; | |
| partition_para { | |
| label = "para"; | |
| reg = <0x00 0x3c00000 0x00 0x800000>; | |
| }; | |
| partition_sp { | |
| label = "sp"; | |
| reg = <0x00 0x4400000 0x00 0x80000>; | |
| }; | |
| partition_ext_para { | |
| label = "ext_para"; | |
| reg = <0x00 0x4480000 0x00 0x80000>; | |
| }; | |
| partition_download { | |
| label = "download"; | |
| reg = <0x00 0x4500000 0x00 0x3b00000>; | |
| }; | |
| partition_all { | |
| label = "all"; | |
| reg = <0x00 0x00 0x00 0x8000000>; | |
| }; | |
| nvtpack { | |
| ver = "NVTPACK_FW_INI_16072017"; | |
| method = <0x01>; | |
| index { | |
| id0 { | |
| partition_name = "loader"; | |
| source_file = [00]; | |
| }; | |
| id1 { | |
| partition_name = "fdt"; | |
| source_file = "nvt-na51055-evb.bin"; | |
| }; | |
| id2 { | |
| partition_name = "fdt.restore"; | |
| source_file = [00]; | |
| }; | |
| id3 { | |
| partition_name = "uboot"; | |
| source_file = "u-boot.bin"; | |
| }; | |
| id4 { | |
| partition_name = "uenv"; | |
| source_file = [00]; | |
| }; | |
| id5 { | |
| partition_name = "kernel"; | |
| source_file = "uImage.bin"; | |
| }; | |
| id6 { | |
| partition_name = "rootfs"; | |
| source_file = "rootfs.ubifs.bin"; | |
| }; | |
| id7 { | |
| partition_name = "app"; | |
| source_file = "appfs.ubifs.bin"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| nor@f0400000 { | |
| #address-cells = <0x02>; | |
| #size-cells = <0x02>; | |
| compatible = "nvt,nvt_spinor"; | |
| reg = <0xf0400000 0x1000>; | |
| interrupts = <0x00 0x1d 0x04>; | |
| clock-frequency = <0x2dc6c00>; | |
| nvt-devname = "spi_nor.0"; | |
| trace-stdtable = <0x01>; | |
| }; | |
| gpio@f0070000 { | |
| compatible = "nvt,nvt_gpio"; | |
| reg = <0xf0070000 0x10000>; | |
| interrupts = <0x00 0x18 0x04>; | |
| #gpio-cells = <0x02>; | |
| }; | |
| eth@f02b0000 { | |
| compatible = "nvt,synopsys_eth"; | |
| reg = <0xf02b0000 0x3800>; | |
| interrupts = <0x00 0x22 0x04>; | |
| sp-clk = <0x00>; | |
| ref-clk-out = <0x00>; | |
| }; | |
| phy@f02b3800 { | |
| compatible = "nvt,eth_phy"; | |
| reg = <0xf02b3800 0x400>; | |
| }; | |
| wdt@f0050000 { | |
| compatible = "nvt,nvt_wdt"; | |
| reg = <0xf0050000 0x10000>; | |
| interrupts = <0x00 0x39 0x04>; | |
| }; | |
| pwm@f0210000 { | |
| compatible = "nvt,nvt_pwm"; | |
| reg = <0xf0210000 0x2000>; | |
| interrupts = <0x00 0x1a 0x04>; | |
| }; | |
| adc@f0260000 { | |
| compatible = "nvt,nvt_adc"; | |
| reg = <0xf0260000 0x1000>; | |
| interrupts = <0x00 0x2f 0x04>; | |
| #io-channel-cells = <0x01>; | |
| }; | |
| rtc@f0060000 { | |
| compatible = "nvt,nvt_rtc"; | |
| reg = <0xf0060000 0x100>; | |
| interrupts = <0x00 0x38 0x04>; | |
| }; | |
| drtc@f00b0000 { | |
| compatible = "nvt,nvt_drtc"; | |
| reg = <0xf00b0000 0x100>; | |
| }; | |
| crypto@f0620000 { | |
| compatible = "nvt,nvt_crypto"; | |
| reg = <0xf0620000 0x100>; | |
| interrupts = <0x00 0x26 0x04>; | |
| mclk = <0x01>; | |
| }; | |
| hash@f0700000 { | |
| compatible = "nvt,nvt_hash"; | |
| reg = <0xf0700000 0x100>; | |
| interrupts = <0x00 0x1c 0x04>; | |
| mclk = <0x01>; | |
| }; | |
| rsa@f06a0000 { | |
| compatible = "nvt,nvt_rsa"; | |
| reg = <0xf06a0000 0x100>; | |
| interrupts = <0x00 0x14 0x04>; | |
| mclk = <0x01>; | |
| }; | |
| top@f0010000 { | |
| compatible = "nvt,nvt_top"; | |
| reg = <0xf0010000 0x2000 0xf0030000 0x2000 0xf0070000 0x10000>; | |
| sdio { | |
| pinmux = <0x01>; | |
| }; | |
| sdio2 { | |
| pinmux = <0x01>; | |
| }; | |
| sdio3 { | |
| pinmux = <0x00>; | |
| }; | |
| nand { | |
| pinmux = <0x05>; | |
| }; | |
| sensor { | |
| pinmux = <0x00>; | |
| }; | |
| sensor2 { | |
| pinmux = <0x00>; | |
| }; | |
| mipi_lvds { | |
| pinmux = <0x00>; | |
| }; | |
| i2c { | |
| pinmux = <0x00>; | |
| }; | |
| sif { | |
| pinmux = <0x08>; | |
| }; | |
| uart { | |
| pinmux = <0x01>; | |
| }; | |
| spi { | |
| pinmux = <0x30>; | |
| }; | |
| sdp { | |
| pinmux = <0x00>; | |
| }; | |
| remote { | |
| pinmux = <0x00>; | |
| }; | |
| pwm { | |
| pinmux = <0x00>; | |
| }; | |
| pwm2 { | |
| pinmux = <0x00>; | |
| }; | |
| ccnt { | |
| pinmux = <0x00>; | |
| }; | |
| audio { | |
| pinmux = <0x00>; | |
| }; | |
| lcd { | |
| pinmux = <0x10000000>; | |
| }; | |
| tv { | |
| pinmux = <0x00>; | |
| }; | |
| eth { | |
| pinmux = <0x12>; | |
| }; | |
| misc { | |
| pinmux = <0x00>; | |
| }; | |
| }; | |
| sie@f0c00000 { | |
| compatible = "nvt,drv_sie"; | |
| reg = <0xf0c00000 0x900 0xf0d20000 0x900 0xf0d30000 0x900 0xf0d40000 0x900 0xf0d80000 0x900>; | |
| interrupts = <0x00 0x01 0x04 0x00 0x02 0x04 0x00 0x03 0x04 0x00 0x3b 0x04 0x00 0x3d 0x04>; | |
| power_saving = <0x00>; | |
| }; | |
| tge@f0cc0000 { | |
| compatible = "nvt,kdrv_tge"; | |
| reg = <0xf0cc0000 0x150>; | |
| interrupts = <0x00 0x16 0x04>; | |
| }; | |
| rhe@f0ce0000 { | |
| compatible = "nvt,kdrv_rhe"; | |
| reg = <0xf0ce0000 0x900>; | |
| interrupts = <0x00 0x0d 0x04>; | |
| }; | |
| ime@f0c40000 { | |
| compatible = "nvt,kdrv_ime"; | |
| reg = <0xf0c40000 0x1000>; | |
| interrupts = <0x00 0x06 0x04>; | |
| }; | |
| ife2@f0d00000 { | |
| compatible = "nvt,kdrv_ife2"; | |
| reg = <0xf0d00000 0x100>; | |
| interrupts = <0x00 0x09 0x04>; | |
| }; | |
| ise@f0c90000 { | |
| compatible = "nvt,kdrv_ise"; | |
| reg = <0xf0c90000 0x100>; | |
| interrupts = <0x00 0x15 0x04 0x00 0x55 0x04>; | |
| }; | |
| ipe@f0c30000 { | |
| compatible = "nvt,kdrv_ipe"; | |
| reg = <0xf0c30000 0x900>; | |
| interrupts = <0x00 0x05 0x04>; | |
| }; | |
| ife@f0c70000 { | |
| compatible = "nvt,kdrv_ife"; | |
| reg = <0xf0c70000 0x800>; | |
| interrupts = <0x00 0x08 0x04>; | |
| }; | |
| vpe@f0cd0000 { | |
| compatible = "nvt,kdrv_vpe"; | |
| reg = <0xf0cd0000 0x1040>; | |
| interrupts = <0x00 0x3e 0x04>; | |
| }; | |
| ai@f0c60000 { | |
| compatible = "nvt,kdrv_ai"; | |
| reg = <0xf0c60000 0x1cc 0xf0d50000 0x94 0xf0d60000 0x200 0xf0cb0000 0x200>; | |
| interrupts = <0x00 0x0e 0x04 0x00 0x0d 0x04 0x00 0x31 0x04 0x00 0x0b 0x04>; | |
| }; | |
| md@f0c10000 { | |
| compatible = "nvt,kdrv_md"; | |
| reg = <0xf0c10000 0x150>; | |
| interrupts = <0x00 0x2e 0x04>; | |
| }; | |
| dis@f0c50000 { | |
| compatible = "nvt,kdrv_dis"; | |
| reg = <0xf0c50000 0x114>; | |
| interrupts = <0x00 0x0a 0x04>; | |
| }; | |
| coe@f0a11000 { | |
| compatible = "nvt,nvt_coe"; | |
| reg = <0xf0a11000 0x2c0>; | |
| }; | |
| dce@f0c20000 { | |
| compatible = "nvt,kdrv_dce"; | |
| reg = <0xf0c20000 0x650>; | |
| interrupts = <0x00 0x07 0x04>; | |
| }; | |
| ive@f0d70000 { | |
| compatible = "nvt,kdrv_ive"; | |
| reg = <0xf0d70000 0x6c>; | |
| interrupts = <0x00 0x35 0x04>; | |
| }; | |
| sde@f0d90000 { | |
| compatible = "nvt,kdrv_sde"; | |
| reg = <0xf0d90000 0x90>; | |
| interrupts = <0x00 0x4a 0x04>; | |
| }; | |
| ide@f0800000 { | |
| compatible = "nvt,nvt_ide"; | |
| reg = <0xf0800000 0x1000>; | |
| interrupts = <0x00 0x30 0x04>; | |
| clock-source = <0x01>; | |
| source-frequency = <0x11e1a300>; | |
| }; | |
| dsi@f0840000 { | |
| compatible = "nvt,nvt_dsi"; | |
| reg = <0xf0840000 0x1000>; | |
| interrupts = <0x00 0x32 0x04>; | |
| }; | |
| csi@f0280000 { | |
| compatible = "nvt,nvt_csi"; | |
| reg = <0xf0280000 0x100 0xf0330000 0x100>; | |
| interrupts = <0x00 0x36 0x04 0x00 0x37 0x04>; | |
| }; | |
| lvds@f0270000 { | |
| compatible = "nvt,nvt_lvds"; | |
| reg = <0xf0270000 0x200 0xf0370000 0x200>; | |
| interrupts = <0x00 0x36 0x04 0x00 0x37 0x04>; | |
| }; | |
| senphy@f06b0000 { | |
| compatible = "nvt,nvt_senphy"; | |
| reg = <0xf06b0000 0x100>; | |
| }; | |
| ssenif@f0xx0000 { | |
| compatible = "nvt,nvt_ssenif"; | |
| reg = <0xf02c0000 0x2000>; | |
| interrupts = <0x00 0x3d 0x04>; | |
| }; | |
| sif@f0240000 { | |
| compatible = "nvt,nvt_sif"; | |
| reg = <0xf0240000 0x200>; | |
| interrupts = <0x00 0x28 0x04>; | |
| clock-frequency = <0xf4240>; | |
| }; | |
| graphic@f0c80000 { | |
| compatible = "nvt,nvt_graphic"; | |
| reg = <0xf0c80000 0x300 0xf0d10000 0x100>; | |
| interrupts = <0x00 0x12 0x04 0x00 0x13 0x04>; | |
| }; | |
| affine@f0ca0000 { | |
| compatible = "nvt,nvt_affine"; | |
| reg = <0xf0ca0000 0x100>; | |
| interrupts = <0x00 0x34 0x04>; | |
| }; | |
| h26x@f0a10000 { | |
| compatible = "nvt,nvt_h26x"; | |
| reg = <0xf0a10000 0xa00>; | |
| interrupts = <0x00 0x10 0x04>; | |
| power_saving = <0x00>; | |
| }; | |
| clocksource@f0040000 { | |
| compatible = "nvt,nvt_clk_src"; | |
| reg = <0xf0040000 0x300>; | |
| interrupts = <0x00 0x00 0x04>; | |
| clock-frequency1 = <0x2dc6c0>; | |
| clock-frequency2 = <0x2dc6c0>; | |
| clksrc = <0x01>; | |
| bits = <0x20>; | |
| clock-names = "f0040000.timer"; | |
| }; | |
| ptp-dte@f0040000 { | |
| compatible = "nvt,ptp-dte"; | |
| reg = <0xf0040000 0x300>; | |
| clock-frequency = <0x2dc6c0>; | |
| interrupts = <0x00 0x00 0x04>; | |
| }; | |
| timer@f0040000 { | |
| compatible = "nvt,nvt_timer"; | |
| reg = <0xf0040000 0x300>; | |
| interrupts = <0x00 0x00 0x04>; | |
| }; | |
| eac@f0640000 { | |
| compatible = "nvt,nvt_eac"; | |
| reg = <0xf0640000 0x200>; | |
| }; | |
| jpg@f0a00000 { | |
| compatible = "nvt,nvt_jpg"; | |
| reg = <0xf0a00000 0x100>; | |
| interrupts = <0x00 0x11 0x04>; | |
| }; | |
| nvt_usb2host@f0600000 { | |
| compatible = "nvt,ehci-nvtivot"; | |
| reg = <0xf0600000 0x10000>; | |
| interrupts = <0x00 0x1b 0x04>; | |
| }; | |
| nvt_usb2dev@f0600000 { | |
| compatible = "nvt,fotg200_udc"; | |
| reg = <0xf0600000 0x10000>; | |
| interrupts = <0x00 0x1b 0x04>; | |
| }; | |
| nvt_usb_chrg@f0600000 { | |
| compatible = "nvt,nvt_usb_chrgdet"; | |
| reg = <0xf0600000 0x10000>; | |
| }; | |
| dai@f0630000 { | |
| compatible = "nvt,nvt_dai"; | |
| reg = <0xf0630000 0xbc>; | |
| interrupts = <0x00 0x0f 0x04>; | |
| }; | |
| rotate@f0cf0000 { | |
| compatible = "nvt,nvt_rotation"; | |
| reg = <0xf0cf0000 0x100>; | |
| interrupts = <0x00 0x51 0x04>; | |
| }; | |
| drvdump@0 { | |
| compatible = "nvt,nvt_drvdump"; | |
| }; | |
| dsp@f1430000 { | |
| compatible = "nvt,nvt_dsp"; | |
| reg = <0xf1430000 0x200 0xf2000000 0x1000000 0xf1440000 0x200 0xf3000000 0x1000000>; | |
| interrupts = <0x00 0x4c 0x04 0x00 0x4d 0x04>; | |
| }; | |
| spi@f0230000 { | |
| compatible = "nvt,nvt_spi"; | |
| reg = <0xf0230000 0x10000>; | |
| interrupts = <0x00 0x23 0x04>; | |
| dma-support = <0x00>; | |
| nvt-devname = <0x00>; | |
| status = "okay"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| }; | |
| spi@f0320000 { | |
| compatible = "nvt,nvt_spi"; | |
| reg = <0xf0320000 0x10000>; | |
| interrupts = <0x00 0x24 0x04>; | |
| dma-support = <0x00>; | |
| nvt-devname = <0x01>; | |
| status = "okay"; | |
| }; | |
| spi@f0340000 { | |
| compatible = "nvt,nvt_spi"; | |
| reg = <0xf0340000 0x10000>; | |
| interrupts = <0x00 0x25 0x04>; | |
| dma-support = <0x00>; | |
| nvt-devname = <0x02>; | |
| status = "okay"; | |
| }; | |
| sdp@f0390000 { | |
| compatible = "nvt,nvt_sdp"; | |
| reg = <0xf0390000 0x28>; | |
| interrupts = <0x00 0x0c 0x04>; | |
| }; | |
| tse@f0650000 { | |
| compatible = "nvt,nvt_tse"; | |
| reg = <0xf0650000 0x90>; | |
| interrupts = <0x00 0x17 0x04>; | |
| }; | |
| remote@f0250000 { | |
| compatible = "nvt,nvt_remote"; | |
| reg = <0xf0250000 0x28>; | |
| interrupts = <0x00 0x19 0x04>; | |
| }; | |
| rng@f0680000 { | |
| compatible = "nvt,nvt_rng"; | |
| reg = <0xf0680000 0x100>; | |
| }; | |
| nvt_arb@f0000000 { | |
| compatible = "nvt,nvt_arb"; | |
| reg = <0xf0000000 0xa000 0xf0100000 0xa000 0xf0fe0000 0x300 0xf0fd0000 0x300>; | |
| interrupts = <0x00 0x21 0x04 0x00 0x33 0x04>; | |
| }; | |
| nvt_otp@f0660000 { | |
| compatible = "nvt,nvt_otp"; | |
| reg = <0xf0660000 0x70>; | |
| }; | |
| pll_preset@0 { | |
| pll3 { | |
| pll_config = <0x03 0x00 0x00>; | |
| }; | |
| pll4 { | |
| pll_config = <0x04 0x00 0x00>; | |
| }; | |
| pll5 { | |
| pll_config = <0x05 0x00 0x01>; | |
| }; | |
| pll6 { | |
| pll_config = <0x06 0x00 0x00>; | |
| }; | |
| pll7 { | |
| pll_config = <0x07 0x00 0x00>; | |
| }; | |
| pll8 { | |
| pll_config = <0x08 0x00 0x00>; | |
| }; | |
| pll9 { | |
| pll_config = <0x09 0x00 0x00>; | |
| }; | |
| pll10 { | |
| pll_config = <0x0a 0x00 0x01>; | |
| }; | |
| pll11 { | |
| pll_config = <0x0b 0x00 0x00>; | |
| }; | |
| pll12 { | |
| pll_config = <0x0c 0x00 0x01>; | |
| }; | |
| pll13 { | |
| pll_config = <0x0d 0x10b07600 0x01>; | |
| }; | |
| pll14 { | |
| pll_config = <0x0e 0x00 0x00>; | |
| }; | |
| pll15 { | |
| pll_config = <0x0f 0x5b8d800 0x01>; | |
| }; | |
| pll16 { | |
| pll_config = <0x10 0x00 0x00>; | |
| }; | |
| pll17 { | |
| pll_config = <0x11 0x00 0x00>; | |
| }; | |
| pll18 { | |
| pll_config = <0x12 0x00 0x00>; | |
| }; | |
| pllf320 { | |
| pll_config = <0x18 0x1312d000 0x01>; | |
| }; | |
| }; | |
| i2c@f0220000 { | |
| compatible = "nvt,nvt_i2c"; | |
| reg = <0xf0220000 0x100>; | |
| interrupts = <0x00 0x29 0x04>; | |
| clock-frequency = <0x186a0>; | |
| id = <0x00>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| }; | |
| i2c2@f0350000 { | |
| compatible = "nvt,nvt_i2c"; | |
| reg = <0xf0350000 0x100>; | |
| interrupts = <0x00 0x2a 0x04>; | |
| clock-frequency = <0x186a0>; | |
| id = <0x01>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| }; | |
| i2c3@f03a0000 { | |
| compatible = "nvt,nvt_i2c"; | |
| reg = <0xf03a0000 0x100>; | |
| interrupts = <0x00 0x3c 0x04>; | |
| clock-frequency = <0x186a0>; | |
| id = <0x02>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| }; | |
| audio@1 { | |
| type = "none"; | |
| i2s_ctrl = <0x00>; | |
| sif_channel = <0x00>; | |
| gpio_cold_reset = <0x00>; | |
| gpio_data = <0x00>; | |
| gpio_clk = <0x00>; | |
| gpio_cs = <0x00>; | |
| adc_zero = <0x00>; | |
| }; | |
| audio@2 { | |
| type = "embedded"; | |
| i2s_ctrl = <0x04>; | |
| sif_channel = <0x00>; | |
| gpio_cold_reset = <0x00>; | |
| gpio_data = <0x00>; | |
| gpio_clk = <0x00>; | |
| gpio_cs = <0x00>; | |
| adc_zero = <0x00>; | |
| }; | |
| display { | |
| type = "lcd"; | |
| lcd_ctrl = <0x00>; | |
| sif_channel = <0x02>; | |
| gpio_cs = <0x76>; | |
| gpio_clk = <0x77>; | |
| gpio_data = <0x78>; | |
| }; | |
| nvtmpp { | |
| compatible = "nvt,nvtmpp"; | |
| }; | |
| isf_stream { | |
| compatible = "nvt,isf_stream"; | |
| }; | |
| isf_flow { | |
| compatible = "nvt,isf_flow"; | |
| }; | |
| isf_vdocap { | |
| compatible = "nvt,isf_vdocap"; | |
| }; | |
| isf_vdoprc { | |
| compatible = "nvt,isf_vdoprc"; | |
| }; | |
| isf_dummy { | |
| compatible = "nvt,isf_dummy"; | |
| }; | |
| isf_vdoenc { | |
| compatible = "nvt,isf_vdoenc"; | |
| }; | |
| isf_vdodec { | |
| compatible = "nvt,isf_vdodec"; | |
| }; | |
| isf_vdoout { | |
| compatible = "nvt,isf_vdoout"; | |
| }; | |
| dispobj { | |
| compatible = "nvt,nvt_dispobj"; | |
| }; | |
| dispdev { | |
| compatible = "nvt,nvt_dispdev"; | |
| }; | |
| audio { | |
| compatible = "nvt,nvt_audio"; | |
| }; | |
| msdcnvt { | |
| compatible = "nvt,msdcnvt"; | |
| }; | |
| msdcnvt_adj { | |
| compatible = "nvt,msdcnvt_adj"; | |
| }; | |
| msdcnvt_custom_si { | |
| compatible = "nvt,msdcnvt_custom_si"; | |
| }; | |
| wavstudio { | |
| compatible = "nvt,wavstudio"; | |
| }; | |
| isf_audenc { | |
| compatible = "nvt,isf_audenc"; | |
| }; | |
| isf_auddec { | |
| compatible = "nvt,isf_auddec"; | |
| }; | |
| isf_audcap { | |
| compatible = "nvt,isf_audcap"; | |
| }; | |
| isf_audout { | |
| compatible = "nvt,isf_audout"; | |
| }; | |
| nvt_ipc { | |
| compatible = "nvt,nvt_ipc"; | |
| }; | |
| nvt_disflow { | |
| compatible = "nvt,nvt_disflow"; | |
| }; | |
| nvt_memory_cfg { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| dram { | |
| reg = <0x00 0x8000000>; | |
| }; | |
| fdt { | |
| reg = <0x100000 0x100000>; | |
| }; | |
| shmem { | |
| reg = <0x200000 0x100000>; | |
| }; | |
| loader { | |
| reg = <0x1000000 0x100000>; | |
| }; | |
| linuxtmp { | |
| reg = <0x1100000 0x4f00000>; | |
| }; | |
| uboot { | |
| reg = <0x6000000 0x2000000>; | |
| }; | |
| }; | |
| memory { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| device_type = "memory"; | |
| reg = <0x00 0x7000000>; | |
| }; | |
| reserved-memory { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| ranges; | |
| cma0@0x03000000 { | |
| compatible = "shared-dma-pool"; | |
| reusable; | |
| reg = <0x3000000 0x400000>; | |
| alignment = <0x400000>; | |
| status = "okay"; | |
| linux,phandle = <0x05>; | |
| phandle = <0x05>; | |
| }; | |
| }; | |
| nvt_cma { | |
| compatible = "nvt,nvt_cma"; | |
| memory-region = <0x05>; | |
| id = <0x00>; | |
| }; | |
| hdal-memory { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| media { | |
| reg = <0x7000000 0x1000000 0x40000000 0x10000000>; | |
| }; | |
| }; | |
| hdal-maxpath-cfg { | |
| vdocap_active_list = <0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00>; | |
| vdoprc_maxdevice = <0x02>; | |
| vdoenc_maxpath = <0x08>; | |
| vdodec_maxpath = <0x02>; | |
| vdoout_maxdevice = <0x01>; | |
| adocap_maxdevice = <0x02>; | |
| adoout_maxdevice = <0x02>; | |
| adoenc_maxpath = <0x01>; | |
| adodec_maxpath = <0x01>; | |
| gfx_maxjob = <0x02>; | |
| stamp_maximg = <0x10>; | |
| vdoprc_maxstamp = <0x04 0x10>; | |
| vdoprc_maxmask = <0x08 0x40>; | |
| vdoenc_maxstamp = <0x20 0x10>; | |
| vdoenc_maxmask = <0x00 0x40>; | |
| vdoout_maxstamp = <0x00 0x10>; | |
| vdoout_maxmask = <0x00 0x40>; | |
| }; | |
| nvt_info { | |
| BIN_NAME = "FW98523A"; | |
| BIN_NAME_T = "FW98523T"; | |
| RTOS_APP_MAIN = "test"; | |
| EMBMEM_BLK_SIZE = "0x20000"; | |
| EMBMEM = "EMBMEM_SPI_NAND"; | |
| NVT_CFG_APP_EXTERNAL = "dhd_priv iperf-3"; | |
| NVT_CFG_APP = "hfs lviewd nvtrtspd nvtipcd nvteventd uctrl fslinux ugxstrg nvtsystem camctrlcgi nvtweb nvtrecordManagerd msdcnvt arm_neon_perf mem ucmd isp_demon mem_hotplug memcpy drystone-2.0"; | |
| NVT_ROOTFS_ETC = "IPCAM1_EVB"; | |
| NVT_BINARY_FILE_STRIP = "no"; | |
| NVT_CFG_KERNEL_CFG = "na51055_evb_defconfig_release"; | |
| NVT_LINUX_SMP = "NVT_LINUX_SMP_OFF"; | |
| NVT_DEFAULT_NETWORK_BOOT_PROTOCOL = "NVT_DEFAULT_NETWORK_BOOT_PROTOCOL_STATIC_IP"; | |
| NVT_ROOTFS_TYPE = "NVT_ROOTFS_TYPE_NAND_UBI"; | |
| NVT_ETHERNET = "NVT_ETHERNET_EQOS"; | |
| NVT_SDIO_WIFI = "NVT_SDIO_WIFI_NONE"; | |
| NVT_USB_WIFI = "NVT_USB_WIFI_NONE"; | |
| NVT_USB_4G = "NVT_USB_4G_NONE"; | |
| WIFI_RTK_MDL = "WIFI_RTK_MDL_8189"; | |
| WIFI_BRCM_MDL = "WIFI_BRCM_MDL_43438a1_ampk6212axtal26"; | |
| WIFI_NVT_MDL = "WIFI_NVT_MDL_18211"; | |
| NVT_CURL_SSL = "NVT_CURL_SSL_OPENSSL"; | |
| NVT_UBOOT_ENV_IN_STORG_SUPPORT = "NVT_UBOOT_ENV_IN_STORG_SUPPORT_OFF"; | |
| }; | |
| }; |
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