I have tried the quickstart of https://github.com/blue-oil/blueoil/tree/master/dlk .
venv ❯ PYTHONPATH=python/dlk python python/dlk/scripts/generate_project.py --help
Options:
-i, --input_path PATH protobuf path which you want to convert to C
codes
-o, --output_path TEXT output path which you want to export any
generated files
-p, --project_name TEXT project name which you'll generate
-hq, --activate_hard_quantization
activate hard quantization optimization
-ts, --threshold_skipping activate threshold skip optimization
-pe, --num_pe INTEGER set number of PE used in FPGA IP
-dbg, --debug add debug code to the generated project
-cache, --cache_dma use cached DMA buffers
-h, --help Show this message and exit.venv ❯ PYTHONPATH=python/dlk python python/dlk/scripts/generate_project.py -i examples/classification/lmnet_quantize_cifar10/minimal_graph_with_shape.pb -o tmp/ -p classification
start running
import pb file
optimize graph step: start
optimize graph step: done!
generate code step: start
generate code step: done!venv ❯ ls -latr tmp/classification.prj/
total 40
-rw-r--r-- 1 kazuhiroserizawa staff 4149 9 13 14:37 CMakeLists.txt
drwxr-xr-x 3 kazuhiroserizawa staff 96 9 13 21:42 ..
-rw-r--r-- 1 kazuhiroserizawa staff 8719 9 13 21:42 Makefile
drwxr-xr-x 4 kazuhiroserizawa staff 128 9 13 21:42 test
drwxr-xr-x 4 kazuhiroserizawa staff 128 9 13 21:42 cmake
drwxr-xr-x 3 kazuhiroserizawa staff 96 9 13 21:42 scripts
drwxr-xr-x 3 kazuhiroserizawa staff 96 9 13 21:42 mains
drwxr-xr-x 3 kazuhiroserizawa staff 96 9 13 21:42 debug
drwxr-xr-x 11 kazuhiroserizawa staff 352 9 13 21:42 .
drwxr-xr-x 11 kazuhiroserizawa staff 352 9 13 21:42 src
drwxr-xr-x 20 kazuhiroserizawa staff 640 9 13 21:42 includevenv ❯ cd tmp/classification.prj/
venv ❯ make lib_x86 -j4
venv ❯ cd -venv ❯ PYTHONPATH=python/dlk python utils/run_test.py -i tmp/classification.prj/images/1001.png -l tmp/classification.prj/lib_x86.so
Output:
[[0.59299845 0.00243336 0.14776424 0.03711027 0.09348489 0.00718795
0.01871733 0.01269911 0.08353624 0.00406819]]
test