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Last active December 20, 2015 12:18
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EAGLE.SCR
# Configuration Script
#
# This file can be used to configure the editor windows.
# GENERAL:
# Switch Science
ASSIGN C+0 WINDOW FIT;
ASSIGN F7 MOVE;
ASSIGN F8 ROUTE;
ASSIGN F9 RIPUP;
#ASSIGN C+M MOVE;
ASSIGN C+Z UNDO;
ASSIGN C+Y REDO;
ASSIGN CS+C COPY;
ASSIGN CS+A ADD;
ASSIGN C+G GROUP;
ASSIGN C+D DELETE;
ASSIGN C+W WIRE;
#ASSIGN C+I INFO;
ASSIGN C+T TEXT;
ASSIGN CS+N NAME;
ASSIGN CS+P POLYGON;
#ASSIGN C+F 'RUN find.ulp';
# ASSIGN C+X CHANGE;
# ASSIGN A+A ATTRIBUTE;
BRD:
# Switch Science
ASSIGN C+F 'SET POLYGON_RATSNEST ON; RATSNEST';
ASSIGN CS+F 'SET POLYGON_RATSNEST OFF; RIPUP @;';
ASSIGN C+M GRID MM 1 ALT MM 0.1;
ASSIGN C+I GRID MIL 50 ALT MIL 12.5;
ASSIGN C+E ERRORS;
ASSIGN CS+D 'DRC;'; # Executes DRC without opening DRC dialog. For dialog sk
# ASSIGN CS+D DRC; # Opens DRC dialog.
ASSIGN CS+V VALUE;
ASSIGN C+R ROUTE;
ASSIGN CS+R RIPUP;
# ASSIGN A+R RATSNEST;
ASSIGN C+H HOLE;
ASSIGN CS+S SMASH;
ASSIGN A+S SIGNAL;
MENU '[designlink22.png] Search and order : Run designlink-order.ulp -general;'\
'[pcb-service.png] PCB Service : Run pcb-service.ulp;';
SCH:
Grid Default;
Change Width 0.006;
ASSIGN C+E ERRORS;
ASSIGN CS+E ERC;
ASSIGN CS+I INVOKE;
ASSIGN CS+V VALUE;
ASSIGN CS+S SMASH;
ASSIGN A+N NET;
MENU '[designlink22.png] Search and order {\
General : Run designlink-order.ulp -general; |\
Schematic : Run designlink-order.ulp; \
}'\
'[LTspice.png] LT Spice simulation {\
Export: RUN ltspice.ulp /E; |\
Export Setup: RUN ltspice.ulp /E /S; |\
Export Group: RUN ltspice.ulp /E /G; |\
Import: RUN ltspice.ulp /I; \
}' \
;
LBR:
ASSIGN C+E EDIT;
MENU '[designlink22.png] Search and order : Run designlink-order.ulp -general;'\
'[LTspice.png] LT Spice simulation {\
Export: RUN ltspice.ulp /E; |\
Import: RUN ltspice.ulp /I; \
}'\
'[pads-pcb.png] PADS package import : RUN import-pads-powerpcb-v5;' \
;
DEV:
Grid Default;
ASSIGN A+C CONNECT;
ASSIGN A+P PACKAGE;
MENU '[designlink22.png] Search and order : Run designlink-order.ulp -general;' \
'[LTspice.png] LT Spice simulation {\
Export: RUN ltspice.ulp /E; |\
SpiceOrder : RUN spiceorder.ulp; |\
SpiceModel: ATTRIBUTE SPICEMODEL |\
Value2: ATTRIBUTE VALUE2 |\
Import: RUN ltspice.ulp /I; \
}'\
'[pads-pcb.png] PADS package import : RUN import-pads-powerpcb-v5;'\
;
SYM:
Grid Default On;
Change Width 0.010;
ASSIGN A+P PIN;
MENU '[LTspice.png] LT Spice simulation {\
Export: RUN ltspice.ulp /E; |\
SpiceOrder : RUN spiceorder.ulp; |\
Import: RUN ltspice.ulp /I; \
}'\
;
PAC:
Grid Default On;
Change Width 0.005;
Change Size 0.050;
ASSIGN C+H HOLE;
ASSIGN A+P PAD;
ASSIGN A+S SMD;
MENU '[LTspice.png] LT Spice simulation {\
Import: RUN ltspice.ulp /I; \
}'\
'[pads-pcb.png] PADS package import : RUN import-pads-powerpcb-v5;' \
;
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