Created
April 28, 2017 17:20
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Args: ./debug/bin/llc -debug testcases/ran-out-of-reg.ll | |
Features: | |
CPU:avr2 | |
********** Begin Constant Hoisting ********** | |
********** Function: _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E | |
********** End Constant Hoisting ********** | |
CGP: Found local addrmode: [Base:%2] | |
CGP: Found local addrmode: [Base:%4] | |
CGP: Found local addrmode: [Base:%2] | |
CGP: Found local addrmode: [Base:%4] | |
[SafeStack] Function: _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E | |
[SafeStack] safestack is not requested for this function | |
---- Branch Probability Info : _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E ---- | |
Computing probabilities for bb4 | |
Computing probabilities for _ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit | |
Computing probabilities for bb2 | |
Computing probabilities for bb3 | |
Computing probabilities for start | |
set edge start -> 0 successor probability to 0x000002ab / 0x80000000 = 0.00% | |
set edge start -> 2 successor probability to 0x000002ab / 0x80000000 = 0.00% | |
set edge start -> 3 successor probability to 0x000002ab / 0x80000000 = 0.00% | |
set edge start -> 1 successor probability to 0x7ffff800 / 0x80000000 = 100.00% | |
=== _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E | |
Case clusters: 0 1 2 | |
Initial selection DAG: BB#0 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 13 nodes: | |
t0: ch = EntryToken | |
t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
t3: i2 = undef | |
t7: ch = seteq | |
t6: ch = CopyToReg t0, Register:i8 %vreg1, Constant:i8<0> | |
t10: ch = brcond t6, Constant:i1<-1>, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
t12: ch = br t10, BasicBlock:ch<start 0x7fa455030748> | |
Combining: t12: ch = br t10, BasicBlock:ch<start 0x7fa455030748> | |
Combining: t11: ch = BasicBlock<start 0x7fa455030748> | |
Combining: t10: ch = brcond t6, Constant:i1<-1>, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
Combining: t9: ch = BasicBlock<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
Combining: t8: i1 = Constant<-1> | |
Combining: t6: ch = CopyToReg t0, Register:i8 %vreg1, Constant:i8<0> | |
Combining: t5: i8 = Register %vreg1 | |
Combining: t4: i8 = Constant<0> | |
Combining: t0: ch = EntryToken | |
Optimized lowered selection DAG: BB#0 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 9 nodes: | |
t0: ch = EntryToken | |
t6: ch = CopyToReg t0, Register:i8 %vreg1, Constant:i8<0> | |
t10: ch = brcond t6, Constant:i1<-1>, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
t12: ch = br t10, BasicBlock:ch<start 0x7fa455030748> | |
Legally typed node: t11: ch = BasicBlock<start 0x7fa455030748> | |
Legally typed node: t9: ch = BasicBlock<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
Promote integer result: t8: i1 = Constant<-1> | |
Legally typed node: t13: i8 = Constant<1> | |
Legally typed node: t5: i8 = Register %vreg1 | |
Legally typed node: t4: i8 = Constant<0> | |
Legally typed node: t0: ch = EntryToken | |
Legally typed node: t6: ch = CopyToReg t0, Register:i8 %vreg1, Constant:i8<0> | |
Promote integer operand: t10: ch = brcond t6, Constant:i1<-1>, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
Legally typed node: t10: ch = brcond t6, Constant:i8<1>, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
Legally typed node: t12: ch = br t10, BasicBlock:ch<start 0x7fa455030748> | |
Legally typed node: t65535: ch = handlenode t12 | |
Type-legalized selection DAG: BB#0 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 9 nodes: | |
t0: ch = EntryToken | |
t6: ch = CopyToReg t0, Register:i8 %vreg1, Constant:i8<0> | |
t10: ch = brcond t6, Constant:i8<1>, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
t12: ch = br t10, BasicBlock:ch<start 0x7fa455030748> | |
Combining: t13: i8 = Constant<1> | |
Combining: t12: ch = br t10, BasicBlock:ch<start 0x7fa455030748> | |
Combining: t11: ch = BasicBlock<start 0x7fa455030748> | |
Combining: t10: ch = brcond t6, Constant:i8<1>, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
Combining: t9: ch = BasicBlock<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
Combining: t6: ch = CopyToReg t0, Register:i8 %vreg1, Constant:i8<0> | |
Combining: t5: i8 = Register %vreg1 | |
Combining: t4: i8 = Constant<0> | |
Combining: t0: ch = EntryToken | |
Optimized type-legalized selection DAG: BB#0 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 9 nodes: | |
t0: ch = EntryToken | |
t6: ch = CopyToReg t0, Register:i8 %vreg1, Constant:i8<0> | |
t10: ch = brcond t6, Constant:i8<1>, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
t12: ch = br t10, BasicBlock:ch<start 0x7fa455030748> | |
Legalizing: t12: ch = br t10, BasicBlock:ch<start 0x7fa455030748> | |
Legalizing: t10: ch = brcond t6, Constant:i8<1>, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
... replacing: t10: ch = brcond t6, Constant:i8<1>, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
with: t15: ch = br_cc t6, setne:ch, Constant:i8<1>, Constant:i8<0>, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
Legalizing: t6: ch = CopyToReg t0, Register:i8 %vreg1, Constant:i8<0> | |
Legalizing: t13: i8 = Constant<1> | |
Legalizing: t11: ch = BasicBlock<start 0x7fa455030748> | |
Legalizing: t9: ch = BasicBlock<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
Legalizing: t5: i8 = Register %vreg1 | |
Legalizing: t4: i8 = Constant<0> | |
Legalizing: t0: ch = EntryToken | |
Legalizing: t15: ch = br_cc t6, setne:ch, Constant:i8<1>, Constant:i8<0>, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
... replacing: t15: ch = br_cc t6, setne:ch, Constant:i8<1>, Constant:i8<0>, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
with: t17: ch = BRCOND t6, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488>, Constant:i8<1>, t16 | |
Legalizing: t17: ch = BRCOND t6, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488>, Constant:i8<1>, t16 | |
Legalizing: t16: glue = CMP Constant:i8<1>, Constant:i8<0> | |
Legalized selection DAG: BB#0 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 10 nodes: | |
t0: ch = EntryToken | |
t6: ch = CopyToReg t0, Register:i8 %vreg1, Constant:i8<0> | |
t16: glue = CMP Constant:i8<1>, Constant:i8<0> | |
t17: ch = BRCOND t6, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488>, Constant:i8<1>, t16 | |
t12: ch = br t17, BasicBlock:ch<start 0x7fa455030748> | |
Legalizing: t17: ch = BRCOND t6, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488>, Constant:i8<1>, t16 | |
Combining: t17: ch = BRCOND t6, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488>, Constant:i8<1>, t16 | |
Legalizing: t16: glue = CMP Constant:i8<1>, Constant:i8<0> | |
Combining: t16: glue = CMP Constant:i8<1>, Constant:i8<0> | |
Legalizing: t12: ch = br t17, BasicBlock:ch<start 0x7fa455030748> | |
Combining: t12: ch = br t17, BasicBlock:ch<start 0x7fa455030748> | |
Legalizing: t6: ch = CopyToReg t0, Register:i8 %vreg1, Constant:i8<0> | |
Combining: t6: ch = CopyToReg t0, Register:i8 %vreg1, Constant:i8<0> | |
Legalizing: t13: i8 = Constant<1> | |
Combining: t13: i8 = Constant<1> | |
Legalizing: t11: ch = BasicBlock<start 0x7fa455030748> | |
Combining: t11: ch = BasicBlock<start 0x7fa455030748> | |
Legalizing: t9: ch = BasicBlock<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
Combining: t9: ch = BasicBlock<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
Legalizing: t5: i8 = Register %vreg1 | |
Combining: t5: i8 = Register %vreg1 | |
Legalizing: t4: i8 = Constant<0> | |
Combining: t4: i8 = Constant<0> | |
Legalizing: t0: ch = EntryToken | |
Combining: t0: ch = EntryToken | |
Optimized legalized selection DAG: BB#0 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 10 nodes: | |
t0: ch = EntryToken | |
t6: ch = CopyToReg t0, Register:i8 %vreg1, Constant:i8<0> | |
t16: glue = CMP Constant:i8<1>, Constant:i8<0> | |
t17: ch = BRCOND t6, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488>, Constant:i8<1>, t16 | |
t12: ch = br t17, BasicBlock:ch<start 0x7fa455030748> | |
===== Instruction selection begins: BB#0 'start' | |
Selecting: t12: ch = br t17, BasicBlock:ch<start 0x7fa455030748> | |
ISEL: Starting pattern match on root node: t12: ch = br t17, BasicBlock:ch<start 0x7fa455030748> | |
Morphed node: t12: ch = RJMPk BasicBlock:ch<start 0x7fa455030748>, t17 | |
ISEL: Match complete! | |
Selecting: t17: ch = BRCOND t6, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488>, Constant:i8<1>, t16 | |
ISEL: Starting pattern match on root node: t17: ch = BRCOND t6, BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488>, Constant:i8<1>, t16 | |
Initial Opcode index to 1212 | |
Skipped scope entry (due to false predicate) at index 1222, continuing at 1231 | |
Morphed node: t17: ch = BRNEk BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488>, t6, t16 | |
ISEL: Match complete! | |
Selecting: t16: glue = CMP Constant:i8<1>, Constant:i8<0> | |
ISEL: Starting pattern match on root node: t16: glue = CMP Constant:i8<1>, Constant:i8<0> | |
Initial Opcode index to 1600 | |
Morphed node: t16: i8,glue = CPIRdK Constant:i8<1>, TargetConstant:i8<0> | |
ISEL: Match complete! | |
Selecting: t6: ch = CopyToReg t0, Register:i8 %vreg1, Constant:i8<0> | |
Selecting: t13: i8 = Constant<1> | |
ISEL: Starting pattern match on root node: t13: i8 = Constant<1> | |
Initial Opcode index to 2269 | |
TypeSwitch[i8] from 2270 to 2273 | |
Morphed node: t13: i8 = LDIRdK TargetConstant:i8<1> | |
ISEL: Match complete! | |
Selecting: t11: ch = BasicBlock<start 0x7fa455030748> | |
Selecting: t9: ch = BasicBlock<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488> | |
Selecting: t5: i8 = Register %vreg1 | |
Selecting: t4: i8 = Constant<0> | |
ISEL: Starting pattern match on root node: t4: i8 = Constant<0> | |
Initial Opcode index to 2269 | |
TypeSwitch[i8] from 2270 to 2273 | |
Morphed node: t4: i8 = LDIRdK TargetConstant:i8<0> | |
ISEL: Match complete! | |
Selecting: t0: ch = EntryToken | |
===== Instruction selection ends: | |
Selected selection DAG: BB#0 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 12 nodes: | |
t0: ch = EntryToken | |
t4: i8 = LDIRdK TargetConstant:i8<0> | |
t6: ch = CopyToReg t0, Register:i8 %vreg1, t4 | |
t13: i8 = LDIRdK TargetConstant:i8<1> | |
t16: i8,glue = CPIRdK t13, TargetConstant:i8<0> | |
t17: ch = BRNEk BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488>, t6, t16:1 | |
t12: ch = RJMPk BasicBlock:ch<start 0x7fa455030748>, t17 | |
********** List Scheduling BB#0 'start' ********** | |
SU(0): t12: ch = RJMPk BasicBlock:ch<start 0x7fa455030748>, t17 | |
# preds left : 1 | |
# succs left : 0 | |
# rdefs left : 0 | |
Latency : 1 | |
Depth : 3 | |
Height : 0 | |
Predecessors: | |
ord SU(1): Latency=1 | |
SU(1): t17: ch = BRNEk BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488>, t6, t16:1 | |
t16: i8,glue = CPIRdK t13, TargetConstant:i8<0> | |
# preds left : 2 | |
# succs left : 1 | |
# rdefs left : 0 | |
Latency : 1 | |
Depth : 2 | |
Height : 1 | |
Predecessors: | |
ord SU(3): Latency=1 | |
data SU(2): Latency=1 | |
Successors: | |
ord SU(0): Latency=1 | |
SU(2): t13: i8 = LDIRdK TargetConstant:i8<1> | |
# preds left : 0 | |
# succs left : 1 | |
# rdefs left : 1 | |
Latency : 1 | |
Depth : 0 | |
Height : 2 | |
Successors: | |
data SU(1): Latency=1 | |
SU(3): t6: ch = CopyToReg t0, Register:i8 %vreg1, t4 | |
# preds left : 1 | |
# succs left : 1 | |
# rdefs left : 0 | |
Latency : 1 | |
Depth : 1 | |
Height : 2 | |
Predecessors: | |
data SU(4): Latency=1 | |
Successors: | |
ord SU(1): Latency=1 | |
SU(4): t4: i8 = LDIRdK TargetConstant:i8<0> | |
# preds left : 0 | |
# succs left : 1 | |
# rdefs left : 1 | |
Latency : 1 | |
Depth : 0 | |
Height : 3 | |
Successors: | |
data SU(3): Latency=1 | |
Examining Available: | |
Height 0: SU(0): t12: ch = RJMPk BasicBlock:ch<start 0x7fa455030748>, t17 | |
*** Scheduling [0]: SU(0): t12: ch = RJMPk BasicBlock:ch<start 0x7fa455030748>, t17 | |
Examining Available: | |
Height 1: SU(1): t17: ch = BRNEk BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488>, t6, t16:1 | |
t16: i8,glue = CPIRdK t13, TargetConstant:i8<0> | |
*** Scheduling [1]: SU(1): t17: ch = BRNEk BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488>, t6, t16:1 | |
t16: i8,glue = CPIRdK t13, TargetConstant:i8<0> | |
Examining Available: | |
Height 2: SU(2): t13: i8 = LDIRdK TargetConstant:i8<1> | |
Height 2: SU(3): t6: ch = CopyToReg t0, Register:i8 %vreg1, t4 | |
*** Scheduling [2]: SU(2): t13: i8 = LDIRdK TargetConstant:i8<1> | |
Examining Available: | |
Height 2: SU(3): t6: ch = CopyToReg t0, Register:i8 %vreg1, t4 | |
*** Scheduling [3]: SU(3): t6: ch = CopyToReg t0, Register:i8 %vreg1, t4 | |
Examining Available: | |
Height 4: SU(4): t4: i8 = LDIRdK TargetConstant:i8<0> | |
*** Scheduling [4]: SU(4): t4: i8 = LDIRdK TargetConstant:i8<0> | |
*** Final schedule *** | |
SU(4): t4: i8 = LDIRdK TargetConstant:i8<0> | |
SU(3): t6: ch = CopyToReg t0, Register:i8 %vreg1, t4 | |
SU(2): t13: i8 = LDIRdK TargetConstant:i8<1> | |
SU(1): t17: ch = BRNEk BasicBlock:ch<_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit 0x7fa455030488>, t6, t16:1 | |
t16: i8,glue = CPIRdK t13, TargetConstant:i8<0> | |
SU(0): t12: ch = RJMPk BasicBlock:ch<start 0x7fa455030748>, t17 | |
Total amount of phi nodes to update: 0 | |
Initial selection DAG: BB#5 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 11 nodes: | |
t0: ch = EntryToken | |
t2: i8,ch = CopyFromReg t0, Register:i8 %vreg1 | |
t3: i8 = Constant<0> | |
t4: i8 = Constant<1> | |
t5: ch = seteq | |
t8: ch = brcond t0, Constant:i1<0>, BasicBlock:ch<bb2 0x7fa455030538> | |
t10: ch = br t8, BasicBlock:ch<start 0x7fa4550307f8> | |
Combining: t10: ch = br t8, BasicBlock:ch<start 0x7fa4550307f8> | |
Combining: t9: ch = BasicBlock<start 0x7fa4550307f8> | |
Combining: t8: ch = brcond t0, Constant:i1<0>, BasicBlock:ch<bb2 0x7fa455030538> | |
Combining: t7: ch = BasicBlock<bb2 0x7fa455030538> | |
Combining: t6: i1 = Constant<0> | |
Combining: t0: ch = EntryToken | |
Optimized lowered selection DAG: BB#5 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 6 nodes: | |
t0: ch = EntryToken | |
t8: ch = brcond t0, Constant:i1<0>, BasicBlock:ch<bb2 0x7fa455030538> | |
t10: ch = br t8, BasicBlock:ch<start 0x7fa4550307f8> | |
Legally typed node: t9: ch = BasicBlock<start 0x7fa4550307f8> | |
Legally typed node: t7: ch = BasicBlock<bb2 0x7fa455030538> | |
Promote integer result: t6: i1 = Constant<0> | |
Legally typed node: t11: i8 = Constant<0> | |
Legally typed node: t0: ch = EntryToken | |
Promote integer operand: t8: ch = brcond t0, Constant:i1<0>, BasicBlock:ch<bb2 0x7fa455030538> | |
Legally typed node: t8: ch = brcond t0, Constant:i8<0>, BasicBlock:ch<bb2 0x7fa455030538> | |
Legally typed node: t10: ch = br t8, BasicBlock:ch<start 0x7fa4550307f8> | |
Legally typed node: t65535: ch = handlenode t10 | |
Type-legalized selection DAG: BB#5 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 6 nodes: | |
t0: ch = EntryToken | |
t8: ch = brcond t0, Constant:i8<0>, BasicBlock:ch<bb2 0x7fa455030538> | |
t10: ch = br t8, BasicBlock:ch<start 0x7fa4550307f8> | |
Combining: t11: i8 = Constant<0> | |
Combining: t10: ch = br t8, BasicBlock:ch<start 0x7fa4550307f8> | |
Combining: t9: ch = BasicBlock<start 0x7fa4550307f8> | |
Combining: t8: ch = brcond t0, Constant:i8<0>, BasicBlock:ch<bb2 0x7fa455030538> | |
Combining: t7: ch = BasicBlock<bb2 0x7fa455030538> | |
Combining: t0: ch = EntryToken | |
Optimized type-legalized selection DAG: BB#5 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 6 nodes: | |
t0: ch = EntryToken | |
t8: ch = brcond t0, Constant:i8<0>, BasicBlock:ch<bb2 0x7fa455030538> | |
t10: ch = br t8, BasicBlock:ch<start 0x7fa4550307f8> | |
Legalizing: t10: ch = br t8, BasicBlock:ch<start 0x7fa4550307f8> | |
Legalizing: t8: ch = brcond t0, Constant:i8<0>, BasicBlock:ch<bb2 0x7fa455030538> | |
... replacing: t8: ch = brcond t0, Constant:i8<0>, BasicBlock:ch<bb2 0x7fa455030538> | |
with: t14: ch = br_cc t0, setne:ch, Constant:i8<0>, Constant:i8<0>, BasicBlock:ch<bb2 0x7fa455030538> | |
Legalizing: t11: i8 = Constant<0> | |
Legalizing: t9: ch = BasicBlock<start 0x7fa4550307f8> | |
Legalizing: t7: ch = BasicBlock<bb2 0x7fa455030538> | |
Legalizing: t0: ch = EntryToken | |
Legalizing: t14: ch = br_cc t0, setne:ch, Constant:i8<0>, Constant:i8<0>, BasicBlock:ch<bb2 0x7fa455030538> | |
... replacing: t14: ch = br_cc t0, setne:ch, Constant:i8<0>, Constant:i8<0>, BasicBlock:ch<bb2 0x7fa455030538> | |
with: t16: ch = BRCOND t0, BasicBlock:ch<bb2 0x7fa455030538>, Constant:i8<1>, t15 | |
Legalizing: t12: i8 = Constant<1> | |
Legalizing: t16: ch = BRCOND t0, BasicBlock:ch<bb2 0x7fa455030538>, Constant:i8<1>, t15 | |
Legalizing: t15: glue = CMP Constant:i8<0>, Constant:i8<0> | |
Legalized selection DAG: BB#5 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 8 nodes: | |
t0: ch = EntryToken | |
t15: glue = CMP Constant:i8<0>, Constant:i8<0> | |
t16: ch = BRCOND t0, BasicBlock:ch<bb2 0x7fa455030538>, Constant:i8<1>, t15 | |
t10: ch = br t16, BasicBlock:ch<start 0x7fa4550307f8> | |
Legalizing: t16: ch = BRCOND t0, BasicBlock:ch<bb2 0x7fa455030538>, Constant:i8<1>, t15 | |
Combining: t16: ch = BRCOND t0, BasicBlock:ch<bb2 0x7fa455030538>, Constant:i8<1>, t15 | |
Legalizing: t15: glue = CMP Constant:i8<0>, Constant:i8<0> | |
Combining: t15: glue = CMP Constant:i8<0>, Constant:i8<0> | |
Legalizing: t12: i8 = Constant<1> | |
Combining: t12: i8 = Constant<1> | |
Legalizing: t10: ch = br t16, BasicBlock:ch<start 0x7fa4550307f8> | |
Combining: t10: ch = br t16, BasicBlock:ch<start 0x7fa4550307f8> | |
Legalizing: t11: i8 = Constant<0> | |
Combining: t11: i8 = Constant<0> | |
Legalizing: t9: ch = BasicBlock<start 0x7fa4550307f8> | |
Combining: t9: ch = BasicBlock<start 0x7fa4550307f8> | |
Legalizing: t7: ch = BasicBlock<bb2 0x7fa455030538> | |
Combining: t7: ch = BasicBlock<bb2 0x7fa455030538> | |
Legalizing: t0: ch = EntryToken | |
Combining: t0: ch = EntryToken | |
Optimized legalized selection DAG: BB#5 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 8 nodes: | |
t0: ch = EntryToken | |
t15: glue = CMP Constant:i8<0>, Constant:i8<0> | |
t16: ch = BRCOND t0, BasicBlock:ch<bb2 0x7fa455030538>, Constant:i8<1>, t15 | |
t10: ch = br t16, BasicBlock:ch<start 0x7fa4550307f8> | |
===== Instruction selection begins: BB#5 'start' | |
Selecting: t10: ch = br t16, BasicBlock:ch<start 0x7fa4550307f8> | |
ISEL: Starting pattern match on root node: t10: ch = br t16, BasicBlock:ch<start 0x7fa4550307f8> | |
Initial Opcode index to 2199 | |
Morphed node: t10: ch = RJMPk BasicBlock:ch<start 0x7fa4550307f8>, t16 | |
ISEL: Match complete! | |
Selecting: t16: ch = BRCOND t0, BasicBlock:ch<bb2 0x7fa455030538>, Constant:i8<1>, t15 | |
ISEL: Starting pattern match on root node: t16: ch = BRCOND t0, BasicBlock:ch<bb2 0x7fa455030538>, Constant:i8<1>, t15 | |
Initial Opcode index to 1212 | |
Skipped scope entry (due to false predicate) at index 1222, continuing at 1231 | |
Morphed node: t16: ch = BRNEk BasicBlock:ch<bb2 0x7fa455030538>, t0, t15 | |
ISEL: Match complete! | |
Selecting: t15: glue = CMP Constant:i8<0>, Constant:i8<0> | |
ISEL: Starting pattern match on root node: t15: glue = CMP Constant:i8<0>, Constant:i8<0> | |
Initial Opcode index to 1600 | |
Morphed node: t15: i8,glue = CPIRdK Constant:i8<0>, TargetConstant:i8<0> | |
ISEL: Match complete! | |
Selecting: t11: i8 = Constant<0> | |
ISEL: Starting pattern match on root node: t11: i8 = Constant<0> | |
Initial Opcode index to 2269 | |
TypeSwitch[i8] from 2270 to 2273 | |
Morphed node: t11: i8 = LDIRdK TargetConstant:i8<0> | |
ISEL: Match complete! | |
Selecting: t9: ch = BasicBlock<start 0x7fa4550307f8> | |
Selecting: t7: ch = BasicBlock<bb2 0x7fa455030538> | |
Selecting: t0: ch = EntryToken | |
===== Instruction selection ends: | |
Selected selection DAG: BB#5 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 8 nodes: | |
t0: ch = EntryToken | |
t11: i8 = LDIRdK TargetConstant:i8<0> | |
t15: i8,glue = CPIRdK t11, TargetConstant:i8<0> | |
t16: ch = BRNEk BasicBlock:ch<bb2 0x7fa455030538>, t0, t15:1 | |
t10: ch = RJMPk BasicBlock:ch<start 0x7fa4550307f8>, t16 | |
********** List Scheduling BB#5 'start' ********** | |
SU(0): t10: ch = RJMPk BasicBlock:ch<start 0x7fa4550307f8>, t16 | |
# preds left : 1 | |
# succs left : 0 | |
# rdefs left : 0 | |
Latency : 1 | |
Depth : 2 | |
Height : 0 | |
Predecessors: | |
ord SU(1): Latency=1 | |
SU(1): t16: ch = BRNEk BasicBlock:ch<bb2 0x7fa455030538>, t0, t15:1 | |
t15: i8,glue = CPIRdK t11, TargetConstant:i8<0> | |
# preds left : 1 | |
# succs left : 1 | |
# rdefs left : 0 | |
Latency : 1 | |
Depth : 1 | |
Height : 1 | |
Predecessors: | |
data SU(2): Latency=1 | |
Successors: | |
ord SU(0): Latency=1 | |
SU(2): t11: i8 = LDIRdK TargetConstant:i8<0> | |
# preds left : 0 | |
# succs left : 1 | |
# rdefs left : 1 | |
Latency : 1 | |
Depth : 0 | |
Height : 2 | |
Successors: | |
data SU(1): Latency=1 | |
Examining Available: | |
Height 0: SU(0): t10: ch = RJMPk BasicBlock:ch<start 0x7fa4550307f8>, t16 | |
*** Scheduling [0]: SU(0): t10: ch = RJMPk BasicBlock:ch<start 0x7fa4550307f8>, t16 | |
Examining Available: | |
Height 1: SU(1): t16: ch = BRNEk BasicBlock:ch<bb2 0x7fa455030538>, t0, t15:1 | |
t15: i8,glue = CPIRdK t11, TargetConstant:i8<0> | |
*** Scheduling [1]: SU(1): t16: ch = BRNEk BasicBlock:ch<bb2 0x7fa455030538>, t0, t15:1 | |
t15: i8,glue = CPIRdK t11, TargetConstant:i8<0> | |
Examining Available: | |
Height 2: SU(2): t11: i8 = LDIRdK TargetConstant:i8<0> | |
*** Scheduling [2]: SU(2): t11: i8 = LDIRdK TargetConstant:i8<0> | |
*** Final schedule *** | |
SU(2): t11: i8 = LDIRdK TargetConstant:i8<0> | |
SU(1): t16: ch = BRNEk BasicBlock:ch<bb2 0x7fa455030538>, t0, t15:1 | |
t15: i8,glue = CPIRdK t11, TargetConstant:i8<0> | |
SU(0): t10: ch = RJMPk BasicBlock:ch<start 0x7fa4550307f8>, t16 | |
Initial selection DAG: BB#6 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 11 nodes: | |
t0: ch = EntryToken | |
t2: i8,ch = CopyFromReg t0, Register:i8 %vreg1 | |
t3: i8 = Constant<0> | |
t4: i8 = Constant<2> | |
t5: ch = seteq | |
t8: ch = brcond t0, Constant:i1<0>, BasicBlock:ch<bb3 0x7fa4550305e8> | |
t10: ch = br t8, BasicBlock:ch<bb4 0x7fa455030698> | |
Combining: t10: ch = br t8, BasicBlock:ch<bb4 0x7fa455030698> | |
Combining: t9: ch = BasicBlock<bb4 0x7fa455030698> | |
Combining: t8: ch = brcond t0, Constant:i1<0>, BasicBlock:ch<bb3 0x7fa4550305e8> | |
Combining: t7: ch = BasicBlock<bb3 0x7fa4550305e8> | |
Combining: t6: i1 = Constant<0> | |
Combining: t0: ch = EntryToken | |
Optimized lowered selection DAG: BB#6 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 6 nodes: | |
t0: ch = EntryToken | |
t8: ch = brcond t0, Constant:i1<0>, BasicBlock:ch<bb3 0x7fa4550305e8> | |
t10: ch = br t8, BasicBlock:ch<bb4 0x7fa455030698> | |
Legally typed node: t9: ch = BasicBlock<bb4 0x7fa455030698> | |
Legally typed node: t7: ch = BasicBlock<bb3 0x7fa4550305e8> | |
Promote integer result: t6: i1 = Constant<0> | |
Legally typed node: t11: i8 = Constant<0> | |
Legally typed node: t0: ch = EntryToken | |
Promote integer operand: t8: ch = brcond t0, Constant:i1<0>, BasicBlock:ch<bb3 0x7fa4550305e8> | |
Legally typed node: t8: ch = brcond t0, Constant:i8<0>, BasicBlock:ch<bb3 0x7fa4550305e8> | |
Legally typed node: t10: ch = br t8, BasicBlock:ch<bb4 0x7fa455030698> | |
Legally typed node: t65535: ch = handlenode t10 | |
Type-legalized selection DAG: BB#6 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 6 nodes: | |
t0: ch = EntryToken | |
t8: ch = brcond t0, Constant:i8<0>, BasicBlock:ch<bb3 0x7fa4550305e8> | |
t10: ch = br t8, BasicBlock:ch<bb4 0x7fa455030698> | |
Combining: t11: i8 = Constant<0> | |
Combining: t10: ch = br t8, BasicBlock:ch<bb4 0x7fa455030698> | |
Combining: t9: ch = BasicBlock<bb4 0x7fa455030698> | |
Combining: t8: ch = brcond t0, Constant:i8<0>, BasicBlock:ch<bb3 0x7fa4550305e8> | |
Combining: t7: ch = BasicBlock<bb3 0x7fa4550305e8> | |
Combining: t0: ch = EntryToken | |
Optimized type-legalized selection DAG: BB#6 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 6 nodes: | |
t0: ch = EntryToken | |
t8: ch = brcond t0, Constant:i8<0>, BasicBlock:ch<bb3 0x7fa4550305e8> | |
t10: ch = br t8, BasicBlock:ch<bb4 0x7fa455030698> | |
Legalizing: t10: ch = br t8, BasicBlock:ch<bb4 0x7fa455030698> | |
Legalizing: t8: ch = brcond t0, Constant:i8<0>, BasicBlock:ch<bb3 0x7fa4550305e8> | |
... replacing: t8: ch = brcond t0, Constant:i8<0>, BasicBlock:ch<bb3 0x7fa4550305e8> | |
with: t14: ch = br_cc t0, setne:ch, Constant:i8<0>, Constant:i8<0>, BasicBlock:ch<bb3 0x7fa4550305e8> | |
Legalizing: t11: i8 = Constant<0> | |
Legalizing: t9: ch = BasicBlock<bb4 0x7fa455030698> | |
Legalizing: t7: ch = BasicBlock<bb3 0x7fa4550305e8> | |
Legalizing: t0: ch = EntryToken | |
Legalizing: t14: ch = br_cc t0, setne:ch, Constant:i8<0>, Constant:i8<0>, BasicBlock:ch<bb3 0x7fa4550305e8> | |
... replacing: t14: ch = br_cc t0, setne:ch, Constant:i8<0>, Constant:i8<0>, BasicBlock:ch<bb3 0x7fa4550305e8> | |
with: t16: ch = BRCOND t0, BasicBlock:ch<bb3 0x7fa4550305e8>, Constant:i8<1>, t15 | |
Legalizing: t12: i8 = Constant<1> | |
Legalizing: t16: ch = BRCOND t0, BasicBlock:ch<bb3 0x7fa4550305e8>, Constant:i8<1>, t15 | |
Legalizing: t15: glue = CMP Constant:i8<0>, Constant:i8<0> | |
Legalized selection DAG: BB#6 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 8 nodes: | |
t0: ch = EntryToken | |
t15: glue = CMP Constant:i8<0>, Constant:i8<0> | |
t16: ch = BRCOND t0, BasicBlock:ch<bb3 0x7fa4550305e8>, Constant:i8<1>, t15 | |
t10: ch = br t16, BasicBlock:ch<bb4 0x7fa455030698> | |
Legalizing: t16: ch = BRCOND t0, BasicBlock:ch<bb3 0x7fa4550305e8>, Constant:i8<1>, t15 | |
Combining: t16: ch = BRCOND t0, BasicBlock:ch<bb3 0x7fa4550305e8>, Constant:i8<1>, t15 | |
Legalizing: t15: glue = CMP Constant:i8<0>, Constant:i8<0> | |
Combining: t15: glue = CMP Constant:i8<0>, Constant:i8<0> | |
Legalizing: t12: i8 = Constant<1> | |
Combining: t12: i8 = Constant<1> | |
Legalizing: t10: ch = br t16, BasicBlock:ch<bb4 0x7fa455030698> | |
Combining: t10: ch = br t16, BasicBlock:ch<bb4 0x7fa455030698> | |
Legalizing: t11: i8 = Constant<0> | |
Combining: t11: i8 = Constant<0> | |
Legalizing: t9: ch = BasicBlock<bb4 0x7fa455030698> | |
Combining: t9: ch = BasicBlock<bb4 0x7fa455030698> | |
Legalizing: t7: ch = BasicBlock<bb3 0x7fa4550305e8> | |
Combining: t7: ch = BasicBlock<bb3 0x7fa4550305e8> | |
Legalizing: t0: ch = EntryToken | |
Combining: t0: ch = EntryToken | |
Optimized legalized selection DAG: BB#6 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 8 nodes: | |
t0: ch = EntryToken | |
t15: glue = CMP Constant:i8<0>, Constant:i8<0> | |
t16: ch = BRCOND t0, BasicBlock:ch<bb3 0x7fa4550305e8>, Constant:i8<1>, t15 | |
t10: ch = br t16, BasicBlock:ch<bb4 0x7fa455030698> | |
===== Instruction selection begins: BB#6 'start' | |
Selecting: t10: ch = br t16, BasicBlock:ch<bb4 0x7fa455030698> | |
ISEL: Starting pattern match on root node: t10: ch = br t16, BasicBlock:ch<bb4 0x7fa455030698> | |
Initial Opcode index to 2199 | |
Morphed node: t10: ch = RJMPk BasicBlock:ch<bb4 0x7fa455030698>, t16 | |
ISEL: Match complete! | |
Selecting: t16: ch = BRCOND t0, BasicBlock:ch<bb3 0x7fa4550305e8>, Constant:i8<1>, t15 | |
ISEL: Starting pattern match on root node: t16: ch = BRCOND t0, BasicBlock:ch<bb3 0x7fa4550305e8>, Constant:i8<1>, t15 | |
Initial Opcode index to 1212 | |
Skipped scope entry (due to false predicate) at index 1222, continuing at 1231 | |
Morphed node: t16: ch = BRNEk BasicBlock:ch<bb3 0x7fa4550305e8>, t0, t15 | |
ISEL: Match complete! | |
Selecting: t15: glue = CMP Constant:i8<0>, Constant:i8<0> | |
ISEL: Starting pattern match on root node: t15: glue = CMP Constant:i8<0>, Constant:i8<0> | |
Initial Opcode index to 1600 | |
Morphed node: t15: i8,glue = CPIRdK Constant:i8<0>, TargetConstant:i8<0> | |
ISEL: Match complete! | |
Selecting: t11: i8 = Constant<0> | |
ISEL: Starting pattern match on root node: t11: i8 = Constant<0> | |
Initial Opcode index to 2269 | |
TypeSwitch[i8] from 2270 to 2273 | |
Morphed node: t11: i8 = LDIRdK TargetConstant:i8<0> | |
ISEL: Match complete! | |
Selecting: t9: ch = BasicBlock<bb4 0x7fa455030698> | |
Selecting: t7: ch = BasicBlock<bb3 0x7fa4550305e8> | |
Selecting: t0: ch = EntryToken | |
===== Instruction selection ends: | |
Selected selection DAG: BB#6 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:start' | |
SelectionDAG has 8 nodes: | |
t0: ch = EntryToken | |
t11: i8 = LDIRdK TargetConstant:i8<0> | |
t15: i8,glue = CPIRdK t11, TargetConstant:i8<0> | |
t16: ch = BRNEk BasicBlock:ch<bb3 0x7fa4550305e8>, t0, t15:1 | |
t10: ch = RJMPk BasicBlock:ch<bb4 0x7fa455030698>, t16 | |
********** List Scheduling BB#6 'start' ********** | |
SU(0): t10: ch = RJMPk BasicBlock:ch<bb4 0x7fa455030698>, t16 | |
# preds left : 1 | |
# succs left : 0 | |
# rdefs left : 0 | |
Latency : 1 | |
Depth : 2 | |
Height : 0 | |
Predecessors: | |
ord SU(1): Latency=1 | |
SU(1): t16: ch = BRNEk BasicBlock:ch<bb3 0x7fa4550305e8>, t0, t15:1 | |
t15: i8,glue = CPIRdK t11, TargetConstant:i8<0> | |
# preds left : 1 | |
# succs left : 1 | |
# rdefs left : 0 | |
Latency : 1 | |
Depth : 1 | |
Height : 1 | |
Predecessors: | |
data SU(2): Latency=1 | |
Successors: | |
ord SU(0): Latency=1 | |
SU(2): t11: i8 = LDIRdK TargetConstant:i8<0> | |
# preds left : 0 | |
# succs left : 1 | |
# rdefs left : 1 | |
Latency : 1 | |
Depth : 0 | |
Height : 2 | |
Successors: | |
data SU(1): Latency=1 | |
Examining Available: | |
Height 0: SU(0): t10: ch = RJMPk BasicBlock:ch<bb4 0x7fa455030698>, t16 | |
*** Scheduling [0]: SU(0): t10: ch = RJMPk BasicBlock:ch<bb4 0x7fa455030698>, t16 | |
Examining Available: | |
Height 1: SU(1): t16: ch = BRNEk BasicBlock:ch<bb3 0x7fa4550305e8>, t0, t15:1 | |
t15: i8,glue = CPIRdK t11, TargetConstant:i8<0> | |
*** Scheduling [1]: SU(1): t16: ch = BRNEk BasicBlock:ch<bb3 0x7fa4550305e8>, t0, t15:1 | |
t15: i8,glue = CPIRdK t11, TargetConstant:i8<0> | |
Examining Available: | |
Height 2: SU(2): t11: i8 = LDIRdK TargetConstant:i8<0> | |
*** Scheduling [2]: SU(2): t11: i8 = LDIRdK TargetConstant:i8<0> | |
*** Final schedule *** | |
SU(2): t11: i8 = LDIRdK TargetConstant:i8<0> | |
SU(1): t16: ch = BRNEk BasicBlock:ch<bb3 0x7fa4550305e8>, t0, t15:1 | |
t15: i8,glue = CPIRdK t11, TargetConstant:i8<0> | |
SU(0): t10: ch = RJMPk BasicBlock:ch<bb4 0x7fa455030698>, t16 | |
Initial selection DAG: BB#3 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb3' | |
SelectionDAG has 1 nodes: | |
t0: ch = EntryToken | |
Combining: t0: ch = EntryToken | |
Optimized lowered selection DAG: BB#3 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb3' | |
SelectionDAG has 1 nodes: | |
t0: ch = EntryToken | |
Legally typed node: t0: ch = EntryToken | |
Legally typed node: t65535: ch = handlenode t0 | |
Type-legalized selection DAG: BB#3 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb3' | |
SelectionDAG has 1 nodes: | |
t0: ch = EntryToken | |
Legalizing: t0: ch = EntryToken | |
Legalized selection DAG: BB#3 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb3' | |
SelectionDAG has 1 nodes: | |
t0: ch = EntryToken | |
Legalizing: t0: ch = EntryToken | |
Combining: t0: ch = EntryToken | |
Optimized legalized selection DAG: BB#3 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb3' | |
SelectionDAG has 1 nodes: | |
t0: ch = EntryToken | |
===== Instruction selection begins: BB#3 'bb3' | |
Selecting: t0: ch = EntryToken | |
===== Instruction selection ends: | |
Selected selection DAG: BB#3 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb3' | |
SelectionDAG has 1 nodes: | |
t0: ch = EntryToken | |
********** List Scheduling BB#3 'bb3' ********** | |
*** Final schedule *** | |
Total amount of phi nodes to update: 0 | |
Initial selection DAG: BB#2 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb2' | |
SelectionDAG has 1 nodes: | |
t0: ch = EntryToken | |
Combining: t0: ch = EntryToken | |
Optimized lowered selection DAG: BB#2 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb2' | |
SelectionDAG has 1 nodes: | |
t0: ch = EntryToken | |
Legally typed node: t0: ch = EntryToken | |
Legally typed node: t65535: ch = handlenode t0 | |
Type-legalized selection DAG: BB#2 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb2' | |
SelectionDAG has 1 nodes: | |
t0: ch = EntryToken | |
Legalizing: t0: ch = EntryToken | |
Legalized selection DAG: BB#2 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb2' | |
SelectionDAG has 1 nodes: | |
t0: ch = EntryToken | |
Legalizing: t0: ch = EntryToken | |
Combining: t0: ch = EntryToken | |
Optimized legalized selection DAG: BB#2 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb2' | |
SelectionDAG has 1 nodes: | |
t0: ch = EntryToken | |
===== Instruction selection begins: BB#2 'bb2' | |
Selecting: t0: ch = EntryToken | |
===== Instruction selection ends: | |
Selected selection DAG: BB#2 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb2' | |
SelectionDAG has 1 nodes: | |
t0: ch = EntryToken | |
********** List Scheduling BB#2 'bb2' ********** | |
*** Final schedule *** | |
Total amount of phi nodes to update: 0 | |
Initial selection DAG: BB#1 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit' | |
SelectionDAG has 2 nodes: | |
t0: ch = EntryToken | |
t1: ch = RET_FLAG t0 | |
Combining: t1: ch = RET_FLAG t0 | |
Combining: t0: ch = EntryToken | |
Optimized lowered selection DAG: BB#1 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit' | |
SelectionDAG has 2 nodes: | |
t0: ch = EntryToken | |
t1: ch = RET_FLAG t0 | |
Legally typed node: t0: ch = EntryToken | |
Legally typed node: t1: ch = RET_FLAG t0 | |
Legally typed node: t65535: ch = handlenode t1 | |
Type-legalized selection DAG: BB#1 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit' | |
SelectionDAG has 2 nodes: | |
t0: ch = EntryToken | |
t1: ch = RET_FLAG t0 | |
Legalizing: t1: ch = RET_FLAG t0 | |
Legalizing: t0: ch = EntryToken | |
Legalized selection DAG: BB#1 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit' | |
SelectionDAG has 2 nodes: | |
t0: ch = EntryToken | |
t1: ch = RET_FLAG t0 | |
Legalizing: t1: ch = RET_FLAG t0 | |
Combining: t1: ch = RET_FLAG t0 | |
Legalizing: t0: ch = EntryToken | |
Combining: t0: ch = EntryToken | |
Optimized legalized selection DAG: BB#1 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit' | |
SelectionDAG has 2 nodes: | |
t0: ch = EntryToken | |
t1: ch = RET_FLAG t0 | |
===== Instruction selection begins: BB#1 '_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit' | |
Selecting: t1: ch = RET_FLAG t0 | |
ISEL: Starting pattern match on root node: t1: ch = RET_FLAG t0 | |
Initial Opcode index to 2216 | |
Morphed node: t1: ch = RET t0 | |
ISEL: Match complete! | |
Selecting: t0: ch = EntryToken | |
===== Instruction selection ends: | |
Selected selection DAG: BB#1 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit' | |
SelectionDAG has 2 nodes: | |
t0: ch = EntryToken | |
t1: ch = RET t0 | |
********** List Scheduling BB#1 '_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit' ********** | |
SU(0): t1: ch = RET t0 | |
# preds left : 0 | |
# succs left : 0 | |
# rdefs left : 0 | |
Latency : 1 | |
Depth : 0 | |
Height : 0 | |
Examining Available: | |
Height 0: SU(0): t1: ch = RET t0 | |
*** Scheduling [0]: SU(0): t1: ch = RET t0 | |
*** Final schedule *** | |
SU(0): t1: ch = RET t0 | |
Total amount of phi nodes to update: 0 | |
Initial selection DAG: BB#4 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb4' | |
SelectionDAG has 30 nodes: | |
t0: ch = EntryToken | |
t3: ch = ValueType:i16 | |
t8: i16 = Constant<0> | |
t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
t5: i16 = add t2, Constant:i16<16> | |
t7: i16 = add t5, Constant:i16<2> | |
t10: i16,ch = load<LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t0, t7, undef:i16 | |
t12: i16 = add t10, Constant:i16<6> | |
t13: i16,ch = load<LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t0, t12, undef:i16 | |
t16: ch = TokenFactor t10:1, t13:1 | |
t18: ch,glue = callseq_start t16, TargetConstant:i16<0> | |
t20: ch,glue = CopyToReg t18, Register:i16 %R25R24, undef:i16 | |
t22: ch,glue = CopyToReg t20, Register:i16 %R23R22, GlobalAddress:i16<[7 x i8]* @str.2y> 0, t20:1 | |
t24: ch,glue = CopyToReg t22, Register:i16 %R21R20, Constant:i16<7>, t22:1 | |
t26: ch,glue = CALL t24, t13, Register:i16 %R25R24, Register:i16 %R23R22, Register:i16 %R21R20, RegisterMask:Untyped, t24:1 | |
t27: ch,glue = callseq_end t26, TargetConstant:i16<0>, TargetConstant:i16<0>, t26:1 | |
t29: i8,ch,glue = CopyFromReg t27, Register:i8 %R24, t27:1 | |
Combining: t29: i8,ch,glue = CopyFromReg t27, Register:i8 %R24, t27:1 | |
Combining: t28: i8 = Register %R24 | |
Combining: t27: ch,glue = callseq_end t26, TargetConstant:i16<0>, TargetConstant:i16<0>, t26:1 | |
Combining: t26: ch,glue = CALL t24, t13, Register:i16 %R25R24, Register:i16 %R23R22, Register:i16 %R21R20, RegisterMask:Untyped, t24:1 | |
Combining: t25: Untyped = RegisterMask | |
Combining: t24: ch,glue = CopyToReg t22, Register:i16 %R21R20, Constant:i16<7>, t22:1 | |
Combining: t23: i16 = Register %R21R20 | |
Combining: t22: ch,glue = CopyToReg t20, Register:i16 %R23R22, GlobalAddress:i16<[7 x i8]* @str.2y> 0, t20:1 | |
Combining: t21: i16 = Register %R23R22 | |
Combining: t20: ch,glue = CopyToReg t18, Register:i16 %R25R24, undef:i16 | |
Combining: t19: i16 = Register %R25R24 | |
Combining: t18: ch,glue = callseq_start t16, TargetConstant:i16<0> | |
Combining: t17: i16 = TargetConstant<0> | |
Combining: t16: ch = TokenFactor t10:1, t13:1 | |
Combining: t15: i16 = Constant<7> | |
Combining: t14: i16 = GlobalAddress<[7 x i8]* @str.2y> 0 | |
Combining: t13: i16,ch = load<LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t0, t12, undef:i16 | |
Combining: t12: i16 = add t10, Constant:i16<6> | |
Combining: t11: i16 = Constant<6> | |
Combining: t10: i16,ch = load<LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t0, t7, undef:i16 | |
Combining: t9: i16 = undef | |
Combining: t7: i16 = add t5, Constant:i16<2> | |
... into: t31: i16 = add t2, Constant:i16<18> | |
Combining: t10: i16,ch = load<LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t0, t31, undef:i16 | |
Combining: t31: i16 = add t2, Constant:i16<18> | |
Combining: t30: i16 = Constant<18> | |
Combining: t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
Combining: t1: i16 = Register %vreg0 | |
Combining: t0: ch = EntryToken | |
Optimized lowered selection DAG: BB#4 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb4' | |
SelectionDAG has 26 nodes: | |
t0: ch = EntryToken | |
t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
t31: i16 = add t2, Constant:i16<18> | |
t10: i16,ch = load<LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t0, t31, undef:i16 | |
t12: i16 = add t10, Constant:i16<6> | |
t13: i16,ch = load<LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t0, t12, undef:i16 | |
t16: ch = TokenFactor t10:1, t13:1 | |
t18: ch,glue = callseq_start t16, TargetConstant:i16<0> | |
t20: ch,glue = CopyToReg t18, Register:i16 %R25R24, undef:i16 | |
t22: ch,glue = CopyToReg t20, Register:i16 %R23R22, GlobalAddress:i16<[7 x i8]* @str.2y> 0, t20:1 | |
t24: ch,glue = CopyToReg t22, Register:i16 %R21R20, Constant:i16<7>, t22:1 | |
t26: ch,glue = CALL t24, t13, Register:i16 %R25R24, Register:i16 %R23R22, Register:i16 %R21R20, RegisterMask:Untyped, t24:1 | |
t27: ch,glue = callseq_end t26, TargetConstant:i16<0>, TargetConstant:i16<0>, t26:1 | |
t29: i8,ch,glue = CopyFromReg t27, Register:i8 %R24, t27:1 | |
Legally typed node: t30: i16 = Constant<18> | |
Legally typed node: t28: i8 = Register %R24 | |
Legally typed node: t25: Untyped = RegisterMask | |
Legally typed node: t23: i16 = Register %R21R20 | |
Legally typed node: t21: i16 = Register %R23R22 | |
Legally typed node: t19: i16 = Register %R25R24 | |
Legally typed node: t17: i16 = TargetConstant<0> | |
Legally typed node: t15: i16 = Constant<7> | |
Legally typed node: t14: i16 = GlobalAddress<[7 x i8]* @str.2y> 0 | |
Legally typed node: t11: i16 = Constant<6> | |
Legally typed node: t9: i16 = undef | |
Legally typed node: t1: i16 = Register %vreg0 | |
Legally typed node: t0: ch = EntryToken | |
Legally typed node: t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
Legally typed node: t31: i16 = add t2, Constant:i16<18> | |
Legally typed node: t10: i16,ch = load<LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t0, t31, undef:i16 | |
Legally typed node: t12: i16 = add t10, Constant:i16<6> | |
Legally typed node: t13: i16,ch = load<LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t0, t12, undef:i16 | |
Legally typed node: t16: ch = TokenFactor t10:1, t13:1 | |
Legally typed node: t18: ch,glue = callseq_start t16, TargetConstant:i16<0> | |
Legally typed node: t20: ch,glue = CopyToReg t18, Register:i16 %R25R24, undef:i16 | |
Legally typed node: t22: ch,glue = CopyToReg t20, Register:i16 %R23R22, GlobalAddress:i16<[7 x i8]* @str.2y> 0, t20:1 | |
Legally typed node: t24: ch,glue = CopyToReg t22, Register:i16 %R21R20, Constant:i16<7>, t22:1 | |
Legally typed node: t26: ch,glue = CALL t24, t13, Register:i16 %R25R24, Register:i16 %R23R22, Register:i16 %R21R20, RegisterMask:Untyped, t24:1 | |
Legally typed node: t27: ch,glue = callseq_end t26, TargetConstant:i16<0>, TargetConstant:i16<0>, t26:1 | |
Legally typed node: t29: i8,ch,glue = CopyFromReg t27, Register:i8 %R24, t27:1 | |
Legally typed node: t65535: ch = handlenode t29:1 | |
Type-legalized selection DAG: BB#4 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb4' | |
SelectionDAG has 26 nodes: | |
t0: ch = EntryToken | |
t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
t31: i16 = add t2, Constant:i16<18> | |
t10: i16,ch = load<LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t0, t31, undef:i16 | |
t12: i16 = add t10, Constant:i16<6> | |
t13: i16,ch = load<LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t0, t12, undef:i16 | |
t16: ch = TokenFactor t10:1, t13:1 | |
t18: ch,glue = callseq_start t16, TargetConstant:i16<0> | |
t20: ch,glue = CopyToReg t18, Register:i16 %R25R24, undef:i16 | |
t22: ch,glue = CopyToReg t20, Register:i16 %R23R22, GlobalAddress:i16<[7 x i8]* @str.2y> 0, t20:1 | |
t24: ch,glue = CopyToReg t22, Register:i16 %R21R20, Constant:i16<7>, t22:1 | |
t26: ch,glue = CALL t24, t13, Register:i16 %R25R24, Register:i16 %R23R22, Register:i16 %R21R20, RegisterMask:Untyped, t24:1 | |
t27: ch,glue = callseq_end t26, TargetConstant:i16<0>, TargetConstant:i16<0>, t26:1 | |
t29: i8,ch,glue = CopyFromReg t27, Register:i8 %R24, t27:1 | |
Legalizing: t29: i8,ch,glue = CopyFromReg t27, Register:i8 %R24, t27:1 | |
Legalizing: t27: ch,glue = callseq_end t26, TargetConstant:i16<0>, TargetConstant:i16<0>, t26:1 | |
Legalizing: t26: ch,glue = CALL t24, t13, Register:i16 %R25R24, Register:i16 %R23R22, Register:i16 %R21R20, RegisterMask:Untyped, t24:1 | |
Legalizing: t24: ch,glue = CopyToReg t22, Register:i16 %R21R20, Constant:i16<7>, t22:1 | |
Legalizing: t22: ch,glue = CopyToReg t20, Register:i16 %R23R22, GlobalAddress:i16<[7 x i8]* @str.2y> 0, t20:1 | |
Legalizing: t20: ch,glue = CopyToReg t18, Register:i16 %R25R24, undef:i16 | |
Legalizing: t18: ch,glue = callseq_start t16, TargetConstant:i16<0> | |
Legalizing: t16: ch = TokenFactor t10:1, t13:1 | |
Legalizing: t13: i16,ch = load<LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t0, t12, undef:i16 | |
Legalizing: t12: i16 = add t10, Constant:i16<6> | |
Legalizing: t10: i16,ch = load<LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t0, t31, undef:i16 | |
Legalizing: t31: i16 = add t2, Constant:i16<18> | |
Legalizing: t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
Legalizing: t30: i16 = Constant<18> | |
Legalizing: t28: i8 = Register %R24 | |
Legalizing: t25: Untyped = RegisterMask | |
Legalizing: t23: i16 = Register %R21R20 | |
Legalizing: t21: i16 = Register %R23R22 | |
Legalizing: t19: i16 = Register %R25R24 | |
Legalizing: t17: i16 = TargetConstant<0> | |
Legalizing: t15: i16 = Constant<7> | |
Legalizing: t14: i16 = GlobalAddress<[7 x i8]* @str.2y> 0 | |
... replacing: t14: i16 = GlobalAddress<[7 x i8]* @str.2y> 0 | |
with: t33: i16 = WRAPPER TargetGlobalAddress:i16<[7 x i8]* @str.2y> 0 | |
Legalizing: t11: i16 = Constant<6> | |
Legalizing: t9: i16 = undef | |
Legalizing: t1: i16 = Register %vreg0 | |
Legalizing: t0: ch = EntryToken | |
Legalizing: t33: i16 = WRAPPER TargetGlobalAddress:i16<[7 x i8]* @str.2y> 0 | |
Legalizing: t32: i16 = TargetGlobalAddress<[7 x i8]* @str.2y> 0 | |
Legalized selection DAG: BB#4 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb4' | |
SelectionDAG has 27 nodes: | |
t0: ch = EntryToken | |
t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
t31: i16 = add t2, Constant:i16<18> | |
t10: i16,ch = load<LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t0, t31, undef:i16 | |
t12: i16 = add t10, Constant:i16<6> | |
t13: i16,ch = load<LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t0, t12, undef:i16 | |
t16: ch = TokenFactor t10:1, t13:1 | |
t18: ch,glue = callseq_start t16, TargetConstant:i16<0> | |
t20: ch,glue = CopyToReg t18, Register:i16 %R25R24, undef:i16 | |
t33: i16 = WRAPPER TargetGlobalAddress:i16<[7 x i8]* @str.2y> 0 | |
t22: ch,glue = CopyToReg t20, Register:i16 %R23R22, t33, t20:1 | |
t24: ch,glue = CopyToReg t22, Register:i16 %R21R20, Constant:i16<7>, t22:1 | |
t26: ch,glue = CALL t24, t13, Register:i16 %R25R24, Register:i16 %R23R22, Register:i16 %R21R20, RegisterMask:Untyped, t24:1 | |
t27: ch,glue = callseq_end t26, TargetConstant:i16<0>, TargetConstant:i16<0>, t26:1 | |
t29: i8,ch,glue = CopyFromReg t27, Register:i8 %R24, t27:1 | |
Legalizing: t33: i16 = WRAPPER TargetGlobalAddress:i16<[7 x i8]* @str.2y> 0 | |
Combining: t33: i16 = WRAPPER TargetGlobalAddress:i16<[7 x i8]* @str.2y> 0 | |
Legalizing: t32: i16 = TargetGlobalAddress<[7 x i8]* @str.2y> 0 | |
Combining: t32: i16 = TargetGlobalAddress<[7 x i8]* @str.2y> 0 | |
Legalizing: t29: i8,ch,glue = CopyFromReg t27, Register:i8 %R24, t27:1 | |
Combining: t29: i8,ch,glue = CopyFromReg t27, Register:i8 %R24, t27:1 | |
Legalizing: t27: ch,glue = callseq_end t26, TargetConstant:i16<0>, TargetConstant:i16<0>, t26:1 | |
Combining: t27: ch,glue = callseq_end t26, TargetConstant:i16<0>, TargetConstant:i16<0>, t26:1 | |
Legalizing: t26: ch,glue = CALL t24, t13, Register:i16 %R25R24, Register:i16 %R23R22, Register:i16 %R21R20, RegisterMask:Untyped, t24:1 | |
Combining: t26: ch,glue = CALL t24, t13, Register:i16 %R25R24, Register:i16 %R23R22, Register:i16 %R21R20, RegisterMask:Untyped, t24:1 | |
Legalizing: t24: ch,glue = CopyToReg t22, Register:i16 %R21R20, Constant:i16<7>, t22:1 | |
Combining: t24: ch,glue = CopyToReg t22, Register:i16 %R21R20, Constant:i16<7>, t22:1 | |
Legalizing: t22: ch,glue = CopyToReg t20, Register:i16 %R23R22, t33, t20:1 | |
Combining: t22: ch,glue = CopyToReg t20, Register:i16 %R23R22, t33, t20:1 | |
Legalizing: t20: ch,glue = CopyToReg t18, Register:i16 %R25R24, undef:i16 | |
Combining: t20: ch,glue = CopyToReg t18, Register:i16 %R25R24, undef:i16 | |
Legalizing: t18: ch,glue = callseq_start t16, TargetConstant:i16<0> | |
Combining: t18: ch,glue = callseq_start t16, TargetConstant:i16<0> | |
Legalizing: t16: ch = TokenFactor t10:1, t13:1 | |
Combining: t16: ch = TokenFactor t10:1, t13:1 | |
Legalizing: t13: i16,ch = load<LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t0, t12, undef:i16 | |
Combining: t13: i16,ch = load<LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t0, t12, undef:i16 | |
Legalizing: t12: i16 = add t10, Constant:i16<6> | |
Combining: t12: i16 = add t10, Constant:i16<6> | |
Legalizing: t10: i16,ch = load<LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t0, t31, undef:i16 | |
Combining: t10: i16,ch = load<LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t0, t31, undef:i16 | |
Legalizing: t31: i16 = add t2, Constant:i16<18> | |
Combining: t31: i16 = add t2, Constant:i16<18> | |
Legalizing: t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
Combining: t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
Legalizing: t30: i16 = Constant<18> | |
Combining: t30: i16 = Constant<18> | |
Legalizing: t28: i8 = Register %R24 | |
Combining: t28: i8 = Register %R24 | |
Legalizing: t25: Untyped = RegisterMask | |
Combining: t25: Untyped = RegisterMask | |
Legalizing: t23: i16 = Register %R21R20 | |
Combining: t23: i16 = Register %R21R20 | |
Legalizing: t21: i16 = Register %R23R22 | |
Combining: t21: i16 = Register %R23R22 | |
Legalizing: t19: i16 = Register %R25R24 | |
Combining: t19: i16 = Register %R25R24 | |
Legalizing: t17: i16 = TargetConstant<0> | |
Combining: t17: i16 = TargetConstant<0> | |
Legalizing: t15: i16 = Constant<7> | |
Combining: t15: i16 = Constant<7> | |
Legalizing: t11: i16 = Constant<6> | |
Combining: t11: i16 = Constant<6> | |
Legalizing: t9: i16 = undef | |
Combining: t9: i16 = undef | |
Legalizing: t1: i16 = Register %vreg0 | |
Combining: t1: i16 = Register %vreg0 | |
Legalizing: t0: ch = EntryToken | |
Combining: t0: ch = EntryToken | |
Optimized legalized selection DAG: BB#4 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb4' | |
SelectionDAG has 27 nodes: | |
t0: ch = EntryToken | |
t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
t31: i16 = add t2, Constant:i16<18> | |
t10: i16,ch = load<LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t0, t31, undef:i16 | |
t12: i16 = add t10, Constant:i16<6> | |
t13: i16,ch = load<LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t0, t12, undef:i16 | |
t16: ch = TokenFactor t10:1, t13:1 | |
t18: ch,glue = callseq_start t16, TargetConstant:i16<0> | |
t20: ch,glue = CopyToReg t18, Register:i16 %R25R24, undef:i16 | |
t33: i16 = WRAPPER TargetGlobalAddress:i16<[7 x i8]* @str.2y> 0 | |
t22: ch,glue = CopyToReg t20, Register:i16 %R23R22, t33, t20:1 | |
t24: ch,glue = CopyToReg t22, Register:i16 %R21R20, Constant:i16<7>, t22:1 | |
t26: ch,glue = CALL t24, t13, Register:i16 %R25R24, Register:i16 %R23R22, Register:i16 %R21R20, RegisterMask:Untyped, t24:1 | |
t27: ch,glue = callseq_end t26, TargetConstant:i16<0>, TargetConstant:i16<0>, t26:1 | |
t29: i8,ch,glue = CopyFromReg t27, Register:i8 %R24, t27:1 | |
===== Instruction selection begins: BB#4 'bb4' | |
Selecting: t29: i8,ch,glue = CopyFromReg t27, Register:i8 %R24, t27:1 | |
Selecting: t27: ch,glue = callseq_end t26, TargetConstant:i16<0>, TargetConstant:i16<0>, t26:1 | |
ISEL: Starting pattern match on root node: t27: ch,glue = callseq_end t26, TargetConstant:i16<0>, TargetConstant:i16<0>, t26:1 | |
Initial Opcode index to 792 | |
Morphed node: t27: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t26, t26:1 | |
ISEL: Match complete! | |
Selecting: t26: ch,glue = CALL t24, t13, Register:i16 %R25R24, Register:i16 %R23R22, Register:i16 %R21R20, RegisterMask:Untyped, t24:1 | |
Selecting: t24: ch,glue = CopyToReg t22, Register:i16 %R21R20, Constant:i16<7>, t22:1 | |
Selecting: t22: ch,glue = CopyToReg t20, Register:i16 %R23R22, t33, t20:1 | |
Selecting: t20: ch,glue = CopyToReg t18, Register:i16 %R25R24, undef:i16 | |
Selecting: t18: ch,glue = callseq_start t16, TargetConstant:i16<0> | |
ISEL: Starting pattern match on root node: t18: ch,glue = callseq_start t16, TargetConstant:i16<0> | |
Initial Opcode index to 1323 | |
Morphed node: t18: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, t16 | |
ISEL: Match complete! | |
Selecting: t16: ch = TokenFactor t10:1, t13:1 | |
Selecting: t13: i16,ch = load<LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t0, t12, undef:i16 | |
ISEL: Starting pattern match on root node: t13: i16,ch = load<LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t0, t12, undef:i16 | |
Initial Opcode index to 581 | |
TypeSwitch[i16] from 590 to 609 | |
Morphed node: t13: i16,ch = LDDWRdPtrQ<Mem:LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t10, TargetConstant:i8<6>, t0 | |
ISEL: Match complete! | |
Selecting: t10: i16,ch = load<LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t0, t31, undef:i16 | |
ISEL: Starting pattern match on root node: t10: i16,ch = load<LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t0, t31, undef:i16 | |
Initial Opcode index to 581 | |
TypeSwitch[i16] from 590 to 609 | |
Morphed node: t10: i16,ch = LDDWRdPtrQ<Mem:LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t2, TargetConstant:i8<18>, t0 | |
ISEL: Match complete! | |
Selecting: t33: i16 = WRAPPER TargetGlobalAddress:i16<[7 x i8]* @str.2y> 0 | |
ISEL: Starting pattern match on root node: t33: i16 = WRAPPER TargetGlobalAddress:i16<[7 x i8]* @str.2y> 0 | |
Initial Opcode index to 1857 | |
OpcodeSwitch from 1859 to 1863 | |
Morphed node: t33: i16 = LDIWRdK TargetGlobalAddress:i16<[7 x i8]* @str.2y> 0 | |
ISEL: Match complete! | |
Selecting: t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
Selecting: t32: i16 = TargetGlobalAddress<[7 x i8]* @str.2y> 0 | |
Selecting: t28: i8 = Register %R24 | |
Selecting: t25: Untyped = RegisterMask | |
Selecting: t23: i16 = Register %R21R20 | |
Selecting: t21: i16 = Register %R23R22 | |
Selecting: t19: i16 = Register %R25R24 | |
Selecting: t17: i16 = TargetConstant<0> | |
Selecting: t15: i16 = Constant<7> | |
ISEL: Starting pattern match on root node: t15: i16 = Constant<7> | |
Initial Opcode index to 2269 | |
TypeSwitch[i16] from 2270 to 2284 | |
Morphed node: t15: i16 = LDIWRdK TargetConstant:i16<7> | |
ISEL: Match complete! | |
Selecting: t9: i16 = undef | |
Selecting: t1: i16 = Register %vreg0 | |
Selecting: t0: ch = EntryToken | |
===== Instruction selection ends: | |
Selected selection DAG: BB#4 '_ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E:bb4' | |
SelectionDAG has 28 nodes: | |
t0: ch = EntryToken | |
t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
t10: i16,ch = LDDWRdPtrQ<Mem:LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t2, TargetConstant:i8<18>, t0 | |
t13: i16,ch = LDDWRdPtrQ<Mem:LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t10, TargetConstant:i8<6>, t0 | |
t16: ch = TokenFactor t10:1, t13:1 | |
t18: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, t16 | |
t20: ch,glue = CopyToReg t18:1, Register:i16 %R25R24, IMPLICIT_DEF:i16 | |
t33: i16 = LDIWRdK TargetGlobalAddress:i16<[7 x i8]* @str.2y> 0 | |
t22: ch,glue = CopyToReg t20, Register:i16 %R23R22, t33, t20:1 | |
t27: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t36, t36:1 | |
t15: i16 = LDIWRdK TargetConstant:i16<7> | |
t24: ch,glue = CopyToReg t22, Register:i16 %R21R20, t15, t22:1 | |
t35: ch,glue = CopyToReg t24, Register:i16 %R31R30, t13 | |
t36: ch,glue = ICALL Register:i16 %R31R30, Register:i16 %R25R24, Register:i16 %R23R22, Register:i16 %R21R20, RegisterMask:Untyped, t35, t35:1 | |
t29: i8,ch,glue = CopyFromReg t27:1, Register:i8 %R24, t27:2 | |
********** List Scheduling BB#4 'bb4' ********** | |
SU(0): t29: i8,ch,glue = CopyFromReg t27:1, Register:i8 %R24, t27:2 | |
t35: ch,glue = CopyToReg t24, Register:i16 %R31R30, t13 | |
t36: ch,glue = ICALL Register:i16 %R31R30, Register:i16 %R25R24, Register:i16 %R23R22, Register:i16 %R21R20, RegisterMask:Untyped, t35, t35:1 | |
t27: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t36, t36:1 | |
# preds left : 2 | |
# succs left : 0 | |
# rdefs left : 0 | |
Latency : 1 | |
Depth : 5 | |
Height : 0 | |
Predecessors: | |
ord SU(4): Latency=1 | |
data SU(1): Latency=1 | |
SU(1): t13: i16,ch = LDDWRdPtrQ<Mem:LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t10, TargetConstant:i8<6>, t0 | |
# preds left : 1 | |
# succs left : 2 | |
# rdefs left : 1 | |
Latency : 1 | |
Depth : 2 | |
Height : 3 | |
Predecessors: | |
data SU(2): Latency=1 | |
Successors: | |
data SU(0): Latency=1 | |
ord SU(9): Latency=1 | |
SU(2): t10: i16,ch = LDDWRdPtrQ<Mem:LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t2, TargetConstant:i8<18>, t0 | |
# preds left : 1 | |
# succs left : 2 | |
# rdefs left : 1 | |
Latency : 1 | |
Depth : 1 | |
Height : 4 | |
Predecessors: | |
data SU(3): Latency=1 | |
Successors: | |
data SU(1): Latency=1 | |
ord SU(9): Latency=1 | |
SU(3): t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
# preds left : 0 | |
# succs left : 1 | |
# rdefs left : 1 | |
Latency : 1 | |
Depth : 0 | |
Height : 5 | |
Successors: | |
data SU(2): Latency=1 | |
SU(4): t24: ch,glue = CopyToReg t22, Register:i16 %R21R20, t15, t22:1 | |
t20: ch,glue = CopyToReg t18:1, Register:i16 %R25R24, IMPLICIT_DEF:i16 | |
t22: ch,glue = CopyToReg t20, Register:i16 %R23R22, t33, t20:1 | |
# preds left : 4 | |
# succs left : 1 | |
# rdefs left : 0 | |
Latency : 1 | |
Depth : 4 | |
Height : 1 | |
Predecessors: | |
data SU(5): Latency=1 | |
data SU(6): Latency=1 | |
ord SU(8): Latency=1 | |
data SU(7): Latency=1 | |
Successors: | |
ord SU(0): Latency=1 | |
SU(5): t15: i16 = LDIWRdK TargetConstant:i16<7> | |
# preds left : 0 | |
# succs left : 1 | |
# rdefs left : 1 | |
Latency : 1 | |
Depth : 0 | |
Height : 2 | |
Successors: | |
data SU(4): Latency=1 | |
SU(6): t33: i16 = LDIWRdK TargetGlobalAddress:i16<[7 x i8]* @str.2y> 0 | |
# preds left : 0 | |
# succs left : 1 | |
# rdefs left : 1 | |
Latency : 1 | |
Depth : 0 | |
Height : 2 | |
Successors: | |
data SU(4): Latency=1 | |
SU(7): t9: i16 = IMPLICIT_DEF | |
# preds left : 0 | |
# succs left : 1 | |
# rdefs left : 0 | |
Latency : 1 | |
Depth : 0 | |
Height : 2 | |
Successors: | |
data SU(4): Latency=1 | |
SU(8): t18: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, t16 | |
# preds left : 1 | |
# succs left : 1 | |
# rdefs left : 0 | |
Latency : 1 | |
Depth : 3 | |
Height : 2 | |
Predecessors: | |
ord SU(9): Latency=0 | |
Successors: | |
ord SU(4): Latency=1 | |
SU(9): t16: ch = TokenFactor t10:1, t13:1 | |
# preds left : 2 | |
# succs left : 1 | |
# rdefs left : 0 | |
Latency : 0 | |
Depth : 3 | |
Height : 2 | |
Predecessors: | |
ord SU(2): Latency=1 | |
ord SU(1): Latency=1 | |
Successors: | |
ord SU(8): Latency=0 | |
Examining Available: | |
Height 0: SU(0): t29: i8,ch,glue = CopyFromReg t27:1, Register:i8 %R24, t27:2 | |
t35: ch,glue = CopyToReg t24, Register:i16 %R31R30, t13 | |
t36: ch,glue = ICALL Register:i16 %R31R30, Register:i16 %R25R24, Register:i16 %R23R22, Register:i16 %R21R20, RegisterMask:Untyped, t35, t35:1 | |
t27: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t36, t36:1 | |
*** Scheduling [0]: SU(0): t29: i8,ch,glue = CopyFromReg t27:1, Register:i8 %R24, t27:2 | |
t35: ch,glue = CopyToReg t24, Register:i16 %R31R30, t13 | |
t36: ch,glue = ICALL Register:i16 %R31R30, Register:i16 %R25R24, Register:i16 %R23R22, Register:i16 %R21R20, RegisterMask:Untyped, t35, t35:1 | |
t27: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t36, t36:1 | |
Examining Available: | |
Height 1: SU(4): t24: ch,glue = CopyToReg t22, Register:i16 %R21R20, t15, t22:1 | |
t20: ch,glue = CopyToReg t18:1, Register:i16 %R25R24, IMPLICIT_DEF:i16 | |
t22: ch,glue = CopyToReg t20, Register:i16 %R23R22, t33, t20:1 | |
*** Scheduling [1]: SU(4): t24: ch,glue = CopyToReg t22, Register:i16 %R21R20, t15, t22:1 | |
t20: ch,glue = CopyToReg t18:1, Register:i16 %R25R24, IMPLICIT_DEF:i16 | |
t22: ch,glue = CopyToReg t20, Register:i16 %R23R22, t33, t20:1 | |
Examining Available: | |
Height 2: SU(5): t15: i16 = LDIWRdK TargetConstant:i16<7> | |
Height 2: SU(6): t33: i16 = LDIWRdK TargetGlobalAddress:i16<[7 x i8]* @str.2y> 0 | |
Height 2: SU(7): t9: i16 = IMPLICIT_DEF | |
Height 2: SU(8): t18: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, t16 | |
*** Scheduling [2]: SU(5): t15: i16 = LDIWRdK TargetConstant:i16<7> | |
Examining Available: | |
Height 2: SU(6): t33: i16 = LDIWRdK TargetGlobalAddress:i16<[7 x i8]* @str.2y> 0 | |
Height 2: SU(7): t9: i16 = IMPLICIT_DEF | |
Height 2: SU(8): t18: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, t16 | |
*** Scheduling [3]: SU(6): t33: i16 = LDIWRdK TargetGlobalAddress:i16<[7 x i8]* @str.2y> 0 | |
Examining Available: | |
Height 2: SU(7): t9: i16 = IMPLICIT_DEF | |
Height 2: SU(8): t18: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, t16 | |
*** Scheduling [4]: SU(7): t9: i16 = IMPLICIT_DEF | |
Examining Available: | |
Height 2: SU(8): t18: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, t16 | |
*** Scheduling [5]: SU(8): t18: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, t16 | |
Examining Available: | |
Height 5: SU(9): t16: ch = TokenFactor t10:1, t13:1 | |
*** Scheduling [6]: SU(9): t16: ch = TokenFactor t10:1, t13:1 | |
Examining Available: | |
Height 7: SU(1): t13: i16,ch = LDDWRdPtrQ<Mem:LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t10, TargetConstant:i8<6>, t0 | |
*** Scheduling [7]: SU(1): t13: i16,ch = LDDWRdPtrQ<Mem:LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t10, TargetConstant:i8<6>, t0 | |
Examining Available: | |
Height 8: SU(2): t10: i16,ch = LDDWRdPtrQ<Mem:LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t2, TargetConstant:i8<18>, t0 | |
*** Scheduling [8]: SU(2): t10: i16,ch = LDDWRdPtrQ<Mem:LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t2, TargetConstant:i8<18>, t0 | |
Examining Available: | |
Height 9: SU(3): t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
*** Scheduling [9]: SU(3): t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
*** Final schedule *** | |
SU(3): t2: i16,ch = CopyFromReg t0, Register:i16 %vreg0 | |
SU(2): t10: i16,ch = LDDWRdPtrQ<Mem:LD2[%2](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(dereferenceable)> t2, TargetConstant:i8<18>, t0 | |
SU(1): t13: i16,ch = LDDWRdPtrQ<Mem:LD2[%5](noalias=<0x7fa45440e6e8>,<0x7fa45440de98>,<0x7fa45440cce8>,<0x7fa45440d398>,<0x7fa45440e1c8>)(invariant)> t10, TargetConstant:i8<6>, t0 | |
SU(9): t16: ch = TokenFactor t10:1, t13:1 | |
SU(8): t18: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, t16 | |
SU(7): t9: i16 = IMPLICIT_DEF | |
SU(6): t33: i16 = LDIWRdK TargetGlobalAddress:i16<[7 x i8]* @str.2y> 0 | |
SU(5): t15: i16 = LDIWRdK TargetConstant:i16<7> | |
SU(4): t24: ch,glue = CopyToReg t22, Register:i16 %R21R20, t15, t22:1 | |
t20: ch,glue = CopyToReg t18:1, Register:i16 %R25R24, IMPLICIT_DEF:i16 | |
t22: ch,glue = CopyToReg t20, Register:i16 %R23R22, t33, t20:1 | |
SU(0): t29: i8,ch,glue = CopyFromReg t27:1, Register:i8 %R24, t27:2 | |
t35: ch,glue = CopyToReg t24, Register:i16 %R31R30, t13 | |
t36: ch,glue = ICALL Register:i16 %R31R30, Register:i16 %R25R24, Register:i16 %R23R22, Register:i16 %R21R20, RegisterMask:Untyped, t35, t35:1 | |
t27: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t36, t36:1 | |
Total amount of phi nodes to update: 0 | |
*** MachineFunction at end of ISel *** | |
# Machine code for function _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E: IsSSA, TracksLiveness | |
Frame Objects: | |
fi#0: size=2, align=2, at location [SP+2] | |
Function Live Ins: %R25R24 in %vreg0 | |
BB#0: derived from LLVM BB %start | |
Live Ins: %R25R24 | |
%vreg0<def> = COPY %R25R24; DREGS:%vreg0 | |
%vreg2<def> = LDIRdK 0; LD8:%vreg2 | |
%vreg1<def> = COPY %vreg2; GPR8:%vreg1 LD8:%vreg2 | |
%vreg3<def> = LDIRdK 1; LD8:%vreg3 | |
CPIRdK %vreg3<kill>, 0, %SREG<imp-def>, %SREG<imp-use>; LD8:%vreg3 | |
BRNEk <BB#1>, %SREG<imp-use> | |
RJMPk <BB#5> | |
Successors according to CFG: BB#1(0x7ffff800 / 0x80000000 = 100.00%) BB#5(0x00000800 / 0x80000000 = 0.00%) | |
BB#5: derived from LLVM BB %start | |
Predecessors according to CFG: BB#0 | |
%vreg4<def> = LDIRdK 0; LD8:%vreg4 | |
CPIRdK %vreg4<kill>, 0, %SREG<imp-def>, %SREG<imp-use>; LD8:%vreg4 | |
BRNEk <BB#2>, %SREG<imp-use> | |
RJMPk <BB#6> | |
Successors according to CFG: BB#2(0x2ab00000 / 0x80000000 = 33.35%) BB#6(0x55500000 / 0x80000000 = 66.65%) | |
BB#6: derived from LLVM BB %start | |
Predecessors according to CFG: BB#5 | |
%vreg5<def> = LDIRdK 0; LD8:%vreg5 | |
CPIRdK %vreg5<kill>, 0, %SREG<imp-def>, %SREG<imp-use>; LD8:%vreg5 | |
BRNEk <BB#3>, %SREG<imp-use> | |
RJMPk <BB#4> | |
Successors according to CFG: BB#3(0x400c00c0 / 0x80000000 = 50.04%) BB#4(0x3ff3ff40 / 0x80000000 = 49.96%) | |
BB#1: derived from LLVM BB %_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit | |
Predecessors according to CFG: BB#0 | |
RET | |
BB#2: derived from LLVM BB %bb2 | |
Predecessors according to CFG: BB#5 | |
BB#3: derived from LLVM BB %bb3 | |
Predecessors according to CFG: BB#6 | |
BB#4: derived from LLVM BB %bb4 | |
Predecessors according to CFG: BB#6 | |
%vreg7<def> = COPY %vreg0; PTRDISPREGS:%vreg7 DREGS:%vreg0 | |
%vreg6<earlyclobber,def> = LDDWRdPtrQ %vreg7, 18; mem:LD2[%2](noalias=!1,!3,!5,!6,!8)(dereferenceable) DREGS:%vreg6 PTRDISPREGS:%vreg7 | |
%vreg9<def> = COPY %vreg6; PTRDISPREGS:%vreg9 DREGS:%vreg6 | |
%vreg8<earlyclobber,def> = LDDWRdPtrQ %vreg9<kill>, 6; mem:LD2[%5](noalias=!1,!3,!5,!6,!8)(invariant) DREGS:%vreg8 PTRDISPREGS:%vreg9 | |
ADJCALLSTACKDOWN 0, %SP<imp-def,dead>, %SREG<imp-def,dead>, %SP<imp-use> | |
%vreg10<def> = LDIWRdK <ga:@str.2y>; DLDREGS:%vreg10 | |
%vreg11<def> = LDIWRdK 7; DLDREGS:%vreg11 | |
%vreg12<def> = IMPLICIT_DEF; DREGS:%vreg12 | |
%R25R24<def> = COPY %vreg12; DREGS:%vreg12 | |
%R23R22<def> = COPY %vreg10; DLDREGS:%vreg10 | |
%R21R20<def> = COPY %vreg11; DLDREGS:%vreg11 | |
%R31R30<def> = COPY %vreg8; DREGS:%vreg8 | |
ICALL %R31R30, %R25R24, %R23R22, %R21R20, <regmask %R2 %R3 %R4 %R5 %R6 %R7 %R8 %R9 %R10 %R11 %R12 %R13 %R14 %R15 %R16 %R17 %R28 %R29 %R3R2 %R5R4 %R7R6 %R9R8 %R11R10 %R13R12 %R15R14 %R17R16 %R29R28>, %SP<imp-use>, %R31R30<imp-use>, %SP<imp-def>, %R24<imp-def> | |
ADJCALLSTACKUP 0, 0, %SP<imp-def,dead>, %SREG<imp-def,dead>, %SP<imp-use> | |
%vreg13<def> = COPY %R24; GPR8:%vreg13 | |
# End machine code for function _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E. | |
# Machine code for function _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E: IsSSA, TracksLiveness | |
Frame Objects: | |
fi#0: size=2, align=2, at location [SP+2] | |
Function Live Ins: %R25R24 in %vreg0 | |
0B BB#0: derived from LLVM BB %start | |
Live Ins: %R25R24 | |
16B %vreg0<def> = COPY %R25R24; DREGS:%vreg0 | |
32B %vreg2<def> = LDIRdK 0; LD8:%vreg2 | |
48B %vreg1<def> = COPY %vreg2; GPR8:%vreg1 LD8:%vreg2 | |
64B %vreg3<def> = LDIRdK 1; LD8:%vreg3 | |
80B CPIRdK %vreg3<kill>, 0, %SREG<imp-def>, %SREG<imp-use>; LD8:%vreg3 | |
96B BRNEk <BB#1>, %SREG<imp-use> | |
112B RJMPk <BB#5> | |
Successors according to CFG: BB#1(0x7ffff800 / 0x80000000 = 100.00%) BB#5(0x00000800 / 0x80000000 = 0.00%) | |
128B BB#5: derived from LLVM BB %start | |
Predecessors according to CFG: BB#0 | |
144B %vreg4<def> = LDIRdK 0; LD8:%vreg4 | |
160B CPIRdK %vreg4<kill>, 0, %SREG<imp-def>, %SREG<imp-use>; LD8:%vreg4 | |
176B BRNEk <BB#2>, %SREG<imp-use> | |
192B RJMPk <BB#6> | |
Successors according to CFG: BB#2(0x2ab00000 / 0x80000000 = 33.35%) BB#6(0x55500000 / 0x80000000 = 66.65%) | |
208B BB#6: derived from LLVM BB %start | |
Predecessors according to CFG: BB#5 | |
224B %vreg5<def> = LDIRdK 0; LD8:%vreg5 | |
240B CPIRdK %vreg5<kill>, 0, %SREG<imp-def>, %SREG<imp-use>; LD8:%vreg5 | |
256B BRNEk <BB#3>, %SREG<imp-use> | |
272B RJMPk <BB#4> | |
Successors according to CFG: BB#3(0x400c00c0 / 0x80000000 = 50.04%) BB#4(0x3ff3ff40 / 0x80000000 = 49.96%) | |
288B BB#1: derived from LLVM BB %_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit | |
Predecessors according to CFG: BB#0 | |
304B RET | |
320B BB#2: derived from LLVM BB %bb2 | |
Predecessors according to CFG: BB#5 | |
336B BB#3: derived from LLVM BB %bb3 | |
Predecessors according to CFG: BB#6 | |
352B BB#4: derived from LLVM BB %bb4 | |
Predecessors according to CFG: BB#6 | |
368B %vreg7<def> = COPY %vreg0; PTRDISPREGS:%vreg7 DREGS:%vreg0 | |
384B %vreg6<earlyclobber,def> = LDDWRdPtrQ %vreg7, 18; mem:LD2[%2](noalias=!1,!3,!5,!6,!8)(dereferenceable) DREGS:%vreg6 PTRDISPREGS:%vreg7 | |
400B %vreg9<def> = COPY %vreg6; PTRDISPREGS:%vreg9 DREGS:%vreg6 | |
416B %vreg8<earlyclobber,def> = LDDWRdPtrQ %vreg9<kill>, 6; mem:LD2[%5](noalias=!1,!3,!5,!6,!8)(invariant) DREGS:%vreg8 PTRDISPREGS:%vreg9 | |
432B ADJCALLSTACKDOWN 0, %SP<imp-def,dead>, %SREG<imp-def,dead>, %SP<imp-use> | |
448B %vreg10<def> = LDIWRdK <ga:@str.2y>; DLDREGS:%vreg10 | |
464B %vreg11<def> = LDIWRdK 7; DLDREGS:%vreg11 | |
480B %vreg12<def> = IMPLICIT_DEF; DREGS:%vreg12 | |
496B %R25R24<def> = COPY %vreg12; DREGS:%vreg12 | |
512B %R23R22<def> = COPY %vreg10; DLDREGS:%vreg10 | |
528B %R21R20<def> = COPY %vreg11; DLDREGS:%vreg11 | |
544B %R31R30<def> = COPY %vreg8; DREGS:%vreg8 | |
560B ICALL %R31R30, %R25R24, %R23R22, %R21R20, <regmask %R2 %R3 %R4 %R5 %R6 %R7 %R8 %R9 %R10 %R11 %R12 %R13 %R14 %R15 %R16 %R17 %R28 %R29 %R3R2 %R5R4 %R7R6 %R9R8 %R11R10 %R13R12 %R15R14 %R17R16 %R29R28>, %SP<imp-use>, %R31R30<imp-use>, %SP<imp-def>, %R24<imp-def> | |
576B ADJCALLSTACKUP 0, 0, %SP<imp-def,dead>, %SREG<imp-def,dead>, %SP<imp-use> | |
592B %vreg13<def> = COPY %R24; GPR8:%vreg13 | |
# End machine code for function _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E. | |
********** Stack Coloring ********** | |
********** Function: _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E | |
Found 0 markers and 1 slots | |
Slot structure: | |
Slot #0 - 2 bytes. | |
Total Stack size: 2 bytes | |
Will not try to merge slots. | |
Removed 0 markers. | |
DeadMachineInstructionElim: DELETING: %vreg13<def> = COPY %R24; GPR8:%vreg13 | |
DeadMachineInstructionElim: DELETING: %vreg1<def> = COPY %vreg2; GPR8:%vreg1 LD8:%vreg2 | |
DeadMachineInstructionElim: DELETING: %vreg2<def> = LDIRdK 0; LD8:%vreg2 | |
******** Pre-regalloc Machine LICM: _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E ******** | |
Entering: start | |
Entering: start | |
Entering: start | |
Examining: %vreg5<def> = LDIRdK 0; LD8:%vreg5 | |
*** Found a common subexpression: %vreg4<def> = LDIRdK 0; LD8:%vreg4 | |
Entering: bb4 | |
Exiting: bb4 | |
Entering: bb3 | |
Exiting: bb3 | |
Exiting: start | |
Entering: bb2 | |
Exiting: bb2 | |
Exiting: start | |
Entering: _ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit | |
Exiting: _ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit | |
Exiting: start | |
block-frequency: _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E | |
================================================================================================================= | |
reverse-post-order-traversal | |
- 0: BB0[start] | |
- 1: BB5[start] | |
- 2: BB6[start] | |
- 3: BB4[bb4] | |
- 4: BB3[bb3] | |
- 5: BB2[bb2] | |
- 6: BB1[_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit] | |
loop-detection | |
compute-mass-in-function | |
- node: BB0[start] | |
=> [ local ] weight = 2147481600, succ = BB1[_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit] | |
=> [ local ] weight = 2048, succ = BB5[start] | |
=> mass: ffffffffffffffff | |
=> assign 00000fffffffffff (fffff00000000000) to BB5[start] | |
=> assign fffff00000000000 (0000000000000000) to BB1[_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit] | |
- node: BB5[start] | |
=> [ local ] weight = 716177408, succ = BB2[bb2] | |
=> [ local ] weight = 1431306240, succ = BB6[start] | |
=> mass: 00000fffffffffff | |
=> assign 00000aa9ffffffff (0000055600000000) to BB6[start] | |
=> assign 0000055600000000 (0000000000000000) to BB2[bb2] | |
- node: BB6[start] | |
=> [ local ] weight = 1074528448, succ = BB3[bb3] | |
=> [ local ] weight = 1072955200, succ = BB4[bb4] | |
=> mass: 00000aa9ffffffff | |
=> assign 00000554000000ff (00000555ffffff00) to BB4[bb4] | |
=> assign 00000555ffffff00 (0000000000000000) to BB3[bb3] | |
- node: BB4[bb4] | |
=> mass: 00000554000000ff | |
- node: BB3[bb3] | |
=> mass: 00000555ffffff00 | |
- node: BB2[bb2] | |
=> mass: 0000055600000000 | |
- node: BB1[_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit] | |
=> mass: fffff00000000000 | |
float-to-int: min = 0.000000317580998, max = 1.0, factor = 25190424.02 | |
- BB0[start]: float = 1.0, scaled = 25190424.02, int = 25190424 | |
- BB5[start]: float = 0.0000009536743164, scaled = 24.02346041, int = 24 | |
- BB6[start]: float = 0.0000006356276572, scaled = 16.0117302, int = 16 | |
- BB4[bb4]: float = 0.000000317580998, scaled = 8.0, int = 8 | |
- BB3[bb3]: float = 0.0000003180466592, scaled = 8.011730205, int = 8 | |
- BB2[bb2]: float = 0.0000003180466592, scaled = 8.011730205, int = 8 | |
- BB1[_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit]: float = 0.9999990463, scaled = 25190400.0, int = 25190399 | |
block-frequency-info: _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E | |
- BB0[start]: float = 1.0, int = 25190424 | |
- BB5[start]: float = 0.00000095367, int = 24 | |
- BB6[start]: float = 0.00000063563, int = 16 | |
- BB1[_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit]: float = 1.0, int = 25190399 | |
- BB2[bb2]: float = 0.00000031805, int = 8 | |
- BB3[bb3]: float = 0.00000031805, int = 8 | |
- BB4[bb4]: float = 0.00000031758, int = 8 | |
******** Machine Sinking ******** | |
********** PEEPHOLE OPTIMIZER ********** | |
********** Function: _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E | |
NAPhysCopy: blowing away all info due to ICALL %R31R30, %R25R24, %R23R22, %R21R20, <regmask %R2 %R3 %R4 %R5 %R6 %R7 %R8 %R9 %R10 %R11 %R12 %R13 %R14 %R15 %R16 %R17 %R28 %R29 %R3R2 %R5R4 %R7R6 %R9R8 %R11R10 %R13R12 %R15R14 %R17R16 %R29R28>, %SP<imp-use>, %R31R30<imp-use>, %SP<imp-def>, %R24<imp-def> | |
Encountered load fold barrier on ICALL %R31R30, %R25R24, %R23R22, %R21R20, <regmask %R2 %R3 %R4 %R5 %R6 %R7 %R8 %R9 %R10 %R11 %R12 %R13 %R14 %R15 %R16 %R17 %R28 %R29 %R3R2 %R5R4 %R7R6 %R9R8 %R11R10 %R13R12 %R15R14 %R17R16 %R29R28>, %SP<imp-use>, %R31R30<imp-use>, %SP<imp-def>, %R24<imp-def> | |
Skipping Detect dead lanes pass | |
********** PROCESS IMPLICIT DEFS ********** | |
********** Function: _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E | |
BB#4 has 1 implicit defs. | |
Processing %vreg12<def> = IMPLICIT_DEF; DREGS:%vreg12 | |
Converting to IMPLICIT_DEF: %R25R24<def> = COPY %vreg12<undef>; DREGS:%vreg12 | |
Processing %R25R24<def> = IMPLICIT_DEF %vreg12<undef>; DREGS:%vreg12 | |
Physreg user: ICALL %R31R30, %R25R24<undef>, %R23R22, %R21R20, <regmask %R2 %R3 %R4 %R5 %R6 %R7 %R8 %R9 %R10 %R11 %R12 %R13 %R14 %R15 %R16 %R17 %R28 %R29 %R3R2 %R5R4 %R7R6 %R9R8 %R11R10 %R13R12 %R15R14 %R17R16 %R29R28>, %SP<imp-use>, %R31R30<imp-use>, %SP<imp-def>, %R24<imp-def> | |
********** REWRITING TWO-ADDR INSTRS ********** | |
********** Function: _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E | |
# Machine code for function _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E: NoPHIs, TracksLiveness | |
Frame Objects: | |
fi#0: size=2, align=2, at location [SP+2] | |
Function Live Ins: %R25R24 in %vreg0 | |
0B BB#0: derived from LLVM BB %start | |
Live Ins: %R25R24 | |
16B %vreg0<def> = COPY %R25R24<kill>; DREGS:%vreg0 | |
32B %vreg3<def> = LDIRdK 1; LD8:%vreg3 | |
48B CPIRdK %vreg3<kill>, 0, %SREG<imp-def>, %SREG<imp-use,kill>; LD8:%vreg3 | |
64B BRNEk <BB#3>, %SREG<imp-use,kill> | |
80B RJMPk <BB#1> | |
Successors according to CFG: BB#3(0x7ffff800 / 0x80000000 = 100.00%) BB#1(0x00000800 / 0x80000000 = 0.00%) | |
96B BB#1: derived from LLVM BB %start | |
Predecessors according to CFG: BB#0 | |
112B %vreg4<def> = LDIRdK 0; LD8:%vreg4 | |
128B CPIRdK %vreg4, 0, %SREG<imp-def>, %SREG<imp-use,kill>; LD8:%vreg4 | |
144B BRNEk <BB#4>, %SREG<imp-use,kill> | |
160B RJMPk <BB#2> | |
Successors according to CFG: BB#4(0x2ab00000 / 0x80000000 = 33.35%) BB#2(0x55500000 / 0x80000000 = 66.65%) | |
176B BB#2: derived from LLVM BB %start | |
Predecessors according to CFG: BB#1 | |
192B CPIRdK %vreg4<kill>, 0, %SREG<imp-def>, %SREG<imp-use,kill>; LD8:%vreg4 | |
208B BRNEk <BB#5>, %SREG<imp-use,kill> | |
224B RJMPk <BB#6> | |
Successors according to CFG: BB#5(0x400c00c0 / 0x80000000 = 50.04%) BB#6(0x3ff3ff40 / 0x80000000 = 49.96%) | |
240B BB#3: derived from LLVM BB %_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit | |
Predecessors according to CFG: BB#0 | |
256B RET | |
272B BB#4: derived from LLVM BB %bb2 | |
Predecessors according to CFG: BB#1 | |
288B BB#5: derived from LLVM BB %bb3 | |
Predecessors according to CFG: BB#2 | |
304B BB#6: derived from LLVM BB %bb4 | |
Predecessors according to CFG: BB#2 | |
320B %vreg7<def> = COPY %vreg0<kill>; PTRDISPREGS:%vreg7 DREGS:%vreg0 | |
336B %vreg6<earlyclobber,def> = LDDWRdPtrQ %vreg7<kill>, 18; mem:LD2[%2](noalias=!1,!3,!5,!6,!8)(dereferenceable) DREGS:%vreg6 PTRDISPREGS:%vreg7 | |
352B %vreg9<def> = COPY %vreg6<kill>; PTRDISPREGS:%vreg9 DREGS:%vreg6 | |
368B %vreg8<earlyclobber,def> = LDDWRdPtrQ %vreg9<kill>, 6; mem:LD2[%5](noalias=!1,!3,!5,!6,!8)(invariant) DREGS:%vreg8 PTRDISPREGS:%vreg9 | |
384B ADJCALLSTACKDOWN 0, %SP<imp-def,dead>, %SREG<imp-def,dead>, %SP<imp-use> | |
400B %vreg10<def> = LDIWRdK <ga:@str.2y>; DLDREGS:%vreg10 | |
416B %vreg11<def> = LDIWRdK 7; DLDREGS:%vreg11 | |
432B %R23R22<def> = COPY %vreg10<kill>; DLDREGS:%vreg10 | |
448B %R21R20<def> = COPY %vreg11<kill>; DLDREGS:%vreg11 | |
464B %R31R30<def> = COPY %vreg8<kill>; DREGS:%vreg8 | |
480B ICALL %R31R30<kill>, %R25R24<undef>, %R23R22<kill>, %R21R20<kill>, <regmask %R2 %R3 %R4 %R5 %R6 %R7 %R8 %R9 %R10 %R11 %R12 %R13 %R14 %R15 %R16 %R17 %R28 %R29 %R3R2 %R5R4 %R7R6 %R9R8 %R11R10 %R13R12 %R15R14 %R17R16 %R29R28>, %SP<imp-use>, %R31R30<imp-use>, %SP<imp-def>, %R24<imp-def,dead> | |
496B ADJCALLSTACKUP 0, 0, %SP<imp-def,dead>, %SREG<imp-def,dead>, %SP<imp-use> | |
# End machine code for function _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E. | |
Computing live-in reg-units in ABI blocks. | |
0B BB#0 R24#0 R25#0 | |
Created 2 new intervals. | |
********** INTERVALS ********** | |
R24 [0B,16r:0)[480r,480d:1) 0@0B-phi 1@480r | |
R25 [0B,16r:0) 0@0B-phi | |
%vreg0 [16r,240B:0)[304B,320r:0) 0@16r | |
%vreg3 [32r,48r:0) 0@32r | |
%vreg4 [112r,192r:0) 0@112r | |
%vreg6 [336e,352r:0) 0@336e | |
%vreg7 [320r,336r:0) 0@320r | |
%vreg8 [368e,464r:0) 0@368e | |
%vreg9 [352r,368r:0) 0@352r | |
%vreg10 [400r,432r:0) 0@400r | |
%vreg11 [416r,448r:0) 0@416r | |
RegMasks: 480r | |
********** MACHINEINSTRS ********** | |
# Machine code for function _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E: NoPHIs, TracksLiveness | |
Frame Objects: | |
fi#0: size=2, align=2, at location [SP+2] | |
Function Live Ins: %R25R24 in %vreg0 | |
0B BB#0: derived from LLVM BB %start | |
Live Ins: %R25R24 | |
16B %vreg0<def> = COPY %R25R24; DREGS:%vreg0 | |
32B %vreg3<def> = LDIRdK 1; LD8:%vreg3 | |
48B CPIRdK %vreg3, 0, %SREG<imp-def>, %SREG<imp-use,kill>; LD8:%vreg3 | |
64B BRNEk <BB#3>, %SREG<imp-use,kill> | |
80B RJMPk <BB#1> | |
Successors according to CFG: BB#3(0x7ffff800 / 0x80000000 = 100.00%) BB#1(0x00000800 / 0x80000000 = 0.00%) | |
96B BB#1: derived from LLVM BB %start | |
Predecessors according to CFG: BB#0 | |
112B %vreg4<def> = LDIRdK 0; LD8:%vreg4 | |
128B CPIRdK %vreg4, 0, %SREG<imp-def>, %SREG<imp-use,kill>; LD8:%vreg4 | |
144B BRNEk <BB#4>, %SREG<imp-use,kill> | |
160B RJMPk <BB#2> | |
Successors according to CFG: BB#4(0x2ab00000 / 0x80000000 = 33.35%) BB#2(0x55500000 / 0x80000000 = 66.65%) | |
176B BB#2: derived from LLVM BB %start | |
Predecessors according to CFG: BB#1 | |
192B CPIRdK %vreg4, 0, %SREG<imp-def>, %SREG<imp-use,kill>; LD8:%vreg4 | |
208B BRNEk <BB#5>, %SREG<imp-use,kill> | |
224B RJMPk <BB#6> | |
Successors according to CFG: BB#5(0x400c00c0 / 0x80000000 = 50.04%) BB#6(0x3ff3ff40 / 0x80000000 = 49.96%) | |
240B BB#3: derived from LLVM BB %_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit | |
Predecessors according to CFG: BB#0 | |
256B RET | |
272B BB#4: derived from LLVM BB %bb2 | |
Predecessors according to CFG: BB#1 | |
288B BB#5: derived from LLVM BB %bb3 | |
Predecessors according to CFG: BB#2 | |
304B BB#6: derived from LLVM BB %bb4 | |
Predecessors according to CFG: BB#2 | |
320B %vreg7<def> = COPY %vreg0; PTRDISPREGS:%vreg7 DREGS:%vreg0 | |
336B %vreg6<earlyclobber,def> = LDDWRdPtrQ %vreg7, 18; mem:LD2[%2](noalias=!1,!3,!5,!6,!8)(dereferenceable) DREGS:%vreg6 PTRDISPREGS:%vreg7 | |
352B %vreg9<def> = COPY %vreg6; PTRDISPREGS:%vreg9 DREGS:%vreg6 | |
368B %vreg8<earlyclobber,def> = LDDWRdPtrQ %vreg9, 6; mem:LD2[%5](noalias=!1,!3,!5,!6,!8)(invariant) DREGS:%vreg8 PTRDISPREGS:%vreg9 | |
384B ADJCALLSTACKDOWN 0, %SP<imp-def,dead>, %SREG<imp-def,dead>, %SP<imp-use> | |
400B %vreg10<def> = LDIWRdK <ga:@str.2y>; DLDREGS:%vreg10 | |
416B %vreg11<def> = LDIWRdK 7; DLDREGS:%vreg11 | |
432B %R23R22<def> = COPY %vreg10; DLDREGS:%vreg10 | |
448B %R21R20<def> = COPY %vreg11; DLDREGS:%vreg11 | |
464B %R31R30<def> = COPY %vreg8; DREGS:%vreg8 | |
480B ICALL %R31R30<kill>, %R25R24<undef>, %R23R22<kill>, %R21R20<kill>, <regmask %R2 %R3 %R4 %R5 %R6 %R7 %R8 %R9 %R10 %R11 %R12 %R13 %R14 %R15 %R16 %R17 %R28 %R29 %R3R2 %R5R4 %R7R6 %R9R8 %R11R10 %R13R12 %R15R14 %R17R16 %R29R28>, %SP<imp-use>, %R31R30<imp-use>, %SP<imp-def>, %R24<imp-def,dead> | |
496B ADJCALLSTACKUP 0, 0, %SP<imp-def,dead>, %SREG<imp-def,dead>, %SP<imp-use> | |
# End machine code for function _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E. | |
********** SIMPLE REGISTER COALESCING ********** | |
********** Function: _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E | |
********** JOINING INTERVALS *********** | |
start: | |
start: | |
start: | |
16B %vreg0<def> = COPY %R25R24; DREGS:%vreg0 | |
Considering merging %vreg0 with %R25R24 | |
Can only merge into reserved registers. | |
_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit: | |
bb2: | |
bb3: | |
bb4: | |
320B %vreg7<def> = COPY %vreg0; PTRDISPREGS:%vreg7 DREGS:%vreg0 | |
Considering merging to PTRDISPREGS with %vreg7 in %vreg0 | |
RHS = %vreg7 [320r,336r:0) 0@320r | |
LHS = %vreg0 [16r,240B:0)[304B,320r:0) 0@16r | |
merge %vreg7:0@320r into %vreg0:0@16r --> @16r | |
erased: 320r %vreg7<def> = COPY %vreg0; PTRDISPREGS:%vreg7 DREGS:%vreg0 | |
AllocationOrder(DREGS) = [ %R25R24 %R19R18 %R21R20 %R23R22 %R31R30 %R27R26 %R29R28 %R17R16 %R15R14 %R13R12 %R11R10 %R9R8 %R7R6 %R5R4 %R3R2 ] | |
AllocationOrder(PTRDISPREGS) = [ %R31R30 %R29R28 ] (sub-class) | |
updated: 336B %vreg6<earlyclobber,def> = LDDWRdPtrQ %vreg0, 18; mem:LD2[%2](noalias=!1,!3,!5,!6,!8)(dereferenceable) DREGS:%vreg6 PTRDISPREGS:%vreg0 | |
Success: %vreg7 -> %vreg0 | |
Result = %vreg0 [16r,240B:0)[304B,336r:0) 0@16r | |
352B %vreg9<def> = COPY %vreg6; PTRDISPREGS:%vreg9 DREGS:%vreg6 | |
Considering merging to PTRDISPREGS with %vreg6 in %vreg9 | |
RHS = %vreg6 [336e,352r:0) 0@336e | |
LHS = %vreg9 [352r,368r:0) 0@352r | |
merge %vreg9:0@352r into %vreg6:0@336e --> @336e | |
erased: 352r %vreg9<def> = COPY %vreg6; PTRDISPREGS:%vreg9 DREGS:%vreg6 | |
updated: 336B %vreg9<earlyclobber,def> = LDDWRdPtrQ %vreg0, 18; mem:LD2[%2](noalias=!1,!3,!5,!6,!8)(dereferenceable) PTRDISPREGS:%vreg9,%vreg0 | |
Success: %vreg6 -> %vreg9 | |
Result = %vreg9 [336e,368r:0) 0@336e | |
432B %R23R22<def> = COPY %vreg10; DLDREGS:%vreg10 | |
Considering merging %vreg10 with %R23R22 | |
Can only merge into reserved registers. | |
448B %R21R20<def> = COPY %vreg11; DLDREGS:%vreg11 | |
Considering merging %vreg11 with %R21R20 | |
Can only merge into reserved registers. | |
464B %R31R30<def> = COPY %vreg8; DREGS:%vreg8 | |
Considering merging %vreg8 with %R31R30 | |
Can only merge into reserved registers. | |
Trying to inflate 2 regs. | |
********** INTERVALS ********** | |
R24 [0B,16r:0)[480r,480d:1) 0@0B-phi 1@480r | |
R25 [0B,16r:0) 0@0B-phi | |
%vreg0 [16r,240B:0)[304B,336r:0) 0@16r | |
%vreg3 [32r,48r:0) 0@32r | |
%vreg4 [112r,192r:0) 0@112r | |
%vreg8 [368e,464r:0) 0@368e | |
%vreg9 [336e,368r:0) 0@336e | |
%vreg10 [400r,432r:0) 0@400r | |
%vreg11 [416r,448r:0) 0@416r | |
RegMasks: 480r | |
********** MACHINEINSTRS ********** | |
# Machine code for function _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E: NoPHIs, TracksLiveness | |
Frame Objects: | |
fi#0: size=2, align=2, at location [SP+2] | |
Function Live Ins: %R25R24 in %vreg0 | |
0B BB#0: derived from LLVM BB %start | |
Live Ins: %R25R24 | |
16B %vreg0<def> = COPY %R25R24; PTRDISPREGS:%vreg0 | |
32B %vreg3<def> = LDIRdK 1; LD8:%vreg3 | |
48B CPIRdK %vreg3, 0, %SREG<imp-def>, %SREG<imp-use,kill>; LD8:%vreg3 | |
64B BRNEk <BB#3>, %SREG<imp-use,kill> | |
80B RJMPk <BB#1> | |
Successors according to CFG: BB#3(0x7ffff800 / 0x80000000 = 100.00%) BB#1(0x00000800 / 0x80000000 = 0.00%) | |
96B BB#1: derived from LLVM BB %start | |
Predecessors according to CFG: BB#0 | |
112B %vreg4<def> = LDIRdK 0; LD8:%vreg4 | |
128B CPIRdK %vreg4, 0, %SREG<imp-def>, %SREG<imp-use,kill>; LD8:%vreg4 | |
144B BRNEk <BB#4>, %SREG<imp-use,kill> | |
160B RJMPk <BB#2> | |
Successors according to CFG: BB#4(0x2ab00000 / 0x80000000 = 33.35%) BB#2(0x55500000 / 0x80000000 = 66.65%) | |
176B BB#2: derived from LLVM BB %start | |
Predecessors according to CFG: BB#1 | |
192B CPIRdK %vreg4, 0, %SREG<imp-def>, %SREG<imp-use,kill>; LD8:%vreg4 | |
208B BRNEk <BB#5>, %SREG<imp-use,kill> | |
224B RJMPk <BB#6> | |
Successors according to CFG: BB#5(0x400c00c0 / 0x80000000 = 50.04%) BB#6(0x3ff3ff40 / 0x80000000 = 49.96%) | |
240B BB#3: derived from LLVM BB %_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit | |
Predecessors according to CFG: BB#0 | |
256B RET | |
272B BB#4: derived from LLVM BB %bb2 | |
Predecessors according to CFG: BB#1 | |
288B BB#5: derived from LLVM BB %bb3 | |
Predecessors according to CFG: BB#2 | |
304B BB#6: derived from LLVM BB %bb4 | |
Predecessors according to CFG: BB#2 | |
336B %vreg9<earlyclobber,def> = LDDWRdPtrQ %vreg0, 18; mem:LD2[%2](noalias=!1,!3,!5,!6,!8)(dereferenceable) PTRDISPREGS:%vreg9,%vreg0 | |
368B %vreg8<earlyclobber,def> = LDDWRdPtrQ %vreg9, 6; mem:LD2[%5](noalias=!1,!3,!5,!6,!8)(invariant) DREGS:%vreg8 PTRDISPREGS:%vreg9 | |
384B ADJCALLSTACKDOWN 0, %SP<imp-def,dead>, %SREG<imp-def,dead>, %SP<imp-use> | |
400B %vreg10<def> = LDIWRdK <ga:@str.2y>; DLDREGS:%vreg10 | |
416B %vreg11<def> = LDIWRdK 7; DLDREGS:%vreg11 | |
432B %R23R22<def> = COPY %vreg10; DLDREGS:%vreg10 | |
448B %R21R20<def> = COPY %vreg11; DLDREGS:%vreg11 | |
464B %R31R30<def> = COPY %vreg8; DREGS:%vreg8 | |
480B ICALL %R31R30<kill>, %R25R24<undef>, %R23R22<kill>, %R21R20<kill>, <regmask %R2 %R3 %R4 %R5 %R6 %R7 %R8 %R9 %R10 %R11 %R12 %R13 %R14 %R15 %R16 %R17 %R28 %R29 %R3R2 %R5R4 %R7R6 %R9R8 %R11R10 %R13R12 %R15R14 %R17R16 %R29R28>, %SP<imp-use>, %R31R30<imp-use>, %SP<imp-def>, %R24<imp-def,dead> | |
496B ADJCALLSTACKUP 0, 0, %SP<imp-def,dead>, %SREG<imp-def,dead>, %SP<imp-use> | |
# End machine code for function _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E. | |
block-frequency: _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E | |
================================================================================================================= | |
reverse-post-order-traversal | |
- 0: BB0[start] | |
- 1: BB1[start] | |
- 2: BB2[start] | |
- 3: BB6[bb4] | |
- 4: BB5[bb3] | |
- 5: BB4[bb2] | |
- 6: BB3[_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit] | |
loop-detection | |
compute-mass-in-function | |
- node: BB0[start] | |
=> [ local ] weight = 2147481600, succ = BB3[_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit] | |
=> [ local ] weight = 2048, succ = BB1[start] | |
=> mass: ffffffffffffffff | |
=> assign 00000fffffffffff (fffff00000000000) to BB1[start] | |
=> assign fffff00000000000 (0000000000000000) to BB3[_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit] | |
- node: BB1[start] | |
=> [ local ] weight = 716177408, succ = BB4[bb2] | |
=> [ local ] weight = 1431306240, succ = BB2[start] | |
=> mass: 00000fffffffffff | |
=> assign 00000aa9ffffffff (0000055600000000) to BB2[start] | |
=> assign 0000055600000000 (0000000000000000) to BB4[bb2] | |
- node: BB2[start] | |
=> [ local ] weight = 1074528448, succ = BB5[bb3] | |
=> [ local ] weight = 1072955200, succ = BB6[bb4] | |
=> mass: 00000aa9ffffffff | |
=> assign 00000554000000ff (00000555ffffff00) to BB6[bb4] | |
=> assign 00000555ffffff00 (0000000000000000) to BB5[bb3] | |
- node: BB6[bb4] | |
=> mass: 00000554000000ff | |
- node: BB5[bb3] | |
=> mass: 00000555ffffff00 | |
- node: BB4[bb2] | |
=> mass: 0000055600000000 | |
- node: BB3[_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit] | |
=> mass: fffff00000000000 | |
float-to-int: min = 0.000000317580998, max = 1.0, factor = 25190424.02 | |
- BB0[start]: float = 1.0, scaled = 25190424.02, int = 25190424 | |
- BB1[start]: float = 0.0000009536743164, scaled = 24.02346041, int = 24 | |
- BB2[start]: float = 0.0000006356276572, scaled = 16.0117302, int = 16 | |
- BB6[bb4]: float = 0.000000317580998, scaled = 8.0, int = 8 | |
- BB5[bb3]: float = 0.0000003180466592, scaled = 8.011730205, int = 8 | |
- BB4[bb2]: float = 0.0000003180466592, scaled = 8.011730205, int = 8 | |
- BB3[_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit]: float = 0.9999990463, scaled = 25190400.0, int = 25190399 | |
block-frequency-info: _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E | |
- BB0[start]: float = 1.0, int = 25190424 | |
- BB1[start]: float = 0.00000095367, int = 24 | |
- BB2[start]: float = 0.00000063563, int = 16 | |
- BB3[_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit]: float = 1.0, int = 25190399 | |
- BB4[bb2]: float = 0.00000031805, int = 8 | |
- BB5[bb3]: float = 0.00000031805, int = 8 | |
- BB6[bb4]: float = 0.00000031758, int = 8 | |
********** GREEDY REGISTER ALLOCATION ********** | |
********** Function: _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E | |
********** Compute Spill Weights ********** | |
********** Function: _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E | |
********** INTERVALS ********** | |
R24 [0B,16r:0)[480r,480d:1) 0@0B-phi 1@480r | |
R25 [0B,16r:0) 0@0B-phi | |
%vreg0 [16r,240B:0)[304B,336r:0) 0@16r | |
%vreg3 [32r,48r:0) 0@32r | |
%vreg4 [112r,192r:0) 0@112r | |
%vreg8 [368e,464r:0) 0@368e | |
%vreg9 [336e,368r:0) 0@336e | |
%vreg10 [400r,432r:0) 0@400r | |
%vreg11 [416r,448r:0) 0@416r | |
RegMasks: 480r | |
********** MACHINEINSTRS ********** | |
# Machine code for function _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E: NoPHIs, TracksLiveness | |
Frame Objects: | |
fi#0: size=2, align=2, at location [SP+2] | |
Function Live Ins: %R25R24 in %vreg0 | |
0B BB#0: derived from LLVM BB %start | |
Live Ins: %R25R24 | |
16B %vreg0<def> = COPY %R25R24; PTRDISPREGS:%vreg0 | |
32B %vreg3<def> = LDIRdK 1; LD8:%vreg3 | |
48B CPIRdK %vreg3, 0, %SREG<imp-def>, %SREG<imp-use,kill>; LD8:%vreg3 | |
64B BRNEk <BB#3>, %SREG<imp-use,kill> | |
80B RJMPk <BB#1> | |
Successors according to CFG: BB#3(0x7ffff800 / 0x80000000 = 100.00%) BB#1(0x00000800 / 0x80000000 = 0.00%) | |
96B BB#1: derived from LLVM BB %start | |
Predecessors according to CFG: BB#0 | |
112B %vreg4<def> = LDIRdK 0; LD8:%vreg4 | |
128B CPIRdK %vreg4, 0, %SREG<imp-def>, %SREG<imp-use,kill>; LD8:%vreg4 | |
144B BRNEk <BB#4>, %SREG<imp-use,kill> | |
160B RJMPk <BB#2> | |
Successors according to CFG: BB#4(0x2ab00000 / 0x80000000 = 33.35%) BB#2(0x55500000 / 0x80000000 = 66.65%) | |
176B BB#2: derived from LLVM BB %start | |
Predecessors according to CFG: BB#1 | |
192B CPIRdK %vreg4, 0, %SREG<imp-def>, %SREG<imp-use,kill>; LD8:%vreg4 | |
208B BRNEk <BB#5>, %SREG<imp-use,kill> | |
224B RJMPk <BB#6> | |
Successors according to CFG: BB#5(0x400c00c0 / 0x80000000 = 50.04%) BB#6(0x3ff3ff40 / 0x80000000 = 49.96%) | |
240B BB#3: derived from LLVM BB %_ZN4core3fmt8builders10DebugTuple6finish17h8f1e007edfc4d0a6E.exit | |
Predecessors according to CFG: BB#0 | |
256B RET | |
272B BB#4: derived from LLVM BB %bb2 | |
Predecessors according to CFG: BB#1 | |
288B BB#5: derived from LLVM BB %bb3 | |
Predecessors according to CFG: BB#2 | |
304B BB#6: derived from LLVM BB %bb4 | |
Predecessors according to CFG: BB#2 | |
336B %vreg9<earlyclobber,def> = LDDWRdPtrQ %vreg0, 18; mem:LD2[%2](noalias=!1,!3,!5,!6,!8)(dereferenceable) PTRDISPREGS:%vreg9,%vreg0 | |
368B %vreg8<earlyclobber,def> = LDDWRdPtrQ %vreg9, 6; mem:LD2[%5](noalias=!1,!3,!5,!6,!8)(invariant) DREGS:%vreg8 PTRDISPREGS:%vreg9 | |
384B ADJCALLSTACKDOWN 0, %SP<imp-def,dead>, %SREG<imp-def,dead>, %SP<imp-use> | |
400B %vreg10<def> = LDIWRdK <ga:@str.2y>; DLDREGS:%vreg10 | |
416B %vreg11<def> = LDIWRdK 7; DLDREGS:%vreg11 | |
432B %R23R22<def> = COPY %vreg10; DLDREGS:%vreg10 | |
448B %R21R20<def> = COPY %vreg11; DLDREGS:%vreg11 | |
464B %R31R30<def> = COPY %vreg8; DREGS:%vreg8 | |
480B ICALL %R31R30<kill>, %R25R24<undef>, %R23R22<kill>, %R21R20<kill>, <regmask %R2 %R3 %R4 %R5 %R6 %R7 %R8 %R9 %R10 %R11 %R12 %R13 %R14 %R15 %R16 %R17 %R28 %R29 %R3R2 %R5R4 %R7R6 %R9R8 %R11R10 %R13R12 %R15R14 %R17R16 %R29R28>, %SP<imp-use>, %R31R30<imp-use>, %SP<imp-def>, %R24<imp-def,dead> | |
496B ADJCALLSTACKUP 0, 0, %SP<imp-def,dead>, %SREG<imp-def,dead>, %SP<imp-use> | |
# End machine code for function _ZN67_$LT$core..char..EscapeDefaultState$u20$as$u20$core..fmt..Debug$GT$3fmt17head62c4cf4772931E. | |
selectOrSplit DREGS:%vreg8 [368e,464r:0) 0@368e w=1.290772e-09 | |
AllocationOrder(DREGS) = [ %R25R24 %R19R18 %R21R20 %R23R22 %R31R30 %R27R26 %R17R16 %R15R14 %R13R12 %R11R10 %R9R8 %R7R6 %R5R4 %R3R2 ] | |
hints: %R31R30 | |
assigning %vreg8 to %R31R30: R30 [368e,464r:0) 0@368e R31 [368e,464r:0) 0@368e | |
selectOrSplit DLDREGS:%vreg10 [400r,432r:0) 0@400r w=7.424926e-10 | |
AllocationOrder(DLDREGS) = [ %R25R24 %R19R18 %R21R20 %R23R22 %R31R30 %R27R26 %R17R16 ] (sub-class) | |
hints: %R23R22 | |
assigning %vreg10 to %R23R22: R22 [400r,432r:0) 0@400r R23 [400r,432r:0) 0@400r | |
selectOrSplit DLDREGS:%vreg11 [416r,448r:0) 0@416r w=7.424926e-10 | |
hints: %R21R20 | |
assigning %vreg11 to %R21R20: R20 [416r,448r:0) 0@416r R21 [416r,448r:0) 0@416r | |
selectOrSplit PTRDISPREGS:%vreg0 [16r,240B:0)[304B,336r:0) 0@16r w=1.524391e-03 | |
AllocationOrder(PTRDISPREGS) = [ %R31R30 ] (sub-class) | |
assigning %vreg0 to %R31R30: R30 [16r,240B:0)[304B,336r:0) 0@16r R31 [16r,240B:0)[304B,336r:0) 0@16r | |
selectOrSplit LD8:%vreg4 [112r,192r:0) 0@112r w=2.646508e-09 | |
AllocationOrder(GPR8) = [ %R24 %R25 %R18 %R19 %R20 %R21 %R22 %R23 %R30 %R31 %R26 %R27 %R17 %R16 %R15 %R14 %R13 %R12 %R11 %R10 %R9 %R8 %R7 %R6 %R5 %R4 %R3 %R2 ] | |
AllocationOrder(LD8) = [ %R24 %R25 %R18 %R19 %R20 %R21 %R22 %R23 %R30 %R31 %R26 %R27 %R17 %R16 ] (sub-class) | |
assigning %vreg4 to %R24: R24 [112r,192r:0) 0@112r | |
selectOrSplit LD8:%vreg3 [32r,48r:0) 0@32r w=INF | |
assigning %vreg3 to %R24: R24 [32r,48r:0) 0@32r | |
selectOrSplit PTRDISPREGS:%vreg9 [336e,368r:0) 0@336e w=INF | |
RS_Assign Cascade 0 | |
evicting %R31R30 interference: Cascade 1 | |
unassigning %vreg0 from %R31R30: R30 R31 | |
unassigning %vreg8 from %R31R30: R30 R31 | |
assigning %vreg9 to %R31R30: R30 [336e,368r:0) 0@336e R31 [336e,368r:0) 0@336e | |
queuing new interval: %vreg0 [16r,240B:0)[304B,336r:0) 0@16r | |
queuing new interval: %vreg8 [368e,464r:0) 0@368e | |
selectOrSplit DREGS:%vreg8 [368e,464r:0) 0@368e w=1.290772e-09 | |
hints: %R31R30 | |
missed hint %R31R30 | |
assigning %vreg8 to %R25R24: R24 [368e,464r:0) 0@368e R25 [368e,464r:0) 0@368e | |
selectOrSplit PTRDISPREGS:%vreg0 [16r,240B:0)[304B,336r:0) 0@16r w=1.524391e-03 | |
RS_Assign Cascade 1 | |
wait for second round | |
queuing new interval: %vreg0 [16r,240B:0)[304B,336r:0) 0@16r | |
selectOrSplit PTRDISPREGS:%vreg0 [16r,240B:0)[304B,336r:0) 0@16r w=1.524391e-03 | |
RS_Split Cascade 1 | |
Analyze counted 2 instrs in 2 blocks, through 2 blocks. | |
Compact region bundles, v=1 EB#1. | |
%R31R30 static = 0.0000003175809982, v=1, total = 0.000001270323993 with bundles EB#1. | |
Split for %R31R30 in 1 bundles, intv 1. | |
splitAroundRegion with 2 globals. | |
BB#0 [0B;96B), uses 16r-16r, reg-out 1, enter after invalid, defined in block after interference. | |
selectIntv 1 -> 1 | |
useIntv [16r;96B): [16r;96B):1 | |
BB#6 isolated. | |
enterIntvBefore 336r: valno 0 | |
leaveIntvAfter 336r: not live | |
useIntv [328r;352B): [16r;96B):1 [328r;352B):2 | |
BB#1 [96B;176B) intf invalid-invalid, live-through 1 -> 0, spill on entry. | |
selectIntv 2 -> 1 | |
leaveIntvAtTop BB#1, 96B [16r;104r):1 [328r;352B):2 | |
Single complement def at 104r | |
Removing 0 back-copies. | |
blit [16r,240B:0): [16r;104r)=1(%vreg15):0 [104r;240B)=0(%vreg14):0 | |
blit [304B,336r:0): [304B;328r)=0(%vreg14):0 [328r;336r)=2(%vreg16):0 | |
rewr BB#0 16r:1 %vreg15<def> = COPY %R25R24; PTRDISPREGS:%vreg15 | |
rewr BB#6 336B:2 %vreg9<earlyclobber,def> = LDDWRdPtrQ %vreg16, 18; mem:LD2[%2](noalias=!1,!3,!5,!6,!8)(dereferenceable) PTRDISPREGS:%vreg9,%vreg16 | |
rewr BB#6 328B:0 %vreg16<def> = COPY %vreg14; PTRDISPREGS:%vreg16,%vreg14 | |
rewr BB#1 104B:1 %vreg14<def> = COPY %vreg15; PTRDISPREGS:%vreg14,%vreg15 | |
Inflated %vreg14 to DREGS | |
Inflated %vreg15 to DREGS | |
queuing new interval: %vreg14 [104r,240B:0)[304B,328r:0) 0@104r | |
queuing new interval: %vreg15 [16r,104r:0) 0@16r | |
queuing new interval: %vreg16 [328r,336r:0) 0@328r | |
selectOrSplit DREGS:%vreg15 [16r,104r:0) 0@16r w=2.069674e-03 | |
hints: %R25R24 | |
missed hint %R25R24 | |
evicting %R25R24 interference: Cascade 2 | |
unassigning %vreg3 from %R24: R24 | |
assigning %vreg15 to %R25R24: R24 [16r,104r:0) 0@16r R25 [16r,104r:0) 0@16r | |
queuing new interval: %vreg3 [32r,48r:0) 0@32r | |
selectOrSplit DREGS:%vreg14 [104r,240B:0)[304B,328r:0) 0@104r w=2.291120e-09 | |
hints: %R25R24 | |
assigning %vreg14 to %R19R18: R18 [104r,240B:0)[304B,328r:0) 0@104r R19 [104r,240B:0)[304B,328r:0) 0@104r | |
selectOrSplit LD8:%vreg3 [32r,48r:0) 0@32r w=INF | |
assigning %vreg3 to %R18: R18 [32r,48r:0) 0@32r | |
selectOrSplit PTRDISPREGS:%vreg16 [328r,336r:0) 0@328r w=INF | |
RS_Assign Cascade 0 | |
wait for second round | |
queuing new interval: %vreg16 [328r,336r:0) 0@328r | |
selectOrSplit PTRDISPREGS:%vreg16 [328r,336r:0) 0@328r w=INF | |
RS_Split Cascade 0 | |
Analyze counted 2 instrs in 1 blocks, through 0 blocks. | |
Split around 2 individual instrs. | |
AllocationOrder(DREGS) = [ %R25R24 %R19R18 %R21R20 %R23R22 %R31R30 %R27R26 %R29R28 %R17R16 %R15R14 %R13R12 %R11R10 %R9R8 %R7R6 %R5R4 %R3R2 ] | |
skip: 328r %vreg16<def> = COPY %vreg14; PTRDISPREGS:%vreg16 DREGS:%vreg14 | |
AllocationOrder(PTRDISPREGS) = [ %R31R30 %R29R28 ] (sub-class) | |
enterIntvBefore 336r: valno 0 | |
leaveIntvAfter 336r: not live | |
useIntv [332r;352B): [332r;352B):1 | |
Direct complement def at 328r | |
Removing 0 back-copies. | |
blit [328r,336r:0): [328r;332r)=0(%vreg17):0 [332r;336r)=1(%vreg18):0 | |
rewr BB#6 328r:0 %vreg17<def> = COPY %vreg14; PTRDISPREGS:%vreg17 DREGS:%vreg14 | |
rewr BB#6 336B:1 %vreg9<earlyclobber,def> = LDDWRdPtrQ %vreg18, 18; mem:LD2[%2](noalias=!1,!3,!5,!6,!8)(dereferenceable) PTRDISPREGS:%vreg9,%vreg18 | |
rewr BB#6 332B:0 %vreg18<def> = COPY %vreg17; PTRDISPREGS:%vreg18,%vreg17 | |
Inflated %vreg17 to DREGS | |
queuing new interval: %vreg17 [328r,332r:0) 0@328r | |
queuing new interval: %vreg18 [332r,336r:0) 0@332r | |
selectOrSplit DREGS:%vreg17 [328r,332r:0) 0@328r w=INF | |
hints: %R19R18 | |
assigning %vreg17 to %R19R18: R18 [328r,332r:0) 0@328r R19 [328r,332r:0) 0@328r | |
selectOrSplit PTRDISPREGS:%vreg18 [332r,336r:0) 0@332r w=INF | |
RS_Spill Cascade 0 | |
Try last chance recoloring for %vreg18 [332r,336r:0) 0@332r | |
Try to assign: %vreg18 [332r,336r:0) 0@332r to %R31R30 | |
unassigning %vreg9 from %R31R30: R30 R31 | |
assigning %vreg18 to %R31R30: R30 [332r,336r:0) 0@332r R31 [332r,336r:0) 0@332r | |
Try to recolor: %vreg9 [336e,368r:0) 0@336e | |
RS_Assign Cascade 1 | |
wait for second round | |
Fail to assign: %vreg18 [332r,336r:0) 0@332r to %R31R30 | |
unassigning %vreg18 from %R31R30: R30 R31 | |
assigning %vreg9 to %R31R30: R30 [336e,368r:0) 0@336e R31 [336e,368r:0) 0@336e | |
LLVM ERROR: ran out of registers during register allocation |
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