/riscv_gpio.h Secret
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September 26, 2019 14:09
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shima-529 revised this gist
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This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters. Learn more about bidirectional Unicode charactersOriginal file line number Diff line number Diff line change @@ -21,6 +21,7 @@ struct _st_gpio { #define GPIOE ((volatile struct _st_gpio *)GPIOE_BASE) #define bit(n) (1 << (n)) #define shift(val, n) ((val) << (n)) #define GPIO_CTL_MD_INPUT 0 #define GPIO_CTL_MD_OUTPUT_MEDIUM 1 -
Sep 26, 2019 .There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters. Learn more about bidirectional Unicode charactersOriginal file line number Diff line number Diff line change @@ -0,0 +1,101 @@ #define GPIOA_BASE 0x40010800 #define GPIOB_BASE 0x40010C00 #define GPIOC_BASE 0x40011000 #define GPIOD_BASE 0x40011400 #define GPIOE_BASE 0x40011800 struct _st_gpio { int CTL0; int CTL1; int ISTAT; int OCTL; int BOP; int BC; int LOCK; }; #define GPIOA ((volatile struct _st_gpio *)GPIOA_BASE) #define GPIOB ((volatile struct _st_gpio *)GPIOB_BASE) #define GPIOC ((volatile struct _st_gpio *)GPIOC_BASE) #define GPIOD ((volatile struct _st_gpio *)GPIOD_BASE) #define GPIOE ((volatile struct _st_gpio *)GPIOE_BASE) #define bit(n) (1 << (n)) #define GPIO_CTL_MD_INPUT 0 #define GPIO_CTL_MD_OUTPUT_MEDIUM 1 #define GPIO_CTL_MD_OUTPUT_LOW 2 #define GPIO_CTL_MD_OUTPUT_HIGH 3 #define GPIO_CTL_CTL_ANALOG 0 #define GPIO_CTL_CTL_FLOATING_INPUT 1 #define GPIO_CTL_CTL_INPUT 2 #define GPIO_CTL_CTL_GPIO_OUTPUT_PP 0 #define GPIO_CTL_CTL_GPIO_OUTPUT_OD 1 #define GPIO_CTL_CTL_AFIO_OUTPUT_PP 2 #define GPIO_CTL_CTL_AFIO_OUTPUT_OD 3 #define GPIO_CTL0_MD0_Pos 0 #define GPIO_CTL0_CTL0_Pos 2 #define GPIO_CTL0_MD1_Pos 4 #define GPIO_CTL0_CTL1_Pos 6 #define GPIO_CTL0_MD2_Pos 8 #define GPIO_CTL0_CTL2_Pos 10 #define GPIO_CTL0_MD3_Pos 12 #define GPIO_CTL0_CTL3_Pos 14 #define GPIO_CTL0_MD4_Pos 16 #define GPIO_CTL0_CTL4_Pos 18 #define GPIO_CTL0_MD5_Pos 20 #define GPIO_CTL0_CTL5_Pos 22 #define GPIO_CTL0_MD6_Pos 24 #define GPIO_CTL0_CTL6_Pos 26 #define GPIO_CTL0_MD7_Pos 28 #define GPIO_CTL0_CTL7_Pos 30 #define GPIO_CTL0_MD0_Msk shift(0x3, 0) #define GPIO_CTL0_CTL0_Msk shift(0x3, 2) #define GPIO_CTL0_MD1_Msk shift(0x3, 4) #define GPIO_CTL0_CTL1_Msk shift(0x3, 6) #define GPIO_CTL0_MD2_Msk shift(0x3, 8) #define GPIO_CTL0_CTL2_Msk shift(0x3, 10) #define GPIO_CTL0_MD3_Msk shift(0x3, 12) #define GPIO_CTL0_CTL3_Msk shift(0x3, 14) #define GPIO_CTL0_MD4_Msk shift(0x3, 16) #define GPIO_CTL0_CTL4_Msk shift(0x3, 18) #define GPIO_CTL0_MD5_Msk shift(0x3, 20) #define GPIO_CTL0_CTL5_Msk shift(0x3, 22) #define GPIO_CTL0_MD6_Msk shift(0x3, 24) #define GPIO_CTL0_CTL6_Msk shift(0x3, 26) #define GPIO_CTL0_MD7_Msk shift(0x3, 28) #define GPIO_CTL0_CTL7_Msk shift(0x3, 30) #define GPIO_CTL1_MD8_Pos 0 #define GPIO_CTL1_CTL8_Pos 2 #define GPIO_CTL1_MD9_Pos 4 #define GPIO_CTL1_CTL9_Pos 6 #define GPIO_CTL1_MD10_Pos 8 #define GPIO_CTL1_CTL10_Pos 10 #define GPIO_CTL1_MD11_Pos 12 #define GPIO_CTL1_CTL11_Pos 14 #define GPIO_CTL1_MD12_Pos 16 #define GPIO_CTL1_CTL12_Pos 18 #define GPIO_CTL1_MD13_Pos 20 #define GPIO_CTL1_CTL13_Pos 22 #define GPIO_CTL1_MD14_Pos 24 #define GPIO_CTL1_CTL14_Pos 26 #define GPIO_CTL1_MD15_Pos 28 #define GPIO_CTL1_CTL15_Pos 30 #define GPIO_CTL1_MD8_Msk shift(0x3, 0) #define GPIO_CTL1_CTL8_Msk shift(0x3, 2) #define GPIO_CTL1_MD9_Msk shift(0x3, 4) #define GPIO_CTL1_CTL9_Msk shift(0x3, 6) #define GPIO_CTL1_MD10_Msk shift(0x3, 8) #define GPIO_CTL1_CTL10_Msk shift(0x3, 10) #define GPIO_CTL1_MD11_Msk shift(0x3, 12) #define GPIO_CTL1_CTL11_Msk shift(0x3, 14) #define GPIO_CTL1_MD12_Msk shift(0x3, 16) #define GPIO_CTL1_CTL12_Msk shift(0x3, 18) #define GPIO_CTL1_MD13_Msk shift(0x3, 20) #define GPIO_CTL1_CTL13_Msk shift(0x3, 22) #define GPIO_CTL1_MD14_Msk shift(0x3, 24) #define GPIO_CTL1_CTL14_Msk shift(0x3, 26) #define GPIO_CTL1_MD15_Msk shift(0x3, 28) #define GPIO_CTL1_CTL15_Msk shift(0x3, 30)