gdb 16bit real-mode

gdb_16bit_realmode.txt

# Based on code by
# 08/2011 Hugo Mercier - GPL v3 license
#
# 11/2022 @shinmai

set confirm off
set verbose off
set prompt \033[31mreal-mode-gdb$ \033[0m

set output-radix 0d10
set input-radix 0d10

# These make gdb never pause in its output
set height 0
set width 0

# Intel syntax
set disassembly-flavor intel

set $SHOW_CONTEXT = 1

set $REAL_MODE = 1

# By default A20 is present
set $ADDRESS_MASK = 0x1FFFFF

# nb of instructions to display
set $CODE_SIZE = 10

define compute_regs
  set $rax = ((unsigned long)$eax & 0xFFFF)
  set $rbx = ((unsigned long)$ebx & 0xFFFF)
  set $rcx = ((unsigned long)$ecx & 0xFFFF)
  set $rdx = ((unsigned long)$edx & 0xFFFF)
  set $rsi = ((unsigned long)$esi & 0xFFFF)
  set $rdi = ((unsigned long)$edi & 0xFFFF)
  set $rbp = ((unsigned long)$ebp & 0xFFFF)
  set $rsp = ((unsigned long)$esp & 0xFFFF)
  set $rcs = ((unsigned long)$cs & 0xFFFF)
  set $rds = ((unsigned long)$ds & 0xFFFF)
  set $res = ((unsigned long)$es & 0xFFFF)
  set $rss = ((unsigned long)$ss & 0xFFFF)
  set $rip = ((((unsigned long)$cs & 0xFFFF) << 4) + ((unsigned long)$eip & 0xFFFF)) & $ADDRESS_MASK
  set $r_ss_sp = ((((unsigned long)$ss & 0xFFFF) << 4) + ((unsigned long)$esp & 0xFFFF)) & $ADDRESS_MASK
  set $r_ss_bp = ((((unsigned long)$ss & 0xFFFF) << 4) + ((unsigned long)$ebp & 0xFFFF)) & $ADDRESS_MASK
end

define print_regs
  printf "AX: %04X BX: %04X ", $rax, $rbx
  printf "CX: %04X DX: %04X\n", $rcx, $rdx
  printf "SI: %04X DI: %04X ", $rsi, $rdi
  printf "SP: %04X BP: %04X\n", $rsp, $rbp
  printf "CS: %04X DS: %04X ", $rcs, $rds
  printf "ES: %04X SS: %04X\n", $res, $rss
  printf "\n"
  printf "IP: %04X EIP:%08X\n", ((unsigned short)$eip & 0xFFFF), $eip
  printf "CS:IP: %04X:%04X (0x%05X)\n", $rcs, ((unsigned short)$eip & 0xFFFF), $rip
  printf "SS:SP: %04X:%04X (0x%05X)\n", $rss, $rsp, $r_ss_sp
  printf "SS:BP: %04X:%04X (0x%05X)\n", $rss, $rbp, $r_ss_bp
end
document print_regs
Print CPU registers
end

define print_data
   if ($argc > 0)
      set $seg = $arg0
      set $off = $arg1
      set $raddr = ($arg0 << 16) + $arg1
      set $maddr = ($arg0 << 4) + $arg1

      set $w = 16
      set $i = (int)0
      while ($i < 4)
        printf "%08X: ", ($raddr + $i * $w)
        set $j = (int)0
        while ($j < $w)
           printf "%02X ", *(unsigned char*)($maddr + $i * $w + $j)
           set $j++
        end
        printf " "
        set $j = (int)0
        while ($j < $w)
           set $c = *(unsigned char*)($maddr + $i * $w + $j)
           if ($c > 32) && ($c < 128)
             printf "%c", $c
           else
             printf "."
           end
           set $j++
        end
        printf "\n"
        set $i++
      end
   end
end

define context
  printf "---------------------------[ DS:SI ]---\n"
  print_data $ds $rsi
  printf "---------------------------[ ES:DI ]---\n"
  print_data $es $rdi

  printf "----------------------------[ CPU ]----\n"
  print_regs
  printf "---------------------------[ CODE ]----\n"
  
  set $_code_size = $CODE_SIZE

  # disassemble
  # first call x/i with an address
  # subsequent calls to x/i will increment address
  if ($_code_size > 0)
    x /i $rip
    set $_code_size--
  end
  while ($_code_size > 0)
    x /i
    set $_code_size--
  end
end

define hook-stop
  compute_regs
  if ($SHOW_CONTEXT > 0)
    context
  end
end

define step_until_ret
  set $SHOW_CONTEXT=0
  set $_found = 0
  while (!$_found)
    set $_p = *(unsigned char*)$rip
    if ($_p == 0xC3 || $_p == 0xCB || $_p == 0xC2 || $_p == 0xCA)
      set $_found = 1
    else
      si
    end
  end
  set $SHOW_CONTEXT=1
  context
end

define step_until_addr
  set $_tofind = $arg0
  set $SHOW_CONTEXT=0
  set $_found = 0
  while (!$_found)
    if ($rip == $_tofind || $eip == $_tofind)
      set $_found = 1
    else
      si
    end
  end
  set $SHOW_CONTEXT=1
  context
end

i386-32bit.xml

<?xml version="1.0"?>
<!-- Copyright (C) 2010-2017 Free Software Foundation, Inc.

     Copying and distribution of this file, with or without modification,
     are permitted in any medium without royalty provided the copyright
     notice and this notice are preserved.  -->

<!-- I386 with SSE -->

<!DOCTYPE target SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.i386.core">
  <flags id="i386_eflags" size="4">
	<field name="" start="22" end="31"/>
	<field name="ID" start="21" end="21"/>
	<field name="VIP" start="20" end="20"/>
	<field name="VIF" start="19" end="19"/>
	<field name="AC" start="18" end="18"/>
	<field name="VM" start="17" end="17"/>
	<field name="RF" start="16" end="16"/>
	<field name="" start="15" end="15"/>
	<field name="NT" start="14" end="14"/>
	<field name="IOPL" start="12" end="13"/>
	<field name="OF" start="11" end="11"/>
	<field name="DF" start="10" end="10"/>
	<field name="IF" start="9" end="9"/>
	<field name="TF" start="8" end="8"/>
	<field name="SF" start="7" end="7"/>
	<field name="ZF" start="6" end="6"/>
	<field name="" start="5" end="5"/>
	<field name="AF" start="4" end="4"/>
	<field name="" start="3" end="3"/>
	<field name="PF" start="2" end="2"/>
	<field name="" start="1" end="1"/>
	<field name="CF" start="0" end="0"/>
  </flags>

  <reg name="eax" bitsize="32" type="int32" regnum="0"/>
  <reg name="ecx" bitsize="32" type="int32"/>
  <reg name="edx" bitsize="32" type="int32"/>
  <reg name="ebx" bitsize="32" type="int32"/>
  <reg name="esp" bitsize="32" type="data_ptr"/>
  <reg name="ebp" bitsize="32" type="data_ptr"/>
  <reg name="esi" bitsize="32" type="int32"/>
  <reg name="edi" bitsize="32" type="int32"/>

  <reg name="eip" bitsize="32" type="code_ptr"/>
  <reg name="eflags" bitsize="32" type="i386_eflags"/>

  <reg name="cs" bitsize="32" type="int32"/>
  <reg name="ss" bitsize="32" type="int32"/>
  <reg name="ds" bitsize="32" type="int32"/>
  <reg name="es" bitsize="32" type="int32"/>
  <reg name="fs" bitsize="32" type="int32"/>
  <reg name="gs" bitsize="32" type="int32"/>

  <!-- Segment descriptor caches and TLS base MSRs -->

  <!--reg name="cs_base" bitsize="32" type="int32"/>
  <reg name="ss_base" bitsize="32" type="int32"/>
  <reg name="ds_base" bitsize="32" type="int32"/>
  <reg name="es_base" bitsize="32" type="int32"/-->
  <reg name="fs_base" bitsize="32" type="int32"/>
  <reg name="gs_base" bitsize="32" type="int32"/>
  <reg name="k_gs_base" bitsize="32" type="int32"/>

  <flags id="i386_cr0" size="4">
	<field name="PG" start="31" end="31"/>
	<field name="CD" start="30" end="30"/>
	<field name="NW" start="29" end="29"/>
	<field name="AM" start="18" end="18"/>
	<field name="WP" start="16" end="16"/>
	<field name="NE" start="5" end="5"/>
	<field name="ET" start="4" end="4"/>
	<field name="TS" start="3" end="3"/>
	<field name="EM" start="2" end="2"/>
	<field name="MP" start="1" end="1"/>
	<field name="PE" start="0" end="0"/>
  </flags>

  <flags id="i386_cr3" size="4">
	<field name="PDBR" start="12" end="31"/>
	<!--field name="" start="3" end="11"/>
	<field name="WT" start="2" end="2"/>
	<field name="CD" start="1" end="1"/>
	<field name="" start="0" end="0"/-->
	<field name="PCID" start="0" end="11"/>
  </flags>

  <flags id="i386_cr4" size="4">
	<field name="VME" start="0" end="0"/>
	<field name="PVI" start="1" end="1"/>
	<field name="TSD" start="2" end="2"/>
	<field name="DE" start="3" end="3"/>
	<field name="PSE" start="4" end="4"/>
	<field name="PAE" start="5" end="5"/>
	<field name="MCE" start="6" end="6"/>
	<field name="PGE" start="7" end="7"/>
	<field name="PCE" start="8" end="8"/>
	<field name="OSFXSR" start="9" end="9"/>
	<field name="OSXMMEXCPT" start="10" end="10"/>
	<field name="UMIP" start="11" end="11"/>
	<field name="LA57" start="12" end="12"/>
	<field name="VMXE" start="13" end="13"/>
	<field name="SMXE" start="14" end="14"/>
	<field name="FSGSBASE" start="16" end="16"/>
	<field name="PCIDE" start="17" end="17"/>
	<field name="OSXSAVE" start="18" end="18"/>
	<field name="SMEP" start="20" end="20"/>
	<field name="SMAP" start="21" end="21"/>
	<field name="PKE" start="22" end="22"/>
  </flags>

  <flags id="i386_efer" size="8">
	<field name="TCE" start="15" end="15"/>
	<field name="FFXSR" start="14" end="14"/>
	<field name="LMSLE" start="13" end="13"/>
	<field name="SVME" start="12" end="12"/>
	<field name="NXE" start="11" end="11"/>
	<field name="LMA" start="10" end="10"/>
	<field name="LME" start="8" end="8"/>
	<field name="SCE" start="0" end="0"/>
  </flags>

  <reg name="cr0" bitsize="32" type="i386_cr0"/>
  <reg name="cr2" bitsize="32" type="int32"/>
  <reg name="cr3" bitsize="32" type="i386_cr3"/>
  <reg name="cr4" bitsize="32" type="i386_cr4"/>
  <reg name="cr8" bitsize="32" type="int32"/>
  <reg name="efer" bitsize="32" type="i386_efer"/>

  <reg name="st0" bitsize="80" type="i387_ext"/>
  <reg name="st1" bitsize="80" type="i387_ext"/>
  <reg name="st2" bitsize="80" type="i387_ext"/>
  <reg name="st3" bitsize="80" type="i387_ext"/>
  <reg name="st4" bitsize="80" type="i387_ext"/>
  <reg name="st5" bitsize="80" type="i387_ext"/>
  <reg name="st6" bitsize="80" type="i387_ext"/>
  <reg name="st7" bitsize="80" type="i387_ext"/>

  <reg name="fctrl" bitsize="32" type="int" group="float"/>
  <reg name="fstat" bitsize="32" type="int" group="float"/>
  <reg name="ftag" bitsize="32" type="int" group="float"/>
  <reg name="fiseg" bitsize="32" type="int" group="float"/>
  <reg name="fioff" bitsize="32" type="int" group="float"/>
  <reg name="foseg" bitsize="32" type="int" group="float"/>
  <reg name="fooff" bitsize="32" type="int" group="float"/>
  <reg name="fop" bitsize="32" type="int" group="float"/>
<!--/feature>
<feature name="org.gnu.gdb.i386.32bit.sse"-->
  <vector id="v4f" type="ieee_single" count="4"/>
  <vector id="v2d" type="ieee_double" count="2"/>
  <vector id="v16i8" type="int8" count="16"/>
  <vector id="v8i16" type="int16" count="8"/>
  <vector id="v4i32" type="int32" count="4"/>
  <vector id="v2i64" type="int64" count="2"/>
  <union id="vec128">
	<field name="v4_float" type="v4f"/>
	<field name="v2_double" type="v2d"/>
	<field name="v16_int8" type="v16i8"/>
	<field name="v8_int16" type="v8i16"/>
	<field name="v4_int32" type="v4i32"/>
	<field name="v2_int64" type="v2i64"/>
	<field name="uint128" type="uint128"/>
  </union>
  <flags id="i386_mxcsr" size="4">
	<field name="IE" start="0" end="0"/>
	<field name="DE" start="1" end="1"/>
	<field name="ZE" start="2" end="2"/>
	<field name="OE" start="3" end="3"/>
	<field name="UE" start="4" end="4"/>
	<field name="PE" start="5" end="5"/>
	<field name="DAZ" start="6" end="6"/>
	<field name="IM" start="7" end="7"/>
	<field name="DM" start="8" end="8"/>
	<field name="ZM" start="9" end="9"/>
	<field name="OM" start="10" end="10"/>
	<field name="UM" start="11" end="11"/>
	<field name="PM" start="12" end="12"/>
	<field name="FZ" start="15" end="15"/>
  </flags>

  <reg name="xmm0" bitsize="128" type="vec128"/>
  <reg name="xmm1" bitsize="128" type="vec128"/>
  <reg name="xmm2" bitsize="128" type="vec128"/>
  <reg name="xmm3" bitsize="128" type="vec128"/>
  <reg name="xmm4" bitsize="128" type="vec128"/>
  <reg name="xmm5" bitsize="128" type="vec128"/>
  <reg name="xmm6" bitsize="128" type="vec128"/>
  <reg name="xmm7" bitsize="128" type="vec128"/>

  <reg name="mxcsr" bitsize="32" type="i386_mxcsr" group="vector"/>
</feature>

target.xml

<?xml version="1.0"?><!DOCTYPE target SYSTEM "gdb-target.dtd">
<target>
    <architecture>i8086</architecture>
    <xi:include href="i386-32bit.xml"/>
</target>