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@shirriff
Created August 23, 2016 05:33
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Device Tree file to enable BeagleBone PRU and pin P8_11. File from https://credentiality2.blogspot.com/2015/09/beaglebone-pru-gpio-example.html
// This DTS overlay sets up one input and one output pin for use by
// PRU0 via its Enhanced GPIO mode, which will let us access those pins
// by writing to R30 bit 15 or reading from R31 bit 14.
// Save this file wherever you want (but I recommend /lib/firmware), as
// "PRU-GPIO-EXAMPLE-00A0.dts".
// Compile with:
// dtc -O dtb -I dts -o /lib/firmware/PRU-GPIO-EXAMPLE-00A0.dtbo -b 0 -@ PRU-GPIO-EXAMPLE-00A0.dts
// You'll have to reboot, after which you can do this as root to activate it:
// echo PRU-GPIO-EXAMPLE > /sys/devices/bone_capemgr.?/slots
/dts-v1/;
/plugin/;
/ {
// This determines which boards can use this DTS overlay
compatible = "ti,beaglebone", "ti,beaglebone-green", "ti,beaglebone-black";
// I think part-number is supposed to correspond with the filename,
// so we'd save this as "PRU-GPIO-EXAMPLE-00A0.dts".
part-number = "PRU-GPIO-EXAMPLE";
// This always seems to be 00A0, and all the .dtbo files in /lib/firmware
// seem to be named foo-00A0.dtbo, but then are loaded without that suffix. So
// for foo-00A0.dtbo we'd do 'echo foo > /sys/devices/bone_capemgr.?/slots'
version = "00A0";
// List the pins and resources we'll be using. This table:
// http://elinux.org/Ti_AM33XX_PRUSSv2#Beaglebone_PRU_connections_and_modes
// shows which pins can be used with PRU0 and PRU1 for input and output via
// registers R31 and R30.
// Our output pin, P8_11, corresponds to PRU 0, register 30, bit 15
// Our input pin, P8_16, corresponds to PRU 0, register 31, bit 14
//
// Beware: Many other PRU EGP pins are reserved by HDMI or onboard flash, which
// would need to be disabled first by editing uEnv.txt and rebooting.
exclusive-use =
"P8.11", "P8.16", "pru0";
fragment@0 {
target = <&am33xx_pinmux>;
__overlay__ {
example_pins: pinmux_pru_pru_pins {
// The offset and mode for pins P8_11 and P8_16 also come from the table linked above.
//
// That table gives offset 0x34 for P8_11, and 0x38 for P8_16.
// It also shows us we want pinmux mode 6 for P8_11 in output mode,
// and again pinmux mode 6 for P8_16 in input mode.
//
// Table 9-60 in the TRM: http://www.ti.com/lit/ug/spruh73l/spruh73l.pdf
// helps us calculate the rest of the configuration value.
//
// For P8_11, the other fields are all 0, so the value is just 0x06.
//
// For P8_16, we want it to be an input, so we also set bit 5, yielding
// a value of 0x26. We could also set bits 3 and 4 to enable a pullup
// or pulldown.
pinctrl-single,pins = <
0x34 0x06
0x38 0x26
>;
};
};
};
// This enables the PRU and assigns the GPIO pins to it for use in EGP mode.
fragment@1 {
target = <&pruss>;
__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&example_pins>;
};
};
};
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