Created
June 27, 2016 13:50
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.set mips1 | |
.set noreorder | |
.text | |
.global main | |
.type main, function | |
.equ IRQ_STAT, 0x1f801070 | |
.equ IRQ_MASK, 0x1f801074 | |
.EQU TIMER0_BASE, 0x1f801100 | |
.EQU TIMER1_BASE, 0x1f801110 | |
.EQU TIMER2_BASE, 0x1f801120 | |
.EQU TIMER_COUNT, 0 | |
.EQU TIMER_MODE, 4 | |
.EQU TIMER_TARGET, 8 | |
main: | |
addiu $sp, -40 | |
sw $ra, 36($sp) | |
sw $fp, 32($sp) | |
sw $s3, 28($sp) | |
sw $s2, 24($sp) | |
sw $s1, 20($sp) | |
sw $s0, 16($sp) | |
move $fp, $sp | |
/* Mask interrupts */ | |
li $s0, IRQ_MASK | |
sh $0, 0($s0) | |
li $s1, TIMER1_BASE | |
sw $0, TIMER_MODE($s1) | |
/* Run from cached memory */ | |
/* b 1f*/ | |
nop | |
/* Move to KSEG1 (uncached region) */ | |
la $t0, 1f | |
lui $t1, 0xa000 | |
or $t0, $t1 | |
jr $t0 | |
nop | |
1: /* We're now running from uncached memory */ | |
jal bios_flush_cache | |
nop | |
move $s0, $0 | |
2: | |
move $a1, $a2 | |
/* Zero timer */ | |
sw $0, TIMER_COUNT($s1) | |
.macro INSTR | |
addiu $t0, $t1, 34 | |
.endm | |
INSTR | |
INSTR | |
INSTR | |
INSTR | |
INSTR | |
INSTR | |
INSTR | |
INSTR | |
INSTR | |
INSTR | |
lhu $a2, TIMER_COUNT($s1) | |
beq $s0, $0, 2b | |
addiu $s0, 1 | |
la $a0, message | |
jal bios_printf | |
nop | |
b 1b | |
nop | |
/* Set return value */ | |
li $v0, 0 | |
move $sp, $fp | |
lw $ra, 36($sp) | |
lw $fp, 32($sp) | |
lw $s3, 28($sp) | |
lw $s2, 24($sp) | |
lw $s1, 20($sp) | |
lw $s0, 16($sp) | |
jr $ra | |
addiu $sp, 40 | |
.data | |
message: | |
.string "Count: miss: %u hit: %u\n" |
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