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SPI RAM error
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ets Jun 8 2016 00:22:57 | |
rst:0x1 (POWERON_RESET),boot:0x33 (SPI_FAST_FLASH_BOOT) | |
configsip: 0, SPIWP:0xee | |
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00 | |
mode:DIO, clock div:2 | |
load:0x3fff0010,len:4 | |
load:0x3fff0014,len:5528 | |
load:0x40078000,len:0 | |
ho 12 tail 0 room 4 | |
load:0x40078000,len:13508 | |
entry 0x40079004 | |
W (73) rtc_clk: Potentially bogus XTAL frequency: 35 MHz, guessing 40 MHz | |
W (79) rtc_clk: Possibly invalid CONFIG_ESP32_XTAL_FREQ setting (40MHz). Detected 40 MHz. | |
I (45) boot: ESP-IDF v3.0-dev-782-ge6afe28b-dirty 2nd stage bootloader | |
I (45) boot: compile time 22:24:46 | |
I (59) boot: Enabling RNG early entropy source... | |
I (59) boot: SPI Speed : 40MHz | |
I (59) boot: SPI Mode : DIO | |
I (62) boot: SPI Flash Size : 4MB | |
I (66) boot: Partition Table: | |
I (70) boot: ## Label Usage Type ST Offset Length | |
I (77) boot: 0 nvs WiFi data 01 02 00009000 00006000 | |
I (85) boot: 1 phy_init RF data 01 01 0000f000 00001000 | |
I (92) boot: 2 factory factory app 00 00 00010000 00100000 | |
I (100) boot: End of partition table | |
I (104) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x08dbc ( 36284) map | |
I (126) esp_image: segment 1: paddr=0x00018de4 vaddr=0x3ffb0000 size=0x01f9c ( 8092) load | |
I (129) esp_image: segment 2: paddr=0x0001ad88 vaddr=0x40080000 size=0x00400 ( 1024) load | |
0x40080000: _iram_start at D:/Devel/esp-idf/components/freertos/xtensa_vectors.S:1675 | |
I (133) esp_image: segment 3: paddr=0x0001b190 vaddr=0x40080400 size=0x04e80 ( 20096) load | |
I (150) esp_image: segment 4: paddr=0x00020018 vaddr=0x400d0018 size=0x12bcc ( 76748) map | |
0x400d0018: _stext at ??:? | |
I (177) esp_image: segment 5: paddr=0x00032bec vaddr=0x40085280 size=0x06938 ( 26936) load | |
0x40085280: spi_flash_mmap_pages at D:/Devel/esp-idf/components/spi_flash/flash_mmap.c:200 (discriminator 3) | |
I (189) esp_image: segment 6: paddr=0x0003952c vaddr=0x400c0000 size=0x00000 ( 0) load | |
I (196) boot: Loaded app from partition at offset 0x10000 | |
I (196) boot: Disabling RNG early entropy source... | |
I (200) spiram: SPI RAM mode: flash 40m sram 40m | |
I (203) spiram: PSRAM initialized, cache is in low/high (2-core) mode. | |
I (211) cpu_start: Pro cpu up. | |
I (214) cpu_start: Starting app cpu, entry point is 0x40080ff8 | |
0x40080ff8: call_start_cpu1 at D:/Devel/esp-idf/components/esp32/cpu_start.c:219 | |
I (0) cpu_start: App cpu up. | |
I (1113) spiram: SPI SRAM memory test OK | |
I (1114) heap_init: Initializing. RAM available for dynamic allocation: | |
I (1114) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM | |
I (1120) heap_init: At 3FFB27C0 len 0002D840 (182 KiB): DRAM | |
I (1127) heap_init: At 3FFE0440 len 00003BC0 (14 KiB): D/IRAM | |
I (1133) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM | |
I (1140) heap_init: At 4008BBB8 len 00014448 (81 KiB): IRAM | |
I (1146) cpu_start: Pro cpu start user code | |
I (1151) spiram: Adding pool of 4096K of external SPI memory to heap allocator | |
I (165) cpu_start: Starting scheduler on PRO CPU. | |
I (0) cpu_start: Starting scheduler on APP CPU. | |
Hello world! | |
This is ESP32 chip with 2 CPU cores, WiFi/BT/BLE, silicon revision 1, | |
4MB external flash | |
SPI RAM size: 4194304 | |
Direct, fill: | |
First address: 0x3f800000 .....................Last address: 0x3fa00000 | |
Direct, check: | |
.55..55..55..55..55..55..55..55..55..55..55..55..55..55..55..55..55..55..55..55..55.Last address: 0x3fa00000 | |
Heap_caps, malloc: | |
Guru Meditation Error of type LoadStoreAlignment occurred on core 0. Exception was unhandled. | |
Register dump: | |
PC : 0x40085bf1 PS : 0x00060e33 A0 : 0x80088044 A1 : 0x3ffb4540 | |
0x40085bf1: uxPortCompareSet at D:/Devel/esp-idf/components/freertos/tasks.c:4482 | |
(inlined by) vPortCPUAcquireMutexIntsDisabled at D:/Devel/esp-idf/components/freertos/portmux_impl.h:86 | |
(inlined by) vTaskEnterCritical at D:/Devel/esp-idf/components/freertos/tasks.c:4126 | |
A2 : 0x55555555 A3 : 0x00000000 A4 : 0x3ffb4550 A5 : 0x00000000 | |
A6 : 0x3ffae8fc A7 : 0x00000000 A8 : 0x0000cdcd A9 : 0x0000cdcd | |
A10 : 0xb33fffff A11 : 0x0000abab A12 : 0x3ffb4833 A13 : 0x00000001 | |
A14 : 0x00060e20 A15 : 0x00000000 SAR : 0x00000004 EXCCAUSE: 0x00000009 | |
EXCVADDR: 0x55555555 LBEG : 0x4008b69d LEND : 0x4008b6ad LCOUNT : 0xfffffffb | |
0x4008b69d: strlen at /home/jeroen/esp8266/esp32/newlib_xtensa-2.2.0-bin/newlib_xtensa-2.2.0/xtensa-esp32-elf/newlib/libc/machine/xte | |
nsa/../../../../.././newlib/libc/machine/xtensa/strlen.S:84 | |
0x4008b6ad: strlen at /home/jeroen/esp8266/esp32/newlib_xtensa-2.2.0-bin/newlib_xtensa-2.2.0/xtensa-esp32-elf/newlib/libc/machine/xte | |
nsa/../../../../.././newlib/libc/machine/xtensa/strlen.S:96 | |
Backtrace: 0x40085bf1:0x3ffb4540 0x40088041:0x3ffb4560 0x40083f5b:0x3ffb4580 0x400d4a83:0x3ffb45a0 0x400d0853:0x3ffb45d0 | |
0x40085bf1: uxPortCompareSet at D:/Devel/esp-idf/components/freertos/tasks.c:4482 | |
(inlined by) vPortCPUAcquireMutexIntsDisabled at D:/Devel/esp-idf/components/freertos/portmux_impl.h:86 | |
(inlined by) vTaskEnterCritical at D:/Devel/esp-idf/components/freertos/tasks.c:4126 | |
0x40088041: multi_heap_malloc_impl at D:/Devel/esp-idf/components/heap/multi_heap.c:344 (discriminator 1) | |
0x40083f5b: heap_caps_malloc at D:/Devel/esp-idf/components/heap/heap_caps.c:123 | |
0x400d4a83: app_main at D:/Devel/esp-projects/hello_world/main/hello_world_main.c:54 | |
0x400d0853: main_task at D:/Devel/esp-idf/components/esp32/cpu_start.c:403 | |
Rebooting... |
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#include <stdio.h> | |
#include "freertos/FreeRTOS.h" | |
#include "freertos/task.h" | |
#include "esp_heap_caps.h" | |
#include "esp_spi_flash.h" | |
#include "esp_spiram.h" | |
#include <string.h> | |
#include <time.h> | |
#define BUF_SIZE 2*1024*1024 | |
void app_main() | |
{ | |
printf("Hello world!\n"); | |
/* Print chip information */ | |
esp_chip_info_t chip_info; | |
esp_chip_info(&chip_info); | |
printf("This is ESP32 chip with %d CPU cores, WiFi%s%s, ", | |
chip_info.cores, | |
(chip_info.features & CHIP_FEATURE_BT) ? "/BT" : "", | |
(chip_info.features & CHIP_FEATURE_BLE) ? "/BLE" : ""); | |
printf("silicon revision %d, \n", chip_info.revision); | |
printf("%dMB %s flash\n", spi_flash_get_chip_size() / (1024 * 1024), | |
(chip_info.features & CHIP_FEATURE_EMB_FLASH) ? "embedded" : "external"); | |
printf("SPI RAM size: %d\n",esp_spiram_get_size()); | |
uint8_t* buf1; | |
int i; | |
uint8_t testb=0x55; | |
printf("Direct, fill:\n"); | |
buf1 = (uint8_t *)0x3f800000; | |
printf("First address: %p ",buf1); | |
for (i=0; i < BUF_SIZE; i++) { | |
if (i % 100000==0) printf("."); | |
*buf1++ = testb; | |
} | |
printf("Last address: %p\n",buf1); | |
printf("Direct, check:\n"); | |
buf1 = (uint8_t *)0x3f800000; | |
for (i=0; i < BUF_SIZE; i++) { | |
if (i % 100000==0) printf(".%x.",*buf1); | |
if (*buf1 != testb) printf("Error at %d\n",i); | |
buf1++; | |
} | |
printf("Last address: %p\n",buf1); | |
printf("Heap_caps, malloc:\n"); | |
buf1=(uint8_t*)heap_caps_malloc(BUF_SIZE, MALLOC_CAP_SPIRAM); | |
//buf1=(uint8_t*)malloc(BUF_SIZE); | |
if (buf1!=NULL) { | |
for (i=0; i<=BUF_SIZE; i++) { | |
printf("i: %d\n",i); | |
buf1[i]=0x55; | |
} | |
} else printf("Malloc failed\n"); | |
for (int i = 10; i >= 0; i--) { | |
printf("Restarting in %d seconds...\n", i); | |
vTaskDelay(1000 / portTICK_PERIOD_MS); | |
} | |
printf("Restarting now.\n"); | |
fflush(stdout); | |
esp_restart(); | |
} |
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