Created
February 1, 2014 18:14
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Transcend WiFi SD card | |
Registers values dump | |
------------------------- Dump All Registers ------------------- | |
SCU_CLK_SRC_CTL 11C26601 | |
SCU_PLL_FREQ_SEL1 00000001 | |
SCU_PLL_FREQ_SEL2 00101010 | |
SCU_SYSTEM_CTL1 00009F00 | |
SCU_SYSTEM_CTL2 00000000 | |
SCU_SYSTEM_CTL3 00000001 | |
SSI_PRE 00000001 | |
SSI_CON 00000D03 | |
SSI_STA 00000001 | |
SSI_TDAT 00000000 | |
SSI_RDAT 000000C0 | |
SDIO_CARD_BLOCK_SET_REG 08000001 | |
SDIO_CTRL_REG 00343811 | |
SDIO_CMD_ARGUMENT_REG 00000A00 | |
SDIO_SPECIAL_COMMAND_REG 00000000 | |
SDIO_STATUS_REG 00008C00 | |
SDIO_ERROR_ENABLE_REG 0000006F | |
SDIO_RESPONSE1_REG 00001000 | |
SDIO_RESPONSE2_REG 00000000 | |
SDIO_RESPONSE3_REG 00000000 | |
SDIO_RESPONSE4_REG 00000000 | |
SDIO_BUF_TRAN_RESP_REG 00000000 | |
SDIO_BUF_TRAN_CTRL_REG 00000000 | |
SDIO_DMA_SACH0_REG 01178000 | |
SDIO_DMA_TCCH0_REG 00000080 | |
SDIO_DMA_CTRCH0_REG 00000000 | |
SDIO_DMA_DACH1_REG 010EC0BC | |
SDIO_DMA_TCCH1_REG 00000080 | |
SDIO_DMA_CTRCH1_REG 00000000 | |
SDIO_DMA_INTS_REG 00000000 | |
SDIO_DMA_FIFO_STATUS_REG 00000005 | |
TCFG0 00210031 | |
TCFG1 02000003 | |
TCON0 00500009 | |
TCON1 00000000 | |
TCNTB0 00000257 | |
TCMPB0 00000005 | |
TCNTO0 00000086 | |
TCNTB1 00001D4C | |
TCNTO1 000000FE | |
TCNTB2 0000FFFF | |
TCNTO2 00000000 | |
SDSW_M1_CTRL0 00000001 | |
SDSW_M2_CTRL0 00000000 | |
SDSW_M1_STATUS 20200804 | |
SDSW_M2_STATUS 20200804 | |
SDSW_READ_SWDAT 00000000 | |
SDSW_SW_CTRL0 00000020 | |
SDSW_TEST_REG 00000003 | |
SDSW_M1_PREV_CMD_REG 00000012 | |
SDSW_M1_PREV_ARGU_REG 000040C0 | |
SDSW_M1_PREV_RSP_REG0 00000012 | |
SDSW_M1_PREV_RSP_REG1 00000900 | |
SDSW_M1_CURR_CMD_REG 0000000C | |
SDSW_M1_CURR_ARGU_REG 00000000 | |
SDSW_M1_CURR_RSP_REG0 0000010C | |
SDSW_M1_CURR_RSP_REG1 00000B00 | |
SDSW_M1_CURR_RSP_REG2 00000900 | |
SDSW_M1_CURR_RSP_REG3 00000B00 | |
SDSW_M1_CURR_RSP_REG4 00000900 | |
SDSW_M1_CMD_FLG_REG0 00000000 | |
SDSW_M1_CMD_CRC_FLG_REG0 00000000 | |
SDSW_M1_CMD_FLG_REG1 00000000 | |
SDSW_M1_CMD_CRC_FLG_REG1 00000000 | |
SDSW_M1_CMD_FLG_REG2 00000000 | |
SDSW_M1_CMD_CRC_FLG_REG2 00000000 | |
SDSW_M1_CMD_FLG_REG3 00000000 | |
SDSW_M1_CMD_CRC_FLG_REG3 00000000 | |
SDSW_BOMB_START_ADDR_REG 000021F8 | |
SDSW_BOMB_END_ADDR_REG 000030FC | |
SDSW_BOMB_Flag_ADDR_REG 00000000 | |
SDSW_BOMB_START_ADDR_REG2 00000000 | |
SDSW_BOMB_END_ADDR_REG2 00000000 | |
SDSW_BOMB_Flag_ADDR_REG2 00000000 | |
SDSW_M1_CID_REG0 49D20061 | |
SDSW_M1_CID_REG1 1D000010 | |
SDSW_M1_CID_REG2 20204344 | |
SDSW_M1_CID_REG3 53454A74 | |
SDSW_M1_RCA_REG 0000B368 | |
SDSW_M1_DSR_REG 00000000 | |
SDSW_M1_CIC_REG 00000000 | |
SDSW_M1_CSD_REG0 0A4000C3 | |
SDSW_M1_CSD_REG1 782D7F80 | |
SDSW_M1_CSD_REG2 5B590000 | |
SDSW_M1_CSD_REG3 400E0032 | |
SDSW_M1_CSR_REG 00000900 | |
SDSW_M1_BLR_REG 00000200 | |
SDSW_M1_EWBS_REG 00000000 | |
SDSW_M1_EWBE_REG 00000000 | |
SDSW_M1_SBW_REG 00000002 | |
SDSW_M1_SWBEC_REG 00000000 | |
SDSW_M1_OCR_REG 40FF8000 | |
SDSW_M1_SCCD_REG 00000000 | |
SDSW_M1_SSR_REG0 60000100 | |
SDSW_M1_SSR_REG1 00000005 | |
SDSW_M1_SSR_REG2 00000000 | |
SDSW_M1_SSR_REG3 00000000 | |
SDSW_M1_SCR_REG0 00000000 | |
SDSW_M1_SCR_REG1 0285000C | |
SDSW_M1_SNWB_REG 00000001 | |
SDSW_M1_BLOCK_LEN_REG 00000400 | |
SDSW_M1_WDATA_TOUT_REG 00000000 | |
SDSW_M1_RDATA_TOUT_REG 0E000000 | |
SDSW_DIRECT_START_TRANS_REG 00000000 | |
SDSW_DIRECT_CMD_INDEX_REG 00000000 | |
SDSW_DIRECT_CMD_ARGU_REG 00000000 | |
SDSW_DIRECT_CTRL_REG 00000000 | |
SDSW_DIRECT_BLOCK_LENGTH_REG 00000000 | |
SDSW_DIRECT_WRITE_SW_CYCLE_REG 00000000 | |
SDSW_M1_CMD_FLAG_INTEN_REG0 01000000 | |
SDSW_M1_CMD_FLAG_INTEN_REG1 00000043 | |
SDSW_M1_CMD_FLAG_INTEN_REG2 00400000 | |
SDSW_M1_CMD_FLAG_INTEN_REG3 00000000 | |
WDT_BASE 00000000 | |
WDT_CON 00000000 | |
WDT_DAT 00008000 | |
WDT_CNT 00001986 | |
GPIO0_BASE 00000003 | |
GPIO_OEN 00000003 | |
GPIO_INPUT 00000003 | |
GPIO_OUTPUT 00000003 | |
GPIO_INT 00000000 | |
GPIO_INT_CLR0 00000000 | |
GPIO_INT_CLR1 00000000 | |
GPIO_INT_CLR2 00000000 | |
GPIO_INT_CLR3 00000000 | |
GPIO_INT_CLR4 00000000 | |
GPIO_INT_CLR5 00000000 | |
GPIO_INT_CLR6 00000000 | |
GPIO_INT_CLR7 00000000 | |
GPIO1_BASE 00000030 | |
GPO_OEN 00000030 | |
GPI_INPUT 000000C0 | |
GPO_OUTPUT 00000000 | |
GPI_INT 00000000 | |
GPI_INT_CLR0 00000000 | |
GPI_INT_CLR1 00000000 | |
GPI_INT_CLR2 00000000 | |
GPI_INT_CLR3 00000000 | |
GPI_INT_CLR4 00000000 | |
GPI_INT_CLR5 00000000 | |
GPI_INT_CLR6 00000000 | |
GPI_INT_CLR7 00000000 | |
SDRAM_CTRL_BASE 00000000 | |
UART_BASE 0000007A | |
UART_RECV 0000007A | |
UART_THR 0000007A | |
UART_INTR 00000001 | |
UART_FCR 00000001 | |
UART_IIR 00000001 | |
UART_LCR 00000007 | |
UART_MCR 0000007A | |
UART_LINE 00000020 | |
UART_MSR 000000E0 | |
UART_RFST 00000000 | |
SDR_Card_BLOCK_SET_REG 00000102 | |
SDR_CTRL_REG 000C7B11 | |
SDR_CMD_ARGUMENT_REG 00000000 | |
SDR_SPECIAL_CTRL_REG 00000000 | |
SDR_STATUS_REG 00008C00 | |
SDR_Error_Enable_REG 0000006F | |
SDR_RESPONSE1_REG 00000B00 | |
SDR_RESPONSE2_REG 00000000 | |
SDR_RESPONSE3_REG 00000000 | |
SDR_RESPONSE4_REG 00000000 | |
SDR_DMA_TRAN_RESP_REG 00000001 | |
SDR_BUF_TRAN_CTRL_REG 00000004 | |
SDR_DMA_SACH0_REG 00000000 | |
SDR_DMA_TCCH0_REG 00000200 | |
SDR_DMA_CTRCH0_REG 00000000 | |
SDR_DMA_DACH1_REG 01C09200 | |
SDR_DMA_TCCH1_REG 00000200 | |
SDR_DMA_CTRCH1_REG 00000033 | |
SDR_DMA_INTS_REG 00000000 | |
SDR_DMA_FIFO_STATUS_REG 00000005 | |
---------------------------------------------------------------- |
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