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@slmatrix
Created March 8, 2017 17:44
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errors when building with power
Fill router is ITLB(0)
Bottom:clear router is Memory(0)
single:clear router is L2(0)
single:clear router is IL1(0)
single:clear router is ITLB(0)
Fill router is PTLB(0)
Bottom:clear router is Memory(0)
single:clear router is L2(0)
Creating inorder processor 0
Sampler: inst, R:2000000, W:0, D:100000, T:300000
Sampler: inst, nInstMax:10000000000, nInstSkip:1, maxnsTime:1000000000000
Config::getBool for inorder in tradCORE[0] not found in config file.
WARNING: GStat 'P(0)_BPRED_Hybrid:nMiss' needed by PowerModel not found
WARNING: GStat 'P(0)_AUNIT_rdRegPool' needed by PowerModel not found
WARNING: GStat 'P(0)_BUNIT_rdRegPool' needed by PowerModel not found
WARNING: GStat 'P(0)_LUNIT_rdRegPool' needed by PowerModel not found
WARNING: GStat 'P(0)_SUNIT_rdRegPool' needed by PowerModel not found
WARNING: GStat 'P(0)_AUNIT_wrRegPool' needed by PowerModel not found
WARNING: GStat 'P(0)_BUNIT_wrRegPool' needed by PowerModel not found
WARNING: GStat 'P(0)_LUNIT_wrRegPool' needed by PowerModel not found
WARNING: GStat 'P(0)_SUNIT_wrRegPool' needed by PowerModel not found
WARNING: GStat 'P(0)_CUNIT_rdRegPool' needed by PowerModel not found
WARNING: GStat 'P(0)_CUNIT_wrRegPool' needed by PowerModel not found
Initialize McPAT/CACTI
Config::getBool for inorder in tradCORE[0] not found in config file.
Config::getBool for scooreCore in tradCORE[0] not found in config file.
Initializing CPU Memory objects
Attempting to set up icache
Done setting up icache
Attempting to set up icacheMissBuffer
Done setting up icacheMissBuffer
Attempting to set up InstBufferupdate Interval = 100000ERROR: no valid data array organizations found
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