Created
April 20, 2017 17:35
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TrialsHDVK
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| i> 00003A30 Build: detached / d2c84e37ee591b0be2b7406d001d3a9f061584b9 on Apr 20 2017 | |
| i> 00003A30 Initializing Vulkan 1.0.0... | |
| i> 00003A30 Found 1 global layers: | |
| i> 00003A30 - VK_LAYER_VALVE_steam_overlay (spec: 1.0.3, impl: 0.0.1) | |
| i> 00003A30 Steam Overlay Layer | |
| i> 00003A30 Found 4 global extensions: | |
| i> 00003A30 - VK_KHR_surface (0.0.25) | |
| i> 00003A30 - VK_KHR_win32_surface (0.0.5) | |
| i> 00003A30 - VK_KHR_get_physical_device_properties2 (0.0.1) | |
| i> 00003A30 - VK_EXT_debug_report (0.0.4) | |
| i> 00003A30 Verifying layers and extensions... | |
| i> 00003A30 - optional extension VK_EXT_debug_marker not found | |
| i> 00003A30 - enabling extension VK_KHR_surface (0.0.25) | |
| i> 00003A30 - enabling extension VK_KHR_win32_surface (0.0.5) | |
| i> 00003A30 Initializing application instance... | |
| i> 00003A30 Debug validation layer not installed; ignoring | |
| i> 00003A30 Found 1 physical devices: | |
| i> 00003A30 - Device 0: | |
| i> 00003A30 apiVersion = 1.0.39 | |
| i> 00003A30 driverVersion = 1.5.0 | |
| i> 00003A30 vendorId = 0x1002 | |
| i> 00003A30 deviceId = 0x6798 | |
| i> 00003A30 deviceType = VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU | |
| i> 00003A30 deviceName = AMD Radeon R9 200 / HD 7900 Series | |
| i> 00003A30 Memory Heaps: | |
| i> 00003A30 - Heap 0: 2952790016 bytes | |
| i> 00003A30 - Type 0: | |
| i> 00003A30 VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT | |
| i> 00003A30 - Heap 1: 268435456 bytes | |
| i> 00003A30 - Type 2: | |
| i> 00003A30 VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT | |
| i> 00003A30 VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT | |
| i> 00003A30 VK_MEMORY_PROPERTY_HOST_COHERENT_BIT | |
| i> 00003A30 - Heap 2: 9342484480 bytes | |
| i> 00003A30 - Type 1: | |
| i> 00003A30 VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT | |
| i> 00003A30 VK_MEMORY_PROPERTY_HOST_COHERENT_BIT | |
| i> 00003A30 - Type 3: | |
| i> 00003A30 VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT | |
| i> 00003A30 VK_MEMORY_PROPERTY_HOST_COHERENT_BIT | |
| i> 00003A30 VK_MEMORY_PROPERTY_HOST_CACHED_BIT | |
| i> 00003A30 Queue Families: | |
| i> 00003A30 - Queue 0: | |
| i> 00003A30 queueFlags = graphics, compute, transfer, sparse, | |
| i> 00003A30 queueCount = 1 | |
| i> 00003A30 timestampValidBits = 64 | |
| i> 00003A30 supportsPresent = true | |
| i> 00003A30 - Queue 1: | |
| i> 00003A30 queueFlags = compute, transfer, sparse, | |
| i> 00003A30 queueCount = 2 | |
| i> 00003A30 timestampValidBits = 64 | |
| i> 00003A30 supportsPresent = true | |
| i> 00003A30 - Queue 2: | |
| i> 00003A30 queueFlags = transfer, sparse, | |
| i> 00003A30 queueCount = 2 | |
| i> 00003A30 timestampValidBits = 0 | |
| i> 00003A30 supportsPresent = false | |
| i> 00003A30 Layers: | |
| i> 00003A30 Extensions: | |
| i> 00003A30 - VK_KHR_sampler_mirror_clamp_to_edge (0.0.1) | |
| i> 00003A30 - VK_KHR_swapchain (0.0.68) | |
| i> 00003A30 - VK_AMD_rasterization_order (0.0.1) | |
| i> 00003A30 - VK_AMD_shader_ballot (0.0.1) | |
| i> 00003A30 - VK_AMD_shader_trinary_minmax (0.0.1) | |
| i> 00003A30 - VK_AMD_shader_explicit_vertex_parameter (0.0.1) | |
| i> 00003A30 - VK_AMD_gcn_shader (0.0.1) | |
| i> 00003A30 - VK_AMD_draw_indirect_count (0.0.1) | |
| i> 00003A30 - VK_AMD_negative_viewport_height (0.0.1) | |
| i> 00003A30 RenderDoc support requested but it is not attached | |
| i> 00003A30 Instance initialized successfully! | |
| i> 00003A30 - optional extension VK_EXT_debug_marker not found | |
| i> 00003A30 - enabling extension VK_KHR_swapchain (0.0.68) | |
| i> 00003A30 Device initialized successfully! | |
| i> 00003490 Creating swap chain: | |
| i> 00003490 minImageCount = 2 | |
| i> 00003490 imageFormat = VK_FORMAT_B8G8R8A8_UNORM | |
| i> 00003490 imageExtent = 1280 x 720 | |
| i> 00003490 preTransform = VK_SURFACE_TRANSFORM_IDENTITY_BIT_KHR | |
| i> 00003490 imageArrayLayers = 1 | |
| i> 00003490 presentMode = VK_PRESENT_MODE_IMMEDIATE_KHR | |
| i> 00003490 clipped = true | |
| i> 00003490 imageColorSpace = VK_COLORSPACE_SRGB_NONLINEAR_KHR | |
| i> 00003490 imageUsageFlags = VK_IMAGE_USAGE_TRANSFER_DST_BIT | VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT | |
| i> 00003490 imageSharingMode = VK_SHARING_MODE_EXCLUSIVE | |
| i> 00003490 queueFamilyCount = 0 | |
| i> 00003490 Swap chain initialized successfully! | |
| i> 00003A30 XThread00000004 (1) Stack: 40010000-40030000 | |
| i> 00003A30 XThread00000008 (2) Stack: 40050000-40070000 | |
| K> 00000004 XThread::Execute thid 1 (handle=00000004, 'GraphicsSystem Command Processor (00000004)', native=00001FBC, <host>) | |
| K> 00000008 XThread::Execute thid 2 (handle=00000008, 'GraphicsSystem Vsync (00000008)', native=00001038, <host>) | |
| i> 00003A30 XThread0000000C (3) Stack: 40090000-400B0000 | |
| i> 00003A30 XThread00000010 (4) Stack: 400D0000-400F0000 | |
| K> 0000000C XThread::Execute thid 3 (handle=0000000C, 'XMA Decoder Worker (0000000C)', native=00003668, <host>) | |
| K> 00000010 XThread::Execute thid 4 (handle=00000010, 'Audio Worker (00000010)', native=000033CC, <host>) | |
| w> 00003490 STFSContainer doesn't support version 2 yet | |
| F> 00003490 Device::ResolvePath(\GameInfo.bin) | |
| i> 00003490 Launching module game:\default.xex | |
| F> 00003490 Device::ResolvePath(\default.xex) | |
| C> 00003490 WARNING: imported a variable with no value: ExThreadObjectType | |
| i> 00003490 Module \Device\Cdrom0\default.xex: | |
| Module Flags: 00000001 | |
| Security Header: | |
| Image Flags: 00000000 | |
| Load Address: 82000000 | |
| Image Size: 00830000 | |
| Export Table: 00000000 | |
| Optional Header Count: 15 | |
| XEX_HEADER_RESOURCE_INFO: | |
| 5841095A 827E0000-8282AC56, 306262b | |
| XEX_HEADER_FILE_FORMAT_INFO (TODO): | |
| XEX_HEADER_ENTRY_POINT: 82126858 | |
| XEX_HEADER_IMAGE_BASE_ADDRESS: 82000000 | |
| XEX_HEADER_IMPORT_LIBRARIES: | |
| xam.xex - 102 imports | |
| Version: 0.0.8276.32 | |
| Min Version: 0.0.1861.32 | |
| xboxkrnl.exe - 286 imports | |
| Version: 0.0.8276.32 | |
| Min Version: 0.0.1861.32 | |
| XEX_HEADER_CHECKSUM_TIMESTAMP (TODO): | |
| XEX_HEADER_ORIGINAL_PE_NAME: default.exe | |
| XEX_HEADER_STATIC_LIBRARIES: | |
| XAPILIB : 2.0.8276.0 | |
| D3D9 : 2.0.8276.0 | |
| D3DX9 : 2.0.8276.0 | |
| XBOXKRNL : 2.0.8276.0 | |
| XUIHTM : 2.0.8276.0 | |
| XUIRNDR : 2.0.8276.0 | |
| XUIRUN : 2.0.8276.0 | |
| XONLINE : 2.0.8276.0 | |
| XAUDIO2 : 2.0.8276.0 | |
| XAPOBA : 2.0.8276.0 | |
| XACT3 : 2.0.8276.0 | |
| X3DAUD : 2.0.8276.0 | |
| XAUD : 2.0.8276.0 | |
| XUIVIDE : 2.0.8276.0 | |
| LIBCMT : 2.0.8276.0 | |
| XGRAPHC : 2.0.8276.0 | |
| XNET : 2.0.8276.0 | |
| XMCORE : 2.0.8276.0 | |
| XEX_HEADER_TLS_INFO: | |
| Slot Count: 64 | |
| Raw Data Address: 00000000 | |
| Data Size: 0 | |
| Raw Data Size: 0 | |
| XEX_HEADER_DEFAULT_STACK_SIZE: 262144 | |
| XEX_HEADER_SYSTEM_FLAGS: 00000404 | |
| XEX_HEADER_EXECUTION_INFO: | |
| Media ID: 22E417BF | |
| Title ID: 5841095A | |
| Savegame ID: 5841095A | |
| Disc Number / Total: 0 / 0 | |
| XEX_HEADER_GAME_RATINGS (TODO): | |
| XEX_HEADER_LAN_KEY: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
| XEX_HEADER_XBOX360_LOGO (TODO): | |
| Sections: | |
| 0 RODATA 1 pages 82000000 - 82010000 (65536 bytes) | |
| 1 RODATA 1 pages 82010000 - 82020000 (65536 bytes) | |
| 2 RODATA 1 pages 82020000 - 82030000 (65536 bytes) | |
| 3 RODATA 1 pages 82030000 - 82040000 (65536 bytes) | |
| 4 RODATA 1 pages 82040000 - 82050000 (65536 bytes) | |
| 5 RODATA 1 pages 82050000 - 82060000 (65536 bytes) | |
| 6 RODATA 1 pages 82060000 - 82070000 (65536 bytes) | |
| 7 RODATA 1 pages 82070000 - 82080000 (65536 bytes) | |
| 8 RODATA 1 pages 82080000 - 82090000 (65536 bytes) | |
| 9 RODATA 1 pages 82090000 - 820A0000 (65536 bytes) | |
| 10 RODATA 1 pages 820A0000 - 820B0000 (65536 bytes) | |
| 11 RODATA 1 pages 820B0000 - 820C0000 (65536 bytes) | |
| 12 RODATA 1 pages 820C0000 - 820D0000 (65536 bytes) | |
| 13 RODATA 1 pages 820D0000 - 820E0000 (65536 bytes) | |
| 14 RODATA 1 pages 820E0000 - 820F0000 (65536 bytes) | |
| 15 CODE 1 pages 820F0000 - 82100000 (65536 bytes) | |
| 16 CODE 1 pages 82100000 - 82110000 (65536 bytes) | |
| 17 CODE 1 pages 82110000 - 82120000 (65536 bytes) | |
| 18 CODE 1 pages 82120000 - 82130000 (65536 bytes) | |
| 19 CODE 1 pages 82130000 - 82140000 (65536 bytes) | |
| 20 CODE 1 pages 82140000 - 82150000 (65536 bytes) | |
| 21 CODE 1 pages 82150000 - 82160000 (65536 bytes) | |
| 22 CODE 1 pages 82160000 - 82170000 (65536 bytes) | |
| 23 CODE 1 pages 82170000 - 82180000 (65536 bytes) | |
| 24 CODE 1 pages 82180000 - 82190000 (65536 bytes) | |
| 25 CODE 1 pages 82190000 - 821A0000 (65536 bytes) | |
| 26 CODE 1 pages 821A0000 - 821B0000 (65536 bytes) | |
| 27 CODE 1 pages 821B0000 - 821C0000 (65536 bytes) | |
| 28 CODE 1 pages 821C0000 - 821D0000 (65536 bytes) | |
| 29 CODE 1 pages 821D0000 - 821E0000 (65536 bytes) | |
| 30 CODE 1 pages 821E0000 - 821F0000 (65536 bytes) | |
| 31 CODE 1 pages 821F0000 - 82200000 (65536 bytes) | |
| 32 CODE 1 pages 82200000 - 82210000 (65536 bytes) | |
| 33 CODE 1 pages 82210000 - 82220000 (65536 bytes) | |
| 34 CODE 1 pages 82220000 - 82230000 (65536 bytes) | |
| 35 CODE 1 pages 82230000 - 82240000 (65536 bytes) | |
| 36 CODE 1 pages 82240000 - 82250000 (65536 bytes) | |
| 37 CODE 1 pages 82250000 - 82260000 (65536 bytes) | |
| 38 CODE 1 pages 82260000 - 82270000 (65536 bytes) | |
| 39 CODE 1 pages 82270000 - 82280000 (65536 bytes) | |
| 40 CODE 1 pages 82280000 - 82290000 (65536 bytes) | |
| 41 CODE 1 pages 82290000 - 822A0000 (65536 bytes) | |
| 42 CODE 1 pages 822A0000 - 822B0000 (65536 bytes) | |
| 43 CODE 1 pages 822B0000 - 822C0000 (65536 bytes) | |
| 44 CODE 1 pages 822C0000 - 822D0000 (65536 bytes) | |
| 45 CODE 1 pages 822D0000 - 822E0000 (65536 bytes) | |
| 46 CODE 1 pages 822E0000 - 822F0000 (65536 bytes) | |
| 47 CODE 1 pages 822F0000 - 82300000 (65536 bytes) | |
| 48 CODE 1 pages 82300000 - 82310000 (65536 bytes) | |
| 49 CODE 1 pages 82310000 - 82320000 (65536 bytes) | |
| 50 CODE 1 pages 82320000 - 82330000 (65536 bytes) | |
| 51 CODE 1 pages 82330000 - 82340000 (65536 bytes) | |
| 52 CODE 1 pages 82340000 - 82350000 (65536 bytes) | |
| 53 CODE 1 pages 82350000 - 82360000 (65536 bytes) | |
| 54 CODE 1 pages 82360000 - 82370000 (65536 bytes) | |
| 55 CODE 1 pages 82370000 - 82380000 (65536 bytes) | |
| 56 CODE 1 pages 82380000 - 82390000 (65536 bytes) | |
| 57 CODE 1 pages 82390000 - 823A0000 (65536 bytes) | |
| 58 CODE 1 pages 823A0000 - 823B0000 (65536 bytes) | |
| 59 CODE 1 pages 823B0000 - 823C0000 (65536 bytes) | |
| 60 CODE 1 pages 823C0000 - 823D0000 (65536 bytes) | |
| 61 CODE 1 pages 823D0000 - 823E0000 (65536 bytes) | |
| 62 CODE 1 pages 823E0000 - 823F0000 (65536 bytes) | |
| 63 CODE 1 pages 823F0000 - 82400000 (65536 bytes) | |
| 64 CODE 1 pages 82400000 - 82410000 (65536 bytes) | |
| 65 CODE 1 pages 82410000 - 82420000 (65536 bytes) | |
| 66 CODE 1 pages 82420000 - 82430000 (65536 bytes) | |
| 67 CODE 1 pages 82430000 - 82440000 (65536 bytes) | |
| 68 CODE 1 pages 82440000 - 82450000 (65536 bytes) | |
| 69 CODE 1 pages 82450000 - 82460000 (65536 bytes) | |
| 70 CODE 1 pages 82460000 - 82470000 (65536 bytes) | |
| 71 CODE 1 pages 82470000 - 82480000 (65536 bytes) | |
| 72 CODE 1 pages 82480000 - 82490000 (65536 bytes) | |
| 73 CODE 1 pages 82490000 - 824A0000 (65536 bytes) | |
| 74 CODE 1 pages 824A0000 - 824B0000 (65536 bytes) | |
| 75 CODE 1 pages 824B0000 - 824C0000 (65536 bytes) | |
| 76 CODE 1 pages 824C0000 - 824D0000 (65536 bytes) | |
| 77 CODE 1 pages 824D0000 - 824E0000 (65536 bytes) | |
| 78 CODE 1 pages 824E0000 - 824F0000 (65536 bytes) | |
| 79 CODE 1 pages 824F0000 - 82500000 (65536 bytes) | |
| 80 CODE 1 pages 82500000 - 82510000 (65536 bytes) | |
| 81 CODE 1 pages 82510000 - 82520000 (65536 bytes) | |
| 82 CODE 1 pages 82520000 - 82530000 (65536 bytes) | |
| 83 CODE 1 pages 82530000 - 82540000 (65536 bytes) | |
| 84 CODE 1 pages 82540000 - 82550000 (65536 bytes) | |
| 85 CODE 1 pages 82550000 - 82560000 (65536 bytes) | |
| 86 CODE 1 pages 82560000 - 82570000 (65536 bytes) | |
| 87 CODE 1 pages 82570000 - 82580000 (65536 bytes) | |
| 88 CODE 1 pages 82580000 - 82590000 (65536 bytes) | |
| 89 CODE 1 pages 82590000 - 825A0000 (65536 bytes) | |
| 90 CODE 1 pages 825A0000 - 825B0000 (65536 bytes) | |
| 91 CODE 1 pages 825B0000 - 825C0000 (65536 bytes) | |
| 92 CODE 1 pages 825C0000 - 825D0000 (65536 bytes) | |
| 93 CODE 1 pages 825D0000 - 825E0000 (65536 bytes) | |
| 94 CODE 1 pages 825E0000 - 825F0000 (65536 bytes) | |
| 95 CODE 1 pages 825F0000 - 82600000 (65536 bytes) | |
| 96 CODE 1 pages 82600000 - 82610000 (65536 bytes) | |
| 97 CODE 1 pages 82610000 - 82620000 (65536 bytes) | |
| 98 CODE 1 pages 82620000 - 82630000 (65536 bytes) | |
| 99 CODE 1 pages 82630000 - 82640000 (65536 bytes) | |
| 100 CODE 1 pages 82640000 - 82650000 (65536 bytes) | |
| 101 CODE 1 pages 82650000 - 82660000 (65536 bytes) | |
| 102 CODE 1 pages 82660000 - 82670000 (65536 bytes) | |
| 103 CODE 1 pages 82670000 - 82680000 (65536 bytes) | |
| 104 CODE 1 pages 82680000 - 82690000 (65536 bytes) | |
| 105 CODE 1 pages 82690000 - 826A0000 (65536 bytes) | |
| 106 CODE 1 pages 826A0000 - 826B0000 (65536 bytes) | |
| 107 CODE 1 pages 826B0000 - 826C0000 (65536 bytes) | |
| 108 CODE 1 pages 826C0000 - 826D0000 (65536 bytes) | |
| 109 CODE 1 pages 826D0000 - 826E0000 (65536 bytes) | |
| 110 CODE 1 pages 826E0000 - 826F0000 (65536 bytes) | |
| 111 CODE 1 pages 826F0000 - 82700000 (65536 bytes) | |
| 112 RWDATA 1 pages 82700000 - 82710000 (65536 bytes) | |
| 113 RWDATA 1 pages 82710000 - 82720000 (65536 bytes) | |
| 114 RWDATA 1 pages 82720000 - 82730000 (65536 bytes) | |
| 115 RWDATA 1 pages 82730000 - 82740000 (65536 bytes) | |
| 116 RWDATA 1 pages 82740000 - 82750000 (65536 bytes) | |
| 117 RWDATA 1 pages 82750000 - 82760000 (65536 bytes) | |
| 118 RWDATA 1 pages 82760000 - 82770000 (65536 bytes) | |
| 119 RWDATA 1 pages 82770000 - 82780000 (65536 bytes) | |
| 120 RWDATA 1 pages 82780000 - 82790000 (65536 bytes) | |
| 121 RWDATA 1 pages 82790000 - 827A0000 (65536 bytes) | |
| 122 RWDATA 1 pages 827A0000 - 827B0000 (65536 bytes) | |
| 123 RWDATA 1 pages 827B0000 - 827C0000 (65536 bytes) | |
| 124 RWDATA 1 pages 827C0000 - 827D0000 (65536 bytes) | |
| 125 RWDATA 1 pages 827D0000 - 827E0000 (65536 bytes) | |
| 126 RODATA 1 pages 827E0000 - 827F0000 (65536 bytes) | |
| 127 RODATA 1 pages 827F0000 - 82800000 (65536 bytes) | |
| 128 RODATA 1 pages 82800000 - 82810000 (65536 bytes) | |
| 129 RODATA 1 pages 82810000 - 82820000 (65536 bytes) | |
| 130 RODATA 1 pages 82820000 - 82830000 (65536 bytes) | |
| Imports: | |
| xam.xex - 51 imports | |
| Version: 0.0.8276.32 | |
| Min Version: 0.0.1861.32 | |
| Total: 51 | |
| Known: 100% (51 known, 0 unknown) | |
| Implemented: 88% (45 implemented, 6 unimplemented) | |
| F 82000600 8269E1B4 28B (651) XNotifyGetNext | |
| F 82000604 8269E1C4 3D1 (977) XGetVideoMode | |
| F 82000608 8269E1D4 3CC (972) XGetGameRegion | |
| F 8200060C 8269E1E4 2BC (700) XamShowSigninUI | |
| F 82000610 8269E1F4 2C1 (705) XamShowKeyboardUI | |
| F 82000614 8269E204 2D5 (725) !! XamShowGamerCardUIForXUID | |
| F 82000618 8269E214 2C5 (709) !! XamShowAchievementsUI | |
| F 8200061C 8269E224 2C7 (711) !! XamShowMarketplaceUI | |
| F 82000620 8269E234 2CB (715) XamShowDeviceSelectorUI | |
| F 82000624 8269E244 2CA (714) XamShowMessageBoxUI | |
| F 82000628 8269E254 190 (400) XamInputGetCapabilities | |
| F 8200062C 8269E264 191 (401) XamInputGetState | |
| F 82000630 8269E274 192 (402) XamInputSetState | |
| F 82000634 8269E284 198 (408) XamInputGetKeystrokeEx | |
| F 82000638 8269E294 28A (650) XamNotifyCreateListener | |
| F 8200063C 8269E2A4 1A4 (420) XamLoaderLaunchTitle | |
| F 82000640 8269E2B4 227 (551) XamUserGetSigninInfo | |
| F 82000644 8269E2C4 1F7 (503) XMsgStartIORequest | |
| F 82000648 8269E2D4 210 (528) XamUserGetSigninState | |
| F 8200064C 8269E2E4 212 (530) XamUserCheckPrivilege | |
| F 82000650 8269E2F4 282 (642) XamGetSystemVersion | |
| F 82000654 8269E304 2F7 (759) !! XamUserCreateStatsEnumerator | |
| F 82000658 8269E314 2F0 (752) XamWriteGamerTile | |
| F 8200065C 8269E324 2EE (750) XamUserCreateAchievementEnumerator | |
| F 82000660 8269E334 20A (522) XamUserGetXUID | |
| F 82000664 8269E344 250 (592) XamEnumerate | |
| F 82000668 8269E354 259 (601) XamContentCreateEx | |
| F 8200066C 8269E364 25B (603) XamContentDelete | |
| F 82000670 8269E374 25A (602) XamContentClose | |
| F 82000674 8269E384 260 (608) XamContentSetThumbnail | |
| F 82000678 8269E394 262 (610) XamContentGetCreator | |
| F 8200067C 8269E3A4 266 (614) XamContentGetLicenseMask | |
| F 82000680 8269E3B4 25C (604) XamContentCreateEnumerator | |
| F 82000684 8269E3C4 265 (613) XamContentGetDeviceState | |
| F 82000688 8269E3D4 25E (606) XamContentGetDeviceData | |
| F 8200068C 8269E3E4 1F8 (504) XMsgCancelIORequest | |
| F 82000690 8269E3F4 2DC (732) !! XamShowMessageBoxUIEx | |
| F 82000694 8269E404 3CD (973) XGetLanguage | |
| F 82000698 8269E414 3CB (971) XGetAVPack | |
| F 8200069C 8269E424 1A9 (425) XamLoaderTerminateTitle | |
| F 820006A0 8269E434 280 (640) XamGetExecutionId | |
| F 820006A4 8269EAC4 002 ( 2) NetDll_WSACleanup | |
| F 820006A8 8269EAB4 001 ( 1) NetDll_WSAStartup | |
| F 820006AC 8269EAA4 21A (538) XamUserWriteProfileSettings | |
| F 820006B0 8269EA94 219 (537) XamUserReadProfileSettings | |
| F 820006B4 8269EA84 316 (790) XamSessionCreateHandle | |
| F 820006B8 8269EA74 317 (791) XamSessionRefObjByHandle | |
| F 820006BC 8269EA64 136 (310) !! XNetLogonGetTitleID | |
| F 820006C0 8269EA54 1EA (490) XamAlloc | |
| F 820006C4 8269EA44 1F4 (500) XMsgInProcessCall | |
| F 820006C8 8269EA34 1EC (492) XamFree | |
| xboxkrnl.exe - 149 imports | |
| Version: 0.0.8276.32 | |
| Min Version: 0.0.1861.32 | |
| Total: 149 | |
| Known: 100% (149 known, 0 unknown) | |
| Implemented: 93% (140 implemented, 9 unimplemented) | |
| V 820006D0 266 (614) KeCertMonitorData | |
| V 820006D4 1BE (446) VdGlobalDevice | |
| V 820006D8 1BF (447) VdGlobalXamDevice | |
| F 820006DC 8269E7C4 089 (137) KeReleaseSpinLockFromRaisedIrql | |
| F 820006E0 8269E7D4 04D ( 77) KeAcquireSpinLockAtRaisedIrql | |
| F 820006E4 8269E7E4 0B4 (180) KfReleaseSpinLock | |
| F 820006E8 8269E7F4 0B1 (177) KfAcquireSpinLock | |
| F 820006EC 8269E804 1DF (479) KiApcNormalRoutineNop | |
| F 820006F0 8269E814 1B6 (438) VdEnableRingBufferRPtrWriteBack | |
| F 820006F4 8269E824 1C3 (451) VdInitializeRingBuffer | |
| F 820006F8 8269E834 0BE (190) MmGetPhysicalAddress | |
| F 820006FC 8269E844 1D9 (473) VdSetSystemCommandBufferGpuIdentifierAddress | |
| F 82000700 8269E854 14D (333) _vsnprintf | |
| F 82000704 8269E864 13B (315) sprintf | |
| F 82000708 8269E874 015 ( 21) ExRegisterTitleTerminateNotification | |
| F 8200070C 8269E884 1DC (476) VdShutdownEngines | |
| F 82000710 8269E894 1CA (458) VdQueryVideoMode | |
| F 82000714 8269E8A4 1BA (442) VdGetCurrentDisplayInformation | |
| F 82000718 8269E8B4 1D3 (467) VdSetDisplayMode | |
| F 8200071C 8269E8C4 1D5 (469) VdSetGraphicsInterruptCallback | |
| F 82000720 8269E8D4 1C2 (450) VdInitializeEngines | |
| V 82000724 156 (342) XboxHardwareInfo | |
| F 82000728 8269E8F4 1B9 (441) VdGetCurrentDisplayGamma | |
| F 8200072C 8269E904 1B4 (436) VdEnableDisableClockGating | |
| F 82000730 8269E914 052 ( 82) KeBugCheck | |
| F 82000734 8269E924 1C7 (455) VdPersistDisplay | |
| F 82000738 8269E934 25B (603) VdSwap | |
| F 8200073C 8269E944 1BD (445) VdGetSystemCommandBuffer | |
| F 82000740 8269E954 1C9 (457) VdQueryVideoFlags | |
| F 82000744 8269E964 1B1 (433) VdCallGraphicsNotificationRoutines | |
| V 82000748 1C0 (448) VdGpuClockInMHz | |
| F 8200074C 8269E974 1C5 (453) VdInitializeScalerCommandBuffer | |
| F 82000750 8269E984 104 (260) ObDeleteSymbolicLink | |
| F 82000754 8269E994 103 (259) ObCreateSymbolicLink | |
| F 82000758 8269E9A4 07D (125) KeLeaveCriticalRegion | |
| F 8200075C 8269E9B4 269 (617) VdRetrainEDRAM | |
| F 82000760 8269E9C4 26A (618) VdRetrainEDRAMWorker | |
| V 82000764 1C1 (449) VdHSIOCalibrationLock | |
| F 82000768 8269E9D4 05F ( 95) KeEnterCriticalRegion | |
| F 8200076C 8269E9E4 06B (107) KeLockL2 | |
| F 82000770 8269E9F4 06C (108) KeUnlockL2 | |
| F 82000774 8269EA04 09D (157) KeSetEvent | |
| F 82000778 8269EA14 08F (143) KeResetEvent | |
| F 8200077C 8269EA24 0B0 (176) KeWaitForSingleObject | |
| F 82000780 8269E7B4 136 (310) RtlRaiseException | |
| F 82000784 8269E7A4 11B (283) RtlCompareMemoryUlong | |
| F 82000788 8269E794 066 (102) KeGetCurrentProcessType | |
| F 8200078C 8269E784 053 ( 83) KeBugCheckEx | |
| F 82000790 8269E774 126 (294) RtlFillMemoryUlong | |
| F 82000794 8269E764 019 ( 25) ExTerminateThread | |
| F 82000798 8269E754 028 ( 40) HalReturnToFirmware | |
| V 8200079C 193 (403) XexExecutableModuleHandle | |
| F 820007A0 8269E744 12B (299) RtlImageXexHeaderField | |
| V 820007A4 1AE (430) ExLoadedCommandLine | |
| F 820007A8 8269E734 0DA (218) NtDuplicateObject | |
| F 820007AC 8269E724 0F0 (240) NtReadFile | |
| F 820007B0 8269E714 0F1 (241) !! NtReadFileScatter | |
| F 820007B4 8269E704 0E4 (228) NtQueryDirectoryFile | |
| F 820007B8 8269E6F4 0EF (239) NtQueryVolumeInformationFile | |
| F 820007BC 8269E6E4 0E8 (232) NtQueryInformationFile | |
| F 820007C0 8269E6D4 0E7 (231) NtQueryFullAttributesFile | |
| F 820007C4 8269E6C4 196 (406) XexGetModuleSection | |
| F 820007C8 8269E6B4 197 (407) XexGetProcedureAddress | |
| F 820007CC 8269E6A4 0DC (220) NtFreeVirtualMemory | |
| F 820007D0 8269E694 0CC (204) NtAllocateVirtualMemory | |
| F 820007D4 8269E684 00D ( 13) ExCreateThread | |
| F 820007D8 8269E674 05A ( 90) KeDelayExecutionThread | |
| F 820007DC 8269E664 143 (323) RtlUnicodeToMultiByteN | |
| F 820007E0 8269E654 1A5 (421) !! __C_specific_handler | |
| F 820007E4 8269E644 003 ( 3) DbgPrint | |
| F 820007E8 8269E634 194 (404) XexCheckExecutablePrivilege | |
| F 820007EC 8269E624 084 (132) KeQuerySystemTime | |
| F 820007F0 8269E614 13F (319) RtlTimeFieldsToTime | |
| F 820007F4 8269E604 0BD (189) MmFreePhysicalMemory | |
| F 820007F8 8269E5F4 0C5 (197) MmQueryAllocationSize | |
| F 820007FC 8269E5E4 0BA (186) MmAllocatePhysicalMemoryEx | |
| F 82000800 8269E5D4 0C4 (196) MmQueryAddressProtect | |
| F 82000804 8269E5C4 0FD (253) NtWaitForSingleObjectEx | |
| F 82000808 8269E5B4 0FF (255) NtWriteFile | |
| F 8200080C 8269E5A4 135 (309) RtlNtStatusToDosError | |
| F 82000810 8269E594 0D2 (210) NtCreateFile | |
| F 82000814 8269E584 0D1 (209) NtCreateEvent | |
| F 82000818 8269E574 083 (131) KeQueryPerformanceFrequency | |
| F 8200081C 8269EAD4 166 (358) !! XeCryptBnQwBeSigVerify | |
| F 82000820 8269EAE4 244 (580) !! XeKeysGetKey | |
| F 82000824 8269EAF4 18E (398) !! XeCryptRotSumSha | |
| F 82000828 8269EB04 192 (402) XeCryptSha | |
| F 8200082C 8269EB14 155 (341) KeTlsSetValue | |
| F 82000830 8269EB24 154 (340) KeTlsGetValue | |
| F 82000834 8269EB34 153 (339) KeTlsFree | |
| F 82000838 8269EB44 152 (338) KeTlsAlloc | |
| F 8200083C 8269EB54 14F (335) _vscwprintf | |
| F 82000840 8269EB64 13D (317) !! _snwprintf | |
| F 82000844 8269EB74 13E (318) swprintf | |
| F 82000848 8269EB84 195 (405) XexGetModuleHandle | |
| F 8200084C 8269EB94 141 (321) RtlTryEnterCriticalSection | |
| F 82000850 8269EBA4 1F8 (504) XAudioGetVoiceCategoryVolume | |
| F 82000854 8269EBB4 0C2 (194) MmMapIoSpace | |
| F 82000858 8269EBC4 224 (548) XMACreateContext | |
| F 8200085C 8269EBD4 226 (550) XMAReleaseContext | |
| F 82000860 8269EBE4 0AF (175) KeWaitForMultipleObjects | |
| F 82000864 8269EBF4 1F5 (501) XAudioSubmitRenderDriverFrame | |
| F 82000868 8269EC04 1F4 (500) XAudioUnregisterRenderDriverClient | |
| F 8200086C 8269EC14 1F3 (499) XAudioRegisterRenderDriverClient | |
| F 82000870 8269EC24 1FF (511) XAudioGetSpeakerConfig | |
| F 82000874 8269EC34 147 (327) !! RtlUnwind | |
| F 82000878 8269EC44 12F (303) RtlInitializeCriticalSectionAndSpinCount | |
| F 8200087C 8269EC54 119 (281) !! RtlCaptureContext | |
| F 82000880 8269EC64 05D ( 93) KeEnableFpuExceptions | |
| V 82000884 0AD (173) KeTimeStampBundle | |
| F 82000888 8269EC74 0CE (206) NtClearEvent | |
| F 8200088C 8269EC84 101 (257) NtYieldExecution | |
| F 82000890 8269EC94 0F5 (245) NtResumeThread | |
| F 82000894 8269ECA4 0F6 (246) NtSetEvent | |
| F 82000898 8269ECB4 0D5 (213) NtCreateSemaphore | |
| F 8200089C 8269ECC4 0F3 (243) NtReleaseSemaphore | |
| F 820008A0 8269ECD4 0FE (254) NtWaitForMultipleObjectsEx | |
| F 820008A4 8269ECE4 0D4 (212) NtCreateMutant | |
| F 820008A8 8269ECF4 0F2 (242) NtReleaseMutant | |
| F 820008AC 8269ED04 127 (295) RtlFreeAnsiString | |
| F 820008B0 8269ED14 142 (322) RtlUnicodeStringToAnsiString | |
| F 820008B4 8269ED24 12D (301) RtlInitUnicodeString | |
| F 820008B8 8269ED34 0DB (219) NtFlushBuffersFile | |
| F 820008BC 8269ED44 133 (307) RtlMultiByteToUnicodeN | |
| F 820008C0 8269ED54 13A (314) _snprintf | |
| F 820008C4 8269E564 151 (337) vswprintf | |
| F 820008C8 8269E554 140 (320) RtlTimeToTimeFields | |
| F 820008CC 8269E544 010 ( 16) ExGetXConfigSetting | |
| F 820008D0 8269E534 021 ( 33) FscSetCacheElementCount | |
| F 820008D4 8269E524 12C (300) RtlInitAnsiString | |
| F 820008D8 8269E514 0DF (223) NtOpenFile | |
| F 820008DC 8269E504 0F7 (247) NtSetInformationFile | |
| F 820008E0 8269E4F4 0CF (207) NtClose | |
| F 820008E4 8269E4E4 0C6 (198) MmQueryStatistics | |
| F 820008E8 8269E4D4 0EE (238) NtQueryVirtualMemory | |
| V 820008EC 059 ( 89) KeDebugMonitorData | |
| F 820008F0 8269E4C4 097 (151) KeSetAffinityThread | |
| F 820008F4 8269E4B4 0FC (252) NtSuspendThread | |
| F 820008F8 8269E4A4 081 (129) KeQueryBasePriorityThread | |
| V 820008FC 01B ( 27) !! ExThreadObjectType | |
| F 82000900 8269E494 110 (272) ObReferenceObjectByHandle | |
| F 82000904 8269E484 099 (153) KeSetBasePriorityThread | |
| F 82000908 8269E474 105 (261) ObDereferenceObject | |
| V 8200090C 158 (344) XboxKrnlVersion | |
| F 82000910 8269E464 12E (302) RtlInitializeCriticalSection | |
| F 82000914 8269E454 130 (304) RtlLeaveCriticalSection | |
| F 82000918 8269E444 125 (293) RtlEnterCriticalSection | |
| F 8200091C 8269E8E4 1C6 (454) VdIsHSIOTrainingSucceeded | |
| F 82000920 8269ED64 001 ( 1) DbgBreakPoint | |
| i> 00003490 XThread00000024 (5) Stack: 40110000-40130000 | |
| i> 00003490 KernelState: Launching module... | |
| i> 00003490 XThread00000028 (6) Stack: 40150000-40190000 | |
| K> 00000024 XThread::Execute thid 5 (handle=00000024, 'Kernel Dispatch Thread (00000024)', native=0000264C, <host>) | |
| K> 00000028 XThread::Execute thid 6 (handle=00000028, 'Main XThread00000028 (00000028)', native=000025E4) | |
| i> 00000028 XThread00000054 (7) Stack: 402B0000-402F0000 | |
| K> 00000054 XThread::Execute thid 7 (handle=00000054, 'XThread1344 (00000054)', native=00001344) | |
| i> 00000028 XThread00000060 (8) Stack: 40310000-40350000 | |
| K> 00000060 XThread::Execute thid 8 (handle=00000060, 'XThread1758 (00000060)', native=00001758) | |
| i> 00000028 XThread0000006C (9) Stack: 40370000-403B0000 | |
| K> 0000006C XThread::Execute thid 9 (handle=0000006C, 'XThread1BEC (0000006C)', native=00001BEC) | |
| i> 00000028 XThread00000078 (A) Stack: 403D0000-40410000 | |
| K> 00000078 XThread::Execute thid 10 (handle=00000078, 'XThread24A0 (00000078)', native=000024A0) | |
| i> 00000028 XThread00000084 (B) Stack: 40430000-40470000 | |
| K> 00000084 XThread::Execute thid 11 (handle=00000084, 'XThread32C8 (00000084)', native=000032C8) | |
| F> 00000028 Device::ResolvePath(\data) | |
| G> 00000028 SetInterruptCallback(82134580, 401A1A80) | |
| i> 00000028 XThread000000AC (C) Stack: 40490000-404A0000 | |
| i> 00000028 XThread000000B0 (D) Stack: 404C0000-404D0000 | |
| K> 000000AC XThread::Execute thid 12 (handle=000000AC, 'XThread3250 (000000AC)', native=00003250) | |
| K> 000000B0 XThread::Execute thid 13 (handle=000000B0, 'XThread1608 (000000B0)', native=00001608) | |
| w> 00000004 GPU: Write to unknown register (0081 = 80010000) | |
| w> 00000004 GPU: Write to unknown register (0082 = 00000000) | |
| i> 00000028 XThread000000D0 (E) Stack: 404F0000-40530000 | |
| F> 00000028 Device::ResolvePath(\data) | |
| K> 000000D0 XThread::Execute thid 14 (handle=000000D0, 'XThread3550 (000000D0)', native=00003550) | |
| i> 00000028 XThread000000DC (F) Stack: 40550000-40590000 | |
| K> 000000DC XThread::Execute thid 15 (handle=000000DC, 'XThread0EB4 (000000DC)', native=00000EB4) | |
| i> 000000D0 VdSwap(BFAA0870, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| G> 00000004 Generated vertex shader (108b) - hash 0F42411907796AEE: | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r1.xyz1, r0.x, vf95, DataFormat=FMT_32_32_32_FLOAT, Stride=7, Signed=true, NumFormat=integer, PrefetchCount=7 | |
| /* 4 */ vfetch_mini r0, Offset=3, DataFormat=FMT_32_32_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc interpolators | |
| /* 1.0 */ exec | |
| /* 5 */ max o0, r0, r0 | |
| /* 1.1 */ alloc position | |
| /* 2.0 */ exec | |
| /* 6 */ max oPos, r1, r1 | |
| /* 2.1 */ exece | |
| /* 7 */ nop | |
| G> 00000004 Generated pixel shader (36b) - hash 52910627A8EDB5CE: | |
| /* 0.0 */ alloc colors | |
| /* 0.1 */ exece | |
| /* 1 */ max oC0, r0, r0 | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| i> 00000028 XThread000000F8 (10) Stack: 405B0000-405F0000 | |
| F> 000000D0 Device::ResolvePath(\data) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| K> 000000F8 XThread::Execute thid 16 (handle=000000F8, 'XThread2494 (000000F8)', native=00002494) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAB0990, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| i> 00000028 XThread0000011C (11) Stack: 40610000-40650000 | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| K> 0000011C XThread::Execute thid 17 (handle=0000011C, 'XThread2168 (0000011C)', native=00002168) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| G> 00000004 Generated vertex shader (96b) - hash D8A48B9033749C8D: | |
| /* 0.0 */ exec | |
| /* 3 */ nop | |
| /* 0.1 */ alloc interpolators | |
| /* 1.0 */ exec | |
| /* 4 */ max o0._, r0, r0 | |
| /* 1.1 */ alloc position | |
| /* 2.0 */ exec | |
| /* 5 */ max oPos.0001, r1, r1 | |
| /* 2.1 */ exece | |
| /* 6 */ nop | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1973 = 00010000) | |
| w> 00000004 GPU: Write to unknown register (1964 = 00000001) | |
| w> 00000004 GPU: Write to unknown register (1973 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1852 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1838 = 00000001) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1838 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1852 = 00000001) | |
| w> 00000004 GPU: Write to unknown register (1921 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1927 = 00000007) | |
| w> 00000004 GPU: Write to unknown register (1925 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000001) | |
| w> 00000004 GPU: Write to unknown register (1925 = 00100401) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000002) | |
| w> 00000004 GPU: Write to unknown register (1925 = 00300C03) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000003) | |
| w> 00000004 GPU: Write to unknown register (1925 = 00401004) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000004) | |
| w> 00000004 GPU: Write to unknown register (1925 = 00601806) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000005) | |
| w> 00000004 GPU: Write to unknown register (1925 = 00701C07) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000006) | |
| w> 00000004 GPU: Write to unknown register (1925 = 00802008) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000007) | |
| w> 00000004 GPU: Write to unknown register (1925 = 00A0280A) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000008) | |
| w> 00000004 GPU: Write to unknown register (1925 = 00B02C0B) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000009) | |
| w> 00000004 GPU: Write to unknown register (1925 = 00D0340D) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000000A) | |
| w> 00000004 GPU: Write to unknown register (1925 = 00E0380E) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000000B) | |
| w> 00000004 GPU: Write to unknown register (1925 = 00F03C0F) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000000C) | |
| w> 00000004 GPU: Write to unknown register (1925 = 01104411) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000000D) | |
| w> 00000004 GPU: Write to unknown register (1925 = 01204812) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000000E) | |
| w> 00000004 GPU: Write to unknown register (1925 = 01405014) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000000F) | |
| w> 00000004 GPU: Write to unknown register (1925 = 01605816) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000010) | |
| w> 00000004 GPU: Write to unknown register (1925 = 01806018) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000011) | |
| w> 00000004 GPU: Write to unknown register (1925 = 01A0681A) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000012) | |
| w> 00000004 GPU: Write to unknown register (1925 = 01C0701C) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000013) | |
| w> 00000004 GPU: Write to unknown register (1925 = 01E0781E) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000014) | |
| w> 00000004 GPU: Write to unknown register (1925 = 02008020) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000015) | |
| w> 00000004 GPU: Write to unknown register (1925 = 02208822) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000016) | |
| w> 00000004 GPU: Write to unknown register (1925 = 02509425) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000017) | |
| w> 00000004 GPU: Write to unknown register (1925 = 02709C27) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000018) | |
| w> 00000004 GPU: Write to unknown register (1925 = 02A0A82A) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000019) | |
| w> 00000004 GPU: Write to unknown register (1925 = 02D0B42D) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000001A) | |
| w> 00000004 GPU: Write to unknown register (1925 = 02F0BC2F) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000001B) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0320C832) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000001C) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0350D435) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000001D) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0380E038) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000001E) | |
| w> 00000004 GPU: Write to unknown register (1925 = 03B0EC3B) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000001F) | |
| w> 00000004 GPU: Write to unknown register (1925 = 03F0FC3F) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000020) | |
| w> 00000004 GPU: Write to unknown register (1925 = 04210842) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000021) | |
| w> 00000004 GPU: Write to unknown register (1925 = 04611846) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000022) | |
| w> 00000004 GPU: Write to unknown register (1925 = 04912449) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000023) | |
| w> 00000004 GPU: Write to unknown register (1925 = 04D1344D) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000024) | |
| w> 00000004 GPU: Write to unknown register (1925 = 05114451) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000025) | |
| w> 00000004 GPU: Write to unknown register (1925 = 05515455) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000026) | |
| w> 00000004 GPU: Write to unknown register (1925 = 05916459) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000027) | |
| w> 00000004 GPU: Write to unknown register (1925 = 05D1745D) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000028) | |
| w> 00000004 GPU: Write to unknown register (1925 = 06118461) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000029) | |
| w> 00000004 GPU: Write to unknown register (1925 = 06519465) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000002A) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0691A469) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000002B) | |
| w> 00000004 GPU: Write to unknown register (1925 = 06D1B46D) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000002C) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0711C471) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000002D) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0751D475) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000002E) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0791E479) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000002F) | |
| w> 00000004 GPU: Write to unknown register (1925 = 07D1F47D) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000030) | |
| w> 00000004 GPU: Write to unknown register (1925 = 08120481) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000031) | |
| w> 00000004 GPU: Write to unknown register (1925 = 08521485) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000032) | |
| w> 00000004 GPU: Write to unknown register (1925 = 08922489) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000033) | |
| w> 00000004 GPU: Write to unknown register (1925 = 08D2348D) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000034) | |
| w> 00000004 GPU: Write to unknown register (1925 = 09124491) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000035) | |
| w> 00000004 GPU: Write to unknown register (1925 = 09525495) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000036) | |
| w> 00000004 GPU: Write to unknown register (1925 = 09926499) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000037) | |
| w> 00000004 GPU: Write to unknown register (1925 = 09D2749D) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000038) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0A1284A1) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000039) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0A5294A5) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000003A) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0A92A4A9) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000003B) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0AD2B4AD) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000003C) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0B12C4B1) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000003D) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0B52D4B5) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000003E) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0B92E4B9) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000003F) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0BD2F4BD) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000040) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0C1304C1) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000041) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0C5314C5) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000042) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0C9324C9) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000043) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0CE338CE) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000044) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0D2348D2) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000045) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0D6358D6) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000046) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0DA368DA) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000047) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0DE378DE) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000048) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0E2388E2) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000049) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0E6398E6) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000004A) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0EA3A8EA) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000004B) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0EE3B8EE) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000004C) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0F23C8F2) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000004D) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0F73DCF7) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000004E) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0FB3ECFB) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000004F) | |
| w> 00000004 GPU: Write to unknown register (1925 = 0FF3FCFF) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000050) | |
| w> 00000004 GPU: Write to unknown register (1925 = 10340D03) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000051) | |
| w> 00000004 GPU: Write to unknown register (1925 = 10741D07) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000052) | |
| w> 00000004 GPU: Write to unknown register (1925 = 10B42D0B) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000053) | |
| w> 00000004 GPU: Write to unknown register (1925 = 10F43D0F) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000054) | |
| w> 00000004 GPU: Write to unknown register (1925 = 11445114) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000055) | |
| w> 00000004 GPU: Write to unknown register (1925 = 11946519) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000056) | |
| w> 00000004 GPU: Write to unknown register (1925 = 11D4751D) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000057) | |
| w> 00000004 GPU: Write to unknown register (1925 = 12148521) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000058) | |
| w> 00000004 GPU: Write to unknown register (1925 = 12549525) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000059) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1294A529) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000005A) | |
| w> 00000004 GPU: Write to unknown register (1925 = 12E4B92E) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000005B) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1324C932) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000005C) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1364D936) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000005D) | |
| w> 00000004 GPU: Write to unknown register (1925 = 13A4E93A) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000005E) | |
| w> 00000004 GPU: Write to unknown register (1925 = 13E4F93E) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000005F) | |
| w> 00000004 GPU: Write to unknown register (1925 = 14250942) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000060) | |
| w> 00000004 GPU: Write to unknown register (1925 = 14751D47) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000061) | |
| w> 00000004 GPU: Write to unknown register (1925 = 14B52D4B) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000062) | |
| w> 00000004 GPU: Write to unknown register (1925 = 14F53D4F) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000063) | |
| w> 00000004 GPU: Write to unknown register (1925 = 15354D53) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000064) | |
| w> 00000004 GPU: Write to unknown register (1925 = 15755D57) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000065) | |
| w> 00000004 GPU: Write to unknown register (1925 = 15C5715C) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000066) | |
| w> 00000004 GPU: Write to unknown register (1925 = 16058160) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000067) | |
| w> 00000004 GPU: Write to unknown register (1925 = 16459164) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000068) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1685A168) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000069) | |
| w> 00000004 GPU: Write to unknown register (1925 = 16C5B16C) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000006A) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1715C571) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000006B) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1755D575) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000006C) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1795E579) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000006D) | |
| w> 00000004 GPU: Write to unknown register (1925 = 17D5F57D) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000006E) | |
| w> 00000004 GPU: Write to unknown register (1925 = 18260982) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000006F) | |
| w> 00000004 GPU: Write to unknown register (1925 = 18661986) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000070) | |
| w> 00000004 GPU: Write to unknown register (1925 = 18A6298A) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000071) | |
| w> 00000004 GPU: Write to unknown register (1925 = 18E6398E) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000072) | |
| w> 00000004 GPU: Write to unknown register (1925 = 19364D93) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000073) | |
| w> 00000004 GPU: Write to unknown register (1925 = 19765D97) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000074) | |
| w> 00000004 GPU: Write to unknown register (1925 = 19B66D9B) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000075) | |
| w> 00000004 GPU: Write to unknown register (1925 = 19F67D9F) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000076) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1A4691A4) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000077) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1A86A1A8) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000078) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1AC6B1AC) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000079) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1B06C1B0) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000007A) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1B56D5B5) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000007B) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1B96E5B9) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000007C) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1BD6F5BD) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000007D) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1C1705C1) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000007E) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1C6719C6) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000007F) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1CA729CA) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000080) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1CE739CE) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000081) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1D2749D2) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000082) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1D775DD7) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000083) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1DB76DDB) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000084) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1DF77DDF) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000085) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1E4791E4) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000086) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1E87A1E8) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000087) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1EC7B1EC) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000088) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1F07C1F0) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000089) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1F57D5F5) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000008A) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1F97E5F9) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000008B) | |
| w> 00000004 GPU: Write to unknown register (1925 = 1FD7F5FD) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000008C) | |
| w> 00000004 GPU: Write to unknown register (1925 = 20280A02) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000008D) | |
| w> 00000004 GPU: Write to unknown register (1925 = 20681A06) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000008E) | |
| w> 00000004 GPU: Write to unknown register (1925 = 20A82A0A) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000008F) | |
| w> 00000004 GPU: Write to unknown register (1925 = 20F83E0F) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000090) | |
| w> 00000004 GPU: Write to unknown register (1925 = 21384E13) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000091) | |
| w> 00000004 GPU: Write to unknown register (1925 = 21785E17) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000092) | |
| w> 00000004 GPU: Write to unknown register (1925 = 21B86E1B) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000093) | |
| w> 00000004 GPU: Write to unknown register (1925 = 22088220) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000094) | |
| w> 00000004 GPU: Write to unknown register (1925 = 22489224) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000095) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2288A228) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000096) | |
| w> 00000004 GPU: Write to unknown register (1925 = 22D8B62D) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000097) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2318C631) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000098) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2358D635) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000099) | |
| w> 00000004 GPU: Write to unknown register (1925 = 23A8EA3A) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000009A) | |
| w> 00000004 GPU: Write to unknown register (1925 = 23E8FA3E) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000009B) | |
| w> 00000004 GPU: Write to unknown register (1925 = 24290A42) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000009C) | |
| w> 00000004 GPU: Write to unknown register (1925 = 24791E47) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000009D) | |
| w> 00000004 GPU: Write to unknown register (1925 = 24B92E4B) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000009E) | |
| w> 00000004 GPU: Write to unknown register (1925 = 24F93E4F) | |
| w> 00000004 GPU: Write to unknown register (1922 = 0000009F) | |
| w> 00000004 GPU: Write to unknown register (1925 = 25495254) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000A0) | |
| w> 00000004 GPU: Write to unknown register (1925 = 25896258) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000A1) | |
| w> 00000004 GPU: Write to unknown register (1925 = 25C9725C) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000A2) | |
| w> 00000004 GPU: Write to unknown register (1925 = 26198661) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000A3) | |
| w> 00000004 GPU: Write to unknown register (1925 = 26599665) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000A4) | |
| w> 00000004 GPU: Write to unknown register (1925 = 26A9AA6A) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000A5) | |
| w> 00000004 GPU: Write to unknown register (1925 = 26E9BA6E) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000A6) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2729CA72) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000A7) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2779DE77) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000A8) | |
| w> 00000004 GPU: Write to unknown register (1925 = 27B9EE7B) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000A9) | |
| w> 00000004 GPU: Write to unknown register (1925 = 27F9FE7F) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000AA) | |
| w> 00000004 GPU: Write to unknown register (1925 = 285A1685) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000AB) | |
| w> 00000004 GPU: Write to unknown register (1925 = 289A2689) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000AC) | |
| w> 00000004 GPU: Write to unknown register (1925 = 28EA3A8E) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000AD) | |
| w> 00000004 GPU: Write to unknown register (1925 = 292A4A92) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000AE) | |
| w> 00000004 GPU: Write to unknown register (1925 = 296A5A96) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000AF) | |
| w> 00000004 GPU: Write to unknown register (1925 = 29BA6E9B) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000B0) | |
| w> 00000004 GPU: Write to unknown register (1925 = 29FA7E9F) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000B1) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2A3A8EA3) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000B2) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2A8AA2A8) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000B3) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2ACAB2AC) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000B4) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2B1AC6B1) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000B5) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2B5AD6B5) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000B6) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2B9AE6B9) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000B7) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2BEAFABE) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000B8) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2C2B0AC2) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000B9) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2C6B1AC6) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000BA) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2CBB2ECB) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000BB) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2CFB3ECF) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000BC) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2D4B52D4) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000BD) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2D8B62D8) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000BE) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2DCB72DC) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000BF) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2E1B86E1) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000C0) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2E5B96E5) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000C1) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2EABAAEA) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000C2) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2EEBBAEE) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000C3) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2F2BCAF2) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000C4) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2F7BDEF7) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000C5) | |
| w> 00000004 GPU: Write to unknown register (1925 = 2FBBEEFB) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000C6) | |
| w> 00000004 GPU: Write to unknown register (1925 = 300C0300) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000C7) | |
| w> 00000004 GPU: Write to unknown register (1925 = 304C1304) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000C8) | |
| w> 00000004 GPU: Write to unknown register (1925 = 309C2709) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000C9) | |
| w> 00000004 GPU: Write to unknown register (1925 = 30DC370D) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000CA) | |
| w> 00000004 GPU: Write to unknown register (1925 = 311C4711) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000CB) | |
| w> 00000004 GPU: Write to unknown register (1925 = 316C5B16) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000CC) | |
| w> 00000004 GPU: Write to unknown register (1925 = 31AC6B1A) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000CD) | |
| w> 00000004 GPU: Write to unknown register (1925 = 31FC7F1F) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000CE) | |
| w> 00000004 GPU: Write to unknown register (1925 = 323C8F23) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000CF) | |
| w> 00000004 GPU: Write to unknown register (1925 = 328CA328) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000D0) | |
| w> 00000004 GPU: Write to unknown register (1925 = 32CCB32C) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000D1) | |
| w> 00000004 GPU: Write to unknown register (1925 = 330CC330) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000D2) | |
| w> 00000004 GPU: Write to unknown register (1925 = 335CD735) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000D3) | |
| w> 00000004 GPU: Write to unknown register (1925 = 339CE739) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000D4) | |
| w> 00000004 GPU: Write to unknown register (1925 = 33ECFB3E) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000D5) | |
| w> 00000004 GPU: Write to unknown register (1925 = 342D0B42) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000D6) | |
| w> 00000004 GPU: Write to unknown register (1925 = 347D1F47) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000D7) | |
| w> 00000004 GPU: Write to unknown register (1925 = 34BD2F4B) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000D8) | |
| w> 00000004 GPU: Write to unknown register (1925 = 34FD3F4F) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000D9) | |
| w> 00000004 GPU: Write to unknown register (1925 = 354D5354) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000DA) | |
| w> 00000004 GPU: Write to unknown register (1925 = 358D6358) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000DB) | |
| w> 00000004 GPU: Write to unknown register (1925 = 35DD775D) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000DC) | |
| w> 00000004 GPU: Write to unknown register (1925 = 361D8761) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000DD) | |
| w> 00000004 GPU: Write to unknown register (1925 = 366D9B66) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000DE) | |
| w> 00000004 GPU: Write to unknown register (1925 = 36ADAB6A) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000DF) | |
| w> 00000004 GPU: Write to unknown register (1925 = 36FDBF6F) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000E0) | |
| w> 00000004 GPU: Write to unknown register (1925 = 373DCF73) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000E1) | |
| w> 00000004 GPU: Write to unknown register (1925 = 378DE378) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000E2) | |
| w> 00000004 GPU: Write to unknown register (1925 = 37CDF37C) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000E3) | |
| w> 00000004 GPU: Write to unknown register (1925 = 380E0380) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000E4) | |
| w> 00000004 GPU: Write to unknown register (1925 = 385E1785) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000E5) | |
| w> 00000004 GPU: Write to unknown register (1925 = 389E2789) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000E6) | |
| w> 00000004 GPU: Write to unknown register (1925 = 38EE3B8E) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000E7) | |
| w> 00000004 GPU: Write to unknown register (1925 = 392E4B92) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000E8) | |
| w> 00000004 GPU: Write to unknown register (1925 = 397E5F97) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000E9) | |
| w> 00000004 GPU: Write to unknown register (1925 = 39BE6F9B) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000EA) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3A0E83A0) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000EB) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3A4E93A4) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000EC) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3A9EA7A9) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000ED) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3ADEB7AD) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000EE) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3B2ECBB2) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000EF) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3B6EDBB6) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000F0) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3BBEEFBB) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000F1) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3BFEFFBF) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000F2) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3C3F0FC3) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000F3) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3C8F23C8) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000F4) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3CCF33CC) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000F5) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3D1F47D1) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000F6) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3D5F57D5) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000F7) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3DAF6BDA) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000F8) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3DEF7BDE) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000F9) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3E3F8FE3) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000FA) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3E7F9FE7) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000FB) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3ECFB3EC) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000FC) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3F0FC3F0) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000FD) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3F5FD7F5) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000FE) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3F9FE7F9) | |
| w> 00000004 GPU: Write to unknown register (1922 = 000000FF) | |
| w> 00000004 GPU: Write to unknown register (1925 = 3FFFFFFF) | |
| w> 00000004 GPU: Write to unknown register (1922 = 00000100) | |
| w> 00000004 GPU: Write to unknown register (1E4E = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| i> 00000028 XThread00000124 (12) Stack: 40670000-406B0000 | |
| K> 00000124 XThread::Execute thid 18 (handle=00000124, 'XThread37DC (00000124)', native=000037DC) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| F> 000000D0 Device::ResolvePath(\data) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAC0AD0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 00000028 XThread00000144 (13) Stack: 406D0000-40710000 | |
| K> 00000144 XThread::Execute thid 19 (handle=00000144, 'XThread2198 (00000144)', native=00002198) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| F> 000000D0 Device::ResolvePath(\data) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAD0C00, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| i> 00000028 XThread00000168 (14) Stack: 40730000-40770000 | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| K> 00000168 XThread::Execute thid 20 (handle=00000168, 'XThread3420 (00000168)', native=00003420) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 000000D0 Device::ResolvePath(\data) | |
| F> 00000028 Device::ResolvePath(\data\Xui\Skins\en-us) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000028 Device::ResolvePath(\data\Xui\Skins) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAE0D40, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| F> 00000028 Device::ResolvePath(\data\Xui\en-us) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000028 Device::ResolvePath(\data\Xui) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| F> 00000028 Device::ResolvePath(\data\Xui\images\en-us) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAF0E80, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB00FC0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB11100, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\Xui\images\en-us) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB21280, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB31400, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB41540, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB51680, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\Xui\images\en-us) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB617C0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB71940, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB81A80, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB91BC0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBA1D00, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\Xui\images\en-us) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000054 Device::ResolvePath(\data) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000054 Device::ResolvePath(\data\Xui\Skins\en-us) | |
| i> 00000054 RtlNtStatusToDosError(C000000F) | |
| i> 00000054 RtlNtStatusToDosError => 2 | |
| F> 00000054 Device::ResolvePath(\data\Xui\Skins) | |
| i> 00000054 RtlNtStatusToDosError(C000000F) | |
| i> 00000054 RtlNtStatusToDosError => 2 | |
| i> 000000D0 VdSwap(BFBB1E80, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| F> 00000054 Device::ResolvePath(\data\Xui\en-us) | |
| i> 00000054 RtlNtStatusToDosError(C000000F) | |
| i> 00000054 RtlNtStatusToDosError => 2 | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data) | |
| F> 00000028 Device::ResolvePath(\data) | |
| F> 00000028 Device::ResolvePath(\data) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| F> 000000D0 Device::ResolvePath(\data\Xui\sounds\en-us) | |
| i> 000000D0 RtlNtStatusToDosError(C000000F) | |
| i> 000000D0 RtlNtStatusToDosError => 2 | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| F> 000000D0 Device::ResolvePath(\data) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 000000D0 Device::ResolvePath(\data\Xui\sounds\en-us) | |
| i> 000000D0 RtlNtStatusToDosError(C000000F) | |
| i> 000000D0 RtlNtStatusToDosError => 2 | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBC4540, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| G> 00000004 Generated vertex shader (192b) - hash 5E2096A99D1595B4: | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r0._xy_, r0.x, vf0, DataFormat=FMT_32_32_FLOAT, Stride=2, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 4 */ dp2add r1._y__, r0.zyyy, c3.yxxx, c3.wwww | |
| /* 5 */ dp2add r0.___w, r0.zyyy, c0.yxxx, c255.xxxx | |
| /* 6 */ dp2add r0.x___, r0.zyyy, c1.yxxx, c255.xxxx | |
| /* 7 */ add r1.__z_, r0.wwww, c0.wwww | |
| + addsc r1.x___, c1.w, r0.x | |
| /* 8 */ dp3 oPos.x___, r1.yxzz, c4.wyxx | |
| /* 9 */ dp3 oPos._y__, r1.yxzz, c5.wyxx | |
| /* 1.1 */ exec | |
| /* 10 */ dp3 oPos.__z_, r1.yxzz, c6.wyxx | |
| /* 11 */ dp3 oPos.___w, r1.yxzz, c7.wyxx | |
| /* 2.0 */ alloc interpolators | |
| /* 2.1 */ exece | |
| /* 12 */ dp2add r0.x___, r0.zyyy, c10.yxxx, c10.wwww | |
| /* 13 */ dp2add r0._y__, r0.zyyy, c11.yxxx, c11.wwww | |
| /* 14 */ add o0.xy__, r0.xyyy, c9.xyyy | |
| G> 00000004 Generated pixel shader (36b) - hash F89BA4D1976AF1E3: | |
| /* 0.0 */ alloc colors | |
| /* 0.1 */ exece | |
| /* 1 */ mul oC0, c0, c1 | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBD46E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBE4840, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBF49A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC04B00, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC14C60, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC24DC0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC34F20, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC45080, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC551E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC65340, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC754A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC85600, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAA2C80, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAB2DE0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\XACT) | |
| i> 00000028 RtlNtStatusToDosError(00000103) | |
| i> 00000028 RtlNtStatusToDosError => 3E5 | |
| i> 00000028 RtlNtStatusToDosError(00000103) | |
| i> 00000028 RtlNtStatusToDosError => 3E5 | |
| i> 000000D0 VdSwap(BFAC30A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| G> 00000004 Generated pixel shader (60b) - hash ED47637CCE2E209A: | |
| /* 0.0 */ exec | |
| /* 2 */ tfetch2D r0, r0.xy, tf0 | |
| /* 0.1 */ alloc colors | |
| /* 1.0 */ exece | |
| /* 3 */ mul oC0, r0, c1 | |
| /* 1.1 */ cnop | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000078 Device::ResolvePath(\data) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| F> 00000054 Device::ResolvePath(\data) | |
| F> 00000084 Device::ResolvePath(\data) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 0000006C Device::ResolvePath(\data) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 RtlNtStatusToDosError(00000103) | |
| i> 000000D0 RtlNtStatusToDosError => 3E5 | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 RtlNtStatusToDosError(00000103) | |
| i> 000000D0 RtlNtStatusToDosError => 3E5 | |
| i> 000000D0 VdSwap(BFAD3220, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000028 ReadRegister(1800) | |
| A> 00000028 WriteRegister(1A80, 00000001) | |
| A> 00000028 XmaContext: reset context 0 | |
| F> 000000D0 Device::ResolvePath(\data) | |
| i> 000000D0 VdSwap(BFAE33A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAF3520, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB036E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| i> 000000D0 VdSwap(BFB138A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB23A20, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| i> 000000D0 VdSwap(BFB33BE0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB43DA0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB53F60, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB64120, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects\walls) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000028 Device::ResolvePath(\data\objects) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000028 Device::ResolvePath(\data\objects) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| F> 00000028 Device::ResolvePath(\data\objects) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 32/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 32, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB742E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 5328/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 5328, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 5328/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 5328, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 9316/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 9316, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 9316/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 9316, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 9316/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 9316, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 9316/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 9316, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 13350/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 13350, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 13350/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 13350, buffer 0, ptr 1E750800) | |
| i> 000000D0 VdSwap(BFB844A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 13350/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 13350/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 13350, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 17378/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 17378, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 17378/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 17378, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 17378/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 17378, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| i> 000000D0 VdSwap(BFB94660, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 17378/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 17378, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 21400/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 21400, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 21400/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 21400, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 21400/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 21400, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 21400/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 21400, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 25529/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBA4820, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 25529/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 25529/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 25529/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 25529, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 27641/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 27641, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 27641/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 27641, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 27641/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 27641, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 27641/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 27641, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 31645/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 31645, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBB49E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 31645/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 31645, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 31645/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 31645, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 31645/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 31645, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 35689/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 35689, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 35689/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 35689, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBC4BE0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 35689/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 35689, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 35689/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 35689, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 39581/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 39581, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 39581/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 39581, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 39581/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 39581, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 39581/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 39581, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBD4DA0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 43681/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 43681, buffer 0, ptr 1E750800) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 43681/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 43681, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 43681/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 43681, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 43681/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 43681, buffer 0, ptr 1E750800) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1A40, 00000001) | |
| A> 00000144 XmaContext: disabling context 0 | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 47706/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 47706/2228224 bits) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 47706/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBE4F60, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 47706/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 47706, buffer 0, ptr 1E750800) | |
| i> 00000004 XE_SWAP | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 49658/2228224 bits) | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 0000000C Processing context 0 (offset 49658, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 49658/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 49658, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 49658/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 49658, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 49658/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 49658, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 53682/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 53682, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBF5120, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 53682/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 53682, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 53682/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 53682, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 53682/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 53682, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 57707/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 57707, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 57707/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 57707, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 57707/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 57707, buffer 0, ptr 1E750800) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1A40, 00000001) | |
| A> 00000144 XmaContext: disabling context 0 | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC052E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 57707/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 57707, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 61676/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 61676, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 61676/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 61676, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 61676/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 61676, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 61676/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 61676, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 65722/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 65722, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 65722/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 65722, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC154A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 65722/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 65722, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 65722/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 65722, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 69858/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 69858/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 69858/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 69858/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 69858, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC25660, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 71926/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 71926, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 71926/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 71926, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| F> 00000028 Device::ResolvePath(\data\objects) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 71926/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 71926, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 71926/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 71926, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 75873/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 75873, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC35820, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 75873/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 75873, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 75873/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| F> 00000028 Device::ResolvePath(\data\objects) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 75873/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 75873, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 79915/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 79915, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 79915/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 79915, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 79915/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 79915, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 79915/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 79915, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 83803/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 83803, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC459E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 83803/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 83803, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 83803/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 83803, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 83803/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 83803, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 87832/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 87832, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 87832/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 87832, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC55BA0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 87832/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 87832, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 87832/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 87832, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 91912/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 91912, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 91912/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 91912, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 91912/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 91912, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 91912/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 91912, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 93832/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 93832, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 93832/2228224 bits) | |
| i> 000000D0 VdSwap(BFC65D60, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 0000000C Processing context 0 (offset 93832, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 93832/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 93832, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 93832/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 93832, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 97818/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 97818, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 97818/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 97818, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 97818/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 97818, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 97818/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 97818, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC75F20, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 101938/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 101938, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 101938/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 101938, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 101938/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 101938, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 101938/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 101938, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 105994/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 105994, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC860A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 105994/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 105994, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 105994/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 105994, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 105994/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 105994, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 110024/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 110024, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 110024/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 110024, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 110024/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 110024, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 110024/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 110024, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 113930/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 113930, buffer 0, ptr 1E750800) | |
| i> 000000D0 VdSwap(BFAA2DE0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 113930/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 113930, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 113930/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 113930, buffer 0, ptr 1E750800) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1A40, 00000001) | |
| A> 00000144 XmaContext: disabling context 0 | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 113930/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 113930, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 117897/2228224 bits) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 117897/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAB2FA0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 117897/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 117897/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 117897, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 119818/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 119818, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 119818/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 119818, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 119818/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 119818, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 119818/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 119818, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAC3000, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 123909/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 123909, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 123909/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 123909, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 123909/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 123909, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 123909/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 123909, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 127881/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 127881, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 127881/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 127881, buffer 0, ptr 1E750800) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1A40, 00000001) | |
| A> 00000144 XmaContext: disabling context 0 | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 127881/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 127881, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAD31A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 127881/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 127881, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 132048/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 132048, buffer 0, ptr 1E750800) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 132048/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 132048, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 132048/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 132048, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 132048/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 132048, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 136020/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 136020, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAE3340, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 136020/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 136020, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 136020/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 136020, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 136020/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 136020, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 140032/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 140032/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 140032/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAF34E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 140032/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 140032, buffer 0, ptr 1E750800) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 141957/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 141957, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 141957/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 141957, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 141957/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 141957, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 141957/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 141957, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 145947/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 145947, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 145947/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 145947, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB03680, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 145947/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 145947, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 145947/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 145947, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 150005/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 150005, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 150005/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 150005, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 150005/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 150005, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 150005/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 150005, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB13820, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 153950/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 153950, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 153950/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 153950, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 153950/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 153950, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 153950/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 153950, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 158034/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 158034, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB239C0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 158034/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 158034, buffer 0, ptr 1E750800) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 158034/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 158034, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 158034/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 158034, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 162031/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 162031/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 162031/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 162031/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 162031, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 164038/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 164038, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB33B60, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 164038/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 164038, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 164038/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 164038, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 164038/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 164038, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 167952/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 167952, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 167952/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 167952, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 167952/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 167952, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB43D00, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 167952/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 167952, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 171893/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 171893, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 171893/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 171893, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 171893/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 171893, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 171893/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 171893, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB53EA0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 175798/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 175798, buffer 0, ptr 1E750800) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 175798/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 175798, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 175798/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 175798, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 175798/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 175798, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 179692/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 179692, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 179692/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 179692, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 179692/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 179692, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 179692/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 179692, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB64040, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 183680/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 183680/2228224 bits) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1A40, 00000001) | |
| A> 00000144 XmaContext: disabling context 0 | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 183680/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 183680/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 183680, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 185725/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 185725, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB741E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 185725/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 185725, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 185725/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 185725, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 185725/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 185725, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 189788/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 189788, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 189788/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 189788, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 189788/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 189788, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 189788/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 189788, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 193974/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 193974, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB84380, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 193974/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 193974, buffer 0, ptr 1E750800) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 193974/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 193974, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects\groups\wood_structures) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 193974/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 193974, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 197881/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 197881, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 197881/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 197881, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB944E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| F> 00000028 Device::ResolvePath(\data\objects\groups\steel_structures) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 197881/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 197881, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 197881/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 197881, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 201903/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 201903, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 201903/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 201903, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 201903/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 201903, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 201903/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 201903, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBA4640, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 205804/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 205804/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 205804/2228224 bits) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 205804/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 205804, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 207809/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 207809, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 207809/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 207809, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 207809/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 207809, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 207809/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 207809, buffer 0, ptr 1E750800) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1A40, 00000001) | |
| A> 00000144 XmaContext: disabling context 0 | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBB47A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| F> 00000060 Device::ResolvePath(\data) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 211771/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 211771, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 211771/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 211771, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 211771/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 211771, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 211771/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 211771, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 215943/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 215943, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBC4900, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 215943/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 215943, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 215943/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 215943, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 215943/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 215943, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 219927/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 219927, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 219927/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 219927, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 219927/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 219927, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBD4AA0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 219927/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 219927, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 223965/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 223965, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 223965/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 223965, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 223965/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 223965, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 223965/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 223965, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 227910/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 227910, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 227910/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 227910, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBE4C40, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 227910/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 227910, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 227910/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 227910, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 229879/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 229879, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 229879/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 229879, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 229879/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 229879, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 229879/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 229879, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBF4DE0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 233844/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 233844, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 233844/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 233844, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 233844/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 233844, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 233844/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 233844, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 237843/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 237843, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 237843/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 237843, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 237843/2228224 bits) | |
| i> 000000D0 VdSwap(BFC050A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 0000000C Processing context 0 (offset 237843, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 237843/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 237843, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 241878/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 241878, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 241878/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 241878/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 241878, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 241878/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 241878, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 245871/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 245871, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC15220, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 245871/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 245871, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 245871/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 245871, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 245871/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 245871, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 249919/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 249919, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 249919/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 249919, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 249919/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 249919, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC253A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 249919/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 249919, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 251852/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 251852, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 251852/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 251852, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 251852/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 251852, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 251852/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 251852, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC35520, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 255872/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 255872, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 255872/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 255872, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 255872/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 255872, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 255872/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 255872, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 259840/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 259840, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 259840/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 259840, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 259840/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 259840, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 259840/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 259840, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC456A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 264018/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 264018, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 264018/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 264018, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 264018/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 264018, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 264018/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 264018, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 268029/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 268029, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC55820, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 268029/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 268029, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 268029/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 268029, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 268029/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 268029, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 272142/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 272142, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 272142/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 272142, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 272142/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 272142, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC659A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 272142/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 272142, buffer 0, ptr 1E750800) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 276042/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 276042/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 276042/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| F> 00000028 Device::ResolvePath(\data\objects) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 276042/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 276042, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 278035/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 278035, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 278035/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 278035, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 278035/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 278035, buffer 0, ptr 1E750800) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1A40, 00000001) | |
| A> 00000144 XmaContext: disabling context 0 | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC75B20, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 278035/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 278035, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 282207/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 282207, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 282207/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 282207, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 282207/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 282207, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 282207/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 282207, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC85CA0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 286208/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 286208, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 286208/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 286208, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 286208/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 286208, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 286208/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 286208, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 290186/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 290186, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 290186/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 290186, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAA2DE0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 290186/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 290186, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 290186/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 290186, buffer 0, ptr 1E750800) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 294169/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 294169, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 294169/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 294169, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 294169/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 294169, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 294169/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 294169, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 298161/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAB2F60, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 298161/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 298161/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 298161/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 298161, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| F> 000000D0 Device::ResolvePath(\data) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 300031/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 300031, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 300031/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 300031, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 300031/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 300031, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAC30E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 300031/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 300031, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 303991/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 303991, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 303991/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 303991, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 303991/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 303991, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 303991/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 303991, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 307944/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 307944, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 307944/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 307944, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAD3260, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 307944/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 307944, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 307944/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 307944, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 312089/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 312089, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 312089/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 312089, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 312089/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 312089, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 312089/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 312089, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAE33E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 315951/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 315951, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 315951/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 315951, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 315951/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 315951, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 315951/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 315951, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 319871/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 319871/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAF3560, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 319871/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 319871/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 319871, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 321846/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 321846, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 321846/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 321846, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 321846/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 321846, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 321846/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 321846, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 325996/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 325996, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB036A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 325996/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 325996, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 325996/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 325996, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 325996/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 325996, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 330019/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 330019, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 330019/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 330019, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 330019/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 330019, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB13820, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 330019/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 330019, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 334038/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 334038, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 334038/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 334038, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 334038/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 334038, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 334038/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 334038, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB239A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 337855/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 337855, buffer 0, ptr 1E750800) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 337855/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 337855, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 337855/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 337855, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 337855/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 337855, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 341969/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 341969/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 341969/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 341969/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 341969, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB33B60, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 343875/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 343875, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 343875/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 343875, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 343875/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 343875, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 343875/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 343875, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 347998/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 347998, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 347998/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 347998, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB43D20, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 347998/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 347998, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 347998/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 347998, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 351919/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 351919, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 351919/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 351919, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 351919/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 351919, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB53EE0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 351919/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 351919, buffer 0, ptr 1E750800) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 355775/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 355775, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 355775/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 355775, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 355775/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 355775, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 355775/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 355775, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 359759/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 359759, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 359759/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 359759, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 359759/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 359759, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB64060, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 359759/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 359759, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 363927/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 363927/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 363927/2228224 bits) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 363927/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 363927, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB741E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 365922/2228224 bits) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 0000000C Processing context 0 (offset 365922, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 365922/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 365922, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 365922/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 365922, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 365922/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 365922, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 369975/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 369975, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 369975/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 369975, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB84360, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 369975/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 369975, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 369975/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 369975, buffer 0, ptr 1E750800) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 373949/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 373949, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 373949/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 373949, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 373949/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 373949, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 373949/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 373949, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 378087/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 378087, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB944E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 378087/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 378087, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 378087/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 378087, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 378087/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 378087, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 382164/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 382164, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 382164/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 382164, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 382164/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 382164, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBA4660, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 382164/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 382164, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 386202/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 386202, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 386202/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 386202, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 386202/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 386202, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 386202/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 386202, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 388203/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 388203, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 388203/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 388203, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBB47E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 388203/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 388203, buffer 0, ptr 1E750800) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 388203/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 388203, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 392376/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 392376, buffer 0, ptr 1E750800) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 392376/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 392376, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 392376/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 392376, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 392376/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 392376, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBC4960, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 396336/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 396336, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 396336/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 396336, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 396336/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 396336, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 396336/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 396336, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 400209/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 400209, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 400209/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 400209, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBD4AE0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 400209/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 400209, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 400209/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 400209, buffer 0, ptr 1E750800) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 404322/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 404322, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 404322/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 404322, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 404322/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 404322, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 404322/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 404322, buffer 0, ptr 1E750800) | |
| i> 000000D0 VdSwap(BFBE4C60, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 408455/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 408455, buffer 0, ptr 1E750800) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 408455/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 408455, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 408455/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 408455, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 408455/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 408455, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 410343/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 410343, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 410343/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 410343, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 410343/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 410343, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBF4DE0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 410343/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 410343, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 414421/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 414421, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 414421/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 414421, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 414421/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 414421, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 414421/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 414421, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 418465/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 418465, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC04F60, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 418465/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 418465, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 418465/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 418465, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 418465/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 418465, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 422368/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 422368, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 422368/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 422368, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 422368/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 422368, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 422368/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 422368, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC150E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 426402/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 426402, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 426402/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 426402, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 426402/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 426402, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 426402/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 426402, buffer 0, ptr 1E750800) | |
| i> 00000004 XE_SWAP | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 430392/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 430392, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 430392/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 430392, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC25260, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 430392/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 430392, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 430392/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 430392, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 434355/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 434355/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 434355/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 434355/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 434355, buffer 0, ptr 1E750800) | |
| i> 000000D0 VdSwap(BFC353E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 436371/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 436371, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 436371/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 436371, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 436371/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 436371, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 436371/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 436371, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 440643/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 440643, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 440643/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 440643, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 440643/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 440643, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC45560, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 440643/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 440643, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 444662/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 444662, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 444662/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 444662, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 444662/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 444662, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 444662/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 444662, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC556E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 448665/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 448665, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| i> 00000004 XE_SWAP | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 448665/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 448665, buffer 0, ptr 1E750800) | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 448665/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 448665, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 448665/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 448665, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 452811/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 452811, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 452811/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 452811, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 452811/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 452811, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 452811/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 452811, buffer 0, ptr 1E750800) | |
| i> 000000D0 VdSwap(BFC65860, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 456880/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 456880/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 456880/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 456880/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 456880, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 458833/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 458833, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 458833/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 458833, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC759E0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 458833/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 458833, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 458833/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 458833, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 462902/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 462902, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 462902/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 462902, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 462902/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 462902, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC85B60, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 462902/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 462902, buffer 0, ptr 1E750800) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 466893/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 466893, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 466893/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 466893, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 466893/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 466893, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 466893/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 466893, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 470860/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 470860, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 470860/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 470860, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 470860/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 470860, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAA2DA0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 470860/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 470860, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 474902/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 474902, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 474902/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 474902, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 474902/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 474902, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 474902/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 474902, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAB2F20, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 478852/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 478852/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 478852/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 478852/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 478852, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 480899/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 480899, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 480899/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 480899, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 480899/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 480899, buffer 0, ptr 1E750800) | |
| i> 000000D0 VdSwap(BFAC30A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 480899/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 480899, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 485028/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 485028, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 485028/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 485028, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 485028/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 485028, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 485028/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 485028, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 489055/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 489055, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAD3220, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 489055/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 489055, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 489055/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 489055, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 489055/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 489055, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 493103/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 493103, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 493103/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 493103, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 493103/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 493103, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFAE33A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 493103/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 493103, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 497086/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 497086, buffer 0, ptr 1E750800) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 497086/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 497086, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 497086/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 497086, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 497086/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 497086, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 501127/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 501127/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 501127/2228224 bits) | |
| i> 000000D0 VdSwap(BFAF3520, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1A40, 00000001) | |
| A> 00000144 XmaContext: disabling context 0 | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 501127/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 501127, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 503113/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 503113, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 503113/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 503113, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 503113/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 503113, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 503113/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 503113, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB036A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 506971/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 506971, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 506971/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 506971, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 506971/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 506971, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 506971/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 506971, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 510981/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 510981, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 510981/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 510981, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB13820, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 510981/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 510981, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 510981/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 510981, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 514983/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 514983, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 514983/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 514983, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 514983/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 514983, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 514983/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 514983, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 519087/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 519087, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB239A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 519087/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 519087, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 519087/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 519087, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 519087/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 519087, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 524320/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 524320/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 524320/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB33B20, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 524320/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 524320, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 526308/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 526308, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 526308/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 526308, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 526308/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 526308, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 526308/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 526308, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 530347/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 530347, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 530347/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 530347, buffer 0, ptr 1E750800) | |
| i> 000000D0 VdSwap(BFB43CA0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 530347/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 530347, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 530347/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 530347, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 534400/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 534400, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 534400/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 534400, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 534400/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 534400, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 534400/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 534400, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB53E20, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 538302/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 538302, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 538302/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 538302, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 538302/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 538302, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 538302/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 538302, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 542497/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 542497, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 542497/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 542497, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB63FA0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 542497/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 542497, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 542497/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 542497, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 546399/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 546399, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 546399/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 546399, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 546399/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 546399, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 546399/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 546399, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 548393/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 548393, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB74120, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 548393/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 548393, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 548393/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 548393, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 548393/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 548393, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 552330/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 552330, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 552330/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 552330, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 552330/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 552330, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB842A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 552330/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 552330, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 556280/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 556280, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 556280/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 556280, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 556280/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 556280, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 556280/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 556280, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFB94420, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 560236/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 560236, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 560236/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 560236, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 560236/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 560236, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 560236/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 560236, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 564329/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 564329, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 564329/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 564329, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 564329/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 564329, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 564329/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 564329, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBA45A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 568296/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 568296, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 568296/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 568296, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 568296/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 568296, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 568296/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 568296, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 572315/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 572315/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBB4720, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 572315/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 572315/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 572315, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 574354/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 574354, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 574354/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 574354, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 574354/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 574354, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBC48A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 574354/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 574354, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 578318/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 578318, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 578318/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 578318, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 578318/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 578318, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 578318/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 578318, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 582357/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 582357, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 582357/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 582357, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 582357/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 582357, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBD4A20, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 582357/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 582357, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 586476/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 586476, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 586476/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 586476, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 586476/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 586476, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 586476/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 586476, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFBE4BA0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 590484/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 590484, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 590484/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 590484, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 590484/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 590484, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 590484/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 590484, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 594424/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 594424/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 594424/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 594424/2228224 bits) | |
| i> 000000D0 VdSwap(BFBF4D20, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 0000000C Processing context 0 (offset 594424, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 596371/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 596371, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 596371/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 596371, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 596371/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 596371, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 596371/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 596371, buffer 0, ptr 1E750800) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1A40, 00000001) | |
| A> 00000144 XmaContext: disabling context 0 | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 600322/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 600322, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC04EA0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 600322/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 600322, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 600322/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 600322, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 600322/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 600322, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 604469/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 604469, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 604469/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 604469, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 604469/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 604469, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC15020, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 604469/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 604469, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 608528/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 608528, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 608528/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 608528, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 608528/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 608528, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 608528/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 608528, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 612626/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 612626, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 612626/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 612626, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 612626/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 612626, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC251A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 612626/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 612626, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 616554/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 616554/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 616554/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 616554/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 616554, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC35320, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 618548/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 618548, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 618548/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 618548, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 618548/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 618548, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 618548/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 618548, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 622648/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 622648, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 622648/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 622648, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 622648/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 622648, buffer 0, ptr 1E750800) | |
| i> 000000D0 VdSwap(BFC454A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 622648/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 622648, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 626627/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 626627, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 626627/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 626627, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 626627/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 626627, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 626627/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 626627, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 630689/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 630689, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC55620, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 630689/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 630689, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 630689/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 630689, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 630689/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 630689, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 634697/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 634697, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 634697/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 634697, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 634697/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 634697, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC657A0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 634697/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 634697, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 638705/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 638705/2228224 bits) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 638705/2228224 bits) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 638705/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 638705, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 640706/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 640706, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC75920, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 640706/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 640706, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 640706/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 640706, buffer 0, ptr 1E750800) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1A40, 00000001) | |
| A> 000000DC XmaContext: disabling context 0 | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 640706/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 640706, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1844 = 1F708000) | |
| w> 00000004 GPU: Write to unknown register (1841 = 00000000) | |
| w> 00000004 GPU: Write to unknown register (1930 = 00000000) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 644791/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 644791, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 644791/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 644791, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 644791/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 644791, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 644791/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 644791, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, 00000002) | |
| A> 00000144 WriteRegister(1804, 00000003) | |
| i> 000000D0 VdSwap(BFC85AA0, 4052FB30, BFFF3008, 4052FB80, BEEF0001, 4052FB20(BF708000), 4052FB1C(00000006), 4052FB18(00000000), 4052FB10(00000500), 4052FB14(000002D0)) | |
| w> 00000004 GPU: Write to unknown register (045E = 00000004) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000DC WriteRegister(1804, 00000002) | |
| A> 000000DC WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 648832/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 648832, buffer 0, ptr 1E750800) | |
| A> 000000F8 WriteRegister(1804, 00000002) | |
| A> 000000F8 WriteRegister(1A40, 00000001) | |
| A> 000000F8 XmaContext: disabling context 0 | |
| A> 000000F8 WriteRegister(1804, 00000003) | |
| A> 000000F8 WriteRegister(1940, 00000001) | |
| A> 000000F8 XmaContext: kicking context 0 (buffer 0 648832/2228224 bits) | |
| A> 0000000C Processing context 0 (offset 648832, buffer 0, ptr 1E750800) | |
| A> 00000124 WriteRegister(1804, 00000002) | |
| A> 00000124 WriteRegister(1A40, 00000001) | |
| A> 00000124 XmaContext: disabling context 0 | |
| A> 00000124 WriteRegister(1804, 00000003) | |
| A> 00000144 WriteRegister(1804, |
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