Created
July 29, 2017 17:33
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| i> 00003354 Build: detached / b'85ad431c43ba03d76baa1b4cc221549d6389c2b9' on Jul 29 2017 | |
| i> 0000081C Successfully created OpenGL context: | |
| i> 0000081C GL_VENDOR: ATI Technologies Inc. | |
| i> 0000081C GL_VERSION: 4.5.13491 Compatibility Profile Context 22.19.662.4 | |
| i> 0000081C GL_RENDERER: AMD Radeon R9 200 / HD 7900 Series | |
| i> 0000081C GL_SHADING_LANGUAGE_VERSION: 4.50 | |
| i> 00003354 XThread00000004 (1) Stack: 40010000-40030000 | |
| i> 00003354 XThread00000008 (2) Stack: 40050000-40070000 | |
| K> 00000004 XThread::Execute thid 1 (handle=00000004, 'GraphicsSystem Command Processor (00000004)', native=00000EAC, <host>) | |
| K> 00000008 XThread::Execute thid 2 (handle=00000008, 'GraphicsSystem Vsync (00000008)', native=00003184, <host>) | |
| i> 00003354 XThread0000000C (3) Stack: 40090000-400B0000 | |
| i> 00003354 XThread00000010 (4) Stack: 400D0000-400F0000 | |
| K> 0000000C XThread::Execute thid 3 (handle=0000000C, 'XMA Decoder Worker (0000000C)', native=000030F8, <host>) | |
| K> 00000010 XThread::Execute thid 4 (handle=00000010, 'Audio Worker (00000010)', native=0000304C, <host>) | |
| i> 0000081C Launching module game:\default.xex | |
| F> 0000081C Device::ResolvePath(\default.xex) | |
| C> 0000081C WARNING: imported a variable with no value: ExThreadObjectType | |
| i> 0000081C Module \Device\Harddisk0\Partition0\default.xex: | |
| Module Flags: 00000001 | |
| Security Header: | |
| Image Flags: 00000008 | |
| Load Address: 82000000 | |
| Image Size: 00780000 | |
| Export Table: 00000000 | |
| Optional Header Count: 15 | |
| XEX_HEADER_RESOURCE_INFO: | |
| 415607D4 82770000-8277DD51, 56657b | |
| XEX_HEADER_FILE_FORMAT_INFO (TODO): | |
| XEX_HEADER_ORIGINAL_BASE_ADDRESS: 00400000 | |
| XEX_HEADER_ENTRY_POINT: 822DBF48 | |
| XEX_HEADER_IMAGE_BASE_ADDRESS: 82000000 | |
| XEX_HEADER_IMPORT_LIBRARIES: | |
| xam.xex - 150 imports | |
| Version: 0.0.2099.32 | |
| Min Version: 0.0.1861.32 | |
| xboxkrnl.exe - 270 imports | |
| Version: 0.0.2099.32 | |
| Min Version: 0.0.1861.32 | |
| XEX_HEADER_CHECKSUM_TIMESTAMP (TODO): | |
| XEX_HEADER_STATIC_LIBRARIES: | |
| XRTLLIB : 2.0.2099.9 | |
| XAPILIB : 2.0.2099.9 | |
| D3D9 : 2.0.2099.6 | |
| D3DX9 : 2.0.2099.3 | |
| XBOXKRNL : 2.0.2099.3 | |
| XONLINE : 2.0.2099.9 | |
| XGRAPHC : 2.0.2099.3 | |
| XAUD : 2.0.2099.9 | |
| XHV : 2.0.2099.7 | |
| XMP : 2.0.2099.7 | |
| LIBCMT : 2.0.2099.3 | |
| XEX_HEADER_TLS_INFO: | |
| Slot Count: 64 | |
| Raw Data Address: 00000000 | |
| Data Size: 0 | |
| Raw Data Size: 0 | |
| XEX_HEADER_DEFAULT_STACK_SIZE: 262144 | |
| XEX_HEADER_SYSTEM_FLAGS: 00000200 | |
| XEX_HEADER_EXECUTION_INFO: | |
| Media ID: 00000000 | |
| Title ID: 415607D4 | |
| Savegame ID: 415607D4 | |
| Disc Number / Total: 0 / 0 | |
| XEX_HEADER_GAME_RATINGS (TODO): | |
| XEX_HEADER_LAN_KEY: B4 77 44 67 D9 59 42 9A C1 35 2F 6B EF 7F 18 D6 | |
| XEX_HEADER_XBOX360_LOGO (TODO): | |
| Sections: | |
| 0 RODATA 1 pages 82000000 - 82010000 (65536 bytes) | |
| 1 RODATA 1 pages 82010000 - 82020000 (65536 bytes) | |
| 2 RODATA 1 pages 82020000 - 82030000 (65536 bytes) | |
| 3 RODATA 1 pages 82030000 - 82040000 (65536 bytes) | |
| 4 RODATA 1 pages 82040000 - 82050000 (65536 bytes) | |
| 5 RODATA 1 pages 82050000 - 82060000 (65536 bytes) | |
| 6 RODATA 1 pages 82060000 - 82070000 (65536 bytes) | |
| 7 RODATA 1 pages 82070000 - 82080000 (65536 bytes) | |
| 8 CODE 1 pages 82080000 - 82090000 (65536 bytes) | |
| 9 CODE 1 pages 82090000 - 820A0000 (65536 bytes) | |
| 10 CODE 1 pages 820A0000 - 820B0000 (65536 bytes) | |
| 11 CODE 1 pages 820B0000 - 820C0000 (65536 bytes) | |
| 12 CODE 1 pages 820C0000 - 820D0000 (65536 bytes) | |
| 13 CODE 1 pages 820D0000 - 820E0000 (65536 bytes) | |
| 14 CODE 1 pages 820E0000 - 820F0000 (65536 bytes) | |
| 15 CODE 1 pages 820F0000 - 82100000 (65536 bytes) | |
| 16 CODE 1 pages 82100000 - 82110000 (65536 bytes) | |
| 17 CODE 1 pages 82110000 - 82120000 (65536 bytes) | |
| 18 CODE 1 pages 82120000 - 82130000 (65536 bytes) | |
| 19 CODE 1 pages 82130000 - 82140000 (65536 bytes) | |
| 20 CODE 1 pages 82140000 - 82150000 (65536 bytes) | |
| 21 CODE 1 pages 82150000 - 82160000 (65536 bytes) | |
| 22 CODE 1 pages 82160000 - 82170000 (65536 bytes) | |
| 23 CODE 1 pages 82170000 - 82180000 (65536 bytes) | |
| 24 CODE 1 pages 82180000 - 82190000 (65536 bytes) | |
| 25 CODE 1 pages 82190000 - 821A0000 (65536 bytes) | |
| 26 CODE 1 pages 821A0000 - 821B0000 (65536 bytes) | |
| 27 CODE 1 pages 821B0000 - 821C0000 (65536 bytes) | |
| 28 CODE 1 pages 821C0000 - 821D0000 (65536 bytes) | |
| 29 CODE 1 pages 821D0000 - 821E0000 (65536 bytes) | |
| 30 CODE 1 pages 821E0000 - 821F0000 (65536 bytes) | |
| 31 CODE 1 pages 821F0000 - 82200000 (65536 bytes) | |
| 32 CODE 1 pages 82200000 - 82210000 (65536 bytes) | |
| 33 CODE 1 pages 82210000 - 82220000 (65536 bytes) | |
| 34 CODE 1 pages 82220000 - 82230000 (65536 bytes) | |
| 35 CODE 1 pages 82230000 - 82240000 (65536 bytes) | |
| 36 CODE 1 pages 82240000 - 82250000 (65536 bytes) | |
| 37 CODE 1 pages 82250000 - 82260000 (65536 bytes) | |
| 38 CODE 1 pages 82260000 - 82270000 (65536 bytes) | |
| 39 CODE 1 pages 82270000 - 82280000 (65536 bytes) | |
| 40 CODE 1 pages 82280000 - 82290000 (65536 bytes) | |
| 41 CODE 1 pages 82290000 - 822A0000 (65536 bytes) | |
| 42 CODE 1 pages 822A0000 - 822B0000 (65536 bytes) | |
| 43 CODE 1 pages 822B0000 - 822C0000 (65536 bytes) | |
| 44 CODE 1 pages 822C0000 - 822D0000 (65536 bytes) | |
| 45 CODE 1 pages 822D0000 - 822E0000 (65536 bytes) | |
| 46 CODE 1 pages 822E0000 - 822F0000 (65536 bytes) | |
| 47 CODE 1 pages 822F0000 - 82300000 (65536 bytes) | |
| 48 CODE 1 pages 82300000 - 82310000 (65536 bytes) | |
| 49 CODE 1 pages 82310000 - 82320000 (65536 bytes) | |
| 50 CODE 1 pages 82320000 - 82330000 (65536 bytes) | |
| 51 CODE 1 pages 82330000 - 82340000 (65536 bytes) | |
| 52 CODE 1 pages 82340000 - 82350000 (65536 bytes) | |
| 53 CODE 1 pages 82350000 - 82360000 (65536 bytes) | |
| 54 CODE 1 pages 82360000 - 82370000 (65536 bytes) | |
| 55 CODE 1 pages 82370000 - 82380000 (65536 bytes) | |
| 56 CODE 1 pages 82380000 - 82390000 (65536 bytes) | |
| 57 CODE 1 pages 82390000 - 823A0000 (65536 bytes) | |
| 58 CODE 1 pages 823A0000 - 823B0000 (65536 bytes) | |
| 59 CODE 1 pages 823B0000 - 823C0000 (65536 bytes) | |
| 60 CODE 1 pages 823C0000 - 823D0000 (65536 bytes) | |
| 61 CODE 1 pages 823D0000 - 823E0000 (65536 bytes) | |
| 62 CODE 1 pages 823E0000 - 823F0000 (65536 bytes) | |
| 63 CODE 1 pages 823F0000 - 82400000 (65536 bytes) | |
| 64 CODE 1 pages 82400000 - 82410000 (65536 bytes) | |
| 65 CODE 1 pages 82410000 - 82420000 (65536 bytes) | |
| 66 CODE 1 pages 82420000 - 82430000 (65536 bytes) | |
| 67 CODE 1 pages 82430000 - 82440000 (65536 bytes) | |
| 68 CODE 1 pages 82440000 - 82450000 (65536 bytes) | |
| 69 CODE 1 pages 82450000 - 82460000 (65536 bytes) | |
| 70 CODE 1 pages 82460000 - 82470000 (65536 bytes) | |
| 71 CODE 1 pages 82470000 - 82480000 (65536 bytes) | |
| 72 CODE 1 pages 82480000 - 82490000 (65536 bytes) | |
| 73 CODE 1 pages 82490000 - 824A0000 (65536 bytes) | |
| 74 CODE 1 pages 824A0000 - 824B0000 (65536 bytes) | |
| 75 CODE 1 pages 824B0000 - 824C0000 (65536 bytes) | |
| 76 CODE 1 pages 824C0000 - 824D0000 (65536 bytes) | |
| 77 CODE 1 pages 824D0000 - 824E0000 (65536 bytes) | |
| 78 CODE 1 pages 824E0000 - 824F0000 (65536 bytes) | |
| 79 CODE 1 pages 824F0000 - 82500000 (65536 bytes) | |
| 80 CODE 1 pages 82500000 - 82510000 (65536 bytes) | |
| 81 RWDATA 1 pages 82510000 - 82520000 (65536 bytes) | |
| 82 RWDATA 1 pages 82520000 - 82530000 (65536 bytes) | |
| 83 RWDATA 1 pages 82530000 - 82540000 (65536 bytes) | |
| 84 RWDATA 1 pages 82540000 - 82550000 (65536 bytes) | |
| 85 RWDATA 1 pages 82550000 - 82560000 (65536 bytes) | |
| 86 RWDATA 1 pages 82560000 - 82570000 (65536 bytes) | |
| 87 RWDATA 1 pages 82570000 - 82580000 (65536 bytes) | |
| 88 RWDATA 1 pages 82580000 - 82590000 (65536 bytes) | |
| 89 RWDATA 1 pages 82590000 - 825A0000 (65536 bytes) | |
| 90 RWDATA 1 pages 825A0000 - 825B0000 (65536 bytes) | |
| 91 RWDATA 1 pages 825B0000 - 825C0000 (65536 bytes) | |
| 92 RWDATA 1 pages 825C0000 - 825D0000 (65536 bytes) | |
| 93 RWDATA 1 pages 825D0000 - 825E0000 (65536 bytes) | |
| 94 RWDATA 1 pages 825E0000 - 825F0000 (65536 bytes) | |
| 95 RWDATA 1 pages 825F0000 - 82600000 (65536 bytes) | |
| 96 RWDATA 1 pages 82600000 - 82610000 (65536 bytes) | |
| 97 RWDATA 1 pages 82610000 - 82620000 (65536 bytes) | |
| 98 RWDATA 1 pages 82620000 - 82630000 (65536 bytes) | |
| 99 RWDATA 1 pages 82630000 - 82640000 (65536 bytes) | |
| 100 RWDATA 1 pages 82640000 - 82650000 (65536 bytes) | |
| 101 RWDATA 1 pages 82650000 - 82660000 (65536 bytes) | |
| 102 RWDATA 1 pages 82660000 - 82670000 (65536 bytes) | |
| 103 RWDATA 1 pages 82670000 - 82680000 (65536 bytes) | |
| 104 RWDATA 1 pages 82680000 - 82690000 (65536 bytes) | |
| 105 RWDATA 1 pages 82690000 - 826A0000 (65536 bytes) | |
| 106 RWDATA 1 pages 826A0000 - 826B0000 (65536 bytes) | |
| 107 RWDATA 1 pages 826B0000 - 826C0000 (65536 bytes) | |
| 108 RWDATA 1 pages 826C0000 - 826D0000 (65536 bytes) | |
| 109 RWDATA 1 pages 826D0000 - 826E0000 (65536 bytes) | |
| 110 RWDATA 1 pages 826E0000 - 826F0000 (65536 bytes) | |
| 111 RWDATA 1 pages 826F0000 - 82700000 (65536 bytes) | |
| 112 RWDATA 1 pages 82700000 - 82710000 (65536 bytes) | |
| 113 RWDATA 1 pages 82710000 - 82720000 (65536 bytes) | |
| 114 RWDATA 1 pages 82720000 - 82730000 (65536 bytes) | |
| 115 RWDATA 1 pages 82730000 - 82740000 (65536 bytes) | |
| 116 RWDATA 1 pages 82740000 - 82750000 (65536 bytes) | |
| 117 RWDATA 1 pages 82750000 - 82760000 (65536 bytes) | |
| 118 RWDATA 1 pages 82760000 - 82770000 (65536 bytes) | |
| 119 RODATA 1 pages 82770000 - 82780000 (65536 bytes) | |
| Imports: | |
| xam.xex - 75 imports | |
| Version: 0.0.2099.32 | |
| Min Version: 0.0.1861.32 | |
| Total: 75 | |
| Known: 100% (75 known, 0 unknown) | |
| Implemented: 82% (62 implemented, 13 unimplemented) | |
| F 82000400 824F6A74 28B (651) XNotifyGetNext | |
| F 82000404 824F6A84 3D1 (977) XGetVideoMode | |
| F 82000408 824F6A94 3CD (973) XGetLanguage | |
| F 8200040C 824F6AA4 3CC (972) XGetGameRegion | |
| F 82000410 824F6AB4 28D (653) XNotifyDelayUI | |
| F 82000414 824F6AC4 28A (650) XamNotifyCreateListener | |
| F 82000418 824F6AD4 1F7 (503) XMsgStartIORequest | |
| F 8200041C 824F6AE4 20E (526) XamUserGetName | |
| F 82000420 824F6AF4 210 (528) XamUserGetSigninState | |
| F 82000424 824F6B04 213 (531) XamUserAreUsersFriends | |
| F 82000428 824F6B14 212 (530) XamUserCheckPrivilege | |
| F 8200042C 824F6B24 2F7 (759) !! XamUserCreateStatsEnumerator | |
| F 82000430 824F6B34 20A (522) XamUserGetXUID | |
| F 82000434 824F6B44 2BC (700) XamShowSigninUI | |
| F 82000438 824F6B54 2BF (703) !! XamShowFriendsUI | |
| F 8200043C 824F6B64 2C8 (712) !! XamShowPlayersUI | |
| F 82000440 824F6B74 2D5 (725) !! XamShowGamerCardUIForXUID | |
| F 82000444 824F6B84 2C6 (710) !! XamShowPlayerReviewUI | |
| F 82000448 824F6B94 2CB (715) XamShowDeviceSelectorUI | |
| F 8200044C 824F6BA4 2D9 (729) XamShowDirtyDiscErrorUI | |
| F 82000450 824F6BB4 250 (592) XamEnumerate | |
| F 82000454 824F6BC4 190 (400) XamInputGetCapabilities | |
| F 82000458 824F6BD4 191 (401) XamInputGetState | |
| F 8200045C 824F6BE4 192 (402) XamInputSetState | |
| F 82000460 824F6BF4 198 (408) XamInputGetKeystrokeEx | |
| F 82000464 824F6C04 258 (600) XamContentCreate | |
| F 82000468 824F6C14 25B (603) XamContentDelete | |
| F 8200046C 824F6C24 25A (602) XamContentClose | |
| F 82000470 824F6C34 260 (608) XamContentSetThumbnail | |
| F 82000474 824F6C44 25C (604) XamContentCreateEnumerator | |
| F 82000478 824F6C54 265 (613) XamContentGetDeviceState | |
| F 8200047C 824F6C64 25E (606) XamContentGetDeviceData | |
| F 82000480 824F6C74 2DC (732) !! XamShowMessageBoxUIEx | |
| F 82000484 824F6C84 1A9 (425) XamLoaderTerminateTitle | |
| F 82000488 824F6C94 280 (640) XamGetExecutionId | |
| F 8200048C 824F6CA4 1A4 (420) XamLoaderLaunchTitle | |
| F 82000490 824F74F4 282 (642) XamGetSystemVersion | |
| F 82000494 824F74E4 1FC (508) XMsgStartIORequestEx | |
| F 82000498 824F74D4 30C (780) XamVoiceCreate | |
| F 8200049C 824F74C4 30E (782) !! XamVoiceSubmitPacket | |
| F 820004A0 824F74B4 1F8 (504) XMsgCancelIORequest | |
| F 820004A4 824F74A4 30F (783) XamVoiceClose | |
| F 820004A8 824F7494 30D (781) XamVoiceHeadsetPresent | |
| F 820004AC 824F7484 219 (537) XamUserReadProfileSettings | |
| F 820004B0 824F7474 316 (790) XamSessionCreateHandle | |
| F 820004B4 824F7464 317 (791) XamSessionRefObjByHandle | |
| F 820004B8 824F7454 1EA (490) XamAlloc | |
| F 820004BC 824F7444 1EC (492) XamFree | |
| F 820004C0 824F7434 1F4 (500) XMsgInProcessCall | |
| F 820004C4 824F7424 04B ( 75) NetDll_XNetGetEthernetLinkStatus | |
| F 820004C8 824F7414 049 ( 73) NetDll_XNetGetTitleXnAddr | |
| F 820004CC 824F7404 048 ( 72) !! NetDll_XNetQosRelease | |
| F 820004D0 824F73F4 046 ( 70) !! NetDll_XNetQosLookup | |
| F 820004D4 824F73E4 045 ( 69) NetDll_XNetQosListen | |
| F 820004D8 824F73D4 03C ( 60) NetDll_XNetInAddrToXnAddr | |
| F 820004DC 824F73C4 039 ( 57) NetDll_XNetXnAddrToInAddr | |
| F 820004E0 824F73B4 038 ( 56) !! NetDll_XNetUnregisterKey | |
| F 820004E4 824F73A4 037 ( 55) !! NetDll_XNetRegisterKey | |
| F 820004E8 824F7394 036 ( 54) !! NetDll_XNetCreateKey | |
| F 820004EC 824F7384 035 ( 53) NetDll_XNetRandom | |
| F 820004F0 824F7374 034 ( 52) NetDll_XNetCleanup | |
| F 820004F4 824F7364 01B ( 27) NetDll_WSAGetLastError | |
| F 820004F8 824F7354 01A ( 26) NetDll_inet_addr | |
| F 820004FC 824F7344 018 ( 24) NetDll_sendto | |
| F 82000500 824F7334 016 ( 22) NetDll_send | |
| F 82000504 824F7324 014 ( 20) NetDll_recvfrom | |
| F 82000508 824F7314 012 ( 18) NetDll_recv | |
| F 8200050C 824F7304 00B ( 11) NetDll_bind | |
| F 82000510 824F72F4 009 ( 9) !! NetDll_getsockname | |
| F 82000514 824F72E4 007 ( 7) NetDll_setsockopt | |
| F 82000518 824F72D4 006 ( 6) NetDll_ioctlsocket | |
| F 8200051C 824F72C4 004 ( 4) NetDll_closesocket | |
| F 82000520 824F72B4 003 ( 3) NetDll_socket | |
| F 82000524 824F72A4 002 ( 2) NetDll_WSACleanup | |
| F 82000528 824F7294 001 ( 1) NetDll_WSAStartup | |
| xboxkrnl.exe - 140 imports | |
| Version: 0.0.2099.32 | |
| Min Version: 0.0.1861.32 | |
| Total: 140 | |
| Known: 100% (140 known, 0 unknown) | |
| Implemented: 97% (136 implemented, 4 unimplemented) | |
| F 82000530 824F70E4 1DF (479) KiApcNormalRoutineNop | |
| F 82000534 824F70F4 1B6 (438) VdEnableRingBufferRPtrWriteBack | |
| F 82000538 824F7104 1C3 (451) VdInitializeRingBuffer | |
| F 8200053C 824F7114 0BE (190) MmGetPhysicalAddress | |
| F 82000540 824F7124 1D9 (473) VdSetSystemCommandBufferGpuIdentifierAddress | |
| F 82000544 824F7134 1BC (444) VdGetGraphicsAsicID | |
| F 82000548 824F7144 1B4 (436) VdEnableDisableClockGating | |
| F 8200054C 824F7154 13B (315) sprintf | |
| F 82000550 824F7164 1B9 (441) VdGetCurrentDisplayGamma | |
| F 82000554 824F7174 07D (125) KeLeaveCriticalRegion | |
| F 82000558 824F7184 269 (617) VdRetrainEDRAM | |
| F 8200055C 824F7194 26A (618) VdRetrainEDRAMWorker | |
| V 82000560 1C1 (449) VdHSIOCalibrationLock | |
| F 82000564 824F71A4 05F ( 95) KeEnterCriticalRegion | |
| F 82000568 824F71B4 1C9 (457) VdQueryVideoFlags | |
| F 8200056C 824F71C4 1B1 (433) VdCallGraphicsNotificationRoutines | |
| V 82000570 1C0 (448) VdGpuClockInMHz | |
| F 82000574 824F71D4 1CA (458) VdQueryVideoMode | |
| F 82000578 824F71E4 1C5 (453) VdInitializeScalerCommandBuffer | |
| F 8200057C 824F71F4 1D5 (469) VdSetGraphicsInterruptCallback | |
| F 82000580 824F7204 1C2 (450) VdInitializeEngines | |
| F 82000584 824F7214 1BA (442) VdGetCurrentDisplayInformation | |
| F 82000588 824F7224 1D3 (467) VdSetDisplayMode | |
| F 8200058C 824F7234 1C6 (454) VdIsHSIOTrainingSucceeded | |
| F 82000590 824F7244 268 (616) !! VdInitializeEDRAM | |
| F 82000594 824F7254 1DC (476) VdShutdownEngines | |
| F 82000598 824F7264 06B (107) KeLockL2 | |
| F 8200059C 824F7274 06C (108) KeUnlockL2 | |
| F 820005A0 824F7284 153 (339) KeTlsFree | |
| F 820005A4 824F70D4 0B1 (177) KfAcquireSpinLock | |
| F 820005A8 824F70C4 0B4 (180) KfReleaseSpinLock | |
| F 820005AC 824F70B4 04D ( 77) KeAcquireSpinLockAtRaisedIrql | |
| F 820005B0 824F70A4 089 (137) KeReleaseSpinLockFromRaisedIrql | |
| F 820005B4 824F7094 1BD (445) VdGetSystemCommandBuffer | |
| F 820005B8 824F7084 25B (603) VdSwap | |
| F 820005BC 824F7074 1C7 (455) VdPersistDisplay | |
| V 820005C0 1BE (446) VdGlobalDevice | |
| V 820005C4 1BF (447) VdGlobalXamDevice | |
| F 820005C8 824F7064 13F (319) RtlTimeFieldsToTime | |
| F 820005CC 824F7054 136 (310) RtlRaiseException | |
| F 820005D0 824F7044 11B (283) RtlCompareMemoryUlong | |
| F 820005D4 824F7034 066 (102) KeGetCurrentProcessType | |
| F 820005D8 824F7024 053 ( 83) KeBugCheckEx | |
| F 820005DC 824F7014 126 (294) RtlFillMemoryUlong | |
| F 820005E0 824F7004 028 ( 40) HalReturnToFirmware | |
| F 820005E4 824F6FF4 05A ( 90) KeDelayExecutionThread | |
| F 820005E8 824F6FE4 143 (323) RtlUnicodeToMultiByteN | |
| F 820005EC 824F6FD4 0E4 (228) NtQueryDirectoryFile | |
| F 820005F0 824F6FC4 00D ( 13) ExCreateThread | |
| F 820005F4 824F6FB4 003 ( 3) DbgPrint | |
| F 820005F8 824F6FA4 010 ( 16) ExGetXConfigSetting | |
| F 820005FC 824F6F94 083 (131) KeQueryPerformanceFrequency | |
| F 82000600 824F6F84 0CE (206) NtClearEvent | |
| F 82000604 824F6F74 0FE (254) NtWaitForMultipleObjectsEx | |
| F 82000608 824F6F64 019 ( 25) ExTerminateThread | |
| F 8200060C 824F6F54 0F6 (246) NtSetEvent | |
| F 82000610 824F6F44 0E8 (232) NtQueryInformationFile | |
| F 82000614 824F6F34 0F7 (247) NtSetInformationFile | |
| F 82000618 824F6F24 0E7 (231) NtQueryFullAttributesFile | |
| F 8200061C 824F6F14 135 (309) RtlNtStatusToDosError | |
| F 82000620 824F6F04 194 (404) XexCheckExecutablePrivilege | |
| F 82000624 824F6EF4 0CC (204) NtAllocateVirtualMemory | |
| F 82000628 824F6EE4 0DB (219) NtFlushBuffersFile | |
| F 8200062C 824F6ED4 0DC (220) NtFreeVirtualMemory | |
| F 82000630 824F6EC4 0FF (255) NtWriteFile | |
| F 82000634 824F6EB4 09D (157) KeSetEvent | |
| F 82000638 824F6EA4 0B0 (176) KeWaitForSingleObject | |
| F 8200063C 824F6E94 08F (143) KeResetEvent | |
| V 82000640 193 (403) XexExecutableModuleHandle | |
| F 82000644 824F6E84 12B (299) RtlImageXexHeaderField | |
| F 82000648 824F6E74 1A5 (421) !! __C_specific_handler | |
| F 8200064C 824F6E64 0DF (223) NtOpenFile | |
| V 82000650 1AE (430) ExLoadedCommandLine | |
| F 82000654 824F6E54 0D1 (209) NtCreateEvent | |
| F 82000658 824F6E44 0F0 (240) NtReadFile | |
| F 8200065C 824F6E34 0FD (253) NtWaitForSingleObjectEx | |
| F 82000660 824F6E24 14D (333) _vsnprintf | |
| V 82000664 266 (614) KeCertMonitorData | |
| F 82000668 824F6E14 0D2 (210) NtCreateFile | |
| F 8200066C 824F6E04 084 (132) KeQuerySystemTime | |
| F 82000670 824F6DF4 140 (320) RtlTimeToTimeFields | |
| F 82000674 824F6DE4 0C6 (198) MmQueryStatistics | |
| F 82000678 824F6DD4 0EE (238) NtQueryVirtualMemory | |
| F 8200067C 824F6DC4 12C (300) RtlInitAnsiString | |
| F 82000680 824F6DB4 0C4 (196) MmQueryAddressProtect | |
| F 82000684 824F6DA4 0BD (189) MmFreePhysicalMemory | |
| F 82000688 824F6D94 0BA (186) MmAllocatePhysicalMemoryEx | |
| V 8200068C 059 ( 89) KeDebugMonitorData | |
| F 82000690 824F6D84 097 (151) KeSetAffinityThread | |
| V 82000694 01B ( 27) !! ExThreadObjectType | |
| F 82000698 824F6D74 110 (272) ObReferenceObjectByHandle | |
| F 8200069C 824F6D64 099 (153) KeSetBasePriorityThread | |
| F 820006A0 824F6D54 105 (261) ObDereferenceObject | |
| F 820006A4 824F6D44 0F5 (245) NtResumeThread | |
| F 820006A8 824F6D34 0CF (207) NtClose | |
| F 820006AC 824F6D24 0F2 (242) NtReleaseMutant | |
| F 820006B0 824F6D14 0D4 (212) NtCreateMutant | |
| F 820006B4 824F6D04 152 (338) KeTlsAlloc | |
| F 820006B8 824F6CF4 155 (341) KeTlsSetValue | |
| F 820006BC 824F6CE4 154 (340) KeTlsGetValue | |
| F 820006C0 824F6CD4 125 (293) RtlEnterCriticalSection | |
| F 820006C4 824F6CC4 130 (304) RtlLeaveCriticalSection | |
| F 820006C8 824F6CB4 12E (302) RtlInitializeCriticalSection | |
| F 820006CC 824F7504 141 (321) RtlTryEnterCriticalSection | |
| F 820006D0 824F7514 085 (133) KeRaiseIrqlToDpcLevel | |
| F 820006D4 824F7524 0B3 (179) KfLowerIrql | |
| F 820006D8 824F7534 1F8 (504) XAudioGetVoiceCategoryVolume | |
| F 820006DC 824F7544 1F7 (503) XAudioGetVoiceCategoryVolumeChangeMask | |
| F 820006E0 824F7554 1F3 (499) XAudioRegisterRenderDriverClient | |
| F 820006E4 824F7564 1F4 (500) XAudioUnregisterRenderDriverClient | |
| F 820006E8 824F7574 1F5 (501) XAudioSubmitRenderDriverFrame | |
| F 820006EC 824F7584 227 (551) XMAEnableContext | |
| F 820006F0 824F7594 231 (561) XMAIsInputBuffer1Valid | |
| F 820006F4 824F75A4 22F (559) XMAIsInputBuffer0Valid | |
| F 820006F8 824F75B4 22C (556) XMASetOutputBufferValid | |
| F 820006FC 824F75C4 229 (553) XMAGetOutputBufferWriteOffset | |
| F 82000700 824F75D4 22A (554) XMASetOutputBufferReadOffset | |
| F 82000704 824F75E4 228 (552) XMADisableContext | |
| F 82000708 824F75F4 22B (555) XMAGetOutputBufferReadOffset | |
| F 8200070C 824F7604 237 (567) XMASetInputBufferReadOffset | |
| F 82000710 824F7614 235 (565) XMABlockWhileInUse | |
| F 82000714 824F7624 224 (548) XMACreateContext | |
| F 82000718 824F7634 226 (550) XMAReleaseContext | |
| F 8200071C 824F7644 230 (560) XMASetInputBuffer1Valid | |
| F 82000720 824F7654 233 (563) XMASetInputBuffer1 | |
| F 82000724 824F7664 236 (566) XMASetLoopData | |
| F 82000728 824F7674 22E (558) XMASetInputBuffer0Valid | |
| F 8200072C 824F7684 232 (562) XMASetInputBuffer0 | |
| F 82000730 824F7694 225 (549) XMAInitializeContext | |
| F 82000734 824F76A4 22D (557) XMAIsOutputBufferValid | |
| F 82000738 824F76B4 133 (307) RtlMultiByteToUnicodeN | |
| F 8200073C 824F76C4 001 ( 1) DbgBreakPoint | |
| V 82000740 0AD (173) KeTimeStampBundle | |
| F 82000744 824F76D4 0CD (205) NtCancelTimer | |
| F 82000748 824F76E4 0FA (250) NtSetTimerEx | |
| F 8200074C 824F76F4 0D7 (215) NtCreateTimer | |
| F 82000750 824F7704 0DA (218) NtDuplicateObject | |
| F 82000754 824F7714 052 ( 82) KeBugCheck | |
| F 82000758 824F7724 147 (327) !! RtlUnwind | |
| F 8200075C 824F7734 05D ( 93) KeEnableFpuExceptions | |
| i> 0000081C XThread00000024 (5) Stack: 40110000-40130000 | |
| i> 0000081C KernelState: Launching module... | |
| i> 0000081C XThread00000028 (6) Stack: 40150000-40190000 | |
| K> 00000024 XThread::Execute thid 5 (handle=00000024, 'Kernel Dispatch Thread (00000024)', native=00002A34, <host>) | |
| K> 00000028 XThread::Execute thid 6 (handle=00000028, 'Main XThread00000028 (00000028)', native=00003B18) | |
| F> 00000028 Device::ResolvePath() | |
| F> 00000028 Device::ResolvePath(\data) | |
| i> 00000028 XThread0000002C (7) Stack: 402B0000-402C0000 | |
| i> 00000028 XThread00000038 (8) Stack: 402E0000-402F0000 | |
| K> 0000002C XThread::Execute thid 7 (handle=0000002C, 'XThread31E0 (0000002C)', native=000031E0) | |
| K> 00000038 XThread::Execute thid 8 (handle=00000038, 'XThread39D4 (00000038)', native=000039D4) | |
| F> 00000028 Device::ResolvePath(\data\scripts\engine) | |
| F> 00000038 Device::ResolvePath(\Compressed\pak) | |
| F> 00000038 Device::ResolvePath(\Compressed\pak) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| F> 00000038 Device::ResolvePath(\Compressed\pak) | |
| F> 00000038 Device::ResolvePath(\Compressed\pak) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| !> 00000028 Unimplemented XLIVEBASE message app=000000FC, msg=00058037, arg1=0004F000, arg2=4018F770 | |
| G> 00000028 SetInterruptCallback(822EA648, 401A6580) | |
| w> 00000004 GPU: Write to unknown register (0004 = 00FEEFEE) | |
| w> 00000004 GPU: Write to unknown register (0007 = F00DF00D) | |
| i> 00000028 XThread0000004C (9) Stack: 40310000-40350000 | |
| K> 0000004C XThread::Execute thid 9 (handle=0000004C, 'XThread2650 (0000004C)', native=00002650) | |
| w> 00000004 GPU: Write to unknown register (0081 = 00010000) | |
| i> 00000028 VdSwap(AD261290, 401AB670, BFFF5008, 4018F830, BEEF0001, 4018F7F0(ACEC8000), 4018F7FC(00000006), 4018F800(00000000), 4018F7F8(00000500), 4018F7F4(000002D0)) | |
| i> 00000028 VdSwap(AD2796CC, 401AB6B0, BFFF5008, 4018F830, BEEF0001, 4018F7F0(ACB30000), 4018F7FC(00000006), 4018F800(00000000), 4018F7F8(00000500), 4018F7F4(000002D0)) | |
| F> 00000028 Device::ResolvePath(\CompareBackEnds) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| G> 00000004 Generated vertex shader at 0x000000020D260324 (96b): | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r1.xyz1, r0.x, vf95, DataFormat=FMT_32_32_32_FLOAT, Stride=7, Signed=true, NumFormat=integer, PrefetchCount=7 | |
| /* 4 */ vfetch_mini r0, Offset=3, DataFormat=FMT_32_32_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc interpolators | |
| /* 1.0 */ exec | |
| /* 5 */ max o0, r0, r0 | |
| /* 1.1 */ alloc position | |
| /* 2.0 */ exec | |
| /* 6 */ max oPos, r1, r1 | |
| /* 2.1 */ exece | |
| /* 7 */ nop | |
| F> 00000028 Device::ResolvePath(\TestOldBE) | |
| i> 00000028 RtlNtStatusToDosError(C000000F) | |
| i> 00000028 RtlNtStatusToDosError => 2 | |
| G> 00000004 Generated pixel shader at 0x000000020D260390 (24b): | |
| /* 0.0 */ alloc colors | |
| /* 0.1 */ exece | |
| /* 1 */ max oC0, r0, r0 | |
| G> 00000004 Generated vertex shader at 0x000000020D260F54 (48b): | |
| /* 0.0 */ exec | |
| /* 2 */ vfetch_full r0.xy11, r0.x, vf95, DataFormat=FMT_32_32_FLOAT, Stride=2, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc interpolators | |
| /* 1.0 */ alloc position | |
| /* 1.1 */ exece | |
| /* 3 */ max oPos, r0, r0 | |
| i> 00000004 XE_SWAP | |
| w> 00000004 GPU: Write to unknown register (1E4E = 00000000) | |
| i> 00000004 XE_SWAP | |
| F> 00000028 Device::ResolvePath(\data\shaders) | |
| F> 00000028 Device::ResolvePath(\data\shaders) | |
| F> 00000028 Device::ResolvePath(\data\shaders) | |
| F> 00000028 Device::ResolvePath(\data\shaders) | |
| F> 00000028 Device::ResolvePath(\data\shaders) | |
| F> 00000028 Device::ResolvePath(\data\shaders) | |
| i> 00000028 XThread00000060 (A) Stack: 40370000-40380000 | |
| i> 00000028 XThread00000064 (B) Stack: 403A0000-403B0000 | |
| i> 00000028 XThread00000068 (C) Stack: 403D0000-403E0000 | |
| i> 00000028 XThread0000006C (D) Stack: 40400000-40410000 | |
| K> 00000060 XThread::Execute thid 10 (handle=00000060, 'XThread1DB8 (00000060)', native=00001DB8) | |
| K> 00000064 XThread::Execute thid 11 (handle=00000064, 'XThread0AE4 (00000064)', native=00000AE4) | |
| K> 0000006C XThread::Execute thid 13 (handle=0000006C, 'XThread2590 (0000006C)', native=00002590) | |
| K> 00000068 XThread::Execute thid 12 (handle=00000068, 'XThread36A0 (00000068)', native=000036A0) | |
| i> 00000028 VdSwap(AD29385C, 401AB6B0, BFFF5008, 4018F270, BEEF0001, 4018F230(ACB30000), 4018F23C(00000006), 4018F240(00000000), 4018F238(00000500), 4018F234(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\pak\permtex) | |
| i> 00000028 VdSwap(AD2A13BC, 401AB6B0, BFFF5008, 4018F270, BEEF0001, 4018F230(ACB30000), 4018F23C(00000006), 4018F240(00000000), 4018F238(00000500), 4018F234(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B143C, 401AB6B0, BFFF5008, 4018F270, BEEF0001, 4018F230(ACB30000), 4018F23C(00000006), 4018F240(00000000), 4018F238(00000500), 4018F234(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C14BC, 401AB6B0, BFFF5008, 4018F270, BEEF0001, 4018F230(ACB30000), 4018F23C(00000006), 4018F240(00000000), 4018F238(00000500), 4018F234(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2D153C, 401AB6B0, BFFF5008, 4018F2F0, BEEF0001, 4018F2B0(ACB30000), 4018F2BC(00000006), 4018F2C0(00000000), 4018F2B8(00000500), 4018F2B4(000002D0)) | |
| i> 00000028 VdSwap(AD2E15BC, 401AB6B0, BFFF5008, 4018F2F0, BEEF0001, 4018F2B0(ACB30000), 4018F2BC(00000006), 4018F2C0(00000000), 4018F2B8(00000500), 4018F2B4(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2F163C, 401AB6B0, BFFF5008, 4018F2F0, BEEF0001, 4018F2B0(ACB30000), 4018F2BC(00000006), 4018F2C0(00000000), 4018F2B8(00000500), 4018F2B4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3016BC, 401AB6B0, BFFF5008, 4018F2F0, BEEF0001, 4018F2B0(ACB30000), 4018F2BC(00000006), 4018F2C0(00000000), 4018F2B8(00000500), 4018F2B4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD31173C, 401AB6B0, BFFF5008, 4018F2F0, BEEF0001, 4018F2B0(ACB30000), 4018F2BC(00000006), 4018F2C0(00000000), 4018F2B8(00000500), 4018F2B4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3217BC, 401AB6B0, BFFF5008, 4018F2A0, BEEF0001, 4018F260(ACB30000), 4018F26C(00000006), 4018F270(00000000), 4018F268(00000500), 4018F264(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| F> 00000038 Device::ResolvePath(\data\streams\xma) | |
| F> 00000028 Device::ResolvePath(\data\streams\xma) | |
| i> 00000004 XE_SWAP | |
| F> 00000028 Device::ResolvePath(\data\streams\xma) | |
| F> 00000038 Device::ResolvePath(\data\streams\xma) | |
| F> 00000028 Device::ResolvePath(\data\movies\bik\movies) | |
| i> 00000028 XThread0000007C (E) Stack: 405D0000-405E0000 | |
| i> 00000028 XThread0000008C (F) Stack: 40600000-40610000 | |
| K> 0000007C XThread::Execute thid 14 (handle=0000007C, 'XThread2B34 (0000007C)', native=00002B34) | |
| K> 0000008C XThread::Execute thid 15 (handle=0000008C, 'XThread35A8 (0000008C)', native=000035A8) | |
| i> 00000028 VdSwap(AD334B8C, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000028 VdSwap(AD34D30C, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| G> 00000004 Generated vertex shader at 0x000000020D331D94 (84b): | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r1.xy01, r0.x, vf0, Offset=3, DataFormat=FMT_32_32_FLOAT, Stride=5, Signed=true, NumFormat=integer | |
| /* 4 */ vfetch_full r0.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=5, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 5 */ max oPos, r0, r0 | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exece | |
| /* 6 */ max o0, r1, r1 | |
| /* 2.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x000000020D461000 (120b): | |
| /* 0.0 */ exec | |
| /* 2 */ tfetch2D r1.__x_, r0.xy, tf2 | |
| /* 3 */ tfetch2D r1._x__, r0.xy, tf1 | |
| /* 4 */ tfetch2D r1.x___, r0.xy, tf0 | |
| /* 0.1 */ alloc colors | |
| /* 1.0 */ exece | |
| /* 5 */ maxs r1.___w, c3.xx | |
| /* 6 */ max oC0._, r0, r0 | |
| + maxs oC0.___w, c3.ww | |
| /* 7 */ dp4 oC0.x___, c0, r1 | |
| /* 8 */ dp4 oC0._y__, c1, r1 | |
| /* 9 */ dp4 oC0.__z_, c2, r1 | |
| /* 1.1 */ cnop | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD365AEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD37E2EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD396AEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3AF2EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3C7AEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3E02EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3F8AEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4112EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD429AEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4422EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2633CC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD27BBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2943EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2ACBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C53EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2DDBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2F63EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD30EBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3273EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD33FBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3583EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD370BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3893EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A1BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BA3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D2BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EB3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD403BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD41C3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD434BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD44D3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2675CC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD27FDEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2985EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B0DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C95EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E1DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2FA5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD312DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD32B5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD343DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD35C5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000028 VdSwap(AD374E0C, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD38D5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A5DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BE5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D6DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EF5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD407DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4205EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD438DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4515EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26B7CC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD283FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD29C7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B4FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2CD7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E5FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2FE7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD316FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD32F7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD347FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3607EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD378FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3917EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A9FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3C27EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3DAFEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3F37EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD40BFEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4247EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD43CFEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2633CC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD27BBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2943EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2ACBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C53EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2DDBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2F63EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD30EBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3273EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD33FBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3583EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD370BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3893EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A1BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BA3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D2BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EB3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD403BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD41C3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD434BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD44D3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2675CC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD27FDEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2985EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B0DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C95EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E1DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2FA5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD312DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD32B5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD343DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD35C5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD374DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD38D5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A5DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BE5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D6DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EF5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD407DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4205EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD438DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4515EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26B7CC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD283FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD29C7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B4FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2CD7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E5FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2FE7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD316FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD32F7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD347FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3607EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD378FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3917EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A9FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3C27EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3DAFEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3F37EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD40BFEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4247EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD43CFEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2633CC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD27BBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2943EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2ACBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C53EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2DDBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2F63EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD30EBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3273EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD33FBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3583EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD370BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3893EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A1BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BA3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D2BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EB3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD403BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD41C3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD434BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD44D3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2675CC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD27FDEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2985EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B0DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C95EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E1DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2FA5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD312DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD32B5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD343DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD35C5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD374DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD38D5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A5DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BE5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D6DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EF5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000028 VdSwap(AD407E0C, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4205EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD438DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4515EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26B7CC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD283FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD29C7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B4FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2CD7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E5FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2FE7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD316FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD32F7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD347FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3607EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD378FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3917EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000028 VdSwap(AD3AA00C, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3C27EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000028 VdSwap(AD3DAFEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3F37EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD40BFEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4247EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD43CFEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2633CC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD27BBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2943EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2ACBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C53EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2DDBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2F63EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD30EBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3273EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD33FBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3583EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD370BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3893EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A1BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BA3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D2BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| F> 00000028 Device::ResolvePath(\data\movies\bik\movies) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 XThread0000007C (10) Stack: 405E0000-405F0000 | |
| i> 00000028 XThread0000008C (11) Stack: 40610000-40620000 | |
| K> 0000007C XThread::Execute thid 16 (handle=0000007C, 'XThread137C (0000007C)', native=0000137C) | |
| K> 0000008C XThread::Execute thid 17 (handle=0000008C, 'XThread1E94 (0000008C)', native=00001E94) | |
| i> 00000028 VdSwap(AD3EB4EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD403BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD41C3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD434BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD44D3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2675CC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD27FDEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2985EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B0DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C95EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E1DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2FA5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD312DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD32B5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD343DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD35C5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD374DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD38D5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A5DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BE5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D6DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EF5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD407DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4205EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD438DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4515EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26B7CC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD283FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD29C7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B4FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2CD7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E5FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2FE7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD316FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD32F7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD347FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3607EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD378FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3917EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A9FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3C27EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3DAFEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3F37EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD40BFEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4247EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD43CFEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2633CC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD27BBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2943EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2ACBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C53EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2DDBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2F63EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD30EBEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3273EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000028 VdSwap(AD33FC0C, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD35840C, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD370C0C, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3893EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000028 VdSwap(AD3A1BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BA3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D2BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EB3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD403BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD41C3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD434BEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD44D3EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2675CC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD27FDEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2985EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B0DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C95EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E1DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2FA5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD312DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD32B5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD343DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD35C5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD374DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD38D5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A5DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BE5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D6DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EF5EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD407DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4205EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD438DEC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4515EC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26B7CC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000028 VdSwap(AD283FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD29C7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B4FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2CD7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E5FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2FE7EC, 401AB670, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACEC8000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD316FEC, 401AB6B0, BFFF5008, 4018F400, BEEF0001, 4018F3C0(ACB30000), 4018F3CC(00000006), 4018F3D0(00000000), 4018F3C8(00000500), 4018F3C4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| F> 00000028 Device::ResolvePath(\data\images\xb360_screens) | |
| i> 00000028 VdSwap(AD32F4B8, 401AB670, BFFF5008, 4018F450, BEEF0001, 4018F410(ACEC8000), 4018F41C(00000006), 4018F420(00000000), 4018F418(00000500), 4018F414(000002D0)) | |
| F> 00000038 Device::ResolvePath(\data\sounds\pak) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000028 VdSwap(AD33F388, 401AB6B0, BFFF5008, 4018F1F0, BEEF0001, 4018F1B0(ACB30000), 4018F1BC(00000006), 4018F1C0(00000000), 4018F1B8(00000500), 4018F1B4(000002D0)) | |
| i> 00000028 VdSwap(AD34C90C, 401AB6B0, BFFF5008, 4018F270, BEEF0001, 4018F230(ACB30000), 4018F23C(00000006), 4018F240(00000000), 4018F238(00000500), 4018F234(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\worlds\global) | |
| G> 00000004 Generated vertex shader at 0x00000002096E3940 (144b): | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r3, r0.x, vf0, DataFormat=FMT_32_32_32_32_FLOAT, Stride=6, Signed=true, NumFormat=integer, PrefetchCount=6 | |
| /* 4 */ vfetch_mini r1.xy__, Offset=4, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 5 */ maxs r2.x___, c255.zz | |
| /* 6 */ cndeq r2._yz_, c255.xxyy, r3.zzzz, c180.wwww | |
| /* 7 */ cndeq r0.__zw, c255.yyyx, r3.wwww, c180.zzzz | |
| /* 8 */ mad r0.xy__, r3.xyyy, c180.xyyy, c255.zzzz | |
| /* 9 */ max oPos._, r0, r0 | |
| + maxs oPos.x___, r0.xx | |
| /* 10 */ mul oPos._yzw, r0.yyzw, r2.xxyz | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exece | |
| /* 11 */ max o0.xy__, r1.xyyy, r1.xyyy | |
| /* 2.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x0000000209696A60 (48b): | |
| /* 0.0 */ exec | |
| /* 2 */ tfetch2D r0, r0.xy, tf0 | |
| /* 0.1 */ alloc colors | |
| /* 1.0 */ exece | |
| /* 3 */ max oC0, r0, r0 | |
| /* 1.1 */ cnop | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD35C97C, 401AB6B0, BFFF5008, 4018F270, BEEF0001, 4018F230(ACB30000), 4018F23C(00000006), 4018F240(00000000), 4018F238(00000500), 4018F234(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\worlds\global) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD36C9FC, 401AB6B0, BFFF5008, 4018F270, BEEF0001, 4018F230(ACB30000), 4018F23C(00000006), 4018F240(00000000), 4018F238(00000500), 4018F234(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD37CA7C, 401AB6B0, BFFF5008, 4018F270, BEEF0001, 4018F230(ACB30000), 4018F23C(00000006), 4018F240(00000000), 4018F238(00000500), 4018F234(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD38CAFC, 401AB6B0, BFFF5008, 4018F2F0, BEEF0001, 4018F2B0(ACB30000), 4018F2BC(00000006), 4018F2C0(00000000), 4018F2B8(00000500), 4018F2B4(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD39CB7C, 401AB6B0, BFFF5008, 4018F2F0, BEEF0001, 4018F2B0(ACB30000), 4018F2BC(00000006), 4018F2C0(00000000), 4018F2B8(00000500), 4018F2B4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3ACBFC, 401AB6B0, BFFF5008, 4018F2F0, BEEF0001, 4018F2B0(ACB30000), 4018F2BC(00000006), 4018F2C0(00000000), 4018F2B8(00000500), 4018F2B4(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BCC7C, 401AB6B0, BFFF5008, 4018F2F0, BEEF0001, 4018F2B0(ACB30000), 4018F2BC(00000006), 4018F2C0(00000000), 4018F2B8(00000500), 4018F2B4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3CCCFC, 401AB6B0, BFFF5008, 4018F2F0, BEEF0001, 4018F2B0(ACB30000), 4018F2BC(00000006), 4018F2C0(00000000), 4018F2B8(00000500), 4018F2B4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3DCD7C, 401AB6B0, BFFF5008, 4018F2F0, BEEF0001, 4018F2B0(ACB30000), 4018F2BC(00000006), 4018F2C0(00000000), 4018F2B8(00000500), 4018F2B4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3ECDFC, 401AB6B0, BFFF5008, 4018F2F0, BEEF0001, 4018F2B0(ACB30000), 4018F2BC(00000006), 4018F2C0(00000000), 4018F2B8(00000500), 4018F2B4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3FFA58, 401AB670, BFFF5008, 4018F0A0, BEEF0001, 4018F060(ACEC8000), 4018F06C(00000006), 4018F070(00000000), 4018F068(00000500), 4018F064(000002D0)) | |
| i> 00000028 VdSwap(AD40CFEC, 401AB670, BFFF5008, 4018F2A0, BEEF0001, 4018F260(ACEC8000), 4018F26C(00000006), 4018F270(00000000), 4018F268(00000500), 4018F264(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD41FC38, 401AB6B0, BFFF5008, 4018F0A0, BEEF0001, 4018F060(ACB30000), 4018F06C(00000006), 4018F070(00000000), 4018F068(00000500), 4018F064(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD42D1CC, 401AB6B0, BFFF5008, 4018F2A0, BEEF0001, 4018F260(ACB30000), 4018F26C(00000006), 4018F270(00000000), 4018F268(00000500), 4018F264(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD43D23C, 401AB6B0, BFFF5008, 4018F270, BEEF0001, 4018F230(ACB30000), 4018F23C(00000006), 4018F240(00000000), 4018F238(00000500), 4018F234(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\pak\cas) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD44D2BC, 401AB6B0, BFFF5008, 4018F270, BEEF0001, 4018F230(ACB30000), 4018F23C(00000006), 4018F240(00000000), 4018F238(00000500), 4018F234(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26017C, 401AB6B0, BFFF5008, 4018F2F0, BEEF0001, 4018F2B0(ACB30000), 4018F2BC(00000006), 4018F2C0(00000000), 4018F2B8(00000500), 4018F2B4(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD272DD8, 401AB670, BFFF5008, 4018F0A0, BEEF0001, 4018F060(ACEC8000), 4018F06C(00000006), 4018F070(00000000), 4018F068(00000500), 4018F064(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD28036C, 401AB670, BFFF5008, 4018F2A0, BEEF0001, 4018F260(ACEC8000), 4018F26C(00000006), 4018F270(00000000), 4018F268(00000500), 4018F264(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2903DC, 401AB670, BFFF5008, 4018F270, BEEF0001, 4018F230(ACEC8000), 4018F23C(00000006), 4018F240(00000000), 4018F238(00000500), 4018F234(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\pak\fam) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2A045C, 401AB670, BFFF5008, 4018F270, BEEF0001, 4018F230(ACEC8000), 4018F23C(00000006), 4018F240(00000000), 4018F238(00000500), 4018F234(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B04DC, 401AB670, BFFF5008, 4018F2F0, BEEF0001, 4018F2B0(ACEC8000), 4018F2BC(00000006), 4018F2C0(00000000), 4018F2B8(00000500), 4018F2B4(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C3138, 401AB6B0, BFFF5008, 4018F0A0, BEEF0001, 4018F060(ACB30000), 4018F06C(00000006), 4018F070(00000000), 4018F068(00000500), 4018F064(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2D06CC, 401AB6B0, BFFF5008, 4018F2A0, BEEF0001, 4018F260(ACB30000), 4018F26C(00000006), 4018F270(00000000), 4018F268(00000500), 4018F264(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E073C, 401AB6B0, BFFF5008, 4018F370, BEEF0001, 4018F330(ACB30000), 4018F33C(00000006), 4018F340(00000000), 4018F338(00000500), 4018F334(000002D0)) | |
| F> 00000038 Device::ResolvePath(\data\anims) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2F07BC, 401AB6B0, BFFF5008, 4018F380, BEEF0001, 4018F340(ACB30000), 4018F34C(00000006), 4018F350(00000000), 4018F348(00000500), 4018F344(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD303418, 401AB670, BFFF5008, 4018F1A0, BEEF0001, 4018F160(ACEC8000), 4018F16C(00000006), 4018F170(00000000), 4018F168(00000500), 4018F164(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3109AC, 401AB670, BFFF5008, 4018F3A0, BEEF0001, 4018F360(ACEC8000), 4018F36C(00000006), 4018F370(00000000), 4018F368(00000500), 4018F364(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD320A1C, 401AB670, BFFF5008, 4018F370, BEEF0001, 4018F330(ACEC8000), 4018F33C(00000006), 4018F340(00000000), 4018F338(00000500), 4018F334(000002D0)) | |
| F> 00000038 Device::ResolvePath(\data\anims) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD330A9C, 401AB670, BFFF5008, 4018F380, BEEF0001, 4018F340(ACEC8000), 4018F34C(00000006), 4018F350(00000000), 4018F348(00000500), 4018F344(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3436F8, 401AB6B0, BFFF5008, 4018F1A0, BEEF0001, 4018F160(ACB30000), 4018F16C(00000006), 4018F170(00000000), 4018F168(00000500), 4018F164(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD350C8C, 401AB6B0, BFFF5008, 4018F3A0, BEEF0001, 4018F360(ACB30000), 4018F36C(00000006), 4018F370(00000000), 4018F368(00000500), 4018F364(000002D0)) | |
| i> 00000004 XE_SWAP | |
| F> 00000028 Device::ResolvePath(\Compressed\skies) | |
| i> 00000028 VdSwap(AD360CFC, 401AB6B0, BFFF5008, 4018F430, BEEF0001, 4018F3F0(ACB30000), 4018F3FC(00000006), 4018F400(00000000), 4018F3F8(00000500), 4018F3F4(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\skies\default_sky) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD370D7C, 401AB6B0, BFFF5008, 4018F430, BEEF0001, 4018F3F0(ACB30000), 4018F3FC(00000006), 4018F400(00000000), 4018F3F8(00000500), 4018F3F4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3839D8, 401AB670, BFFF5008, 4018F260, BEEF0001, 4018F220(ACEC8000), 4018F22C(00000006), 4018F230(00000000), 4018F228(00000500), 4018F224(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD390F6C, 401AB670, BFFF5008, 4018F460, BEEF0001, 4018F420(ACEC8000), 4018F42C(00000006), 4018F430(00000000), 4018F428(00000500), 4018F424(000002D0)) | |
| i> 00000004 XE_SWAP | |
| F> 00000028 Device::ResolvePath(\Compressed\skies) | |
| i> 00000028 VdSwap(AD3A0FDC, 401AB670, BFFF5008, 4018F430, BEEF0001, 4018F3F0(ACEC8000), 4018F3FC(00000006), 4018F400(00000000), 4018F3F8(00000500), 4018F3F4(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\skies\testlevel_sky) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3B105C, 401AB670, BFFF5008, 4018F430, BEEF0001, 4018F3F0(ACEC8000), 4018F3FC(00000006), 4018F400(00000000), 4018F3F8(00000500), 4018F3F4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3C3CB8, 401AB6B0, BFFF5008, 4018F260, BEEF0001, 4018F220(ACB30000), 4018F22C(00000006), 4018F230(00000000), 4018F228(00000500), 4018F224(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D124C, 401AB6B0, BFFF5008, 4018F460, BEEF0001, 4018F420(ACB30000), 4018F42C(00000006), 4018F430(00000000), 4018F428(00000500), 4018F424(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| F> 00000028 Device::ResolvePath(\data\images\xb360_screens) | |
| i> 00000028 VdSwap(AD3E3F98, 401AB670, BFFF5008, 4018E720, BEEF0001, 4018E6E0(ACEC8000), 4018E6EC(00000006), 4018E6F0(00000000), 4018E6E8(00000500), 4018E6E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3F43E4, 401AB6B0, BFFF5008, 4018F160, BEEF0001, 4018F120(ACB30000), 4018F12C(00000006), 4018F130(00000000), 4018F128(00000500), 4018F124(000002D0)) | |
| F> 00000028 Device::ResolvePath(\Compressed\worlds\worldzones) | |
| i> 00000028 VdSwap(AD4016EC, 401AB6B0, BFFF5008, 4018F130, BEEF0001, 4018F0F0(ACB30000), 4018F0FC(00000006), 4018F100(00000000), 4018F0F8(00000500), 4018F0F4(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\worlds\worldzones\z_mainmenu) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD41175C, 401AB6B0, BFFF5008, 4018F130, BEEF0001, 4018F0F0(ACB30000), 4018F0FC(00000006), 4018F100(00000000), 4018F0F8(00000500), 4018F0F4(000002D0)) | |
| i> 00000028 VdSwap(AD4217DC, 401AB6B0, BFFF5008, 4018F130, BEEF0001, 4018F0F0(ACB30000), 4018F0FC(00000006), 4018F100(00000000), 4018F0F8(00000500), 4018F0F4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD434610, 401AB670, BFFF5008, 4018EF60, BEEF0001, 4018EF20(ACEC8000), 4018EF2C(00000006), 4018EF30(00000000), 4018EF28(00000500), 4018EF24(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD441A6C, 401AB670, BFFF5008, 4018F160, BEEF0001, 4018F120(ACEC8000), 4018F12C(00000006), 4018F130(00000000), 4018F128(00000500), 4018F124(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26017C, 401AB670, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACEC8000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\pak\perm_anims) | |
| G> 00000004 Generated vertex shader at 0x00000002096E3CE0 (144b): | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r3, r0.x, vf0, DataFormat=FMT_32_32_32_32_FLOAT, Stride=5, Signed=true, NumFormat=integer, PrefetchCount=5 | |
| /* 4 */ vfetch_mini r1.zyxw, Offset=4, DataFormat=FMT_8_8_8_8 | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 5 */ maxs r2.x___, c255.zz | |
| /* 6 */ cndeq r2._yz_, c255.xxyy, r3.zzzz, c180.wwww | |
| /* 7 */ cndeq r0.__zw, c255.yyyx, r3.wwww, c180.zzzz | |
| /* 8 */ mad r0.xy__, r3.xyyy, c180.xyyy, c255.zzzz | |
| /* 9 */ max oPos._, r0, r0 | |
| + maxs oPos.x___, r0.xx | |
| /* 10 */ mul oPos._yzw, r0.yyzw, r2.xxyz | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exece | |
| /* 11 */ max o0, r1, r1 | |
| /* 2.1 */ cnop | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2701FC, 401AB670, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACEC8000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD28027C, 401AB670, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACEC8000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2930D0, 401AB6B0, BFFF5008, 4018EDB0, BEEF0001, 4018ED70(ACB30000), 4018ED7C(00000006), 4018ED80(00000000), 4018ED78(00000500), 4018ED74(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2A050C, 401AB6B0, BFFF5008, 4018EFB0, BEEF0001, 4018EF70(ACB30000), 4018EF7C(00000006), 4018EF80(00000000), 4018EF78(00000500), 4018EF74(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B057C, 401AB6B0, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACB30000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\worlds\worldzones\z_world) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C05FC, 401AB6B0, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACB30000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2D067C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E34D0, 401AB670, BFFF5008, 4018EDB0, BEEF0001, 4018ED70(ACEC8000), 4018ED7C(00000006), 4018ED80(00000000), 4018ED78(00000500), 4018ED74(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2F090C, 401AB670, BFFF5008, 4018EFB0, BEEF0001, 4018EF70(ACEC8000), 4018EF7C(00000006), 4018EF80(00000000), 4018EF78(00000500), 4018EF74(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD30097C, 401AB670, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACEC8000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\worlds\worldzones\z_bus) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3109FC, 401AB670, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACEC8000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD320A7C, 401AB670, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACEC8000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3338D0, 401AB6B0, BFFF5008, 4018EDB0, BEEF0001, 4018ED70(ACB30000), 4018ED7C(00000006), 4018ED80(00000000), 4018ED78(00000500), 4018ED74(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD340D0C, 401AB6B0, BFFF5008, 4018EFB0, BEEF0001, 4018EF70(ACB30000), 4018EF7C(00000006), 4018EF80(00000000), 4018EF78(00000500), 4018EF74(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD350D7C, 401AB6B0, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACB30000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\pak\singleplayer) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD360DFC, 401AB6B0, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACB30000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD370E7C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD383CD0, 401AB670, BFFF5008, 4018EDB0, BEEF0001, 4018ED70(ACEC8000), 4018ED7C(00000006), 4018ED80(00000000), 4018ED78(00000500), 4018ED74(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD39110C, 401AB670, BFFF5008, 4018EFB0, BEEF0001, 4018EF70(ACEC8000), 4018EF7C(00000006), 4018EF80(00000000), 4018EF78(00000500), 4018EF74(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A117C, 401AB670, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACEC8000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\pak\cas_common) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3B11FC, 401AB670, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACEC8000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3C127C, 401AB670, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACEC8000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D40D0, 401AB6B0, BFFF5008, 4018EDB0, BEEF0001, 4018ED70(ACB30000), 4018ED7C(00000006), 4018ED80(00000000), 4018ED78(00000500), 4018ED74(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3E150C, 401AB6B0, BFFF5008, 4018EFB0, BEEF0001, 4018EF70(ACB30000), 4018EF7C(00000006), 4018EF80(00000000), 4018EF78(00000500), 4018EF74(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3F157C, 401AB6B0, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACB30000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\pak\cagr_assets) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4015FC, 401AB6B0, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACB30000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD41167C, 401AB6B0, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACB30000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4216FC, 401AB6B0, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACB30000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD43177C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4417FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26017C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2701FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD28027C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2902FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2A037C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B03FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C047C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2D04FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E3350, 401AB670, BFFF5008, 4018EDB0, BEEF0001, 4018ED70(ACEC8000), 4018ED7C(00000006), 4018ED80(00000000), 4018ED78(00000500), 4018ED74(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2F078C, 401AB670, BFFF5008, 4018EFB0, BEEF0001, 4018EF70(ACEC8000), 4018EF7C(00000006), 4018EF80(00000000), 4018EF78(00000500), 4018EF74(000002D0)) | |
| i> 00000004 XE_SWAP | |
| F> 00000038 Device::ResolvePath(\Compressed\worlds\worldzones\z_mainmenu) | |
| i> 00000028 VdSwap(AD3007FC, 401AB670, BFFF5008, 4018F160, BEEF0001, 4018F120(ACEC8000), 4018F12C(00000006), 4018F130(00000000), 4018F128(00000500), 4018F124(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD31087C, 401AB670, BFFF5008, 4018F160, BEEF0001, 4018F120(ACEC8000), 4018F12C(00000006), 4018F130(00000000), 4018F128(00000500), 4018F124(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3208FC, 401AB670, BFFF5008, 4018F160, BEEF0001, 4018F120(ACEC8000), 4018F12C(00000006), 4018F130(00000000), 4018F128(00000500), 4018F124(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD33097C, 401AB670, BFFF5008, 4018F160, BEEF0001, 4018F120(ACEC8000), 4018F12C(00000006), 4018F130(00000000), 4018F128(00000500), 4018F124(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3409FC, 401AB670, BFFF5008, 4018F160, BEEF0001, 4018F120(ACEC8000), 4018F12C(00000006), 4018F130(00000000), 4018F128(00000500), 4018F124(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD350A7C, 401AB670, BFFF5008, 4018F160, BEEF0001, 4018F120(ACEC8000), 4018F12C(00000006), 4018F130(00000000), 4018F128(00000500), 4018F124(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD360AFC, 401AB670, BFFF5008, 4018F160, BEEF0001, 4018F120(ACEC8000), 4018F12C(00000006), 4018F130(00000000), 4018F128(00000500), 4018F124(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD370B7C, 401AB670, BFFF5008, 4018F160, BEEF0001, 4018F120(ACEC8000), 4018F12C(00000006), 4018F130(00000000), 4018F128(00000500), 4018F124(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD380BFC, 401AB670, BFFF5008, 4018F160, BEEF0001, 4018F120(ACEC8000), 4018F12C(00000006), 4018F130(00000000), 4018F128(00000500), 4018F124(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD390C7C, 401AB670, BFFF5008, 4018F160, BEEF0001, 4018F120(ACEC8000), 4018F12C(00000006), 4018F130(00000000), 4018F128(00000500), 4018F124(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A3AD0, 401AB6B0, BFFF5008, 4018ED10, BEEF0001, 4018ECD0(ACB30000), 4018ECDC(00000006), 4018ECE0(00000000), 4018ECD8(00000500), 4018ECD4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| F> 00000038 Device::ResolvePath(\data\sounds\pak) | |
| i> 00000028 VdSwap(AD3B0F0C, 401AB6B0, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACB30000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3C0F7C, 401AB6B0, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACB30000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| F> 00000038 Device::ResolvePath(\Compressed\pak\skaterparts) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D0FFC, 401AB6B0, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACB30000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3E107C, 401AB6B0, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACB30000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3F10FC, 401AB6B0, BFFF5008, 4018EF80, BEEF0001, 4018EF40(ACB30000), 4018EF4C(00000006), 4018EF50(00000000), 4018EF48(00000500), 4018EF44(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD40117C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4111FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD42127C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4312FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD44137C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26017C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2701FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD28027C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2902FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2A037C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B03FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C047C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2D04FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E057C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2F05FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD30067C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3106FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD32077C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3307FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD34087C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000028 VdSwap(AD3508FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD36097C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3709FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD380A7C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD390AFC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A0B7C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3B0BFC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3C0C7C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D0CFC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3E0D7C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3F0DFC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD400E7C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD410EFC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD420F7C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD430FFC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD44107C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26017C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2701FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD28027C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2902FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2A037C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B03FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C047C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2D04FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E057C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2F05FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD30067C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3106FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD32077C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3307FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD34087C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3508FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD36097C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3709FC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD380A7C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD390AFC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A0B7C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3B0BFC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3C0C7C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D0CFC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3E0D7C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3F0DFC, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD400E7C, 401AB6B0, BFFF5008, 4018F000, BEEF0001, 4018EFC0(ACB30000), 4018EFCC(00000006), 4018EFD0(00000000), 4018EFC8(00000500), 4018EFC4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD413CD0, 401AB670, BFFF5008, 4018EDB0, BEEF0001, 4018ED70(ACEC8000), 4018ED7C(00000006), 4018ED80(00000000), 4018ED78(00000500), 4018ED74(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD42110C, 401AB670, BFFF5008, 4018EFB0, BEEF0001, 4018EF70(ACEC8000), 4018EF7C(00000006), 4018EF80(00000000), 4018EF78(00000500), 4018EF74(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD433F50, 401AB6B0, BFFF5008, 4018F750, BEEF0001, 4018F710(ACB30000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD444160, 401AB670, BFFF5008, 4018F490, BEEF0001, 4018F450(ACEC8000), 4018F45C(00000006), 4018F460(00000000), 4018F458(00000500), 4018F454(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26018C, 401AB670, BFFF5008, 4018F4F0, BEEF0001, 4018F4B0(ACEC8000), 4018F4BC(00000006), 4018F4C0(00000000), 4018F4B8(00000500), 4018F4B4(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\skies\default_sky) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2701FC, 401AB670, BFFF5008, 4018F4F0, BEEF0001, 4018F4B0(ACEC8000), 4018F4BC(00000006), 4018F4C0(00000000), 4018F4B8(00000500), 4018F4B4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD283050, 401AB6B0, BFFF5008, 4018F0A0, BEEF0001, 4018F060(ACB30000), 4018F06C(00000006), 4018F070(00000000), 4018F068(00000500), 4018F064(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD293260, 401AB670, BFFF5008, 4018F750, BEEF0001, 4018F710(ACEC8000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2A3460, 401AB6B0, BFFF5008, 4018F750, BEEF0001, 4018F710(ACB30000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| F> 00000028 Device::ResolvePath(\data\images\tags) | |
| i> 00000028 VdSwap(AD2B3950, 401AB670, BFFF5008, 4018DBA0, BEEF0001, 4018DB60(ACEC8000), 4018DB6C(00000006), 4018DB70(00000000), 4018DB68(00000500), 4018DB64(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C3A90, 401AB6B0, BFFF5008, 4018F750, BEEF0001, 4018F710(ACB30000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2D3BE0, 401AB670, BFFF5008, 4018F750, BEEF0001, 4018F710(ACEC8000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E3DE0, 401AB6B0, BFFF5008, 4018F750, BEEF0001, 4018F710(ACB30000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000028 VdSwap(AD2F3FE0, 401AB670, BFFF5008, 4018F750, BEEF0001, 4018F710(ACEC8000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000028 VdSwap(AD3041E0, 401AB6B0, BFFF5008, 4018F750, BEEF0001, 4018F710(ACB30000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3143E0, 401AB670, BFFF5008, 4018F750, BEEF0001, 4018F710(ACEC8000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3245E0, 401AB6B0, BFFF5008, 4018F750, BEEF0001, 4018F710(ACB30000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3347E0, 401AB670, BFFF5008, 4018F750, BEEF0001, 4018F710(ACEC8000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3449E0, 401AB6B0, BFFF5008, 4018F750, BEEF0001, 4018F710(ACB30000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD354BE0, 401AB670, BFFF5008, 4018F750, BEEF0001, 4018F710(ACEC8000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD364DE0, 401AB6B0, BFFF5008, 4018F750, BEEF0001, 4018F710(ACB30000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD374FE0, 401AB670, BFFF5008, 4018F750, BEEF0001, 4018F710(ACEC8000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3851E0, 401AB6B0, BFFF5008, 4018F750, BEEF0001, 4018F710(ACB30000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3953E0, 401AB670, BFFF5008, 4018F750, BEEF0001, 4018F710(ACEC8000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3C2810, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000028 VdSwap(AD3F62B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| G> 00000004 Generated vertex shader at 0x00000002096DD6E0 (192b): | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r2.zyxw, r0.x, vf0, Offset=5, DataFormat=FMT_8_8_8_8, Stride=8, PrefetchCount=3 | |
| /* 4 */ vfetch_mini r1.xy1_, Offset=6, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 5 */ vfetch_full r0.xyz_, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=8, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 6 */ add r3.xyz_, r0.xyzz, c45.xyzz | |
| /* 7 */ mad r0.xyz_, r3.xxxx, c0.ywxx, c3.ywxx | |
| /* 8 */ mad r0.xyz_, r3.yyyy, c1.xwyy, r0.zyxx | |
| /* 9 */ mad r0.xyz_, r3.zzzz, c2.xwyy, r0.xyzz | |
| /* 10 */ mulsc r0.___w, c255.x, r0.y | |
| /* 11 */ max oPos, r0.xzwy, r0.xzwy | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exece | |
| /* 12 */ add o1, r2, r2 | |
| /* 13 */ max o2._, r0, r0 | |
| + sges o2.x___, r_abs[0].x | |
| /* 14 */ dp3 o0.x___, c24.xyww, r1.xyzz | |
| /* 15 */ dp3 o0._y__, c25.xyww, r1.xyzz | |
| /* 2.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x00000002096945E0 (144b): | |
| /* 0.0 */ exec | |
| /* 2 */ tfetch2D r4, r0.xy, tf0 | |
| /* 0.1 */ alloc colors | |
| /* 1.0 */ exec | |
| /* 3 */ mad r2._y__, -r2.xxxx, c5.wwww, c255.xxxx | |
| /* 4 */ add r1.xyz_, r1.yxzz, r1.yxzz | |
| /* 5 */ mul r0.xyz_, r4.yzxx, c0.yzxx | |
| /* 6 */ mul r1._yzw, r0.zzxy, r1.yyxz | |
| + muls r1.x___, c5.xw | |
| /* 7 */ mul r0.xy__, c5.zyyy, c5.wwww | |
| /* 8 */ max oC0._, r1, r1 | |
| + maxs oC0.___w, r4.ww | |
| /* 1.1 */ exece | |
| /* 9 */ mul r2.__zw, r1.wwwz, r2.yyyy | |
| /* 10 */ mad oC0._yz_, r0.yyxx, r2.xxxx, r2.wwzz | |
| /* 11 */ dp2add oC0.x___, r1.xyyy, r2.xyyy, c255.yyyy | |
| G> 00000004 Generated vertex shader at 0x00000002096DB040 (552b): | |
| /* 0.0 */ exec | |
| /* 5 */ vfetch_full r5.zyxw, r0.x, vf0, Offset=5, DataFormat=FMT_8_8_8_8, Stride=8, PrefetchCount=3 | |
| /* 6 */ vfetch_mini r4.xy1_, Offset=6, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 7 */ vfetch_full r0.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=8, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 8 */ mul r1, r0.yyyy, c1.xwzy | |
| /* 9 */ mad r1, r0.xxxx, c0.yzxw, r1.wzxy | |
| /* 10 */ mad r1, r0.zzzz, c2.wxyz, r1.wzxy | |
| /* 11 */ mad oPos, r0.wwww, c3, r1.yzwx | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exec | |
| /* 12 */ mul r2, r0.wwww, c7.wxyz | |
| /* 13 */ mul r3, r0.zzzz, c6.wxyz | |
| /* 14 */ mul r7, r0.xxxx, c4.wxyz | |
| /* 15 */ mul r6, r0.yyyy, c5.wxyz | |
| /* 16 */ add r0, r7.wzxy, r6.wzxy | |
| /* 17 */ add r0, r0.wzxy, r3.yxwz | |
| /* 2.1 */ exec | |
| /* 18 */ add r8, r0.wzxy, r2.zwyx | |
| /* 19 */ mul r0, r8.xxxx, c9.wxyz | |
| /* 20 */ mul r1, r8.xxxx, c13.wxyz | |
| /* 21 */ mad r1, r8.zzzz, c12.yzxw, r1.zwyx | |
| /* 22 */ mad r0, r8.zzzz, c8.yzxw, r0.zwyx | |
| /* 23 */ mad r0, r8.yyyy, c10.wxyz, r0.wzxy | |
| /* 3.0 */ exec | |
| /* 24 */ mad r1, r8.yyyy, c14.wxyz, r1.wzxy | |
| /* 25 */ mad r1, r8.wwww, c15, r1.yzwx | |
| /* 26 */ mad r8, r8.wwww, c11, r0.yzwx | |
| /* 27 */ rcp r0.x___, r8.w | |
| /* 28 */ rcp r0._y__, r1.w | |
| /* 29 */ mul r9.xy__, r0.xyyy, c255.xxxx | |
| + maxs r0._, r1.zz | |
| /* 3.1 */ exec | |
| /* 30 */ mad r1.xy__, r9.yyyy, r1.xyyy, c255.xxxx | |
| /* 31 */ add r1.__z_, -r1.yyyy, c255.yyyy | |
| + muls_prev r1.___w, r0.y | |
| /* 32 */ mul r0.___w, r8.zzzz, r0.xxxx | |
| /* 33 */ mad r0.xy__, r9.xxxx, r8.yxxx, c255.xxxx | |
| /* 34 */ subsc r0.__z_, c255.y, r0.x | |
| /* 35 */ add r0.x___, r7.wwww, -c43.xxxx | |
| /* 4.0 */ exec | |
| /* 36 */ add r0.x___, r0.xxxx, r6.wwww | |
| /* 37 */ add o3, r5, r5 | |
| /* 38 */ dp3 o0.x___, c24.xyww, r4.xyzz | |
| /* 39 */ dp3 o0._y__, c25.xyww, r4.xyzz | |
| /* 40 */ add r0.x___, r0.xxxx, r3.wwww | |
| /* 41 */ add r0.x___, r0.xxxx, r2.wwww | |
| /* 4.1 */ exece | |
| /* 42 */ mulsc_sat r2.x___, c43.z, r0.x | |
| /* 43 */ max o4._, r0, r0 | |
| + maxs o4.x___, r2.xx | |
| /* 44 */ max o1.xyz1, r0.yzww, r0.yzww | |
| /* 45 */ max o2.xyz_, r1.xzww, r1.xzww | |
| G> 00000004 Generated pixel shader at 0x00000002096911C0 (684b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r0, r0.xy, tf0 | |
| /* 9 */ serialize | |
| sge r5.xy__, c255.xxxx, r2.xyyy | |
| /* 10 */ sge r4._yzw, r2.xxzy, c255.yyyy | |
| /* 11 */ add r2.___w, r5.xxxx, r4.yyyy | |
| /* 12 */ add r2.___w, r2.wwww, r5.yyyy | |
| /* 13 */ add r2.___w, r2.wwww, r4.wwww | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r4._y__, r2.wwww, r4.zzzz | |
| /* 15 */ setp_eq_push r4._y__, c255.xxxx, r4.yyyy | |
| /* 1.0 */ (p0) exec | |
| /* 16 */ (p0) tfetch2D r6.___x, r2.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 17 */ (p0) tfetch2D r6.__x_, r2.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 18 */ (p0) tfetch2D r6._x__, r2.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 19 */ (p0) tfetch2D r6.x___, r2.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 20 */ serialize | |
| (p0) mad r5.__zw, r2.xxxy, c255.zzzz, c255.wwww | |
| /* 21 */ (p0) sge r2, r6.zxyw, r2.zzzz | |
| + (p0) frcs r4.__z_, r5.z | |
| /* 1.1 */ (p0) exec | |
| /* 22 */ (p0) add r5.xy__, r2.zwww, -r2.yxxx | |
| + (p0) frcs r3.___w, r5.w | |
| /* 23 */ (p0) mad r4.__zw, r5.xxxy, r4.zzzz, r2.yyyx | |
| /* 24 */ (p0) subs r2.x___, r4.wz | |
| /* 25 */ (p0) mad r3.___w, r2.xxxx, r3.wwww, r4.zzzz | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 26 */ setp_inv r4._y__, r4.y | |
| /* 27 */ (p0) sge r4.__zw, c255.xxxx, r1.yyyx | |
| /* 28 */ (p0) sge r2.xyz_, r1.yzxx, c255.yyyy | |
| /* 29 */ (p0) add r2.___w, r4.wwww, r2.zzzz | |
| /* 30 */ (p0) add r4.__z_, r2.wwww, r4.zzzz | |
| /* 31 */ (p0) add r4.__z_, r4.zzzz, r2.xxxx | |
| /* 2.1 */ exec // PredicateClean=false | |
| /* 32 */ (p0) add r4.__z_, r4.zzzz, r2.yyyy | |
| /* 33 */ setp_ne_push r4._y__, r4.yyyy, r4.zzzz | |
| /* 3.0 */ (p0) exec | |
| /* 34 */ (p0) maxs r3.___w, c255.yy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 35 */ setp_inv r4._y__, r4.y | |
| /* 4.0 */ (p0) exec | |
| /* 36 */ (p0) tfetch2D r2.___x, r1.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 37 */ (p0) tfetch2D r2.__x_, r1.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 38 */ (p0) tfetch2D r2._x__, r1.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 39 */ (p0) tfetch2D r2.x___, r1.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 40 */ serialize | |
| (p0) mad r5.__zw, r1.xxxy, c255.zzzz, c255.wwww | |
| /* 41 */ (p0) sge r2, r2.ywzx, r1.zzzz | |
| + (p0) frcs r4.__z_, r5.z | |
| /* 4.1 */ (p0) exec | |
| /* 42 */ (p0) add r5.xy__, r2.xyyy, -r2.wzzz | |
| + (p0) frcs r3.___w, r5.w | |
| /* 43 */ (p0) mad r4.__zw, r5.xxxy, r4.zzzz, r2.wwwz | |
| /* 44 */ (p0) subs r2.x___, r4.wz | |
| /* 45 */ (p0) mad r3.___w, r2.xxxx, r3.wwww, r4.zzzz | |
| /* 5.0 */ exec // PredicateClean=false | |
| /* 46 */ setp_pop r4._y__, r4.y | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 47 */ setp_pop r4._y__, r4.y | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 48 */ dp2add r3.___w, r3.wwww, r1.wwww, c255.xxxx | |
| /* 49 */ mad r4._yzw, r3.xxyz, -c13.wwww, r3.xxyz | |
| /* 50 */ mul r4._yzw, r3.wwww, r4.zzyw | |
| + adds r3.___w, c13.ww | |
| /* 51 */ mad r3.xyz_, r3.wwww, r3.zxyy, r4.wzyy | |
| /* 52 */ mul r3._yzw, r3.yyzx, r0.xxyz | |
| + mulsc r3.x___, c5.w, r4.x | |
| /* 53 */ mul r4.xyz_, r3.yzww, c0.xyzz | |
| + subsc r3._y__, c255.y, r3.x | |
| /* 7.0 */ exece | |
| /* 54 */ mul r3._yzw, r4.xxyz, r3.yyyy | |
| /* 55 */ mad r0.xyz_, r3.xxxx, c5.xyzz, r3.yzww | |
| /* 56 */ max oC0, r0, r0 | |
| /* 7.1 */ cnop | |
| G> 00000004 Generated vertex shader at 0x00000002096C79A0 (636b): | |
| /* 0.0 */ exec | |
| /* 6 */ vfetch_full r7.zyxw, r0.x, vf0, Offset=5, DataFormat=FMT_8_8_8_8, Stride=12, PrefetchCount=7 | |
| /* 7 */ vfetch_mini r6.xy1_, Offset=6, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 8 */ vfetch_mini r5.xy1_, Offset=8, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 9 */ vfetch_mini r4.xy1_, Offset=10, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 10 */ vfetch_full r0.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=12, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 11 */ mul r1, r0.yyyy, c1.xwzy | |
| /* 12 */ mad r1, r0.xxxx, c0.yzxw, r1.wzxy | |
| /* 13 */ mad r1, r0.zzzz, c2.wxyz, r1.wzxy | |
| /* 14 */ mad oPos, r0.wwww, c3, r1.yzwx | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exec | |
| /* 15 */ mul r2, r0.wwww, c7.wxyz | |
| /* 16 */ mul r3, r0.zzzz, c6.wxyz | |
| /* 17 */ mul r9, r0.xxxx, c4.wxyz | |
| /* 18 */ mul r8, r0.yyyy, c5.wxyz | |
| /* 19 */ add r0, r9.wzxy, r8.wzxy | |
| /* 20 */ add r0, r0.wzxy, r3.yxwz | |
| /* 2.1 */ exec | |
| /* 21 */ add r10, r0.wzxy, r2.zwyx | |
| /* 22 */ mul r0, r10.xxxx, c9.wxyz | |
| /* 23 */ mul r1, r10.xxxx, c13.wxyz | |
| /* 24 */ mad r1, r10.zzzz, c12.yzxw, r1.zwyx | |
| /* 25 */ mad r0, r10.zzzz, c8.yzxw, r0.zwyx | |
| /* 26 */ mad r0, r10.yyyy, c10.wxyz, r0.wzxy | |
| /* 3.0 */ exec | |
| /* 27 */ mad r1, r10.yyyy, c14.wxyz, r1.wzxy | |
| /* 28 */ mad r1, r10.wwww, c15, r1.yzwx | |
| /* 29 */ mad r10, r10.wwww, c11, r0.yzwx | |
| /* 30 */ rcp r0.x___, r10.w | |
| /* 31 */ rcp r0._y__, r1.w | |
| /* 32 */ mul r11.xy__, r0.xyyy, c255.xxxx | |
| + maxs r0._, r1.zz | |
| /* 3.1 */ exec | |
| /* 33 */ mad r1.xy__, r11.yyyy, r1.xyyy, c255.xxxx | |
| /* 34 */ add r1.__z_, -r1.yyyy, c255.yyyy | |
| + muls_prev r1.___w, r0.y | |
| /* 35 */ mul r0.___w, r10.zzzz, r0.xxxx | |
| /* 36 */ mad r0.xy__, r11.xxxx, r10.yxxx, c255.xxxx | |
| /* 37 */ subsc r0.__z_, c255.y, r0.x | |
| /* 38 */ add r0.x___, r9.wwww, -c43.xxxx | |
| /* 4.0 */ exec | |
| /* 39 */ add r0.x___, r0.xxxx, r8.wwww | |
| /* 40 */ add o4, r7, r7 | |
| /* 41 */ dp3 o0.x___, c24.xyww, r6.xyzz | |
| /* 42 */ dp3 o0._y__, c25.xyww, r6.xyzz | |
| /* 43 */ dp3 o0.__z_, c28.xyww, r5.xyzz | |
| /* 44 */ dp3 o0.___w, c29.xyww, r5.xyzz | |
| /* 4.1 */ exec | |
| /* 45 */ dp3 o1.x___, c32.xyww, r4.xyzz | |
| /* 46 */ dp3 o1._y__, c33.xyww, r4.xyzz | |
| /* 47 */ add r0.x___, r0.xxxx, r3.wwww | |
| /* 48 */ add r0.x___, r0.xxxx, r2.wwww | |
| /* 49 */ mulsc_sat r2.x___, c43.z, r0.x | |
| /* 50 */ max o5._, r0, r0 | |
| + maxs o5.x___, r2.xx | |
| /* 5.0 */ exece | |
| /* 51 */ max o2.xyz1, r0.yzww, r0.yzww | |
| /* 52 */ max o3.xyz_, r1.xzww, r1.xzww | |
| /* 5.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x0000000209658D20 (792b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r6, r0.xy, tf0 | |
| /* 9 */ tfetch2D r0, r0.zw, tf1 | |
| /* 10 */ tfetch2D r1, r1.xy, tf2 | |
| /* 11 */ serialize | |
| sge r7.xy__, c255.xxxx, r3.xyyy | |
| /* 12 */ sge r5._yzw, r3.xxzy, c255.yyyy | |
| /* 13 */ add r3.___w, r7.xxxx, r5.yyyy | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r3.___w, r3.wwww, r7.yyyy | |
| /* 15 */ add r3.___w, r3.wwww, r5.wwww | |
| /* 16 */ add r5._y__, r3.wwww, r5.zzzz | |
| /* 17 */ setp_ne_push r5.__z_, c255.xxxx, r5.yyyy | |
| /* 18 */ (p0) sge r5._y_w, c255.xxxx, r2.yyxx | |
| /* 19 */ (p0) sge r3.xyz_, r2.yzxx, c255.yyyy | |
| /* 1.0 */ exec // PredicateClean=false | |
| /* 20 */ (p0) add r3.___w, r5.wwww, r3.zzzz | |
| /* 21 */ (p0) add r5._y__, r3.wwww, r5.yyyy | |
| /* 22 */ (p0) add r5._y__, r5.yyyy, r3.xxxx | |
| /* 23 */ (p0) add r5._y__, r5.yyyy, r3.yyyy | |
| /* 24 */ setp_ne_push r5.__z_, r5.zzzz, r5.yyyy | |
| /* 1.1 */ (p0) exec | |
| /* 25 */ (p0) maxs r5._y__, c255.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 26 */ setp_inv r5.__z_, r5.z | |
| /* 2.1 */ (p0) exec | |
| /* 27 */ (p0) tfetch2D r7.___x, r2.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 28 */ (p0) tfetch2D r7.__x_, r2.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 29 */ (p0) tfetch2D r7._x__, r2.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 30 */ (p0) tfetch2D r7.x___, r2.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 31 */ serialize | |
| (p0) mad r3.x__w, r2.xyyy, c255.zzzz, c255.wwww | |
| /* 32 */ (p0) sge r7, r7.ywzx, r2.zzzz | |
| + (p0) frcs r5._y__, r3.x | |
| /* 3.0 */ (p0) exec | |
| /* 33 */ (p0) add r3._yz_, r7.xxyy, -r7.wwzz | |
| + (p0) frcs r3.x___, r3.w | |
| /* 34 */ (p0) mad r5._y_w, r3.yyzz, r5.yyyy, r7.wwzz | |
| /* 35 */ (p0) subs r3._y__, r5.wy | |
| /* 36 */ (p0) mad r5._y__, r3.yyyy, r3.xxxx, r5.yyyy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 37 */ setp_pop r5.__z_, r5.z | |
| /* 4.0 */ exec // PredicateClean=false | |
| /* 38 */ setp_inv r5.__z_, r5.z | |
| /* 4.1 */ (p0) exec | |
| /* 39 */ (p0) tfetch2D r7.___x, r3.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 40 */ (p0) tfetch2D r7.__x_, r3.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 41 */ (p0) tfetch2D r7._x__, r3.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 42 */ (p0) tfetch2D r7.x___, r3.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 43 */ serialize | |
| (p0) mad r3.x__w, r3.xyyy, c255.zzzz, c255.wwww | |
| /* 44 */ (p0) sge r7, r7.zxyw, r3.zzzz | |
| + (p0) frcs r5._y__, r3.x | |
| /* 5.0 */ (p0) exec | |
| /* 45 */ (p0) add r3._yz_, r7.zzww, -r7.yyxx | |
| + (p0) frcs r3.x___, r3.w | |
| /* 46 */ (p0) mad r5._y_w, r3.yyzz, r5.yyyy, r7.yyxx | |
| /* 47 */ (p0) subs r3._y__, r5.wy | |
| /* 48 */ (p0) mad r5._y__, r3.yyyy, r3.xxxx, r5.yyyy | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 49 */ setp_pop r5.__z_, r5.z | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 50 */ mul r1.___w, r1.wwww, r4.wwww | |
| /* 51 */ dp2add r2.x___, r5.yyyy, r2.wwww, c255.xxxx | |
| /* 52 */ mad r5._yzw, r4.xxyz, -c13.wwww, r4.xxyz | |
| /* 53 */ mul r5._yzw, r2.xxxx, r5.zzyw | |
| + adds r2.x___, c13.ww | |
| /* 54 */ mad r4.xyz_, r2.xxxx, r4.zxyy, r5.wzyy | |
| /* 55 */ mul r5._yzw, r4.yyzx, r1.xxyz | |
| + maxs r4._, r0.ww | |
| /* 7.0 */ exec | |
| /* 56 */ mul r0.xyz_, r4.yzxx, r0.xyzz | |
| + muls_prev r0.___w, r4.w | |
| /* 57 */ mul r4._yzw, r4.yyzx, r6.xxyz | |
| + mulsc r4.x___, c5.w, r5.x | |
| /* 58 */ mul r4._yzw, r4.yyzw, c0.xxyz | |
| + subsc r5.x___, c255.y, r4.x | |
| /* 59 */ mad r0.xyz_, r0.xyzz, c1.xyzz, -r4.yzww | |
| /* 60 */ mad r4._yzw, r0.wwww, r0.xxyz, r4.yyzw | |
| /* 61 */ mad r5._yzw, r5.yyzw, c2.xxyz, -r4.yyzw | |
| /* 7.1 */ exece | |
| /* 62 */ mad r4._yzw, r1.wwww, r5.yyzw, r4.yyzw | |
| /* 63 */ mul r4._yzw, r5.xxxx, r4.yyzw | |
| /* 64 */ mad r6.xyz_, r4.xxxx, c5.xyzz, r4.yzww | |
| /* 65 */ max oC0, r6, r6 | |
| G> 00000004 Generated pixel shader at 0x0000000209659360 (780b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r6, r0.xy, tf0 | |
| /* 9 */ tfetch2D r0, r0.zw, tf1 | |
| /* 10 */ tfetch2D r1, r1.xy, tf2 | |
| /* 11 */ serialize | |
| sge r7.xy__, c255.xxxx, r3.xyyy | |
| /* 12 */ sge r5._yzw, r3.xxzy, c255.yyyy | |
| /* 13 */ add r3.___w, r7.xxxx, r5.yyyy | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r3.___w, r3.wwww, r7.yyyy | |
| /* 15 */ add r3.___w, r3.wwww, r5.wwww | |
| /* 16 */ add r5._y__, r3.wwww, r5.zzzz | |
| /* 17 */ setp_ne_push r5.__z_, c255.xxxx, r5.yyyy | |
| /* 18 */ (p0) sge r5._y_w, c255.xxxx, r2.yyxx | |
| /* 19 */ (p0) sge r3.xyz_, r2.yzxx, c255.yyyy | |
| /* 1.0 */ exec // PredicateClean=false | |
| /* 20 */ (p0) add r3.___w, r5.wwww, r3.zzzz | |
| /* 21 */ (p0) add r5._y__, r3.wwww, r5.yyyy | |
| /* 22 */ (p0) add r5._y__, r5.yyyy, r3.xxxx | |
| /* 23 */ (p0) add r5._y__, r5.yyyy, r3.yyyy | |
| /* 24 */ setp_ne_push r5.__z_, r5.zzzz, r5.yyyy | |
| /* 1.1 */ (p0) exec | |
| /* 25 */ (p0) maxs r5._y__, c255.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 26 */ setp_inv r5.__z_, r5.z | |
| /* 2.1 */ (p0) exec | |
| /* 27 */ (p0) tfetch2D r7.___x, r2.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 28 */ (p0) tfetch2D r7.__x_, r2.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 29 */ (p0) tfetch2D r7._x__, r2.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 30 */ (p0) tfetch2D r7.x___, r2.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 31 */ serialize | |
| (p0) mad r3.x__w, r2.xyyy, c255.zzzz, c255.wwww | |
| /* 32 */ (p0) sge r7, r7.ywzx, r2.zzzz | |
| + (p0) frcs r5._y__, r3.x | |
| /* 3.0 */ (p0) exec | |
| /* 33 */ (p0) add r3._yz_, r7.xxyy, -r7.wwzz | |
| + (p0) frcs r3.x___, r3.w | |
| /* 34 */ (p0) mad r5._y_w, r3.yyzz, r5.yyyy, r7.wwzz | |
| /* 35 */ (p0) subs r3._y__, r5.wy | |
| /* 36 */ (p0) mad r5._y__, r3.yyyy, r3.xxxx, r5.yyyy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 37 */ setp_pop r5.__z_, r5.z | |
| /* 4.0 */ exec // PredicateClean=false | |
| /* 38 */ setp_inv r5.__z_, r5.z | |
| /* 4.1 */ (p0) exec | |
| /* 39 */ (p0) tfetch2D r7.___x, r3.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 40 */ (p0) tfetch2D r7.__x_, r3.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 41 */ (p0) tfetch2D r7._x__, r3.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 42 */ (p0) tfetch2D r7.x___, r3.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 43 */ serialize | |
| (p0) mad r3.x__w, r3.xyyy, c255.zzzz, c255.wwww | |
| /* 44 */ (p0) sge r7, r7.zxyw, r3.zzzz | |
| + (p0) frcs r5._y__, r3.x | |
| /* 5.0 */ (p0) exec | |
| /* 45 */ (p0) add r3._yz_, r7.zzww, -r7.yyxx | |
| + (p0) frcs r3.x___, r3.w | |
| /* 46 */ (p0) mad r5._y_w, r3.yyzz, r5.yyyy, r7.yyxx | |
| /* 47 */ (p0) subs r3._y__, r5.wy | |
| /* 48 */ (p0) mad r5._y__, r3.yyyy, r3.xxxx, r5.yyyy | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 49 */ setp_pop r5.__z_, r5.z | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 50 */ dp2add r2.x___, r5.yyyy, r2.wwww, c255.xxxx | |
| /* 51 */ mad r5._yzw, r4.xxyz, -c13.wwww, r4.xxyz | |
| /* 52 */ mul r5._yzw, r2.xxxx, r5.zzyw | |
| + adds r2.x___, c13.ww | |
| /* 53 */ mad r4.xyz_, r2.xxxx, r4.zxyy, r5.wzyy | |
| /* 54 */ mul r5._yzw, r4.yyzx, r1.xxyz | |
| + maxs r4._, r1.ww | |
| /* 55 */ mul r1.xyz_, r4.yzxx, r0.xyzz | |
| + muls_prev r0.x___, r4.w | |
| /* 7.0 */ exec | |
| /* 56 */ mul r4._yzw, r4.yyzx, r6.xxyz | |
| + mulsc r4.x___, c5.w, r5.x | |
| /* 57 */ mul r4._yzw, r4.yyzw, c0.xxyz | |
| + subsc r5.x___, c255.y, r4.x | |
| /* 58 */ mad r1.xyz_, r1.xyzz, c1.xyzz, -r4.yzww | |
| /* 59 */ mad r4._yzw, r1.xxyz, r0.wwww, r4.yyzw | |
| /* 60 */ mad r5._yzw, r5.yyzw, c2.xxyz, -r4.yyzw | |
| /* 61 */ mad r4._yzw, r0.xxxx, r5.yyzw, r4.yyzw | |
| /* 7.1 */ exece | |
| /* 62 */ mul r4._yzw, r5.xxxx, r4.yyzw | |
| /* 63 */ mad r6.xyz_, r4.xxxx, c5.xyzz, r4.yzww | |
| /* 64 */ max oC0, r6, r6 | |
| G> 00000004 Generated vertex shader at 0x00000002096D4460 (588b): | |
| /* 0.0 */ exec | |
| /* 5 */ vfetch_full r6.zyxw, r0.x, vf0, Offset=5, DataFormat=FMT_8_8_8_8, Stride=10, PrefetchCount=5 | |
| /* 6 */ vfetch_mini r5.xy1_, Offset=6, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 7 */ vfetch_mini r4.xy1_, Offset=8, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 8 */ vfetch_full r0.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=10, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 9 */ mul r1, r0.yyyy, c1.xwzy | |
| /* 10 */ mad r1, r0.xxxx, c0.yzxw, r1.wzxy | |
| /* 11 */ mad r1, r0.zzzz, c2.wxyz, r1.wzxy | |
| /* 12 */ mad oPos, r0.wwww, c3, r1.yzwx | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exec | |
| /* 13 */ mul r2, r0.wwww, c7.wxyz | |
| /* 14 */ mul r3, r0.zzzz, c6.wxyz | |
| /* 15 */ mul r8, r0.xxxx, c4.wxyz | |
| /* 16 */ mul r7, r0.yyyy, c5.wxyz | |
| /* 17 */ add r0, r8.wzxy, r7.wzxy | |
| /* 18 */ add r0, r0.wzxy, r3.yxwz | |
| /* 2.1 */ exec | |
| /* 19 */ add r9, r0.wzxy, r2.zwyx | |
| /* 20 */ mul r0, r9.xxxx, c9.wxyz | |
| /* 21 */ mul r1, r9.xxxx, c13.wxyz | |
| /* 22 */ mad r1, r9.zzzz, c12.yzxw, r1.zwyx | |
| /* 23 */ mad r0, r9.zzzz, c8.yzxw, r0.zwyx | |
| /* 24 */ mad r0, r9.yyyy, c10.wxyz, r0.wzxy | |
| /* 3.0 */ exec | |
| /* 25 */ mad r1, r9.yyyy, c14.wxyz, r1.wzxy | |
| /* 26 */ mad r1, r9.wwww, c15, r1.yzwx | |
| /* 27 */ mad r9, r9.wwww, c11, r0.yzwx | |
| /* 28 */ rcp r0.x___, r9.w | |
| /* 29 */ rcp r0._y__, r1.w | |
| /* 30 */ mul r10.xy__, r0.xyyy, c255.xxxx | |
| + maxs r0._, r1.zz | |
| /* 3.1 */ exec | |
| /* 31 */ mad r1.xy__, r10.yyyy, r1.xyyy, c255.xxxx | |
| /* 32 */ add r1.__z_, -r1.yyyy, c255.yyyy | |
| + muls_prev r1.___w, r0.y | |
| /* 33 */ mul r0.___w, r9.zzzz, r0.xxxx | |
| /* 34 */ mad r0.xy__, r10.xxxx, r9.yxxx, c255.xxxx | |
| /* 35 */ subsc r0.__z_, c255.y, r0.x | |
| /* 36 */ add r0.x___, r8.wwww, -c43.xxxx | |
| /* 4.0 */ exec | |
| /* 37 */ add r0.x___, r0.xxxx, r7.wwww | |
| /* 38 */ add o3, r6, r6 | |
| /* 39 */ dp3 o0.x___, c24.xyww, r5.xyzz | |
| /* 40 */ dp3 o0._y__, c25.xyww, r5.xyzz | |
| /* 41 */ dp3 o0.__z_, c28.xyww, r4.xyzz | |
| /* 42 */ dp3 o0.___w, c29.xyww, r4.xyzz | |
| /* 4.1 */ exece | |
| /* 43 */ add r0.x___, r0.xxxx, r3.wwww | |
| /* 44 */ add r0.x___, r0.xxxx, r2.wwww | |
| /* 45 */ mulsc_sat r2.x___, c43.z, r0.x | |
| /* 46 */ max o4._, r0, r0 | |
| + maxs o4.x___, r2.xx | |
| /* 47 */ max o1.xyz1, r0.yzww, r0.yzww | |
| /* 48 */ max o2.xyz_, r1.xzww, r1.xzww | |
| G> 00000004 Generated pixel shader at 0x000000020967C5E0 (744b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r5, r0.xy, tf0 | |
| /* 9 */ tfetch2D r0, r0.zw, tf1 | |
| /* 10 */ serialize | |
| sge r6.xy__, c255.xxxx, r2.xyyy | |
| /* 11 */ sge r4._yzw, r2.xxzy, c255.yyyy | |
| /* 12 */ add r2.___w, r6.xxxx, r4.yyyy | |
| /* 13 */ add r2.___w, r2.wwww, r6.yyyy | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r2.___w, r2.wwww, r4.wwww | |
| /* 15 */ add r4._y__, r2.wwww, r4.zzzz | |
| /* 16 */ setp_ne_push r4.__z_, c255.xxxx, r4.yyyy | |
| /* 17 */ (p0) sge r4._y_w, c255.xxxx, r1.yyxx | |
| /* 18 */ (p0) sge r2.xyz_, r1.yzxx, c255.yyyy | |
| /* 19 */ (p0) add r2.___w, r4.wwww, r2.zzzz | |
| /* 1.0 */ exec // PredicateClean=false | |
| /* 20 */ (p0) add r4._y__, r2.wwww, r4.yyyy | |
| /* 21 */ (p0) add r4._y__, r4.yyyy, r2.xxxx | |
| /* 22 */ (p0) add r4._y__, r4.yyyy, r2.yyyy | |
| /* 23 */ setp_ne_push r4.__z_, r4.zzzz, r4.yyyy | |
| /* 1.1 */ (p0) exec | |
| /* 24 */ (p0) maxs r4._y__, c255.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 25 */ setp_inv r4.__z_, r4.z | |
| /* 2.1 */ (p0) exec | |
| /* 26 */ (p0) tfetch2D r6.___x, r1.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 27 */ (p0) tfetch2D r6.__x_, r1.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 28 */ (p0) tfetch2D r6._x__, r1.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 29 */ (p0) tfetch2D r6.x___, r1.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 30 */ serialize | |
| (p0) mad r2.x__w, r1.xyyy, c255.zzzz, c255.wwww | |
| /* 31 */ (p0) sge r6, r6.ywzx, r1.zzzz | |
| + (p0) frcs r4._y__, r2.x | |
| /* 3.0 */ (p0) exec | |
| /* 32 */ (p0) add r2._yz_, r6.xxyy, -r6.wwzz | |
| + (p0) frcs r2.x___, r2.w | |
| /* 33 */ (p0) mad r4._y_w, r2.yyzz, r4.yyyy, r6.wwzz | |
| /* 34 */ (p0) subs r2._y__, r4.wy | |
| /* 35 */ (p0) mad r4._y__, r2.yyyy, r2.xxxx, r4.yyyy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 36 */ setp_pop r4.__z_, r4.z | |
| /* 4.0 */ exec // PredicateClean=false | |
| /* 37 */ setp_inv r4.__z_, r4.z | |
| /* 4.1 */ (p0) exec | |
| /* 38 */ (p0) tfetch2D r6.___x, r2.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 39 */ (p0) tfetch2D r6.__x_, r2.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 40 */ (p0) tfetch2D r6._x__, r2.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 41 */ (p0) tfetch2D r6.x___, r2.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 42 */ serialize | |
| (p0) mad r2.x__w, r2.xyyy, c255.zzzz, c255.wwww | |
| /* 43 */ (p0) sge r6, r6.zxyw, r2.zzzz | |
| + (p0) frcs r4._y__, r2.x | |
| /* 5.0 */ (p0) exec | |
| /* 44 */ (p0) add r2._yz_, r6.zzww, -r6.yyxx | |
| + (p0) frcs r2.x___, r2.w | |
| /* 45 */ (p0) mad r4._y_w, r2.yyzz, r4.yyyy, r6.yyxx | |
| /* 46 */ (p0) subs r2._y__, r4.wy | |
| /* 47 */ (p0) mad r4._y__, r2.yyyy, r2.xxxx, r4.yyyy | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 48 */ setp_pop r4.__z_, r4.z | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 49 */ mul r0.___w, r0.wwww, r3.wwww | |
| /* 50 */ dp2add r3.___w, r4.yyyy, r1.wwww, c255.xxxx | |
| /* 51 */ mad r4._yzw, r3.xxyz, -c13.wwww, r3.xxyz | |
| /* 52 */ mul r4._yzw, r3.wwww, r4.zzyw | |
| + adds r3.___w, c13.ww | |
| /* 53 */ mad r3.xyz_, r3.wwww, r3.zxyy, r4.wzyy | |
| /* 54 */ mul r4._yzw, r3.yyzx, r0.xxyz | |
| /* 7.0 */ exec | |
| /* 55 */ mul r3._yzw, r3.yyzx, r5.xxyz | |
| + mulsc r3.x___, c5.w, r4.x | |
| /* 56 */ mul r3._yzw, r3.yyzw, c0.xxyz | |
| + subsc r4.x___, c255.y, r3.x | |
| /* 57 */ mad r4._yzw, r4.yyzw, c1.xxyz, -r3.yyzw | |
| /* 58 */ mad r3._yzw, r0.wwww, r4.yyzw, r3.yyzw | |
| /* 59 */ mul r3._yzw, r4.xxxx, r3.yyzw | |
| /* 60 */ mad r5.xyz_, r3.xxxx, c5.xyzz, r3.yzww | |
| /* 7.1 */ exece | |
| /* 61 */ max oC0, r5, r5 | |
| G> 00000004 Generated pixel shader at 0x000000020967C020 (732b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r5, r0.xy, tf0 | |
| /* 9 */ tfetch2D r4._xyz, r0.zw, tf1 | |
| /* 10 */ serialize | |
| sge r6.xy__, c255.xxxx, r2.xyyy | |
| /* 11 */ sge r0.xyz_, r2.xzyy, c255.yyyy | |
| /* 12 */ add r0.___w, r6.xxxx, r0.xxxx | |
| /* 13 */ add r0.___w, r0.wwww, r6.yyyy | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r0.___w, r0.wwww, r0.zzzz | |
| /* 15 */ add r0.x___, r0.wwww, r0.yyyy | |
| /* 16 */ setp_ne_push r0.x___, c255.xxxx, r0.xxxx | |
| /* 17 */ (p0) sge r2.xy__, c255.xxxx, r1.yxxx | |
| /* 18 */ (p0) sge r0._yzw, r1.yyzx, c255.yyyy | |
| /* 19 */ (p0) add r2.__z_, r2.yyyy, r0.wwww | |
| /* 1.0 */ exec // PredicateClean=false | |
| /* 20 */ (p0) add r2.x___, r2.zzzz, r2.xxxx | |
| /* 21 */ (p0) add r2.x___, r2.xxxx, r0.yyyy | |
| /* 22 */ (p0) add r0._y__, r2.xxxx, r0.zzzz | |
| /* 23 */ setp_ne_push r0.x___, r0.xxxx, r0.yyyy | |
| /* 1.1 */ (p0) exec | |
| /* 24 */ (p0) maxs r3.___w, c255.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 25 */ setp_inv r0.x___, r0.x | |
| /* 2.1 */ (p0) exec | |
| /* 26 */ (p0) tfetch2D r2.___x, r1.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 27 */ (p0) tfetch2D r2.__x_, r1.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 28 */ (p0) tfetch2D r2._x__, r1.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 29 */ (p0) tfetch2D r2.x___, r1.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 30 */ serialize | |
| (p0) mad r6.xy__, r1.xyyy, c255.zzzz, c255.wwww | |
| /* 31 */ (p0) sge r2, r2.ywzx, r1.zzzz | |
| + (p0) frcs r0._y__, r6.x | |
| /* 3.0 */ (p0) exec | |
| /* 32 */ (p0) add r0.__zw, r2.xxxy, -r2.wwwz | |
| + (p0) frcs r3.___w, r6.y | |
| /* 33 */ (p0) mad r0._yz_, r0.zzww, r0.yyyy, r2.wwzz | |
| /* 34 */ (p0) subs r0.___w, r0.zy | |
| /* 35 */ (p0) mad r3.___w, r0.wwww, r3.wwww, r0.yyyy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 36 */ setp_pop r0.x___, r0.x | |
| /* 4.0 */ exec // PredicateClean=false | |
| /* 37 */ setp_inv r0.x___, r0.x | |
| /* 4.1 */ (p0) exec | |
| /* 38 */ (p0) tfetch2D r7.___x, r2.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 39 */ (p0) tfetch2D r7.__x_, r2.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 40 */ (p0) tfetch2D r7._x__, r2.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 41 */ (p0) tfetch2D r7.x___, r2.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 42 */ serialize | |
| (p0) mad r6.xy__, r2.xyyy, c255.zzzz, c255.wwww | |
| /* 43 */ (p0) sge r2, r7.zxyw, r2.zzzz | |
| + (p0) frcs r0._y__, r6.x | |
| /* 5.0 */ (p0) exec | |
| /* 44 */ (p0) add r0.__zw, r2.zzzw, -r2.yyyx | |
| + (p0) frcs r3.___w, r6.y | |
| /* 45 */ (p0) mad r0._yz_, r0.zzww, r0.yyyy, r2.yyxx | |
| /* 46 */ (p0) subs r0.___w, r0.zy | |
| /* 47 */ (p0) mad r3.___w, r0.wwww, r3.wwww, r0.yyyy | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 48 */ setp_pop r0.x___, r0.x | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 49 */ dp2add r3.___w, r3.wwww, r1.wwww, c255.xxxx | |
| /* 50 */ mad r0.xyz_, r3.xyzz, -c13.wwww, r3.xyzz | |
| /* 51 */ mul r0.xyz_, r3.wwww, r0.yxzz | |
| + adds r3.___w, c13.ww | |
| /* 52 */ mad r3.xyz_, r3.wwww, r3.zxyy, r0.zyxx | |
| /* 53 */ mul r4._yzw, r3.yyzx, r4.yyzw | |
| /* 54 */ mul r3._yzw, r3.yyzx, r5.xxyz | |
| + mulsc r3.x___, c5.w, r4.x | |
| /* 7.0 */ exece | |
| /* 55 */ mul r3._yzw, r3.yyzw, c0.xxyz | |
| + subsc r4.x___, c255.y, r3.x | |
| /* 56 */ mad r4._yzw, r4.yyzw, c1.xxyz, -r3.yyzw | |
| /* 57 */ mad r3._yzw, r4.yyzw, c1.wwww, r3.yyzw | |
| /* 58 */ mul r3._yzw, r4.xxxx, r3.yyzw | |
| /* 59 */ mad r5.xyz_, r3.xxxx, c5.xyzz, r3.yzww | |
| /* 60 */ max oC0, r5, r5 | |
| /* 7.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x000000020967C8E0 (732b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r5, r0.xy, tf0 | |
| /* 9 */ tfetch2D r0, r0.zw, tf1 | |
| /* 10 */ serialize | |
| sge r6.xy__, c255.xxxx, r2.xyyy | |
| /* 11 */ sge r4._yzw, r2.xxzy, c255.yyyy | |
| /* 12 */ add r2.___w, r6.xxxx, r4.yyyy | |
| /* 13 */ add r2.___w, r2.wwww, r6.yyyy | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r2.___w, r2.wwww, r4.wwww | |
| /* 15 */ add r4._y__, r2.wwww, r4.zzzz | |
| /* 16 */ setp_ne_push r4._y__, c255.xxxx, r4.yyyy | |
| /* 17 */ (p0) sge r4.__zw, c255.xxxx, r1.yyyx | |
| /* 18 */ (p0) sge r2.xyz_, r1.yzxx, c255.yyyy | |
| /* 19 */ (p0) add r2.___w, r4.wwww, r2.zzzz | |
| /* 1.0 */ exec // PredicateClean=false | |
| /* 20 */ (p0) add r4.__z_, r2.wwww, r4.zzzz | |
| /* 21 */ (p0) add r4.__z_, r4.zzzz, r2.xxxx | |
| /* 22 */ (p0) add r4.__z_, r4.zzzz, r2.yyyy | |
| /* 23 */ setp_ne_push r4._y__, r4.yyyy, r4.zzzz | |
| /* 1.1 */ (p0) exec | |
| /* 24 */ (p0) maxs r3.___w, c255.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 25 */ setp_inv r4._y__, r4.y | |
| /* 2.1 */ (p0) exec | |
| /* 26 */ (p0) tfetch2D r2.___x, r1.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 27 */ (p0) tfetch2D r2.__x_, r1.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 28 */ (p0) tfetch2D r2._x__, r1.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 29 */ (p0) tfetch2D r2.x___, r1.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 30 */ serialize | |
| (p0) mad r6.__zw, r1.xxxy, c255.zzzz, c255.wwww | |
| /* 31 */ (p0) sge r2, r2.ywzx, r1.zzzz | |
| + (p0) frcs r4.__z_, r6.z | |
| /* 3.0 */ (p0) exec | |
| /* 32 */ (p0) add r6.xy__, r2.xyyy, -r2.wzzz | |
| + (p0) frcs r3.___w, r6.w | |
| /* 33 */ (p0) mad r4.__zw, r6.xxxy, r4.zzzz, r2.wwwz | |
| /* 34 */ (p0) subs r2.x___, r4.wz | |
| /* 35 */ (p0) mad r3.___w, r2.xxxx, r3.wwww, r4.zzzz | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 36 */ setp_pop r4._y__, r4.y | |
| /* 4.0 */ exec // PredicateClean=false | |
| /* 37 */ setp_inv r4._y__, r4.y | |
| /* 4.1 */ (p0) exec | |
| /* 38 */ (p0) tfetch2D r7.___x, r2.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 39 */ (p0) tfetch2D r7.__x_, r2.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 40 */ (p0) tfetch2D r7._x__, r2.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 41 */ (p0) tfetch2D r7.x___, r2.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 42 */ serialize | |
| (p0) mad r6.__zw, r2.xxxy, c255.zzzz, c255.wwww | |
| /* 43 */ (p0) sge r2, r7.zxyw, r2.zzzz | |
| + (p0) frcs r4.__z_, r6.z | |
| /* 5.0 */ (p0) exec | |
| /* 44 */ (p0) add r6.xy__, r2.zwww, -r2.yxxx | |
| + (p0) frcs r3.___w, r6.w | |
| /* 45 */ (p0) mad r4.__zw, r6.xxxy, r4.zzzz, r2.yyyx | |
| /* 46 */ (p0) subs r2.x___, r4.wz | |
| /* 47 */ (p0) mad r3.___w, r2.xxxx, r3.wwww, r4.zzzz | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 48 */ setp_pop r4._y__, r4.y | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 49 */ dp2add r3.___w, r3.wwww, r1.wwww, c255.xxxx | |
| /* 50 */ mad r4._yzw, r3.xxyz, -c13.wwww, r3.xxyz | |
| /* 51 */ mul r4._yzw, r3.wwww, r4.zzyw | |
| + adds r3.___w, c13.ww | |
| /* 52 */ mad r3.xyz_, r3.wwww, r3.zxyy, r4.wzyy | |
| /* 53 */ mul r4._yzw, r3.yyzx, r0.xxyz | |
| /* 54 */ mul r3._yzw, r3.yyzx, r5.xxyz | |
| + mulsc r3.x___, c5.w, r4.x | |
| /* 7.0 */ exece | |
| /* 55 */ mul r3._yzw, r3.yyzw, c0.xxyz | |
| + subsc r4.x___, c255.y, r3.x | |
| /* 56 */ mad r4._yzw, r4.yyzw, c1.xxyz, -r3.yyzw | |
| /* 57 */ mad r3._yzw, r4.yyzw, r0.wwww, r3.yyzw | |
| /* 58 */ mul r3._yzw, r4.xxxx, r3.yyzw | |
| /* 59 */ mad r5.xyz_, r3.xxxx, c5.xyzz, r3.yzww | |
| /* 60 */ max oC0, r5, r5 | |
| /* 7.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x00000002096922A0 (684b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r0, r0.xy, tf0 | |
| /* 9 */ serialize | |
| sge r5.xy__, c255.xxxx, r2.xyyy | |
| /* 10 */ sge r4._yzw, r2.xxzy, c255.yyyy | |
| /* 11 */ add r2.___w, r5.xxxx, r4.yyyy | |
| /* 12 */ add r2.___w, r2.wwww, r5.yyyy | |
| /* 13 */ add r2.___w, r2.wwww, r4.wwww | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r4._y__, r2.wwww, r4.zzzz | |
| /* 15 */ setp_eq_push r4.__z_, c255.xxxx, r4.yyyy | |
| /* 1.0 */ (p0) exec | |
| /* 16 */ (p0) tfetch2D r5.___x, r2.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 17 */ (p0) tfetch2D r5.__x_, r2.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 18 */ (p0) tfetch2D r5._x__, r2.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 19 */ (p0) tfetch2D r5.x___, r2.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 20 */ serialize | |
| (p0) mad r2.x__w, r2.xyyy, c255.zzzz, c255.wwww | |
| /* 21 */ (p0) sge r5, r5.zxyw, r2.zzzz | |
| + (p0) frcs r4._y__, r2.x | |
| /* 1.1 */ (p0) exec | |
| /* 22 */ (p0) add r2._yz_, r5.zzww, -r5.yyxx | |
| + (p0) frcs r2.x___, r2.w | |
| /* 23 */ (p0) mad r4._y_w, r2.yyzz, r4.yyyy, r5.yyxx | |
| /* 24 */ (p0) subs r2._y__, r4.wy | |
| /* 25 */ (p0) mad r4._y__, r2.yyyy, r2.xxxx, r4.yyyy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 26 */ setp_inv r4.__z_, r4.z | |
| /* 27 */ (p0) sge r4._y_w, c255.xxxx, r1.yyxx | |
| /* 28 */ (p0) sge r2.xyz_, r1.yzxx, c255.yyyy | |
| /* 29 */ (p0) add r2.___w, r4.wwww, r2.zzzz | |
| /* 30 */ (p0) add r4._y__, r2.wwww, r4.yyyy | |
| /* 31 */ (p0) add r4._y__, r4.yyyy, r2.xxxx | |
| /* 2.1 */ exec // PredicateClean=false | |
| /* 32 */ (p0) add r4._y__, r4.yyyy, r2.yyyy | |
| /* 33 */ setp_ne_push r4.__z_, r4.zzzz, r4.yyyy | |
| /* 3.0 */ (p0) exec | |
| /* 34 */ (p0) maxs r4._y__, c255.yy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 35 */ setp_inv r4.__z_, r4.z | |
| /* 4.0 */ (p0) exec | |
| /* 36 */ (p0) tfetch2D r5.___x, r1.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 37 */ (p0) tfetch2D r5.__x_, r1.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 38 */ (p0) tfetch2D r5._x__, r1.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 39 */ (p0) tfetch2D r5.x___, r1.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 40 */ serialize | |
| (p0) mad r2.x__w, r1.xyyy, c255.zzzz, c255.wwww | |
| /* 41 */ (p0) sge r5, r5.ywzx, r1.zzzz | |
| + (p0) frcs r4._y__, r2.x | |
| /* 4.1 */ (p0) exec | |
| /* 42 */ (p0) add r2._yz_, r5.xxyy, -r5.wwzz | |
| + (p0) frcs r2.x___, r2.w | |
| /* 43 */ (p0) mad r4._y_w, r2.yyzz, r4.yyyy, r5.wwzz | |
| /* 44 */ (p0) subs r2._y__, r4.wy | |
| /* 45 */ (p0) mad r4._y__, r2.yyyy, r2.xxxx, r4.yyyy | |
| /* 5.0 */ exec // PredicateClean=false | |
| /* 46 */ setp_pop r4.__z_, r4.z | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 47 */ setp_pop r4.__z_, r4.z | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 48 */ mul oC0.___w, r0.wwww, r3.wwww | |
| /* 49 */ dp2add r3.___w, r4.yyyy, r1.wwww, c255.xxxx | |
| /* 50 */ mad r4._yzw, r3.xxyz, -c13.wwww, r3.xxyz | |
| /* 51 */ mul r4._yzw, r3.wwww, r4.zzyw | |
| + adds r3.___w, c13.ww | |
| /* 52 */ mad r3.xyz_, r3.wwww, r3.zxyy, r4.wzyy | |
| /* 53 */ mul r3._yzw, r3.yyzx, r0.xxyz | |
| + mulsc r3.x___, c5.w, r4.x | |
| /* 7.0 */ exece | |
| /* 54 */ mul r4.xyz_, r3.yzww, c0.xyzz | |
| + subsc r3._y__, c255.y, r3.x | |
| /* 55 */ mul r3._yzw, r4.xxyz, r3.yyyy | |
| /* 56 */ mad oC0.xyz_, r3.xxxx, c5.xyzz, r3.yzww | |
| /* 7.1 */ cnop | |
| G> 00000004 Generated vertex shader at 0x00000002096E38E0 (84b): | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r1, r0.x, vf0, DataFormat=FMT_32_32_32_32_FLOAT, Stride=6, Signed=true, NumFormat=integer, PrefetchCount=6 | |
| /* 4 */ vfetch_mini r0._xy_, Offset=4, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 5 */ max oPos, r1, r1 | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exece | |
| /* 6 */ max o0.xy__, r0.yzzz, r0.yzzz | |
| /* 2.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x0000000209696DE0 (48b): | |
| /* 0.0 */ exec | |
| /* 2 */ tfetch2D r0, r0.xy, tf0 | |
| /* 0.1 */ alloc colors | |
| /* 1.0 */ exece | |
| /* 3 */ mul oC0, r0, c0 | |
| /* 1.1 */ cnop | |
| G> 00000004 Generated vertex shader at 0x00000002096E3B40 (108b): | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r2, r0.x, vf0, DataFormat=FMT_32_32_32_32_FLOAT, Stride=7, Signed=true, NumFormat=integer, PrefetchCount=7 | |
| /* 4 */ vfetch_mini r1.zyxw, Offset=4, DataFormat=FMT_8_8_8_8 | |
| /* 5 */ vfetch_mini r0._xy_, Offset=5, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 6 */ max oPos, r2, r2 | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exece | |
| /* 7 */ max o1, r1, r1 | |
| /* 8 */ max o0.xy__, r0.yzzz, r0.yzzz | |
| /* 2.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x0000000209696BC0 (48b): | |
| /* 0.0 */ exec | |
| /* 2 */ tfetch2D r0, r0.xy, tf0 | |
| /* 0.1 */ alloc colors | |
| /* 1.0 */ exece | |
| /* 3 */ mul oC0, r0, r1 | |
| /* 1.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x0000000209696D20 (96b): | |
| /* 0.0 */ exec | |
| /* 2 */ tfetch2D r0, r0.xy, tf0 | |
| /* 0.1 */ alloc colors | |
| /* 1.0 */ exece | |
| /* 3 */ add r1.xyz_, r0.xyzz, -c0.xyzz | |
| /* 4 */ sgt r1.xyz_, r1.zxyy, c255.xxxx | |
| /* 5 */ adds r1.___w, r1.yz | |
| /* 6 */ add r1.x___, r1.wwww, r1.xxxx | |
| /* 7 */ cndeq oC0, r1.xxxx, c255.xxxx, r0 | |
| /* 1.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x0000000209696040 (600b): | |
| /* 0.0 */ exec | |
| /* 5 */ add r14.xy__, r0.xyyy, c1.xyyy | |
| /* 6 */ add r12.xy__, r0.xyyy, c2.xyyy | |
| + maxs r0._, r0.xx | |
| /* 7 */ add r12.__zw, r0.xxxy, c3.xxxy | |
| + adds_prev r14.__z_, c0.x | |
| /* 8 */ add r10.xy__, r0.xyyy, c4.xyyy | |
| + maxs r0._, r0.yy | |
| /* 9 */ add r10.__zw, r0.xxxy, c5.xxxy | |
| + adds_prev r14.___w, c0.y | |
| /* 10 */ add r8.__zw, r0.xxxy, c7.xxxy | |
| + maxs r0._, r0.xx | |
| /* 0.1 */ exec | |
| /* 11 */ add r6.xy__, r0.xyyy, c8.xyyy | |
| + adds_prev r8.x___, c6.x | |
| /* 12 */ add r6.__zw, r0.xxxy, c9.xxxy | |
| + maxs r0._, r0.yy | |
| /* 13 */ add r4.xy__, r0.xyyy, c10.xyyy | |
| + adds_prev r8._y__, c6.y | |
| /* 14 */ add r2.xy__, r0.xyyy, c12.xyyy | |
| + maxs r0._, r0.xx | |
| /* 15 */ add r2.__zw, r0.xxxy, c13.xxxy | |
| + adds_prev r4.__z_, c11.x | |
| /* 16 */ add r0.__zw, r0.xxxy, c14.xxxy | |
| + maxs r0._, r0.yy | |
| /* 1.0 */ exec | |
| /* 17 */ add r1.xy__, r0.xyyy, c15.xyyy | |
| + adds_prev r4.___w, c11.y | |
| /* 18 */ tfetch2D r1, r1.xy, tf0 | |
| /* 19 */ tfetch2D r0, r0.zw, tf0 | |
| /* 20 */ tfetch2D r3, r2.zw, tf0 | |
| /* 21 */ tfetch2D r2, r2.xy, tf0 | |
| /* 22 */ tfetch2D r5, r4.zw, tf0 | |
| /* 1.1 */ exec | |
| /* 23 */ tfetch2D r4, r4.xy, tf0 | |
| /* 24 */ tfetch2D r7, r6.zw, tf0 | |
| /* 25 */ tfetch2D r6, r6.xy, tf0 | |
| /* 26 */ tfetch2D r9, r8.zw, tf0 | |
| /* 27 */ tfetch2D r8, r8.xy, tf0 | |
| /* 28 */ tfetch2D r11, r10.zw, tf0 | |
| /* 2.0 */ exec | |
| /* 29 */ tfetch2D r10, r10.xy, tf0 | |
| /* 30 */ tfetch2D r13, r12.zw, tf0 | |
| /* 31 */ tfetch2D r12, r12.xy, tf0 | |
| /* 32 */ tfetch2D r15, r14.zw, tf0 | |
| /* 33 */ tfetch2D r14, r14.xy, tf0 | |
| /* 2.1 */ alloc colors | |
| /* 3.0 */ exec | |
| /* 34 */ add r14, r14, r15 | |
| /* 35 */ add r12, r14, r12 | |
| /* 36 */ add r12, r12, r13 | |
| /* 37 */ add r10, r12, r10 | |
| /* 38 */ add r10, r10, r11 | |
| /* 39 */ add r8, r10, r8 | |
| /* 3.1 */ exec | |
| /* 40 */ add r8, r8, r9 | |
| /* 41 */ add r6, r8, r6 | |
| /* 42 */ add r6, r6, r7 | |
| /* 43 */ add r4, r6, r4 | |
| /* 44 */ add r4, r4, r5 | |
| /* 45 */ add r2, r4, r2 | |
| /* 4.0 */ exece | |
| /* 46 */ add r2, r2, r3 | |
| /* 47 */ add r0, r2, r0 | |
| /* 48 */ add r0, r0, r1 | |
| /* 49 */ mul oC0, r0, c255.xxxx | |
| /* 4.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x0000000209695D20 (276b): | |
| /* 0.0 */ exec | |
| /* 3 */ add r0.__zw, r0.xxxy, c0.xxxy | |
| /* 4 */ add r6.xy__, r0.xyyy, c1.xyyy | |
| /* 5 */ add r4.xy__, r0.xyyy, c3.xyyy | |
| + maxs r0._, r0.xx | |
| /* 6 */ add r3.xy__, r0.xyyy, c4.xyyy | |
| + adds_prev r5.x___, c2.x | |
| /* 7 */ add r2.xy__, r0.xyyy, c5.xyyy | |
| + maxs r0._, r0.yy | |
| /* 8 */ add r1.xy__, r0.xyyy, c6.xyyy | |
| + adds_prev r5._y__, c2.y | |
| /* 0.1 */ exec | |
| /* 9 */ tfetch2D r1, r1.xy, tf0 | |
| /* 10 */ tfetch2D r2, r2.xy, tf0 | |
| /* 11 */ tfetch2D r3, r3.xy, tf0 | |
| /* 12 */ tfetch2D r4, r4.xy, tf0 | |
| /* 13 */ tfetch2D r5, r5.xy, tf0 | |
| /* 14 */ tfetch2D r6, r6.xy, tf0 | |
| /* 1.0 */ exec | |
| /* 15 */ tfetch2D r0, r0.zw, tf0 | |
| /* 1.1 */ alloc colors | |
| /* 2.0 */ exec | |
| /* 16 */ mul r0, r0, c7 | |
| /* 17 */ mad r0, r6, c8, r0 | |
| /* 18 */ mad r0, r5, c9, r0 | |
| /* 19 */ mad r0, r4, c10, r0 | |
| /* 20 */ mad r0, r3, c11, r0 | |
| /* 21 */ mad r0, r2, c12, r0 | |
| /* 2.1 */ exece | |
| /* 22 */ mad oC0, r1, c13, r0 | |
| G> 00000004 Generated vertex shader at 0x00000002096E3BC0 (168b): | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r4, r0.x, vf0, DataFormat=FMT_32_32_32_32_FLOAT, Stride=7, Signed=true, NumFormat=integer, PrefetchCount=7 | |
| /* 4 */ vfetch_mini r2.zyxw, Offset=4, DataFormat=FMT_8_8_8_8 | |
| /* 5 */ vfetch_mini r1.xy__, Offset=5, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 6 */ maxs r3.x___, c255.zz | |
| /* 7 */ cndeq r3._yz_, c255.xxyy, r4.zzzz, c180.wwww | |
| /* 8 */ cndeq r0.__zw, c255.yyyx, r4.wwww, c180.zzzz | |
| /* 9 */ mad r0.xy__, r4.xyyy, c180.xyyy, c255.zzzz | |
| /* 10 */ max oPos._, r0, r0 | |
| + maxs oPos.x___, r0.xx | |
| /* 11 */ mul oPos._yzw, r0.yyzw, r3.xxyz | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exece | |
| /* 12 */ max o1, r2, r2 | |
| /* 13 */ max o0.xy__, r1.xyyy, r1.xyyy | |
| /* 2.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x0000000209696E60 (60b): | |
| /* 0.0 */ exec | |
| /* 2 */ tfetch2D r0, r0.xy, tf0 | |
| /* 0.1 */ alloc colors | |
| /* 1.0 */ exece | |
| /* 3 */ add r1, r1.yzwx, r1.yzwx | |
| /* 4 */ mul oC0, r1.wxyz, r0 | |
| /* 1.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x0000000209696AA0 (276b): | |
| /* 0.0 */ exec | |
| /* 3 */ tfetch2D r0._xyz, r0.xy, tf0 | |
| /* 0.1 */ alloc colors | |
| /* 1.0 */ exec | |
| /* 4 */ mins r0.x___, r0.yz | |
| /* 5 */ min r1.x___, r0.xxxx, r0.wwww | |
| + maxs r0.x___, r0.yz | |
| /* 6 */ max r0.x___, r0.xxxx, r0.wwww | |
| /* 7 */ add r0._yzw, -r0.xxxx, r0.yyzw | |
| /* 8 */ add r1.x___, r0.xxxx, -r1.xxxx | |
| + rcp r1.__z_, r0.x | |
| /* 9 */ mul r1._y__, r1.xxxx, r1.zzzz | |
| /* 1.1 */ exec | |
| /* 10 */ mul r1.__z_, r1.zzzz, c0.zzzz | |
| + rcp r1._y__, r1.y | |
| /* 11 */ mul r1._y__, r1.zzzz, r1.yyyy | |
| /* 12 */ mul r1.x___, r1.yyyy, r1.xxxx | |
| /* 13 */ mad r0.xyz_, r1.xxxx, r0.yzww, r0.xxxx | |
| /* 14 */ max r1.xyz_, r0.xyzz, c255.xxxx | |
| /* 15 */ logc r0.x___, r_abs[1].y | |
| /* 2.0 */ exec | |
| /* 16 */ logc r0._y__, r_abs[1].z | |
| /* 17 */ logc r0.__z_, r_abs[1].x | |
| /* 18 */ mul r1.xyz_, r0.xyzz, c0.yyyy | |
| /* 19 */ exp r0.__z_, r1.y | |
| /* 20 */ exp r0._y__, r1.x | |
| /* 21 */ exp r0.x___, r1.z | |
| /* 2.1 */ exece | |
| /* 22 */ add oC0.xyz1, r0.xyzz, c0.xxxx | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD429D30, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD45D7B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD285430, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B8EB0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2EC930, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3203B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD353E30, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3878B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BB330, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EEDB0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD422830, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4562B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD285430, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B8EB0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2EC930, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3203B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD353E30, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3878B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BB330, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EEDB0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD422830, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4562B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD285430, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B8EB0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2EC930, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3203B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD353E30, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3878B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BB330, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EEDB0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD422830, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4562B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD285430, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B8EB0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2EC930, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3203B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD353E30, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3878B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BB330, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EEDB0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD422830, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4562B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD285430, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B8EB0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2EC930, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3203B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD353E30, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3878B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BB330, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EEDB0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD422830, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4562B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD285430, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B8EB0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2EC930, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3203B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD353E30, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3878B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BB330, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EEDB0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD422830, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4562B0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD285360, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B8D60, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2EC760, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD320160, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD353B60, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000001) | |
| A> 00000010 XmaContext: disabling context 0 | |
| A> 00000010 WriteRegister(1A80, 00000001) | |
| A> 00000010 XmaContext: reset context 0 | |
| A> 00000010 WriteRegister(1940, 00000001) | |
| A> 00000010 XmaContext: kicking context 0 (buffer 0 32/1048576 bits) | |
| A> 0000000C Processing context 0 (offset 32, buffer 0, ptr 10428000) | |
| A> 00000010 WriteRegister(1940, 00000001) | |
| A> 00000010 XmaContext: kicking context 0 (buffer 0 168/1048576 bits) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD387560, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BAF60, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EE960, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD422360, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD455D60, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2851E0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B8BE0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2EC5E0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD31FFE0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3539E0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3873E0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BADE0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EE7E0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4221E0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD455BE0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2851E0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B8BE0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2EC5E0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD31FFE0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3539E0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3873E0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BADE0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EE7E0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4221E0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD455BE0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2851E0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1A80, 00000002) | |
| A> 00000010 XmaContext: reset context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 32/32768 bits) | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 32/32768 bits) | |
| A> 0000000C Processing context 1 (offset 32, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 1159/32768 bits) | |
| A> 0000000C Processing context 1 (offset 1159, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 2884/32768 bits) | |
| A> 0000000C Processing context 1 (offset 2884, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD2B8510, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 2884/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 2884/32768 bits) | |
| A> 0000000C Processing context 1 (offset 2884, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 2884/32768 bits) | |
| A> 0000000C Processing context 1 (offset 2884, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 4262/32768 bits) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E7C90, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 4262/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 4262/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 4262/32768 bits) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD317410, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 4262/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 4262/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 4262/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 4262/32768 bits) | |
| A> 0000000C Processing context 1 (offset 4262, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD346B90, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 4262/32768 bits) | |
| A> 0000000C Processing context 1 (offset 4262, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 4262/32768 bits) | |
| A> 0000000C Processing context 1 (offset 4262, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 4262/32768 bits) | |
| A> 0000000C Processing context 1 (offset 4262, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 5609/32768 bits) | |
| i> 00000028 VdSwap(AD376310, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 5609/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 5609/32768 bits) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 5609/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 5609/32768 bits) | |
| i> 00000028 VdSwap(AD3A5A90, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 5609/32768 bits) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 5609/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 5609/32768 bits) | |
| A> 0000000C Processing context 1 (offset 5609, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD3D5210, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 5609/32768 bits) | |
| A> 0000000C Processing context 1 (offset 5609, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 5609/32768 bits) | |
| A> 0000000C Processing context 1 (offset 5609, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD404990, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 5609/32768 bits) | |
| A> 0000000C Processing context 1 (offset 5609, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD434110, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| A> 0000000C Processing context 1 (offset 7180, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| A> 0000000C Processing context 1 (offset 7180, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD45FC30, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| A> 0000000C Processing context 1 (offset 7180, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD283790, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| A> 0000000C Processing context 1 (offset 7180, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 8545/32768 bits) | |
| A> 0000000C Processing context 1 (offset 8545, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 8545/32768 bits) | |
| A> 0000000C Processing context 1 (offset 8545, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B2F10, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 8545/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 8545/32768 bits) | |
| A> 0000000C Processing context 1 (offset 8545, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 9967/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 9967/32768 bits) | |
| A> 0000000C Processing context 1 (offset 9967, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 9967/32768 bits) | |
| A> 0000000C Processing context 1 (offset 9967, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 9967/32768 bits) | |
| A> 0000000C Processing context 1 (offset 9967, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E2690, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 11509/32768 bits) | |
| A> 0000000C Processing context 1 (offset 11509, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 11509/32768 bits) | |
| A> 0000000C Processing context 1 (offset 11509, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 11509/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 11509/32768 bits) | |
| i> 00000028 VdSwap(AD311E10, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 11509/32768 bits) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 11509/32768 bits) | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 11509/32768 bits) | |
| i> 00000028 VdSwap(AD341590, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 0000000C Processing context 1 (offset 11509, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 13065/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 13065/32768 bits) | |
| A> 0000000C Processing context 1 (offset 13065, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD370D10, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 13065/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 13065/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 13065/32768 bits) | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 13065/32768 bits) | |
| A> 0000000C Processing context 1 (offset 13065, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 14585/32768 bits) | |
| A> 0000000C Processing context 1 (offset 14585, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 14585/32768 bits) | |
| A> 0000000C Processing context 1 (offset 14585, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A0490, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 14585/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 14585/32768 bits) | |
| A> 0000000C Processing context 1 (offset 14585, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 16092/32768 bits) | |
| A> 0000000C Processing context 1 (offset 16092, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 16092/32768 bits) | |
| A> 0000000C Processing context 1 (offset 16092, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3CFC10, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 16092/32768 bits) | |
| A> 0000000C Processing context 1 (offset 16092, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 17647/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 17647/32768 bits) | |
| A> 0000000C Processing context 1 (offset 17647, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3FF390, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 17647/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 17647/32768 bits) | |
| A> 0000000C Processing context 1 (offset 17647, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 19148/32768 bits) | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 19148/32768 bits) | |
| A> 0000000C Processing context 1 (offset 19148, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD42EB10, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 19148/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 19148/32768 bits) | |
| A> 0000000C Processing context 1 (offset 19148, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 19148/32768 bits) | |
| A> 0000000C Processing context 1 (offset 19148, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 20684/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 20684/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 20684/32768 bits) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD45E290, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 20684/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 20684/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 20684/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 20684/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 20684/32768 bits) | |
| A> 0000000C Processing context 1 (offset 20684, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 20684/32768 bits) | |
| A> 0000000C Processing context 1 (offset 20684, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 20684/32768 bits) | |
| A> 0000000C Processing context 1 (offset 20684, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 20684/32768 bits) | |
| A> 0000000C Processing context 1 (offset 20684, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| i> 00000028 VdSwap(AD27FB10, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 0000000C Processing context 1 (offset 22205, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 0000000C Processing context 1 (offset 22205, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2AF290, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 0000000C Processing context 1 (offset 22205, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| i> 00000028 VdSwap(AD2DEA10, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD30E190, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1A80, 00000004) | |
| A> 00000010 XmaContext: reset context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 32/32768 bits) | |
| A> 0000000C Processing context 2 (offset 32, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 1159/32768 bits) | |
| A> 0000000C Processing context 2 (offset 1159, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 1159/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 1159/32768 bits) | |
| A> 0000000C Processing context 2 (offset 1159, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 2884/32768 bits) | |
| A> 0000000C Processing context 2 (offset 2884, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 2884/32768 bits) | |
| A> 0000000C Processing context 2 (offset 2884, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 2884/32768 bits) | |
| A> 0000000C Processing context 2 (offset 2884, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 4262/32768 bits) | |
| A> 0000000C Processing context 2 (offset 4262, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 4262/32768 bits) | |
| A> 0000000C Processing context 2 (offset 4262, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 4262/32768 bits) | |
| A> 0000000C Processing context 2 (offset 4262, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 4262/32768 bits) | |
| A> 0000000C Processing context 2 (offset 4262, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD33C6FC, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000028 VdSwap(AD35B390, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000028 VdSwap(AD378950, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 5609/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 5609/32768 bits) | |
| A> 0000000C Processing context 2 (offset 5609, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 5609/32768 bits) | |
| A> 0000000C Processing context 2 (offset 5609, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 5609/32768 bits) | |
| A> 0000000C Processing context 2 (offset 5609, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD395ED0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 7180/32768 bits) | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 7180/32768 bits) | |
| A> 0000000C Processing context 2 (offset 7180, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 7180/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 7180/32768 bits) | |
| i> 00000028 VdSwap(AD3B3450, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 0000000C Processing context 2 (offset 7180, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 7180/32768 bits) | |
| A> 0000000C Processing context 2 (offset 7180, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 8545/32768 bits) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D09D0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 8545/32768 bits) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 8545/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 8545/32768 bits) | |
| i> 00000028 VdSwap(AD3EDF50, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 8545/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 8545/32768 bits) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 8545/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 8545/32768 bits) | |
| A> 0000000C Processing context 2 (offset 8545, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD40B4D0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 8545/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 8545/32768 bits) | |
| A> 0000000C Processing context 2 (offset 8545, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 8545/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 8545/32768 bits) | |
| A> 0000000C Processing context 2 (offset 8545, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD428A50, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 9967/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 9967/32768 bits) | |
| A> 0000000C Processing context 2 (offset 9967, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD445FD0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 9967/32768 bits) | |
| A> 0000000C Processing context 2 (offset 9967, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 11509/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 11509/32768 bits) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26EED0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 11509/32768 bits) | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 11509/32768 bits) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD28C450, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 11509/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 11509/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 11509/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 11509/32768 bits) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2A99D0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 11509/32768 bits) | |
| A> 0000000C Processing context 2 (offset 11509, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 11509/32768 bits) | |
| A> 0000000C Processing context 2 (offset 11509, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 11509/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 11509/32768 bits) | |
| A> 0000000C Processing context 2 (offset 11509, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD2C6F50, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 13065/32768 bits) | |
| A> 0000000C Processing context 2 (offset 13065, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 13065/32768 bits) | |
| A> 0000000C Processing context 2 (offset 13065, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E44D0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 13065/32768 bits) | |
| A> 0000000C Processing context 2 (offset 13065, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 13065/32768 bits) | |
| A> 0000000C Processing context 2 (offset 13065, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 14585/32768 bits) | |
| A> 0000000C Processing context 2 (offset 14585, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD301B70, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 14585/32768 bits) | |
| A> 0000000C Processing context 2 (offset 14585, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 14585/32768 bits) | |
| A> 0000000C Processing context 2 (offset 14585, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 14585/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 14585/32768 bits) | |
| i> 00000028 VdSwap(AD31F0F0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 0000000C Processing context 2 (offset 14585, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 16092/32768 bits) | |
| A> 0000000C Processing context 2 (offset 16092, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 16092/32768 bits) | |
| A> 0000000C Processing context 2 (offset 16092, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 16092/32768 bits) | |
| A> 0000000C Processing context 2 (offset 16092, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 16092/32768 bits) | |
| A> 0000000C Processing context 2 (offset 16092, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD33C670, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 17647/32768 bits) | |
| A> 0000000C Processing context 2 (offset 17647, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 17647/32768 bits) | |
| A> 0000000C Processing context 2 (offset 17647, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD359BF0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 17647/32768 bits) | |
| A> 0000000C Processing context 2 (offset 17647, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 17647/32768 bits) | |
| A> 0000000C Processing context 2 (offset 17647, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 19148/32768 bits) | |
| A> 0000000C Processing context 2 (offset 19148, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 19148/32768 bits) | |
| A> 0000000C Processing context 2 (offset 19148, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD377170, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 19148/32768 bits) | |
| A> 0000000C Processing context 2 (offset 19148, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 19148/32768 bits) | |
| A> 0000000C Processing context 2 (offset 19148, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 19148/32768 bits) | |
| A> 0000000C Processing context 2 (offset 19148, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD3946F0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 20684/32768 bits) | |
| A> 0000000C Processing context 2 (offset 20684, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 20684/32768 bits) | |
| A> 0000000C Processing context 2 (offset 20684, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3B1C70, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 20684/32768 bits) | |
| A> 0000000C Processing context 2 (offset 20684, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 20684/32768 bits) | |
| A> 0000000C Processing context 2 (offset 20684, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 22205/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 22205/32768 bits) | |
| A> 0000000C Processing context 2 (offset 22205, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3CF1F0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 22205/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 22205/32768 bits) | |
| A> 0000000C Processing context 2 (offset 22205, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 23647/32768 bits) | |
| A> 0000000C Processing context 2 (offset 23647, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 23647/32768 bits) | |
| A> 0000000C Processing context 2 (offset 23647, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD3EC770, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 23647/32768 bits) | |
| A> 0000000C Processing context 2 (offset 23647, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 23647/32768 bits) | |
| A> 0000000C Processing context 2 (offset 23647, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD409CF0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 23647/32768 bits) | |
| A> 0000000C Processing context 2 (offset 23647, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 25009/32768 bits) | |
| A> 0000000C Processing context 2 (offset 25009, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 25009/32768 bits) | |
| A> 0000000C Processing context 2 (offset 25009, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD427270, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 25009/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 25009/32768 bits) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 25009/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 25009/32768 bits) | |
| i> 00000028 VdSwap(AD4447F0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 0000000C Processing context 2 (offset 25009, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 26252/32768 bits) | |
| A> 0000000C Processing context 2 (offset 26252, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 26252/32768 bits) | |
| A> 0000000C Processing context 2 (offset 26252, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26EFF0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 26252/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 26252/32768 bits) | |
| A> 0000000C Processing context 2 (offset 26252, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD28C570, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| i> 00000028 VdSwap(AD2A9AF0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C7070, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E45F0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD301B70, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD31F0F0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD33C670, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD359BF0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD377170, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A82E0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3DADE0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD40D8E0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4403E0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD282BE0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B56E0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E81E0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD31ACE0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD34D7E0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3802E0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3B2DE0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3E58E0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4183E0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD44AEE0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD282BE0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B56E0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1A80, 00000002) | |
| A> 00000010 XmaContext: reset context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 32/32768 bits) | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 32/32768 bits) | |
| A> 0000000C Processing context 1 (offset 32, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 1159/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 1159/32768 bits) | |
| A> 0000000C Processing context 1 (offset 1159, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E81E0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 2884/32768 bits) | |
| A> 0000000C Processing context 1 (offset 2884, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 2884/32768 bits) | |
| A> 0000000C Processing context 1 (offset 2884, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 2884/32768 bits) | |
| A> 0000000C Processing context 1 (offset 2884, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 4262/32768 bits) | |
| A> 0000000C Processing context 1 (offset 4262, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD31ACE0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 4262/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 4262/32768 bits) | |
| A> 0000000C Processing context 1 (offset 4262, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 4262/32768 bits) | |
| A> 0000000C Processing context 1 (offset 4262, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD34D7E0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 5609/32768 bits) | |
| A> 0000000C Processing context 1 (offset 5609, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 5609/32768 bits) | |
| A> 0000000C Processing context 1 (offset 5609, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 5609/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 5609/32768 bits) | |
| A> 0000000C Processing context 1 (offset 5609, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD3802E0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| A> 0000000C Processing context 1 (offset 7180, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| A> 0000000C Processing context 1 (offset 7180, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| A> 0000000C Processing context 1 (offset 7180, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| A> 0000000C Processing context 1 (offset 7180, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3B2DE0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 7180/32768 bits) | |
| A> 0000000C Processing context 1 (offset 7180, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 8545/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 8545/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 8545/32768 bits) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3E58E0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 8545/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 8545/32768 bits) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 8545/32768 bits) | |
| i> 00000028 VdSwap(AD4183E0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 8545/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 8545/32768 bits) | |
| A> 0000000C Processing context 1 (offset 8545, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 8545/32768 bits) | |
| A> 0000000C Processing context 1 (offset 8545, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 8545/32768 bits) | |
| A> 0000000C Processing context 1 (offset 8545, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 8545/32768 bits) | |
| A> 0000000C Processing context 1 (offset 8545, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 9967/32768 bits) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD44AEE0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 9967/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 9967/32768 bits) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 9967/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 9967/32768 bits) | |
| i> 00000028 VdSwap(AD27FE80, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 9967/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 9967/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 9967/32768 bits) | |
| A> 0000000C Processing context 1 (offset 9967, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 9967/32768 bits) | |
| A> 0000000C Processing context 1 (offset 9967, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 9967/32768 bits) | |
| A> 0000000C Processing context 1 (offset 9967, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2AFC00, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 9967/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 9967/32768 bits) | |
| A> 0000000C Processing context 1 (offset 9967, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 11509/32768 bits) | |
| A> 0000000C Processing context 1 (offset 11509, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 11509/32768 bits) | |
| A> 0000000C Processing context 1 (offset 11509, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD2DF980, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 11509/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 11509/32768 bits) | |
| A> 0000000C Processing context 1 (offset 11509, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 13065/32768 bits) | |
| A> 0000000C Processing context 1 (offset 13065, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 13065/32768 bits) | |
| A> 0000000C Processing context 1 (offset 13065, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 13065/32768 bits) | |
| A> 0000000C Processing context 1 (offset 13065, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 13065/32768 bits) | |
| A> 0000000C Processing context 1 (offset 13065, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD30F700, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 14585/32768 bits) | |
| A> 0000000C Processing context 1 (offset 14585, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 14585/32768 bits) | |
| A> 0000000C Processing context 1 (offset 14585, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 14585/32768 bits) | |
| A> 0000000C Processing context 1 (offset 14585, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 14585/32768 bits) | |
| A> 0000000C Processing context 1 (offset 14585, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD33F480, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 16092/32768 bits) | |
| A> 0000000C Processing context 1 (offset 16092, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD36F200, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 16092/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 16092/32768 bits) | |
| A> 0000000C Processing context 1 (offset 16092, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 16092/32768 bits) | |
| A> 0000000C Processing context 1 (offset 16092, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 17647/32768 bits) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD39EF80, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 17647/32768 bits) | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 17647/32768 bits) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 17647/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 17647/32768 bits) | |
| i> 00000028 VdSwap(AD3CED00, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 17647/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 17647/32768 bits) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 17647/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 17647/32768 bits) | |
| A> 0000000C Processing context 1 (offset 17647, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD3FEA80, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 17647/32768 bits) | |
| A> 0000000C Processing context 1 (offset 17647, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 17647/32768 bits) | |
| A> 0000000C Processing context 1 (offset 17647, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 17647/32768 bits) | |
| A> 0000000C Processing context 1 (offset 17647, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 19148/32768 bits) | |
| A> 0000000C Processing context 1 (offset 19148, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 19148/32768 bits) | |
| A> 0000000C Processing context 1 (offset 19148, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD42E800, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 19148/32768 bits) | |
| A> 0000000C Processing context 1 (offset 19148, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 19148/32768 bits) | |
| A> 0000000C Processing context 1 (offset 19148, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD45E580, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 20684/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 0000000C Processing context 1 (offset 20684, buffer 0, ptr 102AF800) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 20684/32768 bits) | |
| A> 0000000C Processing context 1 (offset 20684, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 20684/32768 bits) | |
| A> 0000000C Processing context 1 (offset 20684, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 20684/32768 bits) | |
| A> 0000000C Processing context 1 (offset 20684, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD280280, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 20684/32768 bits) | |
| A> 0000000C Processing context 1 (offset 20684, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B0000, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| i> 00000028 VdSwap(AD2DFD80, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 0000000C Processing context 1 (offset 22205, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 0000000C Processing context 1 (offset 22205, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 0000000C Processing context 1 (offset 22205, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD30FB00, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 22205/32768 bits) | |
| A> 0000000C Processing context 1 (offset 22205, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD33F880, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| i> 00000028 VdSwap(AD36F600, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| A> 0000000C Processing context 1 (offset 23647, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| A> 0000000C Processing context 1 (offset 23647, buffer 0, ptr 102AF800) | |
| i> 00000028 VdSwap(AD39F380, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| A> 0000000C Processing context 1 (offset 23647, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 23647/32768 bits) | |
| A> 0000000C Processing context 1 (offset 23647, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 25009/32768 bits) | |
| A> 0000000C Processing context 1 (offset 25009, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 25009/32768 bits) | |
| A> 0000000C Processing context 1 (offset 25009, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 25009/32768 bits) | |
| A> 0000000C Processing context 1 (offset 25009, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3CF100, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 25009/32768 bits) | |
| A> 0000000C Processing context 1 (offset 25009, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 26252/32768 bits) | |
| A> 0000000C Processing context 1 (offset 26252, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3FEE80, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 26252/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 26252/32768 bits) | |
| A> 0000000C Processing context 1 (offset 26252, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 26252/32768 bits) | |
| A> 0000000C Processing context 1 (offset 26252, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1940, 00000002) | |
| A> 00000010 XmaContext: kicking context 1 (buffer 0 26252/32768 bits) | |
| A> 0000000C Processing context 1 (offset 26252, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD42EC00, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| A> 00000010 WriteRegister(1A40, 00000002) | |
| A> 00000010 XmaContext: disabling context 1 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD45E980, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1A80, 00000004) | |
| A> 00000010 XmaContext: reset context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 32/32768 bits) | |
| A> 0000000C Processing context 2 (offset 32, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 1159/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 1159/32768 bits) | |
| A> 0000000C Processing context 2 (offset 1159, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 2884/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 2884/32768 bits) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 2884/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 2884/32768 bits) | |
| i> 00000028 VdSwap(AD2608FC, 401AB6B0, BFFF5008, 4018F4F0, BEEF0001, 4018F4B0(ACB30000), 4018F4BC(00000006), 4018F4C0(00000000), 4018F4B8(00000500), 4018F4B4(000002D0)) | |
| A> 0000000C Processing context 2 (offset 2884, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 4262/32768 bits) | |
| A> 0000000C Processing context 2 (offset 4262, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 4262/32768 bits) | |
| A> 0000000C Processing context 2 (offset 4262, buffer 0, ptr 102AF800) | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 4262/32768 bits) | |
| A> 0000000C Processing context 2 (offset 4262, buffer 0, ptr 102AF800) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 5609/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 5609/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 5609/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 5609/32768 bits) | |
| A> 00000010 WriteRegister(1A40, 00000004) | |
| A> 00000010 XmaContext: disabling context 2 | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 5609/32768 bits) | |
| A> 00000010 WriteRegister(1940, 00000004) | |
| A> 00000010 XmaContext: kicking context 2 (buffer 0 5609/32768 bits) | |
| F> 00000028 Device::ResolvePath(\data\images\xb360_screens) | |
| i> 00000028 VdSwap(AD293DEC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| F> 00000028 Device::ResolvePath(\Compressed\worlds\worldzones) | |
| i> 00000028 VdSwap(AD2A118C, 401AB670, BFFF5008, 4018F0F0, BEEF0001, 4018F0B0(ACEC8000), 4018F0BC(00000006), 4018F0C0(00000000), 4018F0B8(00000500), 4018F0B4(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\worlds\worldzones\z_ho) | |
| i> 00000028 VdSwap(AD2B11FC, 401AB670, BFFF5008, 4018F0F0, BEEF0001, 4018F0B0(ACEC8000), 4018F0BC(00000006), 4018F0C0(00000000), 4018F0B8(00000500), 4018F0B4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C127C, 401AB670, BFFF5008, 4018F0F0, BEEF0001, 4018F0B0(ACEC8000), 4018F0BC(00000006), 4018F0C0(00000000), 4018F0B8(00000500), 4018F0B4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2D12FC, 401AB670, BFFF5008, 4018F0F0, BEEF0001, 4018F0B0(ACEC8000), 4018F0BC(00000006), 4018F0C0(00000000), 4018F0B8(00000500), 4018F0B4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E4140, 401AB6B0, BFFF5008, 4018EF20, BEEF0001, 4018EEE0(ACB30000), 4018EEEC(00000006), 4018EEF0(00000000), 4018EEE8(00000500), 4018EEE4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2F158C, 401AB6B0, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACB30000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| F> 00000028 Device::ResolvePath(\Compressed\worlds\worldzones) | |
| i> 00000028 VdSwap(AD3015FC, 401AB6B0, BFFF5008, 4018F0F0, BEEF0001, 4018F0B0(ACB30000), 4018F0BC(00000006), 4018F0C0(00000000), 4018F0B8(00000500), 4018F0B4(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\worlds\worldzones\z_storyselect) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD31167C, 401AB6B0, BFFF5008, 4018F0F0, BEEF0001, 4018F0B0(ACB30000), 4018F0BC(00000006), 4018F0C0(00000000), 4018F0B8(00000500), 4018F0B4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3244D0, 401AB670, BFFF5008, 4018EF20, BEEF0001, 4018EEE0(ACEC8000), 4018EEEC(00000006), 4018EEF0(00000000), 4018EEE8(00000500), 4018EEE4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD33190C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD34197C, 401AB670, BFFF5008, 4018EF40, BEEF0001, 4018EF00(ACEC8000), 4018EF0C(00000006), 4018EF10(00000000), 4018EF08(00000500), 4018EF04(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\worlds\worldzones\z_world) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3519FC, 401AB670, BFFF5008, 4018EFC0, BEEF0001, 4018EF80(ACEC8000), 4018EF8C(00000006), 4018EF90(00000000), 4018EF88(00000500), 4018EF84(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD364850, 401AB6B0, BFFF5008, 4018ED70, BEEF0001, 4018ED30(ACB30000), 4018ED3C(00000006), 4018ED40(00000000), 4018ED38(00000500), 4018ED34(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD371C8C, 401AB6B0, BFFF5008, 4018EF70, BEEF0001, 4018EF30(ACB30000), 4018EF3C(00000006), 4018EF40(00000000), 4018EF38(00000500), 4018EF34(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD381CFC, 401AB6B0, BFFF5008, 4018EF40, BEEF0001, 4018EF00(ACB30000), 4018EF0C(00000006), 4018EF10(00000000), 4018EF08(00000500), 4018EF04(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\worlds\worldzones\z_bus) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD391D7C, 401AB6B0, BFFF5008, 4018EFC0, BEEF0001, 4018EF80(ACB30000), 4018EF8C(00000006), 4018EF90(00000000), 4018EF88(00000500), 4018EF84(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A4BD0, 401AB670, BFFF5008, 4018ED70, BEEF0001, 4018ED30(ACEC8000), 4018ED3C(00000006), 4018ED40(00000000), 4018ED38(00000500), 4018ED34(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3B200C, 401AB670, BFFF5008, 4018EF70, BEEF0001, 4018EF30(ACEC8000), 4018EF3C(00000006), 4018EF40(00000000), 4018EF38(00000500), 4018EF34(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3C207C, 401AB670, BFFF5008, 4018EF40, BEEF0001, 4018EF00(ACEC8000), 4018EF0C(00000006), 4018EF10(00000000), 4018EF08(00000500), 4018EF04(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\pak\singleplayer) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D20FC, 401AB670, BFFF5008, 4018EFC0, BEEF0001, 4018EF80(ACEC8000), 4018EF8C(00000006), 4018EF90(00000000), 4018EF88(00000500), 4018EF84(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3E4F50, 401AB6B0, BFFF5008, 4018ED70, BEEF0001, 4018ED30(ACB30000), 4018ED3C(00000006), 4018ED40(00000000), 4018ED38(00000500), 4018ED34(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3F238C, 401AB6B0, BFFF5008, 4018EF70, BEEF0001, 4018EF30(ACB30000), 4018EF3C(00000006), 4018EF40(00000000), 4018EF38(00000500), 4018EF34(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4023FC, 401AB6B0, BFFF5008, 4018EF40, BEEF0001, 4018EF00(ACB30000), 4018EF0C(00000006), 4018EF10(00000000), 4018EF08(00000500), 4018EF04(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\worlds\worldzones\z_navmesh) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD41247C, 401AB6B0, BFFF5008, 4018EF40, BEEF0001, 4018EF00(ACB30000), 4018EF0C(00000006), 4018EF10(00000000), 4018EF08(00000500), 4018EF04(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4224FC, 401AB6B0, BFFF5008, 4018EFC0, BEEF0001, 4018EF80(ACB30000), 4018EF8C(00000006), 4018EF90(00000000), 4018EF88(00000500), 4018EF84(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD435350, 401AB670, BFFF5008, 4018ED70, BEEF0001, 4018ED30(ACEC8000), 4018ED3C(00000006), 4018ED40(00000000), 4018ED38(00000500), 4018ED34(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD44278C, 401AB670, BFFF5008, 4018EF70, BEEF0001, 4018EF30(ACEC8000), 4018EF3C(00000006), 4018EF40(00000000), 4018EF38(00000500), 4018EF34(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26017C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\worlds\worldzones\z_storyselect) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2701FC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD28027C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2902FC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\worlds\worldzones\z_storyselect) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2A3150, 401AB6B0, BFFF5008, 4018ECD0, BEEF0001, 4018EC90(ACB30000), 4018EC9C(00000006), 4018ECA0(00000000), 4018EC98(00000500), 4018EC94(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B058C, 401AB6B0, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACB30000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C33D0, 401AB670, BFFF5008, 4018ECD0, BEEF0001, 4018EC90(ACEC8000), 4018EC9C(00000006), 4018ECA0(00000000), 4018EC98(00000500), 4018EC94(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2D080C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\worlds\worldzones\z_ho) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E087C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2F08FC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD30097C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3109FC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD320A7C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD330AFC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD340B7C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD350BFC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD360C7C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD370CFC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD380D7C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD390DFC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A0E7C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3B0EFC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3C0F7C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D0FFC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3E107C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3F10FC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000028 VdSwap(AD40117C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4111FC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD42127C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD4312FC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD44137C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26017C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2701FC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD28027C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2902FC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2A037C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B03FC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C047C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2D04FC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E057C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2F05FC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD30067C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3106FC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD32077C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3307FC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD34087C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3508FC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD36097C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3709FC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD380A7C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD390AFC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A0B7C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3B0BFC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3C0C7C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D0CFC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3E0D7C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3F0DFC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD400E7C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD410EFC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD420F7C, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD430FFC, 401AB670, BFFF5008, 4018F120, BEEF0001, 4018F0E0(ACEC8000), 4018F0EC(00000006), 4018F0F0(00000000), 4018F0E8(00000500), 4018F0E4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD443E50, 401AB6B0, BFFF5008, 4018ECD0, BEEF0001, 4018EC90(ACB30000), 4018EC9C(00000006), 4018ECA0(00000000), 4018EC98(00000500), 4018EC94(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26018C, 401AB6B0, BFFF5008, 4018EF40, BEEF0001, 4018EF00(ACB30000), 4018EF0C(00000006), 4018EF10(00000000), 4018EF08(00000500), 4018EF04(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\pak\unloadable_anims) | |
| i> 00000028 VdSwap(AD2701FC, 401AB6B0, BFFF5008, 4018EF40, BEEF0001, 4018EF00(ACB30000), 4018EF0C(00000006), 4018EF10(00000000), 4018EF08(00000500), 4018EF04(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD28027C, 401AB6B0, BFFF5008, 4018EF40, BEEF0001, 4018EF00(ACB30000), 4018EF0C(00000006), 4018EF10(00000000), 4018EF08(00000500), 4018EF04(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2902FC, 401AB6B0, BFFF5008, 4018EF40, BEEF0001, 4018EF00(ACB30000), 4018EF0C(00000006), 4018EF10(00000000), 4018EF08(00000500), 4018EF04(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2A037C, 401AB6B0, BFFF5008, 4018EF40, BEEF0001, 4018EF00(ACB30000), 4018EF0C(00000006), 4018EF10(00000000), 4018EF08(00000500), 4018EF04(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B03FC, 401AB6B0, BFFF5008, 4018EFC0, BEEF0001, 4018EF80(ACB30000), 4018EF8C(00000006), 4018EF90(00000000), 4018EF88(00000500), 4018EF84(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000028 VdSwap(AD2C047C, 401AB6B0, BFFF5008, 4018EFC0, BEEF0001, 4018EF80(ACB30000), 4018EF8C(00000006), 4018EF90(00000000), 4018EF88(00000500), 4018EF84(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2D04FC, 401AB6B0, BFFF5008, 4018EFC0, BEEF0001, 4018EF80(ACB30000), 4018EF8C(00000006), 4018EF90(00000000), 4018EF88(00000500), 4018EF84(000002D0)) | |
| i> 00000028 VdSwap(AD2E3350, 401AB670, BFFF5008, 4018ED70, BEEF0001, 4018ED30(ACEC8000), 4018ED3C(00000006), 4018ED40(00000000), 4018ED38(00000500), 4018ED34(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2F078C, 401AB670, BFFF5008, 4018EF70, BEEF0001, 4018EF30(ACEC8000), 4018EF3C(00000006), 4018EF40(00000000), 4018EF38(00000500), 4018EF34(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3035D0, 401AB6B0, BFFF5008, 4018F750, BEEF0001, 4018F710(ACB30000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD310A0C, 401AB6B0, BFFF5008, 4018F4F0, BEEF0001, 4018F4B0(ACB30000), 4018F4BC(00000006), 4018F4C0(00000000), 4018F4B8(00000500), 4018F4B4(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\skies\default_sky) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD320A7C, 401AB6B0, BFFF5008, 4018F4F0, BEEF0001, 4018F4B0(ACB30000), 4018F4BC(00000006), 4018F4C0(00000000), 4018F4B8(00000500), 4018F4B4(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3338D0, 401AB670, BFFF5008, 4018F0A0, BEEF0001, 4018F060(ACEC8000), 4018F06C(00000006), 4018F070(00000000), 4018F068(00000500), 4018F064(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD343AE0, 401AB6B0, BFFF5008, 4018F750, BEEF0001, 4018F710(ACB30000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD353CE0, 401AB670, BFFF5008, 4018F750, BEEF0001, 4018F710(ACEC8000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD363EE0, 401AB6B0, BFFF5008, 4018F750, BEEF0001, 4018F710(ACB30000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3740E0, 401AB670, BFFF5008, 4018F750, BEEF0001, 4018F710(ACEC8000), 4018F71C(00000006), 4018F720(00000000), 4018F718(00000500), 4018F714(000002D0)) | |
| i> 00000004 XE_SWAP | |
| F> 00000038 Device::ResolvePath(\data\sounds\pak) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3FEEF0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000028 VdSwap(AD287E10, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| G> 00000004 Generated vertex shader at 0x00000002096B0DC0 (156b): | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r3.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=5, Signed=true, NumFormat=integer | |
| /* 4 */ vfetch_full r1.zyxw, r0.x, vf1, DataFormat=FMT_8_8_8_8, Stride=7, PrefetchCount=3 | |
| /* 5 */ vfetch_mini r0._xy1, Offset=1, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 6 */ mul r2, r3.yyyy, c1.wxyz | |
| /* 7 */ mad r2, r3.xxxx, c0.zywx, r2.wzxy | |
| /* 8 */ mad r2, r3.zzzz, c2.xwzy, r2.wzxy | |
| /* 9 */ mad oPos, r3.wwww, c3, r2.xwzy | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exece | |
| /* 10 */ max o1, r1, r1 | |
| /* 11 */ dp3 o0.x___, c24.xyww, r0.yzww | |
| /* 12 */ dp3 o0._y__, c25.xyww, r0.yzww | |
| /* 2.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x00000002096956A0 (48b): | |
| /* 0.0 */ exec | |
| /* 2 */ tfetch2D r1, r0.xy, tf0 | |
| /* 0.1 */ alloc colors | |
| /* 1.0 */ exece | |
| /* 3 */ max oC0, r1, r1 | |
| /* 1.1 */ cnop | |
| G> 00000004 Generated vertex shader at 0x00000002096B0BE0 (156b): | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r3.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=5, Signed=true, NumFormat=integer | |
| /* 4 */ vfetch_full r1.zyxw, r0.x, vf1, DataFormat=FMT_8_8_8_8, Stride=9, PrefetchCount=3 | |
| /* 5 */ vfetch_mini r0._xy1, Offset=1, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 6 */ mul r2, r3.yyyy, c1.wxyz | |
| /* 7 */ mad r2, r3.xxxx, c0.zywx, r2.wzxy | |
| /* 8 */ mad r2, r3.zzzz, c2.xwzy, r2.wzxy | |
| /* 9 */ mad oPos, r3.wwww, c3, r2.xwzy | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exece | |
| /* 10 */ max o1, r1, r1 | |
| /* 11 */ dp3 o0.x___, c24.xyww, r0.yzww | |
| /* 12 */ dp3 o0._y__, c25.xyww, r0.yzww | |
| /* 2.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x0000000209695660 (60b): | |
| /* 0.0 */ exec | |
| /* 2 */ tfetch2D r0, r0.xy, tf0 | |
| /* 0.1 */ alloc colors | |
| /* 1.0 */ exece | |
| /* 3 */ mul oC0.___w, r0.wwww, r1.wwww | |
| /* 4 */ max oC0.xyz_, r0.xyzz, r0.xyzz | |
| /* 1.1 */ cnop | |
| G> 00000004 Generated vertex shader at 0x00000002096B2AA0 (156b): | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r3.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=5, Signed=true, NumFormat=integer | |
| /* 4 */ vfetch_full r1.zyxw, r0.x, vf1, DataFormat=FMT_8_8_8_8, Stride=3, PrefetchCount=3 | |
| /* 5 */ vfetch_mini r0._xy1, Offset=1, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 6 */ mul r2, r3.yyyy, c1.wxyz | |
| /* 7 */ mad r2, r3.xxxx, c0.zywx, r2.wzxy | |
| /* 8 */ mad r2, r3.zzzz, c2.xwzy, r2.wzxy | |
| /* 9 */ mad oPos, r3.wwww, c3, r2.xwzy | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exece | |
| /* 10 */ max o1, r1, r1 | |
| /* 11 */ dp3 o0.x___, c24.xyww, r0.yzww | |
| /* 12 */ dp3 o0._y__, c25.xyww, r0.yzww | |
| /* 2.1 */ cnop | |
| G> 00000004 Generated vertex shader at 0x00000002096B0A00 (156b): | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r3.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=5, Signed=true, NumFormat=integer | |
| /* 4 */ vfetch_full r1.zyxw, r0.x, vf1, DataFormat=FMT_8_8_8_8, Stride=11, PrefetchCount=3 | |
| /* 5 */ vfetch_mini r0._xy1, Offset=1, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 6 */ mul r2, r3.yyyy, c1.wxyz | |
| /* 7 */ mad r2, r3.xxxx, c0.zywx, r2.wzxy | |
| /* 8 */ mad r2, r3.zzzz, c2.xwzy, r2.wzxy | |
| /* 9 */ mad oPos, r3.wwww, c3, r2.xwzy | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exece | |
| /* 10 */ max o1, r1, r1 | |
| /* 11 */ dp3 o0.x___, c24.xyww, r0.yzww | |
| /* 12 */ dp3 o0._y__, c25.xyww, r0.yzww | |
| /* 2.1 */ cnop | |
| G> 00000004 Generated vertex shader at 0x00000002096D6380 (792b): | |
| /* 0.0 */ exec | |
| /* 7 */ vfetch_full r1.xyz_, r0.x, vf0, Offset=3, DataFormat=FMT_2_10_10_10, Stride=10, Signed=true, PrefetchCount=7 | |
| /* 8 */ vfetch_mini r9.zyxw, Offset=5, DataFormat=FMT_8_8_8_8 | |
| /* 9 */ vfetch_mini r8.xy1_, Offset=8, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 10 */ serialize | |
| max r1.___w, r1.zzzz, r1.zzzz | |
| /* 11 */ max r0.___w, r1.yyyy, r1.yyyy | |
| /* 12 */ max r0._y__, r1.xxxx, r1.xxxx | |
| /* 0.1 */ exec | |
| /* 13 */ vfetch_full r2.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=10, Signed=true, NumFormat=integer | |
| /* 1.0 */ alloc position | |
| /* 1.1 */ exec | |
| /* 14 */ mul r3, r2.yyyy, c1.xwzy | |
| /* 15 */ mad r3, r2.xxxx, c0.yzxw, r3.wzxy | |
| /* 16 */ mad r3, r2.zzzz, c2.wxyz, r3.wzxy | |
| /* 17 */ mad oPos, r2.wwww, c3, r3.yzwx | |
| /* 2.0 */ alloc interpolators | |
| /* 2.1 */ exec | |
| /* 18 */ mul r5, r2.wwww, c7.zwxy | |
| /* 19 */ mul r7, r2.zzzz, c6.zwxy | |
| /* 20 */ mul r6, r2.xxxx, c4.zwxy | |
| /* 21 */ mul r10, r2.yyyy, c5.zwxy | |
| /* 22 */ add r2, r6.xzwy, r10.xzwy | |
| /* 23 */ add r2, r2.wzyx, r7.ywzx | |
| /* 3.0 */ exec | |
| /* 24 */ add r4, r2.yzwx, r5.wzxy | |
| /* 25 */ mul r2, r4.xxxx, c9.wxyz | |
| /* 26 */ mul r3, r4.xxxx, c13.wxyz | |
| /* 27 */ mad r3, r4.yyyy, c12.yzxw, r3.zwyx | |
| /* 28 */ mad r2, r4.yyyy, c8.yzxw, r2.zwyx | |
| /* 29 */ mad r2, r4.zzzz, c10.wxyz, r2.wzxy | |
| /* 3.1 */ exec | |
| /* 30 */ mad r3, r4.zzzz, c14.wxyz, r3.wzxy | |
| /* 31 */ mad r3, r4.wwww, c15.yxzw, r3.zywx | |
| /* 32 */ mad r11, r4.wwww, c11.yxzw, r2.zywx | |
| /* 33 */ rcp r0.x___, r11.w | |
| /* 34 */ rcp r0.__z_, r3.w | |
| /* 35 */ mul r2.xy__, r0.xzzz, c255.yyyy | |
| + maxs r0._, r3.zz | |
| /* 4.0 */ exec | |
| /* 36 */ mad r3.xy__, r2.yyyy, r3.yxxx, c255.yyyy | |
| /* 37 */ add r3.__z_, -r3.yyyy, c255.zzzz | |
| + muls_prev r3.___w, r0.z | |
| /* 38 */ mul r2.___w, r11.zzzz, r0.xxxx | |
| /* 39 */ mad r2.xy__, r2.xxxx, r11.xyyy, c255.yyyy | |
| /* 40 */ subsc r2.__z_, c255.z, r2.x | |
| /* 41 */ mul r11.x___, r0.yyyy, c4.yyyy | |
| + mulsc r11._y__, c5.y, r0.w | |
| /* 4.1 */ exec | |
| /* 42 */ mul r0.x___, r0.yyyy, c4.xxxx | |
| + mulsc r0.__z_, c5.x, r0.w | |
| /* 43 */ mul r11.__z_, r0.yyyy, c4.zzzz | |
| + mulsc r11.___w, c5.z, r0.w | |
| /* 44 */ dp3 r0._y__, r1.xyzz, r1.xyzz | |
| /* 45 */ rsq r1.x___, r_abs[0].y | |
| /* 46 */ dp2add r0._y__, r11.zwww, r1.xxxx, c255.xxxx | |
| /* 47 */ dp2add r0.__z_, r0.xzzz, r1.xxxx, c255.xxxx | |
| /* 5.0 */ exec | |
| /* 48 */ dp2add r0.___w, r11.xyyy, r1.xxxx, c255.xxxx | |
| /* 49 */ add r0.x___, r6.xxxx, -c43.xxxx | |
| + mulsc r6.x___, c6.z, r1.w | |
| /* 50 */ add r0.x___, r0.xxxx, r10.xxxx | |
| + mulsc r6._y__, c6.x, r1.w | |
| /* 51 */ add o3, r9, r9 | |
| /* 52 */ dp3 o0.__z_, c28.xyww, r8.xyzz | |
| /* 53 */ dp3 o0.___w, c29.xyww, r8.xyzz | |
| /* 5.1 */ exec | |
| /* 54 */ add r0.x___, r0.xxxx, r7.xxxx | |
| + mulsc r6.__z_, c6.y, r1.w | |
| /* 55 */ mad r1.xyz_, r6.xyzz, r1.xxxx, r0.yzww | |
| /* 56 */ add r0._y__, r0.xxxx, r5.xxxx | |
| /* 57 */ dp3 r0.x___, r4.yxzz, r4.yxzz | |
| /* 58 */ mul_sat r0._y__, r0.yyyy, c43.zzzz | |
| + rsq r0.x___, r_abs[0].x | |
| /* 59 */ max o4._, r0, r0 | |
| + maxs o4.x___, r0.yy | |
| /* 6.0 */ exece | |
| /* 60 */ mul r0.xyz_, r4.xyzz, r0.xxxx | |
| /* 61 */ dp3 r0.___w, -r0.yxzz, r1.yzxx | |
| /* 62 */ adds r0.___w, r0.ww | |
| /* 63 */ mad o0.xy__, r0.wwww, r1.yzzz, r0.yxxx | |
| /* 64 */ max o1.xyz1, r2.yzww, r2.yzww | |
| /* 65 */ max o2.xyz_, r3.xzww, r3.xzww | |
| /* 6.1 */ cnop | |
| G> 00000004 Generated vertex shader at 0x00000002096DB780 (744b): | |
| /* 0.0 */ exec | |
| /* 6 */ vfetch_full r1.xyz_, r0.x, vf0, Offset=3, DataFormat=FMT_2_10_10_10, Stride=5, Signed=true, PrefetchCount=2 | |
| /* 7 */ vfetch_mini r8.zyxw, Offset=4, DataFormat=FMT_8_8_8_8 | |
| /* 8 */ serialize | |
| max r1.___w, r1.zzzz, r1.zzzz | |
| /* 9 */ max r0.___w, r1.yyyy, r1.yyyy | |
| /* 10 */ max r0._y__, r1.xxxx, r1.xxxx | |
| /* 11 */ vfetch_full r2.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=5, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 12 */ mul r3, r2.yyyy, c1.xwzy | |
| /* 13 */ mad r3, r2.xxxx, c0.yzxw, r3.wzxy | |
| /* 14 */ mad r3, r2.zzzz, c2.wxyz, r3.wzxy | |
| /* 15 */ mad oPos, r2.wwww, c3, r3.yzwx | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exec | |
| /* 16 */ mul r5, r2.wwww, c7.zwxy | |
| /* 17 */ mul r7, r2.zzzz, c6.zwxy | |
| /* 18 */ mul r6, r2.xxxx, c4.zwxy | |
| /* 19 */ mul r9, r2.yyyy, c5.zwxy | |
| /* 20 */ add r2, r6.xzwy, r9.xzwy | |
| /* 21 */ add r2, r2.wzyx, r7.ywzx | |
| /* 2.1 */ exec | |
| /* 22 */ add r4, r2.yzwx, r5.wzxy | |
| /* 23 */ mul r2, r4.xxxx, c9.wxyz | |
| /* 24 */ mul r3, r4.xxxx, c13.wxyz | |
| /* 25 */ mad r3, r4.yyyy, c12.yzxw, r3.zwyx | |
| /* 26 */ mad r2, r4.yyyy, c8.yzxw, r2.zwyx | |
| /* 27 */ mad r2, r4.zzzz, c10.wxyz, r2.wzxy | |
| /* 3.0 */ exec | |
| /* 28 */ mad r3, r4.zzzz, c14.wxyz, r3.wzxy | |
| /* 29 */ mad r3, r4.wwww, c15.yxzw, r3.zywx | |
| /* 30 */ mad r10, r4.wwww, c11.yxzw, r2.zywx | |
| /* 31 */ rcp r0.x___, r10.w | |
| /* 32 */ rcp r0.__z_, r3.w | |
| /* 33 */ mul r2.xy__, r0.xzzz, c255.xxxx | |
| + maxs r0._, r3.zz | |
| /* 3.1 */ exec | |
| /* 34 */ mad r3.xy__, r2.yyyy, r3.yxxx, c255.xxxx | |
| /* 35 */ add r3.__z_, -r3.yyyy, c255.yyyy | |
| + muls_prev r3.___w, r0.z | |
| /* 36 */ mul r2.___w, r10.zzzz, r0.xxxx | |
| /* 37 */ mad r2.xy__, r2.xxxx, r10.xyyy, c255.xxxx | |
| /* 38 */ subsc r2.__z_, c255.y, r2.x | |
| /* 39 */ mul r10.x___, r0.yyyy, c4.xxxx | |
| + mulsc r10._y__, c5.x, r0.w | |
| /* 4.0 */ exec | |
| /* 40 */ mul r0.x___, r0.yyyy, c4.yyyy | |
| + mulsc r0.__z_, c5.y, r0.w | |
| /* 41 */ mul r10.__z_, r0.yyyy, c4.zzzz | |
| + mulsc r10.___w, c5.z, r0.w | |
| /* 42 */ dp3 r0._y__, r1.xyzz, r1.xyzz | |
| /* 43 */ rsq r1.x___, r_abs[0].y | |
| /* 44 */ dp2add r0._y__, r10.zwww, r1.xxxx, c255.zzzz | |
| /* 45 */ dp2add r0.__z_, r0.xzzz, r1.xxxx, c255.zzzz | |
| /* 4.1 */ exec | |
| /* 46 */ dp2add r0.___w, r10.xyyy, r1.xxxx, c255.zzzz | |
| /* 47 */ add r0.x___, r6.xxxx, -c43.xxxx | |
| + mulsc r6.x___, c6.z, r1.w | |
| /* 48 */ add r0.x___, r0.xxxx, r9.xxxx | |
| + mulsc r6._y__, c6.x, r1.w | |
| /* 49 */ add o3, r8, r8 | |
| /* 50 */ add r0.x___, r0.xxxx, r7.xxxx | |
| + mulsc r6.__z_, c6.y, r1.w | |
| /* 51 */ mad r1.xyz_, r6.xzyy, r1.xxxx, r0.yzww | |
| /* 5.0 */ exec | |
| /* 52 */ add r0._y__, r0.xxxx, r5.xxxx | |
| /* 53 */ dp3 r0.x___, r4.yxzz, r4.yxzz | |
| /* 54 */ mul_sat r0._y__, r0.yyyy, c43.zzzz | |
| + rsq r0.x___, r_abs[0].x | |
| /* 55 */ max o4._, r0, r0 | |
| + maxs o4.x___, r0.yy | |
| /* 56 */ mul r0.xyz_, r4.xyzz, r0.xxxx | |
| /* 57 */ dp3 r0.___w, -r0.yxzz, r1.zyxx | |
| /* 5.1 */ exece | |
| /* 58 */ adds r0.___w, r0.ww | |
| /* 59 */ mad o0.xy__, r0.wwww, r1.zyyy, r0.yxxx | |
| /* 60 */ max o1.xyz1, r2.yzww, r2.yzww | |
| /* 61 */ max o2.xyz_, r3.xzww, r3.xzww | |
| G> 00000004 Generated pixel shader at 0x0000000209659040 (780b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r6, r0.xy, tf0 | |
| /* 9 */ tfetch2D r0, r0.zw, tf1 | |
| /* 10 */ tfetch2D r1, r1.xy, tf2 | |
| /* 11 */ serialize | |
| sge r7.xy__, c255.xxxx, r3.xyyy | |
| /* 12 */ sge r5._yzw, r3.xxzy, c255.yyyy | |
| /* 13 */ add r3.___w, r7.xxxx, r5.yyyy | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r3.___w, r3.wwww, r7.yyyy | |
| /* 15 */ add r3.___w, r3.wwww, r5.wwww | |
| /* 16 */ add r5._y__, r3.wwww, r5.zzzz | |
| /* 17 */ setp_ne_push r5.__z_, c255.xxxx, r5.yyyy | |
| /* 18 */ (p0) sge r5._y_w, c255.xxxx, r2.yyxx | |
| /* 19 */ (p0) sge r3.xyz_, r2.yzxx, c255.yyyy | |
| /* 1.0 */ exec // PredicateClean=false | |
| /* 20 */ (p0) add r3.___w, r5.wwww, r3.zzzz | |
| /* 21 */ (p0) add r5._y__, r3.wwww, r5.yyyy | |
| /* 22 */ (p0) add r5._y__, r5.yyyy, r3.xxxx | |
| /* 23 */ (p0) add r5._y__, r5.yyyy, r3.yyyy | |
| /* 24 */ setp_ne_push r5.__z_, r5.zzzz, r5.yyyy | |
| /* 1.1 */ (p0) exec | |
| /* 25 */ (p0) maxs r5._y__, c255.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 26 */ setp_inv r5.__z_, r5.z | |
| /* 2.1 */ (p0) exec | |
| /* 27 */ (p0) tfetch2D r7.___x, r2.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 28 */ (p0) tfetch2D r7.__x_, r2.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 29 */ (p0) tfetch2D r7._x__, r2.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 30 */ (p0) tfetch2D r7.x___, r2.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 31 */ serialize | |
| (p0) mad r3.x__w, r2.xyyy, c255.zzzz, c255.wwww | |
| /* 32 */ (p0) sge r7, r7.ywzx, r2.zzzz | |
| + (p0) frcs r5._y__, r3.x | |
| /* 3.0 */ (p0) exec | |
| /* 33 */ (p0) add r3._yz_, r7.xxyy, -r7.wwzz | |
| + (p0) frcs r3.x___, r3.w | |
| /* 34 */ (p0) mad r5._y_w, r3.yyzz, r5.yyyy, r7.wwzz | |
| /* 35 */ (p0) subs r3._y__, r5.wy | |
| /* 36 */ (p0) mad r5._y__, r3.yyyy, r3.xxxx, r5.yyyy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 37 */ setp_pop r5.__z_, r5.z | |
| /* 4.0 */ exec // PredicateClean=false | |
| /* 38 */ setp_inv r5.__z_, r5.z | |
| /* 4.1 */ (p0) exec | |
| /* 39 */ (p0) tfetch2D r7.___x, r3.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 40 */ (p0) tfetch2D r7.__x_, r3.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 41 */ (p0) tfetch2D r7._x__, r3.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 42 */ (p0) tfetch2D r7.x___, r3.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 43 */ serialize | |
| (p0) mad r3.x__w, r3.xyyy, c255.zzzz, c255.wwww | |
| /* 44 */ (p0) sge r7, r7.zxyw, r3.zzzz | |
| + (p0) frcs r5._y__, r3.x | |
| /* 5.0 */ (p0) exec | |
| /* 45 */ (p0) add r3._yz_, r7.zzww, -r7.yyxx | |
| + (p0) frcs r3.x___, r3.w | |
| /* 46 */ (p0) mad r5._y_w, r3.yyzz, r5.yyyy, r7.yyxx | |
| /* 47 */ (p0) subs r3._y__, r5.wy | |
| /* 48 */ (p0) mad r5._y__, r3.yyyy, r3.xxxx, r5.yyyy | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 49 */ setp_pop r5.__z_, r5.z | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 50 */ dp2add r2.x___, r5.yyyy, r2.wwww, c255.xxxx | |
| /* 51 */ mad r5._yzw, r4.xxyz, -c13.wwww, r4.xxyz | |
| /* 52 */ mul r5._yzw, r2.xxxx, r5.zzyw | |
| + adds r2.x___, c13.ww | |
| /* 53 */ mad r4.xyz_, r2.xxxx, r4.zxyy, r5.wzyy | |
| /* 54 */ mul r5._yzw, r4.yyzx, r1.xxyz | |
| + maxs r4._, r0.ww | |
| /* 55 */ mul r0.xyz_, r4.yzxx, r0.xyzz | |
| + muls_prev r0.___w, r4.w | |
| /* 7.0 */ exec | |
| /* 56 */ mul r4._yzw, r4.yyzx, r6.xxyz | |
| + mulsc r4.x___, c5.w, r5.x | |
| /* 57 */ mul r4._yzw, r4.yyzw, c0.xxyz | |
| + subsc r5.x___, c255.y, r4.x | |
| /* 58 */ mad r0.xyz_, r0.xyzz, c1.xyzz, -r4.yzww | |
| /* 59 */ mad r4._yzw, r0.wwww, r0.xxyz, r4.yyzw | |
| /* 60 */ mad r5._yzw, r5.yyzw, c2.xxyz, -r4.yyzw | |
| /* 61 */ mad r4._yzw, r5.yyzw, r1.wwww, r4.yyzw | |
| /* 7.1 */ exece | |
| /* 62 */ mul r4._yzw, r5.xxxx, r4.yyzw | |
| /* 63 */ mad r6.xyz_, r4.xxxx, c5.xyzz, r4.yzww | |
| /* 64 */ max oC0, r6, r6 | |
| G> 00000004 Generated vertex shader at 0x00000002096B8B00 (672b): | |
| /* 0.0 */ exec | |
| /* 6 */ vfetch_full r8.zyxw, r0.x, vf0, Offset=5, DataFormat=FMT_8_8_8_8, Stride=14, PrefetchCount=7 | |
| /* 7 */ vfetch_mini r7.xy1_, Offset=6, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 8 */ vfetch_mini r6.xy1_, Offset=8, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 9 */ vfetch_mini r5.xy1_, Offset=10, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 10 */ vfetch_full r4.xy1_, r0.x, vf0, Offset=12, DataFormat=FMT_32_32_FLOAT, Stride=14, Signed=true, NumFormat=integer | |
| /* 11 */ vfetch_full r0.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=14, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 12 */ mul r1, r0.yyyy, c1.xwzy | |
| /* 13 */ mad r1, r0.xxxx, c0.yzxw, r1.wzxy | |
| /* 14 */ mad r1, r0.zzzz, c2.wxyz, r1.wzxy | |
| /* 15 */ mad oPos, r0.wwww, c3, r1.yzwx | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exec | |
| /* 16 */ mul r2, r0.wwww, c7.wxyz | |
| /* 17 */ mul r3, r0.zzzz, c6.wxyz | |
| /* 18 */ mul r10, r0.xxxx, c4.wxyz | |
| /* 19 */ mul r9, r0.yyyy, c5.wxyz | |
| /* 20 */ add r0, r10.wzxy, r9.wzxy | |
| /* 21 */ add r0, r0.wzxy, r3.yxwz | |
| /* 2.1 */ exec | |
| /* 22 */ add r11, r0.wzxy, r2.zwyx | |
| /* 23 */ mul r0, r11.xxxx, c9.wxyz | |
| /* 24 */ mul r1, r11.xxxx, c13.wxyz | |
| /* 25 */ mad r1, r11.zzzz, c12.yzxw, r1.zwyx | |
| /* 26 */ mad r0, r11.zzzz, c8.yzxw, r0.zwyx | |
| /* 27 */ mad r0, r11.yyyy, c10.wxyz, r0.wzxy | |
| /* 3.0 */ exec | |
| /* 28 */ mad r1, r11.yyyy, c14.wxyz, r1.wzxy | |
| /* 29 */ mad r1, r11.wwww, c15, r1.yzwx | |
| /* 30 */ mad r11, r11.wwww, c11, r0.yzwx | |
| /* 31 */ rcp r0.x___, r11.w | |
| /* 32 */ rcp r0._y__, r1.w | |
| /* 33 */ mul r12.xy__, r0.xyyy, c255.xxxx | |
| + maxs r0._, r1.zz | |
| /* 3.1 */ exec | |
| /* 34 */ mad r1.xy__, r12.yyyy, r1.xyyy, c255.xxxx | |
| /* 35 */ add r1.__z_, -r1.yyyy, c255.yyyy | |
| + muls_prev r1.___w, r0.y | |
| /* 36 */ mul r0.___w, r11.zzzz, r0.xxxx | |
| /* 37 */ mad r0.xy__, r12.xxxx, r11.yxxx, c255.xxxx | |
| /* 38 */ subsc r0.__z_, c255.y, r0.x | |
| /* 39 */ add r0.x___, r10.wwww, -c43.xxxx | |
| /* 4.0 */ exec | |
| /* 40 */ add r0.x___, r0.xxxx, r9.wwww | |
| /* 41 */ add o4, r8, r8 | |
| /* 42 */ dp3 o0.x___, c24.xyww, r7.xyzz | |
| /* 43 */ dp3 o0._y__, c25.xyww, r7.xyzz | |
| /* 44 */ dp3 o0.__z_, c28.xyww, r6.xyzz | |
| /* 45 */ dp3 o0.___w, c29.xyww, r6.xyzz | |
| /* 4.1 */ exec | |
| /* 46 */ dp3 o1.x___, c32.xyww, r5.xyzz | |
| /* 47 */ dp3 o1._y__, c33.xyww, r5.xyzz | |
| /* 48 */ dp3 o1.__z_, c36.xyww, r4.xyzz | |
| /* 49 */ dp3 o1.___w, c37.xyww, r4.xyzz | |
| /* 50 */ add r0.x___, r0.xxxx, r3.wwww | |
| /* 51 */ add r0.x___, r0.xxxx, r2.wwww | |
| /* 5.0 */ exece | |
| /* 52 */ mulsc_sat r2.x___, c43.z, r0.x | |
| /* 53 */ max o5._, r0, r0 | |
| + maxs o5.x___, r2.xx | |
| /* 54 */ max o2.xyz1, r0.yzww, r0.yzww | |
| /* 55 */ max o3.xyz_, r1.xzww, r1.xzww | |
| /* 5.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x000000020963A6C0 (828b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r6, r0.xy, tf0 | |
| /* 9 */ tfetch2D r0, r0.zw, tf1 | |
| /* 10 */ tfetch2D r7, r1.xy, tf2 | |
| /* 11 */ tfetch2D r1, r1.zw, tf3 | |
| /* 12 */ serialize | |
| sge r8.xy__, c255.xxxx, r3.xyyy | |
| /* 13 */ sge r5._yzw, r3.xxzy, c255.yyyy | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r3.___w, r8.xxxx, r5.yyyy | |
| /* 15 */ add r3.___w, r3.wwww, r8.yyyy | |
| /* 16 */ add r3.___w, r3.wwww, r5.wwww | |
| /* 17 */ add r5._y__, r3.wwww, r5.zzzz | |
| /* 18 */ setp_ne_push r5.__z_, c255.xxxx, r5.yyyy | |
| /* 19 */ (p0) sge r5._y_w, c255.xxxx, r2.yyxx | |
| /* 1.0 */ exec // PredicateClean=false | |
| /* 20 */ (p0) sge r3.xyz_, r2.yzxx, c255.yyyy | |
| /* 21 */ (p0) add r3.___w, r5.wwww, r3.zzzz | |
| /* 22 */ (p0) add r5._y__, r3.wwww, r5.yyyy | |
| /* 23 */ (p0) add r5._y__, r5.yyyy, r3.xxxx | |
| /* 24 */ (p0) add r5._y__, r5.yyyy, r3.yyyy | |
| /* 25 */ setp_ne_push r5.__z_, r5.zzzz, r5.yyyy | |
| /* 1.1 */ (p0) exec | |
| /* 26 */ (p0) maxs r5._y__, c255.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 27 */ setp_inv r5.__z_, r5.z | |
| /* 2.1 */ (p0) exec | |
| /* 28 */ (p0) tfetch2D r8.___x, r2.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 29 */ (p0) tfetch2D r8.__x_, r2.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 30 */ (p0) tfetch2D r8._x__, r2.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 31 */ (p0) tfetch2D r8.x___, r2.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 32 */ serialize | |
| (p0) mad r3.x__w, r2.xyyy, c255.zzzz, c255.wwww | |
| /* 33 */ (p0) sge r8, r8.ywzx, r2.zzzz | |
| + (p0) frcs r5._y__, r3.x | |
| /* 3.0 */ (p0) exec | |
| /* 34 */ (p0) add r3._yz_, r8.xxyy, -r8.wwzz | |
| + (p0) frcs r3.x___, r3.w | |
| /* 35 */ (p0) mad r5._y_w, r3.yyzz, r5.yyyy, r8.wwzz | |
| /* 36 */ (p0) subs r3._y__, r5.wy | |
| /* 37 */ (p0) mad r5._y__, r3.yyyy, r3.xxxx, r5.yyyy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 38 */ setp_pop r5.__z_, r5.z | |
| /* 4.0 */ exec // PredicateClean=false | |
| /* 39 */ setp_inv r5.__z_, r5.z | |
| /* 4.1 */ (p0) exec | |
| /* 40 */ (p0) tfetch2D r8.___x, r3.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 41 */ (p0) tfetch2D r8.__x_, r3.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 42 */ (p0) tfetch2D r8._x__, r3.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 43 */ (p0) tfetch2D r8.x___, r3.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 44 */ serialize | |
| (p0) mad r3.x__w, r3.xyyy, c255.zzzz, c255.wwww | |
| /* 45 */ (p0) sge r8, r8.zxyw, r3.zzzz | |
| + (p0) frcs r5._y__, r3.x | |
| /* 5.0 */ (p0) exec | |
| /* 46 */ (p0) add r3._yz_, r8.zzww, -r8.yyxx | |
| + (p0) frcs r3.x___, r3.w | |
| /* 47 */ (p0) mad r5._y_w, r3.yyzz, r5.yyyy, r8.yyxx | |
| /* 48 */ (p0) subs r3._y__, r5.wy | |
| /* 49 */ (p0) mad r5._y__, r3.yyyy, r3.xxxx, r5.yyyy | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 50 */ setp_pop r5.__z_, r5.z | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 51 */ dp2add r2.x___, r5.yyyy, r2.wwww, c255.xxxx | |
| /* 52 */ mad r5._yzw, r4.xxyz, -c13.wwww, r4.xxyz | |
| /* 53 */ mul r5._yzw, r2.xxxx, r5.zzyw | |
| + adds r2.x___, c13.ww | |
| /* 54 */ mad r4.xyz_, r2.xxxx, r4.zxyy, r5.wzyy | |
| /* 55 */ mul r5._yzw, r4.yyzx, r1.xxyz | |
| /* 56 */ mul r1.xyz_, r4.yzxx, r7.xyzz | |
| + maxs r4._, r0.ww | |
| /* 7.0 */ exec | |
| /* 57 */ mul r0.xyz_, r4.yzxx, r0.xyzz | |
| + muls_prev r0.___w, r4.w | |
| /* 58 */ mul r4._yzw, r4.yyzx, r6.xxyz | |
| + mulsc r4.x___, c5.w, r5.x | |
| /* 59 */ mul r4._yzw, r4.yyzw, c0.xxyz | |
| + subsc r5.x___, c255.y, r4.x | |
| /* 60 */ mad r0.xyz_, r0.xyzz, c1.xyzz, -r4.yzww | |
| /* 61 */ mad r4._yzw, r0.wwww, r0.xxyz, r4.yyzw | |
| /* 62 */ mad r0.xyz_, r1.xyzz, c2.xyzz, -r4.yzww | |
| /* 7.1 */ exece | |
| /* 63 */ mad r4._yzw, r0.xxyz, r7.wwww, r4.yyzw | |
| /* 64 */ mad r5._yzw, r5.yyzw, c3.xxyz, -r4.yyzw | |
| /* 65 */ mad r4._yzw, r5.yyzw, r1.wwww, r4.yyzw | |
| /* 66 */ mul r4._yzw, r5.xxxx, r4.yyzw | |
| /* 67 */ mad r6.xyz_, r4.xxxx, c5.xyzz, r4.yzww | |
| /* 68 */ max oC0, r6, r6 | |
| G> 00000004 Generated pixel shader at 0x000000020967B1C0 (720b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r5, r0.xy, tf0 | |
| /* 9 */ tfetch2D r4.__w_, r0.zw, tf1 | |
| /* 10 */ serialize | |
| sge r4._y_w, c255.xxxx, r2.xxyy | |
| /* 11 */ sge r0.xyz_, r2.xzyy, c255.yyyy | |
| /* 12 */ add r0.___w, r4.yyyy, r0.xxxx | |
| /* 13 */ add r4._y__, r0.wwww, r4.wwww | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r4._y__, r4.yyyy, r0.zzzz | |
| /* 15 */ add r4._y__, r4.yyyy, r0.yyyy | |
| /* 16 */ setp_ne_push r4.___w, c255.xxxx, r4.yyyy | |
| /* 17 */ (p0) sge r2.xy__, c255.xxxx, r1.yxxx | |
| /* 18 */ (p0) sge r0.xyz_, r1.yzxx, c255.yyyy | |
| /* 19 */ (p0) add r4._y__, r2.yyyy, r0.zzzz | |
| /* 1.0 */ exec // PredicateClean=false | |
| /* 20 */ (p0) add r4._y__, r4.yyyy, r2.xxxx | |
| /* 21 */ (p0) add r4._y__, r4.yyyy, r0.xxxx | |
| /* 22 */ (p0) add r4._y__, r4.yyyy, r0.yyyy | |
| /* 23 */ setp_ne_push r4.___w, r4.wwww, r4.yyyy | |
| /* 1.1 */ (p0) exec | |
| /* 24 */ (p0) maxs r4._y__, c255.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 25 */ setp_inv r4.___w, r4.w | |
| /* 2.1 */ (p0) exec | |
| /* 26 */ (p0) tfetch2D r0.___x, r1.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 27 */ (p0) tfetch2D r0.__x_, r1.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 28 */ (p0) tfetch2D r0._x__, r1.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 29 */ (p0) tfetch2D r0.x___, r1.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 30 */ serialize | |
| (p0) mad r6.xy__, r1.xyyy, c255.zzzz, c255.wwww | |
| /* 31 */ (p0) sge r0, r0.ywzx, r1.zzzz | |
| + (p0) frcs r2.x___, r6.x | |
| /* 3.0 */ (p0) exec | |
| /* 32 */ (p0) add r2._yz_, r0.xxyy, -r0.wwzz | |
| + (p0) frcs r4._y__, r6.y | |
| /* 33 */ (p0) mad r0.xy__, r2.yzzz, r2.xxxx, r0.wzzz | |
| /* 34 */ (p0) subs r0.__z_, r0.yx | |
| /* 35 */ (p0) mad r4._y__, r0.zzzz, r4.yyyy, r0.xxxx | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 36 */ setp_pop r4.___w, r4.w | |
| /* 4.0 */ exec // PredicateClean=false | |
| /* 37 */ setp_inv r4.___w, r4.w | |
| /* 4.1 */ (p0) exec | |
| /* 38 */ (p0) tfetch2D r0.___x, r2.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 39 */ (p0) tfetch2D r0.__x_, r2.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 40 */ (p0) tfetch2D r0._x__, r2.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 41 */ (p0) tfetch2D r0.x___, r2.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 42 */ serialize | |
| (p0) mad r6.xy__, r2.xyyy, c255.zzzz, c255.wwww | |
| /* 43 */ (p0) sge r0, r0.zxyw, r2.zzzz | |
| + (p0) frcs r2.x___, r6.x | |
| /* 5.0 */ (p0) exec | |
| /* 44 */ (p0) add r2._yz_, r0.zzww, -r0.yyxx | |
| + (p0) frcs r4._y__, r6.y | |
| /* 45 */ (p0) mad r0.xy__, r2.yzzz, r2.xxxx, r0.yxxx | |
| /* 46 */ (p0) subs r0.__z_, r0.yx | |
| /* 47 */ (p0) mad r4._y__, r0.zzzz, r4.yyyy, r0.xxxx | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 48 */ setp_pop r4.___w, r4.w | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 49 */ dp2add r4._y__, r4.yyyy, r1.wwww, c255.xxxx | |
| /* 50 */ mad r0.xyz_, r3.xyzz, -c13.wwww, r3.xyzz | |
| /* 51 */ mul r0.xyz_, r4.yyyy, r0.yxzz | |
| + adds r4._y__, c13.ww | |
| /* 52 */ mad r3.xyz_, r4.yyyy, r3.zxyy, r0.zyxx | |
| /* 53 */ mul r3.xyz_, r3.yzxx, r5.xyzz | |
| /* 54 */ mul r0.xyz_, r3.xyzz, c0.xyzz | |
| + mulsc r3.x___, c5.w, r4.x | |
| /* 7.0 */ exece | |
| /* 55 */ mul r3._yzw, r0.yyxz, r3.wwww | |
| + subsc r4.x___, c255.y, r3.x | |
| /* 56 */ mad r3._yzw, r3.zzyw, r4.zzzz, r0.xxyz | |
| /* 57 */ mul r3._yzw, r4.xxxx, r3.yyzw | |
| /* 58 */ mad r5.xyz_, r3.xxxx, c5.xyzz, r3.yzww | |
| /* 59 */ max oC0, r5, r5 | |
| /* 7.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x0000000209682320 (744b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r5, r0.xy, tf0 | |
| /* 9 */ tfetch2D r0, r0.zw, tf1 | |
| /* 10 */ serialize | |
| sge r6.xy__, c255.xxxx, r2.xyyy | |
| /* 11 */ sge r4._yzw, r2.xxzy, c255.yyyy | |
| /* 12 */ add r2.___w, r6.xxxx, r4.yyyy | |
| /* 13 */ add r2.___w, r2.wwww, r6.yyyy | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r2.___w, r2.wwww, r4.wwww | |
| /* 15 */ add r4._y__, r2.wwww, r4.zzzz | |
| /* 16 */ setp_ne_push r4.__z_, c255.xxxx, r4.yyyy | |
| /* 17 */ (p0) sge r4._y_w, c255.xxxx, r1.yyxx | |
| /* 18 */ (p0) sge r2.xyz_, r1.yzxx, c255.yyyy | |
| /* 19 */ (p0) add r2.___w, r4.wwww, r2.zzzz | |
| /* 1.0 */ exec // PredicateClean=false | |
| /* 20 */ (p0) add r4._y__, r2.wwww, r4.yyyy | |
| /* 21 */ (p0) add r4._y__, r4.yyyy, r2.xxxx | |
| /* 22 */ (p0) add r4._y__, r4.yyyy, r2.yyyy | |
| /* 23 */ setp_ne_push r4.__z_, r4.zzzz, r4.yyyy | |
| /* 1.1 */ (p0) exec | |
| /* 24 */ (p0) maxs r4._y__, c255.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 25 */ setp_inv r4.__z_, r4.z | |
| /* 2.1 */ (p0) exec | |
| /* 26 */ (p0) tfetch2D r6.___x, r1.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 27 */ (p0) tfetch2D r6.__x_, r1.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 28 */ (p0) tfetch2D r6._x__, r1.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 29 */ (p0) tfetch2D r6.x___, r1.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 30 */ serialize | |
| (p0) mad r2.x__w, r1.xyyy, c255.zzzz, c255.wwww | |
| /* 31 */ (p0) sge r6, r6.ywzx, r1.zzzz | |
| + (p0) frcs r4._y__, r2.x | |
| /* 3.0 */ (p0) exec | |
| /* 32 */ (p0) add r2._yz_, r6.xxyy, -r6.wwzz | |
| + (p0) frcs r2.x___, r2.w | |
| /* 33 */ (p0) mad r4._y_w, r2.yyzz, r4.yyyy, r6.wwzz | |
| /* 34 */ (p0) subs r2._y__, r4.wy | |
| /* 35 */ (p0) mad r4._y__, r2.yyyy, r2.xxxx, r4.yyyy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 36 */ setp_pop r4.__z_, r4.z | |
| /* 4.0 */ exec // PredicateClean=false | |
| /* 37 */ setp_inv r4.__z_, r4.z | |
| /* 4.1 */ (p0) exec | |
| /* 38 */ (p0) tfetch2D r6.___x, r2.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 39 */ (p0) tfetch2D r6.__x_, r2.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 40 */ (p0) tfetch2D r6._x__, r2.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 41 */ (p0) tfetch2D r6.x___, r2.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 42 */ serialize | |
| (p0) mad r2.x__w, r2.xyyy, c255.zzzz, c255.wwww | |
| /* 43 */ (p0) sge r6, r6.zxyw, r2.zzzz | |
| + (p0) frcs r4._y__, r2.x | |
| /* 5.0 */ (p0) exec | |
| /* 44 */ (p0) add r2._yz_, r6.zzww, -r6.yyxx | |
| + (p0) frcs r2.x___, r2.w | |
| /* 45 */ (p0) mad r4._y_w, r2.yyzz, r4.yyyy, r6.yyxx | |
| /* 46 */ (p0) subs r2._y__, r4.wy | |
| /* 47 */ (p0) mad r4._y__, r2.yyyy, r2.xxxx, r4.yyyy | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 48 */ setp_pop r4.__z_, r4.z | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 49 */ mul oC0.___w, r5.wwww, r3.wwww | |
| /* 50 */ mul r0.___w, r0.wwww, r3.wwww | |
| /* 51 */ dp2add r3.___w, r4.yyyy, r1.wwww, c255.xxxx | |
| /* 52 */ mad r4._yzw, r3.xxyz, -c13.wwww, r3.xxyz | |
| /* 53 */ mul r4._yzw, r3.wwww, r4.zzyw | |
| + adds r3.___w, c13.ww | |
| /* 54 */ mad r3.xyz_, r3.wwww, r3.zxyy, r4.wzyy | |
| /* 7.0 */ exec | |
| /* 55 */ mul r4._yzw, r3.yyzx, r0.xxyz | |
| /* 56 */ mul r3._yzw, r3.yyzx, r5.xxyz | |
| + mulsc r3.x___, c5.w, r4.x | |
| /* 57 */ mul r3._yzw, r3.yyzw, c0.xxyz | |
| + subsc r4.x___, c255.y, r3.x | |
| /* 58 */ mad r4._yzw, r4.yyzw, c1.xxyz, -r3.yyzw | |
| /* 59 */ mad r3._yzw, r0.wwww, r4.yyzw, r3.yyzw | |
| /* 60 */ mul r3._yzw, r4.xxxx, r3.yyzw | |
| /* 7.1 */ exece | |
| /* 61 */ mad oC0.xyz_, r3.xxxx, c5.xyzz, r3.yzww | |
| G> 00000004 Generated pixel shader at 0x0000000209660CE0 (780b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r6, r0.xy, tf0 | |
| /* 9 */ tfetch2D r0.xyz_, r0.zw, tf1 | |
| /* 10 */ tfetch2D r1, r1.xy, tf2 | |
| /* 11 */ serialize | |
| sge r7.xy__, c255.xxxx, r3.xyyy | |
| /* 12 */ sge r5._yzw, r3.xxzy, c255.yyyy | |
| /* 13 */ add r0.___w, r7.xxxx, r5.yyyy | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r0.___w, r0.wwww, r7.yyyy | |
| /* 15 */ add r0.___w, r0.wwww, r5.wwww | |
| /* 16 */ add r5._y__, r0.wwww, r5.zzzz | |
| /* 17 */ setp_ne_push r5.__z_, c255.xxxx, r5.yyyy | |
| /* 18 */ (p0) sge r5._y_w, c255.xxxx, r2.yyxx | |
| /* 19 */ (p0) sge r3.xyz_, r2.yzxx, c255.yyyy | |
| /* 1.0 */ exec // PredicateClean=false | |
| /* 20 */ (p0) add r0.___w, r5.wwww, r3.zzzz | |
| /* 21 */ (p0) add r5._y__, r0.wwww, r5.yyyy | |
| /* 22 */ (p0) add r5._y__, r5.yyyy, r3.xxxx | |
| /* 23 */ (p0) add r5._y__, r5.yyyy, r3.yyyy | |
| /* 24 */ setp_ne_push r5.__z_, r5.zzzz, r5.yyyy | |
| /* 1.1 */ (p0) exec | |
| /* 25 */ (p0) maxs r5._y__, c255.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 26 */ setp_inv r5.__z_, r5.z | |
| /* 2.1 */ (p0) exec | |
| /* 27 */ (p0) tfetch2D r3.___x, r2.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 28 */ (p0) tfetch2D r3.__x_, r2.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 29 */ (p0) tfetch2D r3._x__, r2.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 30 */ (p0) tfetch2D r3.x___, r2.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 31 */ serialize | |
| (p0) mad r7.__zw, r2.xxxy, c255.zzzz, c255.wwww | |
| /* 32 */ (p0) sge r3, r3.ywzx, r2.zzzz | |
| + (p0) frcs r5._y__, r7.z | |
| /* 3.0 */ (p0) exec | |
| /* 33 */ (p0) add r7.xy__, r3.xyyy, -r3.wzzz | |
| + (p0) frcs r0.___w, r7.w | |
| /* 34 */ (p0) mad r5._y_w, r7.xxyy, r5.yyyy, r3.wwzz | |
| /* 35 */ (p0) subs r3.x___, r5.wy | |
| /* 36 */ (p0) mad r5._y__, r3.xxxx, r0.wwww, r5.yyyy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 37 */ setp_pop r5.__z_, r5.z | |
| /* 4.0 */ exec // PredicateClean=false | |
| /* 38 */ setp_inv r5.__z_, r5.z | |
| /* 4.1 */ (p0) exec | |
| /* 39 */ (p0) tfetch2D r8.___x, r3.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 40 */ (p0) tfetch2D r8.__x_, r3.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 41 */ (p0) tfetch2D r8._x__, r3.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 42 */ (p0) tfetch2D r8.x___, r3.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 43 */ serialize | |
| (p0) mad r7.__zw, r3.xxxy, c255.zzzz, c255.wwww | |
| /* 44 */ (p0) sge r3, r8.zxyw, r3.zzzz | |
| + (p0) frcs r5._y__, r7.z | |
| /* 5.0 */ (p0) exec | |
| /* 45 */ (p0) add r7.xy__, r3.zwww, -r3.yxxx | |
| + (p0) frcs r0.___w, r7.w | |
| /* 46 */ (p0) mad r5._y_w, r7.xxyy, r5.yyyy, r3.yyxx | |
| /* 47 */ (p0) subs r3.x___, r5.wy | |
| /* 48 */ (p0) mad r5._y__, r3.xxxx, r0.wwww, r5.yyyy | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 49 */ setp_pop r5.__z_, r5.z | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 50 */ dp2add r0.___w, r5.yyyy, r2.wwww, c255.xxxx | |
| /* 51 */ mad r5._yzw, r4.xxyz, -c13.wwww, r4.xxyz | |
| /* 52 */ mul r5._yzw, r0.wwww, r5.zzyw | |
| + adds r0.___w, c13.ww | |
| /* 53 */ mad r4.xyz_, r0.wwww, r4.zxyy, r5.wzyy | |
| /* 54 */ mul r5._yzw, r4.yyzx, r1.xxyz | |
| + maxs r4._, r1.ww | |
| /* 55 */ mul r0._yzw, r4.yyzx, r0.xxyz | |
| + muls_prev r0.x___, r4.w | |
| /* 7.0 */ exec | |
| /* 56 */ mul r4._yzw, r4.yyzx, r6.xxyz | |
| + mulsc r4.x___, c5.w, r5.x | |
| /* 57 */ mul r4._yzw, r4.yyzw, c0.xxyz | |
| + subsc r5.x___, c255.y, r4.x | |
| /* 58 */ mad r0._yzw, r0.yyzw, c1.xxyz, -r4.yyzw | |
| /* 59 */ mad r4._yzw, r0.yyzw, r6.wwww, r4.yyzw | |
| /* 60 */ mad r5._yzw, r5.yyzw, c2.xxyz, -r4.yyzw | |
| /* 61 */ mad r4._yzw, r0.xxxx, r5.yyzw, r4.yyzw | |
| /* 7.1 */ exece | |
| /* 62 */ mul r4._yzw, r5.xxxx, r4.yyzw | |
| /* 63 */ mad r6.xyz_, r4.xxxx, c5.xyzz, r4.yzww | |
| /* 64 */ max oC0, r6, r6 | |
| G> 00000004 Generated pixel shader at 0x0000000209661000 (780b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r6, r0.xy, tf0 | |
| /* 9 */ tfetch2D r5._xyz, r0.zw, tf1 | |
| /* 10 */ tfetch2D r0, r1.xy, tf2 | |
| /* 11 */ serialize | |
| sge r7.xy__, c255.xxxx, r3.xyyy | |
| /* 12 */ sge r1.xyz_, r3.xzyy, c255.yyyy | |
| /* 13 */ add r1.___w, r7.xxxx, r1.xxxx | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r1.___w, r1.wwww, r7.yyyy | |
| /* 15 */ add r1.___w, r1.wwww, r1.zzzz | |
| /* 16 */ add r1.x___, r1.wwww, r1.yyyy | |
| /* 17 */ setp_ne_push r1.x___, c255.xxxx, r1.xxxx | |
| /* 18 */ (p0) sge r3.xy__, c255.xxxx, r2.yxxx | |
| /* 19 */ (p0) sge r1._yzw, r2.yyzx, c255.yyyy | |
| /* 1.0 */ exec // PredicateClean=false | |
| /* 20 */ (p0) add r3.__z_, r3.yyyy, r1.wwww | |
| /* 21 */ (p0) add r3.x___, r3.zzzz, r3.xxxx | |
| /* 22 */ (p0) add r3.x___, r3.xxxx, r1.yyyy | |
| /* 23 */ (p0) add r1._y__, r3.xxxx, r1.zzzz | |
| /* 24 */ setp_ne_push r1.x___, r1.xxxx, r1.yyyy | |
| /* 1.1 */ (p0) exec | |
| /* 25 */ (p0) maxs r4.___w, c255.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 26 */ setp_inv r1.x___, r1.x | |
| /* 2.1 */ (p0) exec | |
| /* 27 */ (p0) tfetch2D r3.___x, r2.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 28 */ (p0) tfetch2D r3.__x_, r2.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 29 */ (p0) tfetch2D r3._x__, r2.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 30 */ (p0) tfetch2D r3.x___, r2.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 31 */ serialize | |
| (p0) mad r7.xy__, r2.xyyy, c255.zzzz, c255.wwww | |
| /* 32 */ (p0) sge r3, r3.ywzx, r2.zzzz | |
| + (p0) frcs r1._y__, r7.x | |
| /* 3.0 */ (p0) exec | |
| /* 33 */ (p0) add r1.__zw, r3.xxxy, -r3.wwwz | |
| + (p0) frcs r4.___w, r7.y | |
| /* 34 */ (p0) mad r1._yz_, r1.zzww, r1.yyyy, r3.wwzz | |
| /* 35 */ (p0) subs r1.___w, r1.zy | |
| /* 36 */ (p0) mad r4.___w, r1.wwww, r4.wwww, r1.yyyy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 37 */ setp_pop r1.x___, r1.x | |
| /* 4.0 */ exec // PredicateClean=false | |
| /* 38 */ setp_inv r1.x___, r1.x | |
| /* 4.1 */ (p0) exec | |
| /* 39 */ (p0) tfetch2D r8.___x, r3.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 40 */ (p0) tfetch2D r8.__x_, r3.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 41 */ (p0) tfetch2D r8._x__, r3.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 42 */ (p0) tfetch2D r8.x___, r3.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 43 */ serialize | |
| (p0) mad r7.xy__, r3.xyyy, c255.zzzz, c255.wwww | |
| /* 44 */ (p0) sge r3, r8.zxyw, r3.zzzz | |
| + (p0) frcs r1._y__, r7.x | |
| /* 5.0 */ (p0) exec | |
| /* 45 */ (p0) add r1.__zw, r3.zzzw, -r3.yyyx | |
| + (p0) frcs r4.___w, r7.y | |
| /* 46 */ (p0) mad r1._yz_, r1.zzww, r1.yyyy, r3.yyxx | |
| /* 47 */ (p0) subs r1.___w, r1.zy | |
| /* 48 */ (p0) mad r4.___w, r1.wwww, r4.wwww, r1.yyyy | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 49 */ setp_pop r1.x___, r1.x | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 50 */ dp2add r4.___w, r4.wwww, r2.wwww, c255.xxxx | |
| /* 51 */ mad r1.xyz_, r4.xyzz, -c13.wwww, r4.xyzz | |
| /* 52 */ mul r1.xyz_, r4.wwww, r1.yxzz | |
| + adds r4.___w, c13.ww | |
| /* 53 */ mad r4.xyz_, r4.wwww, r4.zxyy, r1.zyxx | |
| /* 54 */ mul r0.xyz_, r4.yzxx, r0.xyzz | |
| /* 55 */ mul r5._yzw, r4.yyzx, r5.yyzw | |
| /* 7.0 */ exec | |
| /* 56 */ mul r4._yzw, r4.yyzx, r6.xxyz | |
| + mulsc r4.x___, c5.w, r5.x | |
| /* 57 */ mul r4._yzw, r4.yyzw, c0.xxyz | |
| + subsc r5.x___, c255.y, r4.x | |
| /* 58 */ mad r5._yzw, r5.yyzw, c1.xxyz, -r4.yyzw | |
| /* 59 */ mad r4._yzw, r5.yyzw, r6.wwww, r4.yyzw | |
| /* 60 */ mad r5._yzw, r0.xxyz, c2.xxyz, -r4.yyzw | |
| /* 61 */ mad r4._yzw, r5.yyzw, r0.wwww, r4.yyzw | |
| /* 7.1 */ exece | |
| /* 62 */ mul r4._yzw, r5.xxxx, r4.yyzw | |
| /* 63 */ mad r6.xyz_, r4.xxxx, c5.xyzz, r4.yzww | |
| /* 64 */ max oC0, r6, r6 | |
| G> 00000004 Generated pixel shader at 0x000000020963ED00 (828b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r6, r0.xy, tf0 | |
| /* 9 */ tfetch2D r5._xyz, r0.zw, tf1 | |
| /* 10 */ tfetch2D r7, r1.xy, tf2 | |
| /* 11 */ tfetch2D r0, r1.zw, tf3 | |
| /* 12 */ serialize | |
| sge r8.xy__, c255.xxxx, r3.xyyy | |
| /* 13 */ sge r1.xyz_, r3.xzyy, c255.yyyy | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r1.___w, r8.xxxx, r1.xxxx | |
| /* 15 */ add r1.___w, r1.wwww, r8.yyyy | |
| /* 16 */ add r1.___w, r1.wwww, r1.zzzz | |
| /* 17 */ add r1.x___, r1.wwww, r1.yyyy | |
| /* 18 */ setp_ne_push r1._y__, c255.xxxx, r1.xxxx | |
| /* 19 */ (p0) sge r3.xy__, c255.xxxx, r2.yxxx | |
| /* 1.0 */ exec // PredicateClean=false | |
| /* 20 */ (p0) sge r1.x_zw, r2.yzzx, c255.yyyy | |
| /* 21 */ (p0) add r3.__z_, r3.yyyy, r1.wwww | |
| /* 22 */ (p0) add r3.x___, r3.zzzz, r3.xxxx | |
| /* 23 */ (p0) add r3.x___, r3.xxxx, r1.xxxx | |
| /* 24 */ (p0) add r1.x___, r3.xxxx, r1.zzzz | |
| /* 25 */ setp_ne_push r1._y__, r1.yyyy, r1.xxxx | |
| /* 1.1 */ (p0) exec | |
| /* 26 */ (p0) maxs r1.x___, c255.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 27 */ setp_inv r1._y__, r1.y | |
| /* 2.1 */ (p0) exec | |
| /* 28 */ (p0) tfetch2D r3.___x, r2.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 29 */ (p0) tfetch2D r3.__x_, r2.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 30 */ (p0) tfetch2D r3._x__, r2.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 31 */ (p0) tfetch2D r3.x___, r2.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 32 */ serialize | |
| (p0) mad r1.__zw, r2.xxxy, c255.zzzz, c255.wwww | |
| /* 33 */ (p0) sge r3, r3.ywzx, r2.zzzz | |
| + (p0) frcs r1.x___, r1.z | |
| /* 3.0 */ (p0) exec | |
| /* 34 */ (p0) add r8.xy__, r3.xyyy, -r3.wzzz | |
| + (p0) frcs r1.___w, r1.w | |
| /* 35 */ (p0) mad r1.x_z_, r8.xyyy, r1.xxxx, r3.wzzz | |
| /* 36 */ (p0) subs r3.x___, r1.zx | |
| /* 37 */ (p0) mad r1.x___, r3.xxxx, r1.wwww, r1.xxxx | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 38 */ setp_pop r1._y__, r1.y | |
| /* 4.0 */ exec // PredicateClean=false | |
| /* 39 */ setp_inv r1._y__, r1.y | |
| /* 4.1 */ (p0) exec | |
| /* 40 */ (p0) tfetch2D r8.___x, r3.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 41 */ (p0) tfetch2D r8.__x_, r3.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 42 */ (p0) tfetch2D r8._x__, r3.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 43 */ (p0) tfetch2D r8.x___, r3.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 44 */ serialize | |
| (p0) mad r1.__zw, r3.xxxy, c255.zzzz, c255.wwww | |
| /* 45 */ (p0) sge r3, r8.zxyw, r3.zzzz | |
| + (p0) frcs r1.x___, r1.z | |
| /* 5.0 */ (p0) exec | |
| /* 46 */ (p0) add r8.xy__, r3.zwww, -r3.yxxx | |
| + (p0) frcs r1.___w, r1.w | |
| /* 47 */ (p0) mad r1.x_z_, r8.xyyy, r1.xxxx, r3.yxxx | |
| /* 48 */ (p0) subs r3.x___, r1.zx | |
| /* 49 */ (p0) mad r1.x___, r3.xxxx, r1.wwww, r1.xxxx | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 50 */ setp_pop r1._y__, r1.y | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 51 */ dp2add r1.___w, r1.xxxx, r2.wwww, c255.xxxx | |
| /* 52 */ mad r1.xyz_, r4.xyzz, -c13.wwww, r4.xyzz | |
| /* 53 */ mul r1.xyz_, r1.wwww, r1.yxzz | |
| + adds r1.___w, c13.ww | |
| /* 54 */ mad r4.xyz_, r1.wwww, r4.zxyy, r1.zyxx | |
| /* 55 */ mul r1.xyz_, r4.yzxx, r0.xyzz | |
| /* 56 */ mul r2.xyz_, r4.yzxx, r7.xyzz | |
| + maxs r4._, r0.ww | |
| /* 7.0 */ exec | |
| /* 57 */ mul r5._yzw, r4.yyzx, r5.yyzw | |
| + muls_prev r0.x___, r4.w | |
| /* 58 */ mul r4._yzw, r4.yyzx, r6.xxyz | |
| + mulsc r4.x___, c5.w, r5.x | |
| /* 59 */ mul r4._yzw, r4.yyzw, c0.xxyz | |
| + subsc r5.x___, c255.y, r4.x | |
| /* 60 */ mad r5._yzw, r5.yyzw, c1.xxyz, -r4.yyzw | |
| /* 61 */ mad r4._yzw, r5.yyzw, r6.wwww, r4.yyzw | |
| /* 62 */ mad r5._yzw, r2.xxyz, c2.xxyz, -r4.yyzw | |
| /* 7.1 */ exece | |
| /* 63 */ mad r4._yzw, r5.yyzw, r7.wwww, r4.yyzw | |
| /* 64 */ mad r5._yzw, r1.xxyz, c3.xxyz, -r4.yyzw | |
| /* 65 */ mad r4._yzw, r0.xxxx, r5.yyzw, r4.yyzw | |
| /* 66 */ mul r4._yzw, r5.xxxx, r4.yyzw | |
| /* 67 */ mad r6.xyz_, r4.xxxx, c5.xyzz, r4.yzww | |
| /* 68 */ max oC0, r6, r6 | |
| G> 00000004 Generated pixel shader at 0x00000002096785C0 (732b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r5, r0.xy, tf0 | |
| /* 9 */ tfetch2D r0, r0.zw, tf1 | |
| /* 10 */ serialize | |
| sge r6.xy__, c255.xxxx, r2.xyyy | |
| /* 11 */ sge r4._yzw, r2.xxzy, c255.yyyy | |
| /* 12 */ add r2.___w, r6.xxxx, r4.yyyy | |
| /* 13 */ add r2.___w, r2.wwww, r6.yyyy | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r2.___w, r2.wwww, r4.wwww | |
| /* 15 */ add r4._y__, r2.wwww, r4.zzzz | |
| /* 16 */ setp_ne_push r4.__z_, c255.xxxx, r4.yyyy | |
| /* 17 */ (p0) sge r4._y_w, c255.xxxx, r1.yyxx | |
| /* 18 */ (p0) sge r2.xyz_, r1.yzxx, c255.yyyy | |
| /* 19 */ (p0) add r2.___w, r4.wwww, r2.zzzz | |
| /* 1.0 */ exec // PredicateClean=false | |
| /* 20 */ (p0) add r4._y__, r2.wwww, r4.yyyy | |
| /* 21 */ (p0) add r4._y__, r4.yyyy, r2.xxxx | |
| /* 22 */ (p0) add r4._y__, r4.yyyy, r2.yyyy | |
| /* 23 */ setp_ne_push r4.__z_, r4.zzzz, r4.yyyy | |
| /* 1.1 */ (p0) exec | |
| /* 24 */ (p0) maxs r4._y__, c255.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 25 */ setp_inv r4.__z_, r4.z | |
| /* 2.1 */ (p0) exec | |
| /* 26 */ (p0) tfetch2D r6.___x, r1.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 27 */ (p0) tfetch2D r6.__x_, r1.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 28 */ (p0) tfetch2D r6._x__, r1.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 29 */ (p0) tfetch2D r6.x___, r1.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 30 */ serialize | |
| (p0) mad r2.x__w, r1.xyyy, c255.zzzz, c255.wwww | |
| /* 31 */ (p0) sge r6, r6.ywzx, r1.zzzz | |
| + (p0) frcs r4._y__, r2.x | |
| /* 3.0 */ (p0) exec | |
| /* 32 */ (p0) add r2._yz_, r6.xxyy, -r6.wwzz | |
| + (p0) frcs r2.x___, r2.w | |
| /* 33 */ (p0) mad r4._y_w, r2.yyzz, r4.yyyy, r6.wwzz | |
| /* 34 */ (p0) subs r2._y__, r4.wy | |
| /* 35 */ (p0) mad r4._y__, r2.yyyy, r2.xxxx, r4.yyyy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 36 */ setp_pop r4.__z_, r4.z | |
| /* 4.0 */ exec // PredicateClean=false | |
| /* 37 */ setp_inv r4.__z_, r4.z | |
| /* 4.1 */ (p0) exec | |
| /* 38 */ (p0) tfetch2D r6.___x, r2.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 39 */ (p0) tfetch2D r6.__x_, r2.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 40 */ (p0) tfetch2D r6._x__, r2.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 41 */ (p0) tfetch2D r6.x___, r2.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 42 */ serialize | |
| (p0) mad r2.x__w, r2.xyyy, c255.zzzz, c255.wwww | |
| /* 43 */ (p0) sge r6, r6.zxyw, r2.zzzz | |
| + (p0) frcs r4._y__, r2.x | |
| /* 5.0 */ (p0) exec | |
| /* 44 */ (p0) add r2._yz_, r6.zzww, -r6.yyxx | |
| + (p0) frcs r2.x___, r2.w | |
| /* 45 */ (p0) mad r4._y_w, r2.yyzz, r4.yyyy, r6.yyxx | |
| /* 46 */ (p0) subs r2._y__, r4.wy | |
| /* 47 */ (p0) mad r4._y__, r2.yyyy, r2.xxxx, r4.yyyy | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 48 */ setp_pop r4.__z_, r4.z | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 49 */ mul oC0.___w, r5.wwww, r3.wwww | |
| /* 50 */ dp2add r3.___w, r4.yyyy, r1.wwww, c255.xxxx | |
| /* 51 */ mad r4._yzw, r3.xxyz, -c13.wwww, r3.xxyz | |
| /* 52 */ mul r4._yzw, r3.wwww, r4.zzyw | |
| + adds r3.___w, c13.ww | |
| /* 53 */ mad r3.xyz_, r3.wwww, r3.zxyy, r4.wzyy | |
| /* 54 */ mul r4._yzw, r3.yyzx, r0.xxyz | |
| /* 7.0 */ exece | |
| /* 55 */ mul r3._yzw, r3.yyzx, r5.xxyz | |
| + mulsc r3.x___, c5.w, r4.x | |
| /* 56 */ mul r3._yzw, r3.yyzw, c0.xxyz | |
| + subsc r4.x___, c255.y, r3.x | |
| /* 57 */ mad r4._yzw, r4.yyzw, c1.xxyz, -r3.yyzw | |
| /* 58 */ mad r3._yzw, r4.yyzw, r0.wwww, r3.yyzw | |
| /* 59 */ mul r3._yzw, r4.xxxx, r3.yyzw | |
| /* 60 */ mad oC0.xyz_, r3.xxxx, c5.xyzz, r3.yzww | |
| /* 7.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x0000000209691480 (96b): | |
| /* 0.0 */ exec | |
| /* 2 */ tfetch2D r3.w___, r0.xy, tf0 | |
| /* 0.1 */ alloc colors | |
| /* 1.0 */ exece | |
| /* 3 */ mulsc r3._y__, c5.w, r4.x | |
| /* 4 */ mul r4.___w, r3.xxxx, r3.wwww | |
| + subsc r3.x___, c255.x, r3.y | |
| /* 5 */ mul r3.x___, r4.wwww, r3.xxxx | |
| /* 6 */ mad r4.xyz_, r3.yyyy, c5.xyzz, r3.xxxx | |
| /* 7 */ max oC0, r4, r4 | |
| /* 1.1 */ cnop | |
| G> 00000004 Generated vertex shader at 0x00000002096D6F20 (924b): | |
| /* 0.0 */ exec | |
| /* 7 */ vfetch_full r14.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=5, Signed=true, NumFormat=integer, PrefetchCount=5 | |
| /* 8 */ vfetch_mini r0._xzy, Offset=3, DataFormat=FMT_2_10_10_10, Signed=true | |
| /* 9 */ vfetch_mini r11._xyz, Offset=4, DataFormat=FMT_2_10_10_10, Signed=true | |
| /* 10 */ vfetch_full r6.___w, r0.x, vf1, DataFormat=FMT_8_8_8_8, Stride=7, PrefetchCount=5 | |
| /* 11 */ vfetch_mini r10.xy1_, Offset=1, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 12 */ vfetch_mini r9.xy1_, Offset=3, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 13 */ mul r1, r14.yyyy, c1.wxyz | |
| /* 14 */ mad r1, r14.xxxx, c0.zywx, r1.wzxy | |
| /* 15 */ mad r1, r14.zzzz, c2.xwzy, r1.wzxy | |
| /* 16 */ mad oPos, r14.wwww, c3, r1.xwzy | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exec | |
| /* 17 */ mul r7, r14.wwww, c7.wxyz | |
| /* 18 */ mul r8, r14.zzzz, c6.wxyz | |
| /* 19 */ mul r13, r14.xxxx, c4.wxyz | |
| /* 20 */ mul r12, r14.yyyy, c5.wxyz | |
| /* 21 */ add r1, r13.wzxy, r12.wzxy | |
| /* 22 */ add r1, r1.wzxy, r8.yxwz | |
| /* 2.1 */ exec | |
| /* 23 */ add r3, r1.wzxy, r7.zwyx | |
| /* 24 */ mul r1, r3.xxxx, c9.wxyz | |
| /* 25 */ mul r2, r3.xxxx, c13.wxyz | |
| /* 26 */ mad r2, r3.zzzz, c12.yzxw, r2.zwyx | |
| /* 27 */ mad r1, r3.zzzz, c8.yzxw, r1.zwyx | |
| /* 28 */ mad r1, r3.yyyy, c10.wxyz, r1.wzxy | |
| /* 3.0 */ exec | |
| /* 29 */ mad r2, r3.yyyy, c14.wxyz, r2.wzxy | |
| /* 30 */ mad r2, r3.wwww, c15, r2.yzwx | |
| /* 31 */ mad r3, r3.wwww, c11, r1.yzwx | |
| /* 32 */ rcp r1.x___, r3.w | |
| /* 33 */ rcp r1._y__, r2.w | |
| /* 34 */ mul r1.__zw, r1.xxxy, c255.xxxx | |
| + maxs r0._, r2.zz | |
| /* 3.1 */ exec | |
| /* 35 */ mad r2.xy__, r1.wwww, r2.xyyy, c255.xxxx | |
| /* 36 */ add r2.__z_, -r2.yyyy, c255.yyyy | |
| + muls_prev r2.___w, r1.y | |
| /* 37 */ mul r5.xyz_, r0.zyww, r11.zwyy | |
| /* 38 */ dp3 r1._y__, r0.ywzz, -c53.xyzz | |
| + mulsc r4._y__, c5.x, r0.w | |
| /* 39 */ add r6.xyz_, -r14.xyzz, c45.xyzz | |
| + mulsc r4.__z_, c5.z, r0.w | |
| /* 40 */ dp3 r4.x___, r6.xyzz, r6.xyzz | |
| + mulsc r4.___w, c5.y, r0.w | |
| /* 4.0 */ exec | |
| /* 41 */ add r0.x___, r13.wwww, -c43.xxxx | |
| + maxs r11.x___, r1.yy | |
| /* 42 */ mad r4._yzw, r0.yyyy, c4.xxyz, r4.yywz | |
| /* 43 */ mad r5.xyz_, r0.wzyy, r11.wyzz, -r5.xyzz | |
| /* 44 */ dp3 r1._y__, r5.xyzz, r5.xyzz | |
| + maxs r11._y__, c255.zz | |
| /* 45 */ mad r4._yzw, -r0.zzzz, c6.yyxz, -r4.zzyw | |
| /* 46 */ add r0.x___, r0.xxxx, r12.wwww | |
| + maxs r5.___w, r11.xy | |
| /* 4.1 */ exec | |
| /* 47 */ max o5._, r0, r0 | |
| + adds o5.___w, r6.ww | |
| /* 48 */ mad o5.xyz_, r5.wwww, c54.xyzz, c48.xyzz | |
| /* 49 */ dp3 o6.___w, -c51.xyzz, r0.ywzz | |
| /* 50 */ dp3 o0.x___, c24.xyww, r10.xyzz | |
| /* 51 */ dp3 o0._y__, c25.xyww, r10.xyzz | |
| /* 52 */ dp3 o0.__z_, c28.xyww, r9.xyzz | |
| /* 5.0 */ exec | |
| /* 53 */ dp3 o0.___w, c29.xyww, r9.xyzz | |
| /* 54 */ dp3 o3.__z_, -c49.xyzz, r0.ywzz | |
| /* 55 */ add r0.x___, r0.xxxx, r8.wwww | |
| /* 56 */ dp3 r4.___w, c44.xyzz, r4.zyww | |
| + rsq r4.x___, r_abs[4].x | |
| /* 57 */ mul r4.xyz_, r6.xyzz, r4.xxxx | |
| + rsq r1._y__, r_abs[1].y | |
| /* 58 */ dp3 o4.__z_, r4.xyzz, r0.ywzz | |
| /* 5.1 */ exec | |
| /* 59 */ max o1.___w, r4.wwww, c255.zzzz | |
| /* 60 */ mul r6.xyz_, r1.yyyy, r0.zyww | |
| /* 61 */ add r0.x___, r0.xxxx, r7.wwww | |
| /* 62 */ mul r0._yzw, r5.xxyz, r1.yyyy | |
| /* 63 */ dp3 o4.x___, r4.xyzz, r0.yzww | |
| /* 64 */ max o6._, r0, r0 | |
| + mulsc_sat o6.x___, c43.z, r0.x | |
| /* 6.0 */ exec | |
| /* 65 */ dp3 o6._y__, -c51.xyzz, r0.yzww | |
| /* 66 */ dp3 o3.x___, -c49.xyzz, r0.yzww | |
| /* 67 */ mul r0.xyz_, r6.zxyy, r5.zxyy | |
| /* 68 */ mad r0.xyz_, r6.xyzz, r5.yzxx, -r0.xyzz | |
| /* 69 */ dp3 o4._y__, r4.xyzz, r0.xyzz | |
| /* 70 */ dp3 o6.__z_, -c51.xyzz, r0.xyzz | |
| /* 6.1 */ exece | |
| /* 71 */ dp3 o3._y__, -c49.xyzz, r0.xyzz | |
| /* 72 */ mul o1.__z_, r3.zzzz, r1.xxxx | |
| /* 73 */ mad r0.xy__, r1.zzzz, r3.yxxx, c255.xxxx | |
| /* 74 */ max o1._, r0, r0 | |
| + maxs o1.x___, r0.yy | |
| /* 75 */ max o1._, r0, r0 | |
| + subsc o1._y__, c255.y, r0.x | |
| /* 76 */ max o2.xyz_, r2.xzww, r2.xzww | |
| G> 00000004 Generated pixel shader at 0x0000000209687FA0 (1068b): | |
| /* 0.0 */ exec | |
| /* 10 */ tfetch2D r7, r0.xy, tf0 | |
| /* 11 */ tfetch2D r9.xyw_, r0.zw, tf1 | |
| /* 12 */ serialize | |
| add r8.xy__, r9.xyyy, c254.yyyy | |
| /* 13 */ add r8.xy__, r8.xyyy, r9.xyyy | |
| /* 14 */ dp2add r5.___w, r8.xyyy, r8.xyyy, c254.xxxx | |
| /* 15 */ subsc r5.___w, c255.y, r5.w | |
| /* 0.1 */ exec | |
| /* 16 */ max r8.___w, r9.zzzz, r9.zzzz | |
| + sqrt r8.__z_, r_abs[5].w | |
| /* 17 */ dp4 r5.___w, r8, r8 | |
| /* 18 */ max r8._yzw, r8.zzxy, r8.zzxy | |
| + rsq r8.x___, r_abs[5].w | |
| /* 19 */ dp3 r2.___w, r3.xyzz, r3.xyzz | |
| /* 20 */ dp3 r5.___w, r6.yzww, r6.yzww | |
| + rsq r2.___w, r_abs[2].w | |
| /* 21 */ mul r9._yzw, r2.wwww, r3.xxyz | |
| + rsq r5.___w, r_abs[5].w | |
| /* 1.0 */ exec | |
| /* 22 */ mul r10.xyz_, r5.wwww, r6.yzww | |
| /* 23 */ mul r8.xyz_, r8.zwxx, r8.xxyy | |
| /* 24 */ dp3 r9.x___, r10.xyzz, r8.xyzz | |
| /* 25 */ dp3 r9._y__, r9.yzww, r8.xyzz | |
| /* 26 */ mul r10.xyz_, c8.xyzz, c255.xxxx | |
| /* 27 */ sge r9.__zw, c254.xxxx, r2.xxxy | |
| /* 1.1 */ exec // PredicateClean=false | |
| /* 28 */ sge r11._yzw, r2.xxzy, c255.yyyy | |
| /* 29 */ add r5.___w, r9.zzzz, r11.yyyy | |
| + maxs r5._, c7.xx | |
| /* 30 */ add r5.___w, r5.wwww, r9.wwww | |
| + muls_prev r11.x___, c255.x | |
| /* 31 */ add r5.___w, r5.wwww, r11.wwww | |
| + maxs r5._, c7.yy | |
| /* 32 */ add r5.___w, r5.wwww, r11.zzzz | |
| + muls_prev r11._y__, c255.x | |
| /* 33 */ setp_ne_push r5.___w, c254.xxxx, r5.wwww | |
| + maxs r5._, c7.zz | |
| /* 2.0 */ exec | |
| /* 34 */ max r9.xy__, r9.xyyy, c254.xxxx | |
| + muls_prev r11.__z_, c255.x | |
| /* 35 */ mad r5.xyz_, r11.yxzz, r9.yyyy, r5.yxzz | |
| /* 36 */ mad r5.xyz_, r10.xyzz, r9.xxxx, r5.yxzz | |
| /* 37 */ (p0) sge r9.xy__, c254.xxxx, r1.yxxx | |
| /* 38 */ (p0) sge r2.xyz_, r1.yzxx, c255.yyyy | |
| /* 39 */ (p0) add r2.___w, r9.yyyy, r2.zzzz | |
| /* 2.1 */ exec // PredicateClean=false | |
| /* 40 */ (p0) add r2.___w, r2.wwww, r9.xxxx | |
| /* 41 */ (p0) add r2.___w, r2.wwww, r2.xxxx | |
| /* 42 */ (p0) add r2.x___, r2.wwww, r2.yyyy | |
| /* 43 */ setp_ne_push r5.___w, r5.wwww, r2.xxxx | |
| /* 3.0 */ (p0) exec | |
| /* 44 */ (p0) maxs r6._y__, c255.yy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 45 */ setp_inv r5.___w, r5.w | |
| /* 4.0 */ (p0) exec | |
| /* 46 */ (p0) tfetch2D r2.___x, r1.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 47 */ (p0) tfetch2D r2.__x_, r1.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 48 */ (p0) tfetch2D r2._x__, r1.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 49 */ (p0) tfetch2D r2.x___, r1.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 50 */ serialize | |
| (p0) mad r9.__zw, r1.xxxy, c255.zzzz, c255.wwww | |
| /* 51 */ (p0) sge r2, r2.ywzx, r1.zzzz | |
| + (p0) frcs r3.___w, r9.z | |
| /* 4.1 */ (p0) exec | |
| /* 52 */ (p0) add r9.xy__, r2.xyyy, -r2.wzzz | |
| + (p0) frcs r6._y__, r9.w | |
| /* 53 */ (p0) mad r2.xy__, r9.xyyy, r3.wwww, r2.wzzz | |
| /* 54 */ (p0) subs r2.__z_, r2.yx | |
| /* 55 */ (p0) mad r6._y__, r2.zzzz, r6.yyyy, r2.xxxx | |
| /* 5.0 */ exec // PredicateClean=false | |
| /* 56 */ setp_pop r5.___w, r5.w | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 57 */ setp_inv r5.___w, r5.w | |
| /* 6.0 */ (p0) exec | |
| /* 58 */ (p0) tfetch2D r10.___x, r2.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 59 */ (p0) tfetch2D r10.__x_, r2.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 60 */ (p0) tfetch2D r10._x__, r2.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 61 */ (p0) tfetch2D r10.x___, r2.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 62 */ serialize | |
| (p0) mad r9.__zw, r2.xxxy, c255.zzzz, c255.wwww | |
| /* 63 */ (p0) sge r2, r10.zxyw, r2.zzzz | |
| + (p0) frcs r3.___w, r9.z | |
| /* 6.1 */ (p0) exec | |
| /* 64 */ (p0) add r9.xy__, r2.zwww, -r2.yxxx | |
| + (p0) frcs r6._y__, r9.w | |
| /* 65 */ (p0) mad r2.xy__, r9.xyyy, r3.wwww, r2.yxxx | |
| /* 66 */ (p0) subs r2.__z_, r2.yx | |
| /* 67 */ (p0) mad r6._y__, r2.zzzz, r6.yyyy, r2.xxxx | |
| /* 7.0 */ exec // PredicateClean=false | |
| /* 68 */ setp_pop r5.___w, r5.w | |
| /* 69 */ tfetch2D r1.xyz_, r0.zw, tf2 | |
| /* 7.1 */ alloc colors | |
| /* 8.0 */ exec | |
| /* 70 */ add r0.xyz_, r3.xyzz, r4.xyzz | |
| + adds r0.___w, c13.ww | |
| /* 71 */ mad r2.xyz_, r5.xyzz, -c13.wwww, r5.xyzz | |
| /* 72 */ add r2.xyz_, r2.zxyy, r2.zxyy | |
| + maxs r5._, r6.yy | |
| /* 73 */ dp3 r5.___w, r0.xyzz, r0.xyzz | |
| + muls_prev r6._y__, r1.w | |
| /* 74 */ mul r6._yzw, r2.zzyx, r6.yyyy | |
| + rsq r5.___w, r_abs[5].w | |
| /* 75 */ mad r6._yzw, r0.wwww, r5.zzxy, r6.wwzy | |
| /* 8.1 */ exec | |
| /* 76 */ mul r5.xyz_, r0.xyzz, r5.wwww | |
| /* 77 */ dp3 r5.x___, r5.xyzz, r8.xyzz | |
| + mulsc r5.___w, c5.w, r6.x | |
| /* 78 */ add r6.x___, -r5.wwww, c255.yyyy | |
| + logc r5.x___, r_abs[5].x | |
| /* 79 */ mulsc r5.x___, c14.w, r5.x | |
| /* 80 */ mul r6._yzw, r6.zzwy, r7.xxyz | |
| + exp r5.x___, r5.x | |
| /* 81 */ max r5.x___, r5.xxxx, c254.xxxx | |
| /* 9.0 */ exec | |
| /* 82 */ mul r5.xyz_, r5.xxxx, r1.xyzz | |
| /* 83 */ mul r5.xyz_, r5.xyzz, c7.xyzz | |
| /* 84 */ mul r5.xyz_, r5.xyzz, c14.xyzz | |
| /* 85 */ mad r5.xyz_, r6.yzww, c0.xyzz, r5.xyzz | |
| /* 86 */ mul r5.xyz_, r6.xxxx, r5.xyzz | |
| /* 87 */ mad r7.xyz_, r5.wwww, c5.xyzz, r5.xyzz | |
| /* 9.1 */ exece | |
| /* 88 */ max oC0, r7, r7 | |
| G> 00000004 Generated vertex shader at 0x00000002096CB9C0 (972b): | |
| /* 0.0 */ exec | |
| /* 8 */ vfetch_full r15.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=5, Signed=true, NumFormat=integer, PrefetchCount=5 | |
| /* 9 */ vfetch_mini r0._xzy, Offset=3, DataFormat=FMT_2_10_10_10, Signed=true | |
| /* 10 */ vfetch_mini r12._xyz, Offset=4, DataFormat=FMT_2_10_10_10, Signed=true | |
| /* 11 */ vfetch_full r6.___w, r0.x, vf1, DataFormat=FMT_8_8_8_8, Stride=9, PrefetchCount=7 | |
| /* 12 */ vfetch_mini r11.xy1_, Offset=1, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 13 */ vfetch_mini r10.xy1_, Offset=3, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ exec | |
| /* 14 */ vfetch_mini r9.xy1_, Offset=5, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 1.0 */ alloc position | |
| /* 1.1 */ exec | |
| /* 15 */ mul r1, r15.yyyy, c1.wxyz | |
| /* 16 */ mad r1, r15.xxxx, c0.zywx, r1.wzxy | |
| /* 17 */ mad r1, r15.zzzz, c2.xwzy, r1.wzxy | |
| /* 18 */ mad oPos, r15.wwww, c3, r1.xwzy | |
| /* 2.0 */ alloc interpolators | |
| /* 2.1 */ exec | |
| /* 19 */ mul r7, r15.wwww, c7.wxyz | |
| /* 20 */ mul r8, r15.zzzz, c6.wxyz | |
| /* 21 */ mul r14, r15.xxxx, c4.wxyz | |
| /* 22 */ mul r13, r15.yyyy, c5.wxyz | |
| /* 23 */ add r1, r14.wzxy, r13.wzxy | |
| /* 24 */ add r1, r1.wzxy, r8.yxwz | |
| /* 3.0 */ exec | |
| /* 25 */ add r3, r1.wzxy, r7.zwyx | |
| /* 26 */ mul r1, r3.xxxx, c9.wxyz | |
| /* 27 */ mul r2, r3.xxxx, c13.wxyz | |
| /* 28 */ mad r2, r3.zzzz, c12.yzxw, r2.zwyx | |
| /* 29 */ mad r1, r3.zzzz, c8.yzxw, r1.zwyx | |
| /* 30 */ mad r1, r3.yyyy, c10.wxyz, r1.wzxy | |
| /* 3.1 */ exec | |
| /* 31 */ mad r2, r3.yyyy, c14.wxyz, r2.wzxy | |
| /* 32 */ mad r2, r3.wwww, c15, r2.yzwx | |
| /* 33 */ mad r3, r3.wwww, c11, r1.yzwx | |
| /* 34 */ rcp r1.x___, r3.w | |
| /* 35 */ rcp r1._y__, r2.w | |
| /* 36 */ mul r1.__zw, r1.xxxy, c255.yyyy | |
| + maxs r0._, r2.zz | |
| /* 4.0 */ exec | |
| /* 37 */ mad r2.xy__, r1.wwww, r2.xyyy, c255.yyyy | |
| /* 38 */ add r2.__z_, -r2.yyyy, c255.zzzz | |
| + muls_prev r2.___w, r1.y | |
| /* 39 */ mul r5.xyz_, r0.zyww, r12.zwyy | |
| /* 40 */ dp3 r1._y__, r0.ywzz, -c53.xyzz | |
| + mulsc r4._y__, c5.x, r0.w | |
| /* 41 */ add r6.xyz_, -r15.xyzz, c45.xyzz | |
| + mulsc r4.__z_, c5.z, r0.w | |
| /* 42 */ dp3 r4.x___, r6.xyzz, r6.xyzz | |
| + mulsc r4.___w, c5.y, r0.w | |
| /* 4.1 */ exec | |
| /* 43 */ add r0.x___, r14.wwww, -c43.xxxx | |
| + maxs r12.x___, r1.yy | |
| /* 44 */ mad r4._yzw, r0.yyyy, c4.xxyz, r4.yywz | |
| /* 45 */ mad r5.xyz_, r0.wzyy, r12.wyzz, -r5.xyzz | |
| /* 46 */ dp3 r1._y__, r5.xyzz, r5.xyzz | |
| + maxs r12._y__, c255.xx | |
| /* 47 */ mad r4._yzw, -r0.zzzz, c6.yyxz, -r4.zzyw | |
| /* 48 */ add r0.x___, r0.xxxx, r13.wwww | |
| + maxs r5.___w, r12.xy | |
| /* 5.0 */ exec | |
| /* 49 */ max o6._, r0, r0 | |
| + adds o6.___w, r6.ww | |
| /* 50 */ mad o6.xyz_, r5.wwww, c54.xyzz, c48.xyzz | |
| /* 51 */ dp3 o7.___w, -c51.xyzz, r0.ywzz | |
| /* 52 */ dp3 o0.x___, c24.xyww, r11.xyzz | |
| /* 53 */ dp3 o0._y__, c25.xyww, r11.xyzz | |
| /* 54 */ dp3 o0.__z_, c28.xyww, r10.xyzz | |
| /* 5.1 */ exec | |
| /* 55 */ dp3 o0.___w, c29.xyww, r10.xyzz | |
| /* 56 */ dp3 o1.x___, c32.xyww, r9.xyzz | |
| /* 57 */ dp3 o1._y__, c33.xyww, r9.xyzz | |
| /* 58 */ dp3 o4.__z_, -c49.xyzz, r0.ywzz | |
| /* 59 */ add r0.x___, r0.xxxx, r8.wwww | |
| /* 60 */ dp3 r4.___w, c44.xyzz, r4.zyww | |
| + rsq r4.x___, r_abs[4].x | |
| /* 6.0 */ exec | |
| /* 61 */ mul r4.xyz_, r6.xyzz, r4.xxxx | |
| + rsq r1._y__, r_abs[1].y | |
| /* 62 */ dp3 o5.__z_, r4.xyzz, r0.ywzz | |
| /* 63 */ max o2.___w, r4.wwww, c255.xxxx | |
| /* 64 */ mul r6.xyz_, r1.yyyy, r0.zyww | |
| /* 65 */ add r0.x___, r0.xxxx, r7.wwww | |
| /* 66 */ mul r0._yzw, r5.xxyz, r1.yyyy | |
| /* 6.1 */ exec | |
| /* 67 */ dp3 o5.x___, r4.xyzz, r0.yzww | |
| /* 68 */ max o7._, r0, r0 | |
| + mulsc_sat o7.x___, c43.z, r0.x | |
| /* 69 */ dp3 o7._y__, -c51.xyzz, r0.yzww | |
| /* 70 */ dp3 o4.x___, -c49.xyzz, r0.yzww | |
| /* 71 */ mul r0.xyz_, r6.zxyy, r5.zxyy | |
| /* 72 */ mad r0.xyz_, r6.xyzz, r5.yzxx, -r0.xyzz | |
| /* 7.0 */ exec | |
| /* 73 */ dp3 o5._y__, r4.xyzz, r0.xyzz | |
| /* 74 */ dp3 o7.__z_, -c51.xyzz, r0.xyzz | |
| /* 75 */ dp3 o4._y__, -c49.xyzz, r0.xyzz | |
| /* 76 */ mul o2.__z_, r3.zzzz, r1.xxxx | |
| /* 77 */ mad r0.xy__, r1.zzzz, r3.xyyy, c255.yyyy | |
| /* 78 */ max o2._, r0, r0 | |
| + maxs o2.x___, r0.xx | |
| /* 7.1 */ exece | |
| /* 79 */ max o2._, r0, r0 | |
| + subsc o2._y__, c255.z, r0.y | |
| /* 80 */ max o3.xyz_, r2.xzww, r2.xzww | |
| G> 00000004 Generated pixel shader at 0x000000020966A900 (1128b): | |
| /* 0.0 */ exec | |
| /* 10 */ tfetch2D r9, r0.xy, tf0 | |
| /* 11 */ tfetch2D r8, r0.zw, tf1 | |
| /* 12 */ tfetch2D r0._xyw, r1.xy, tf2 | |
| /* 13 */ serialize | |
| add r1.__zw, r0.yyyz, c254.yyyy | |
| /* 14 */ add r10.xy__, r1.zwww, r0.yzzz | |
| /* 15 */ dp2add r0.x___, r10.xyyy, r10.xyyy, c254.xxxx | |
| /* 0.1 */ exec | |
| /* 16 */ subsc r0.x___, c255.y, r0.x | |
| /* 17 */ max r10.___w, r0.wwww, r0.wwww | |
| + sqrt r10.__z_, r_abs[0].x | |
| /* 18 */ dp4 r0.x___, r10, r10 | |
| /* 19 */ max r0._yzw, r10.zzxy, r10.zzxy | |
| + rsq r0.x___, r_abs[0].x | |
| /* 20 */ dp3 r1.___w, r4.xyzz, r4.xyzz | |
| /* 21 */ dp3 r1.__z_, r7.yzww, r7.yzww | |
| + rsq r1.___w, r_abs[1].w | |
| /* 1.0 */ exec | |
| /* 22 */ mul r10.xyz_, r1.wwww, r4.xyzz | |
| + rsq r1.__z_, r_abs[1].z | |
| /* 23 */ mul r11.xyz_, r1.zzzz, r7.yzww | |
| /* 24 */ mul r0.xyz_, r0.zwxx, r0.xxyy | |
| /* 25 */ dp3 r1.__z_, r11.xyzz, r0.xyzz | |
| /* 26 */ dp3 r1.___w, r10.xyzz, r0.xyzz | |
| /* 27 */ mul r10.xyz_, c8.xyzz, c255.xxxx | |
| /* 1.1 */ exec | |
| /* 28 */ sge r12.xy__, c254.xxxx, r3.xyyy | |
| /* 29 */ sge r11._yzw, r3.xxzy, c255.yyyy | |
| /* 30 */ add r7._y__, r12.xxxx, r11.yyyy | |
| + maxs r6._, c7.xx | |
| /* 31 */ add r7._y__, r7.yyyy, r12.yyyy | |
| + muls_prev r11.x___, c255.x | |
| /* 32 */ add r7._y__, r7.yyyy, r11.wwww | |
| + maxs r6._, c7.yy | |
| /* 33 */ add r7._y__, r7.yyyy, r11.zzzz | |
| + muls_prev r11._y__, c255.x | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 34 */ setp_ne_push r7._y__, c254.xxxx, r7.yyyy | |
| + maxs r6._, c7.zz | |
| /* 35 */ max r1.__zw, r1.zzzw, c254.xxxx | |
| + muls_prev r11.__z_, c255.x | |
| /* 36 */ mad r6.xyz_, r11.yxzz, r1.wwww, r6.yxzz | |
| /* 37 */ mad r6.xyz_, r10.xyzz, r1.zzzz, r6.yxzz | |
| /* 38 */ (p0) sge r1.__zw, c254.xxxx, r2.yyyx | |
| /* 39 */ (p0) sge r3.xyz_, r2.yzxx, c255.yyyy | |
| /* 2.1 */ exec // PredicateClean=false | |
| /* 40 */ (p0) add r0.___w, r1.wwww, r3.zzzz | |
| /* 41 */ (p0) add r0.___w, r0.wwww, r1.zzzz | |
| /* 42 */ (p0) add r0.___w, r0.wwww, r3.xxxx | |
| /* 43 */ (p0) add r0.___w, r0.wwww, r3.yyyy | |
| /* 44 */ setp_ne_push r7._y__, r7.yyyy, r0.wwww | |
| /* 3.0 */ (p0) exec | |
| /* 45 */ (p0) maxs r7.__z_, c255.yy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 46 */ setp_inv r7._y__, r7.y | |
| /* 4.0 */ (p0) exec | |
| /* 47 */ (p0) tfetch2D r3.___x, r2.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 48 */ (p0) tfetch2D r3.__x_, r2.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 49 */ (p0) tfetch2D r3._x__, r2.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 50 */ (p0) tfetch2D r3.x___, r2.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 51 */ serialize | |
| (p0) mad r10.xy__, r2.xyyy, c255.zzzz, c255.wwww | |
| /* 52 */ (p0) sge r3, r3.ywzx, r2.zzzz | |
| + (p0) frcs r0.___w, r10.x | |
| /* 4.1 */ (p0) exec | |
| /* 53 */ (p0) add r1.__zw, r3.xxxy, -r3.wwwz | |
| + (p0) frcs r7.__z_, r10.y | |
| /* 54 */ (p0) mad r1.__zw, r1.zzzw, r0.wwww, r3.wwwz | |
| /* 55 */ (p0) subs r0.___w, r1.wz | |
| /* 56 */ (p0) mad r7.__z_, r0.wwww, r7.zzzz, r1.zzzz | |
| /* 5.0 */ exec // PredicateClean=false | |
| /* 57 */ setp_pop r7._y__, r7.y | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 58 */ setp_inv r7._y__, r7.y | |
| /* 6.0 */ (p0) exec | |
| /* 59 */ (p0) tfetch2D r11.___x, r3.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 60 */ (p0) tfetch2D r11.__x_, r3.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 61 */ (p0) tfetch2D r11._x__, r3.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 62 */ (p0) tfetch2D r11.x___, r3.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 63 */ serialize | |
| (p0) mad r10.xy__, r3.xyyy, c255.zzzz, c255.wwww | |
| /* 64 */ (p0) sge r3, r11.zxyw, r3.zzzz | |
| + (p0) frcs r0.___w, r10.x | |
| /* 6.1 */ (p0) exec | |
| /* 65 */ (p0) add r1.__zw, r3.zzzw, -r3.yyyx | |
| + (p0) frcs r7.__z_, r10.y | |
| /* 66 */ (p0) mad r1.__zw, r1.zzzw, r0.wwww, r3.yyyx | |
| /* 67 */ (p0) subs r0.___w, r1.wz | |
| /* 68 */ (p0) mad r7.__z_, r0.wwww, r7.zzzz, r1.zzzz | |
| /* 7.0 */ exec // PredicateClean=false | |
| /* 69 */ setp_pop r7._y__, r7.y | |
| /* 70 */ tfetch2D r2.xyz_, r1.xy, tf3 | |
| /* 7.1 */ alloc colors | |
| /* 8.0 */ exec | |
| /* 71 */ mul r0.___w, r8.wwww, r6.wwww | |
| /* 72 */ add r3.xyz_, r4.xyzz, r5.xyzz | |
| /* 73 */ mad r1.xyz_, r6.xyzz, -c13.wwww, r6.xyzz | |
| /* 74 */ add r1.xyz_, r1.zxyy, r1.zxyy | |
| + maxs r6._, r7.zz | |
| /* 75 */ dp3 r6.___w, r3.xyzz, r3.xyzz | |
| + muls_prev r7._y__, r2.w | |
| /* 76 */ mul r1.xyz_, r1.zyxx, r7.yyyy | |
| + rsq r6.___w, r_abs[6].w | |
| /* 8.1 */ exec | |
| /* 77 */ mul r7._yzw, r3.xxyz, r6.wwww | |
| + adds r6.___w, c13.ww | |
| /* 78 */ mad r6.xyz_, r6.wwww, r6.zxyy, r1.zyxx | |
| /* 79 */ mul r1.xyz_, r6.yzxx, r8.xyzz | |
| /* 80 */ mul r6.xyz_, r6.yzxx, r9.xyzz | |
| /* 81 */ dp3 r6.___w, r7.yzww, r0.xyzz | |
| /* 82 */ mul r6.xyz_, r6.xyzz, c0.xyzz | |
| + logc r6.___w, r_abs[6].w | |
| /* 9.0 */ exec | |
| /* 83 */ mul r7._y__, r6.wwww, c14.wwww | |
| + mulsc r6.___w, c5.w, r7.x | |
| /* 84 */ mad r7.x_zw, r1.xyyz, c1.xyyz, -r6.xyyz | |
| /* 85 */ mad r6.xyz_, r0.wwww, r7.xzww, r6.xyzz | |
| /* 86 */ add r7.x___, -r6.wwww, c255.yyyy | |
| + exp r7._y__, r7.y | |
| /* 87 */ max r7._y__, r7.yyyy, c254.xxxx | |
| /* 88 */ mul r7._yzw, r7.yyyy, r2.xxyz | |
| /* 9.1 */ exece | |
| /* 89 */ mul r7._yzw, r7.yyzw, c7.xxyz | |
| /* 90 */ mad r6.xyz_, r7.yzww, c14.xyzz, r6.xyzz | |
| /* 91 */ mul r6.xyz_, r7.xxxx, r6.xyzz | |
| /* 92 */ mad r9.xyz_, r6.wwww, c5.xyzz, r6.xyzz | |
| /* 93 */ max oC0, r9, r9 | |
| G> 00000004 Generated vertex shader at 0x00000002096DAD60 (720b): | |
| /* 0.0 */ exec | |
| /* 6 */ vfetch_full r3.___w, r0.x, vf1, DataFormat=FMT_8_8_8_8, Stride=3, PrefetchCount=3 | |
| /* 7 */ vfetch_mini r3.xy1_, Offset=1, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 8 */ vfetch_full r9.xyz_, r0.x, vf0, Offset=3, DataFormat=FMT_2_10_10_10, Stride=5, Signed=true | |
| /* 9 */ vfetch_full r0.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=5, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 10 */ mul r1, r0.yyyy, c1.wxyz | |
| /* 11 */ mad r1, r0.xxxx, c0.zywx, r1.wzxy | |
| /* 12 */ mad r1, r0.zzzz, c2.xwzy, r1.wzxy | |
| /* 13 */ mad oPos, r0.wwww, c3, r1.xwzy | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exec | |
| /* 14 */ mul r5, r0.wwww, c7.wxyz | |
| /* 15 */ mul r7, r0.zzzz, c6.wxyz | |
| /* 16 */ mul r10, r0.xxxx, c4.wxyz | |
| /* 17 */ mul r8, r0.yyyy, c5.wxyz | |
| /* 18 */ add r0, r10.wzxy, r8.wzxy | |
| /* 19 */ add r0, r0.wzxy, r7.yxwz | |
| /* 2.1 */ exec | |
| /* 20 */ add r2, r0.wzxy, r5.zwyx | |
| /* 21 */ mul r0, r2.xxxx, c9.wxyz | |
| /* 22 */ mul r1, r2.xxxx, c13.wxyz | |
| /* 23 */ mad r1, r2.zzzz, c12.yzxw, r1.zwyx | |
| /* 24 */ mad r0, r2.zzzz, c8.yzxw, r0.zwyx | |
| /* 25 */ mad r0, r2.yyyy, c10.wxyz, r0.wzxy | |
| /* 3.0 */ exec | |
| /* 26 */ mad r1, r2.yyyy, c14.wxyz, r1.wzxy | |
| /* 27 */ mad r1, r2.wwww, c15, r1.yzwx | |
| /* 28 */ mad r2, r2.wwww, c11, r0.yzwx | |
| /* 29 */ rcp r0._y__, r2.w | |
| /* 30 */ rcp r0.x___, r1.w | |
| /* 31 */ mul r0.__zw, r0.yyyx, c255.xxxx | |
| + maxs r0._, r1.zz | |
| /* 3.1 */ exec | |
| /* 32 */ mad r1.xy__, r0.wwww, r1.xyyy, c255.xxxx | |
| /* 33 */ add r1.__z_, -r1.yyyy, c255.zzzz | |
| + muls_prev r1.___w, r0.x | |
| /* 34 */ dp3 r4.x___, r9.xyzz, -c51.xyzz | |
| /* 35 */ dp3 r4._y__, r9.xyzz, -c53.xyzz | |
| /* 36 */ dp3 r4.__z_, r9.xyzz, -c49.xyzz | |
| /* 37 */ mul r6.xyz_, r9.yyyy, c5.xzyy | |
| /* 4.0 */ exec | |
| /* 38 */ add r0.x___, r10.wwww, -c43.xxxx | |
| /* 39 */ mad r6.xyz_, r9.xxxx, c4.xyzz, r6.xzyy | |
| /* 40 */ mad r6.xyz_, -r9.zzzz, c6.yxzz, -r6.yxzz | |
| /* 41 */ add r0.x___, r0.xxxx, r8.wwww | |
| /* 42 */ max r4.xyz_, r4.xyzz, c255.yyyy | |
| /* 43 */ max o3._, r0, r0 | |
| + adds o3.___w, r3.ww | |
| /* 4.1 */ exec | |
| /* 44 */ dp3 o0.x___, c24.xyww, r3.xyzz | |
| /* 45 */ dp3 o0._y__, c25.xyww, r3.xyzz | |
| /* 46 */ mad r3.xyz_, r4.zzzz, c50.xyzz, c48.xyzz | |
| /* 47 */ add r0.x___, r0.xxxx, r7.wwww | |
| /* 48 */ dp3 r3.___w, c44.xyzz, r6.yxzz | |
| /* 49 */ max o1.___w, r3.wwww, c255.yyyy | |
| /* 5.0 */ exec | |
| /* 50 */ add r0.x___, r0.xxxx, r5.wwww | |
| /* 51 */ mad r3.xyz_, r4.xxxx, c52.xyzz, r3.xyzz | |
| /* 52 */ mad o3.xyz_, r4.yyyy, c54.xyzz, r3.xyzz | |
| /* 53 */ mulsc_sat r0.x___, c43.z, r0.x | |
| /* 54 */ max o4._, r0, r0 | |
| + maxs o4.x___, r0.xx | |
| /* 55 */ mul o1.__z_, r2.zzzz, r0.yyyy | |
| /* 5.1 */ exece | |
| /* 56 */ mad r0.xy__, r0.zzzz, r2.xyyy, c255.xxxx | |
| /* 57 */ max o1._, r0, r0 | |
| + maxs o1.x___, r0.xx | |
| /* 58 */ max o1._, r0, r0 | |
| + subsc o1._y__, c255.z, r0.y | |
| /* 59 */ max o2.xyz_, r1.xzww, r1.xzww | |
| G> 00000004 Generated vertex shader at 0x00000002096BC5E0 (1008b): | |
| /* 0.0 */ exec | |
| /* 8 */ vfetch_full r16.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=5, Signed=true, NumFormat=integer, PrefetchCount=5 | |
| /* 9 */ vfetch_mini r0._xzy, Offset=3, DataFormat=FMT_2_10_10_10, Signed=true | |
| /* 10 */ vfetch_mini r13._xyz, Offset=4, DataFormat=FMT_2_10_10_10, Signed=true | |
| /* 11 */ vfetch_full r6.___w, r0.x, vf1, DataFormat=FMT_8_8_8_8, Stride=11, PrefetchCount=7 | |
| /* 12 */ vfetch_mini r12.xy1_, Offset=1, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 13 */ vfetch_mini r11.xy1_, Offset=3, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ exec | |
| /* 14 */ vfetch_mini r10.xy1_, Offset=5, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 15 */ vfetch_full r9.xy1_, r0.x, vf1, Offset=7, DataFormat=FMT_32_32_FLOAT, Stride=11, Signed=true, NumFormat=integer | |
| /* 1.0 */ alloc position | |
| /* 1.1 */ exec | |
| /* 16 */ mul r1, r16.yyyy, c1.wxyz | |
| /* 17 */ mad r1, r16.xxxx, c0.zywx, r1.wzxy | |
| /* 18 */ mad r1, r16.zzzz, c2.xwzy, r1.wzxy | |
| /* 19 */ mad oPos, r16.wwww, c3, r1.xwzy | |
| /* 2.0 */ alloc interpolators | |
| /* 2.1 */ exec | |
| /* 20 */ mul r7, r16.wwww, c7.wxyz | |
| /* 21 */ mul r8, r16.zzzz, c6.wxyz | |
| /* 22 */ mul r15, r16.xxxx, c4.wxyz | |
| /* 23 */ mul r14, r16.yyyy, c5.wxyz | |
| /* 24 */ add r1, r15.wzxy, r14.wzxy | |
| /* 25 */ add r1, r1.wzxy, r8.yxwz | |
| /* 3.0 */ exec | |
| /* 26 */ add r3, r1.wzxy, r7.zwyx | |
| /* 27 */ mul r1, r3.xxxx, c9.wxyz | |
| /* 28 */ mul r2, r3.xxxx, c13.wxyz | |
| /* 29 */ mad r2, r3.zzzz, c12.yzxw, r2.zwyx | |
| /* 30 */ mad r1, r3.zzzz, c8.yzxw, r1.zwyx | |
| /* 31 */ mad r1, r3.yyyy, c10.wxyz, r1.wzxy | |
| /* 3.1 */ exec | |
| /* 32 */ mad r2, r3.yyyy, c14.wxyz, r2.wzxy | |
| /* 33 */ mad r2, r3.wwww, c15, r2.yzwx | |
| /* 34 */ mad r3, r3.wwww, c11, r1.yzwx | |
| /* 35 */ rcp r1.x___, r3.w | |
| /* 36 */ rcp r1._y__, r2.w | |
| /* 37 */ mul r1.__zw, r1.xxxy, c255.yyyy | |
| + maxs r0._, r2.zz | |
| /* 4.0 */ exec | |
| /* 38 */ mad r2.xy__, r1.wwww, r2.xyyy, c255.yyyy | |
| /* 39 */ add r2.__z_, -r2.yyyy, c255.zzzz | |
| + muls_prev r2.___w, r1.y | |
| /* 40 */ mul r5.xyz_, r0.zyww, r13.zwyy | |
| /* 41 */ dp3 r1._y__, r0.ywzz, -c53.xyzz | |
| + mulsc r4._y__, c5.x, r0.w | |
| /* 42 */ add r6.xyz_, -r16.xyzz, c45.xyzz | |
| + mulsc r4.__z_, c5.z, r0.w | |
| /* 43 */ dp3 r4.x___, r6.xyzz, r6.xyzz | |
| + mulsc r4.___w, c5.y, r0.w | |
| /* 4.1 */ exec | |
| /* 44 */ add r0.x___, r15.wwww, -c43.xxxx | |
| + maxs r13.x___, r1.yy | |
| /* 45 */ mad r4._yzw, r0.yyyy, c4.xxyz, r4.yywz | |
| /* 46 */ mad r5.xyz_, r0.wzyy, r13.wyzz, -r5.xyzz | |
| /* 47 */ dp3 r1._y__, r5.xyzz, r5.xyzz | |
| + maxs r13._y__, c255.xx | |
| /* 48 */ mad r4._yzw, -r0.zzzz, c6.yyxz, -r4.zzyw | |
| /* 49 */ add r0.x___, r0.xxxx, r14.wwww | |
| + maxs r5.___w, r13.xy | |
| /* 5.0 */ exec | |
| /* 50 */ max o6._, r0, r0 | |
| + adds o6.___w, r6.ww | |
| /* 51 */ mad o6.xyz_, r5.wwww, c54.xyzz, c48.xyzz | |
| /* 52 */ dp3 o7.___w, -c51.xyzz, r0.ywzz | |
| /* 53 */ dp3 o0.x___, c24.xyww, r12.xyzz | |
| /* 54 */ dp3 o0._y__, c25.xyww, r12.xyzz | |
| /* 55 */ dp3 o0.__z_, c28.xyww, r11.xyzz | |
| /* 5.1 */ exec | |
| /* 56 */ dp3 o0.___w, c29.xyww, r11.xyzz | |
| /* 57 */ dp3 o1.x___, c32.xyww, r10.xyzz | |
| /* 58 */ dp3 o1._y__, c33.xyww, r10.xyzz | |
| /* 59 */ dp3 o1.__z_, c36.xyww, r9.xyzz | |
| /* 60 */ dp3 o1.___w, c37.xyww, r9.xyzz | |
| /* 61 */ dp3 o4.__z_, -c49.xyzz, r0.ywzz | |
| /* 6.0 */ exec | |
| /* 62 */ add r0.x___, r0.xxxx, r8.wwww | |
| /* 63 */ dp3 r4.___w, c44.xyzz, r4.zyww | |
| + rsq r4.x___, r_abs[4].x | |
| /* 64 */ mul r4.xyz_, r6.xyzz, r4.xxxx | |
| + rsq r1._y__, r_abs[1].y | |
| /* 65 */ dp3 o5.__z_, r4.xyzz, r0.ywzz | |
| /* 66 */ max o2.___w, r4.wwww, c255.xxxx | |
| /* 67 */ mul r6.xyz_, r1.yyyy, r0.zyww | |
| /* 6.1 */ exec | |
| /* 68 */ add r0.x___, r0.xxxx, r7.wwww | |
| /* 69 */ mul r0._yzw, r5.xxyz, r1.yyyy | |
| /* 70 */ dp3 o5.x___, r4.xyzz, r0.yzww | |
| /* 71 */ max o7._, r0, r0 | |
| + mulsc_sat o7.x___, c43.z, r0.x | |
| /* 72 */ dp3 o7._y__, -c51.xyzz, r0.yzww | |
| /* 73 */ dp3 o4.x___, -c49.xyzz, r0.yzww | |
| /* 7.0 */ exec | |
| /* 74 */ mul r0.xyz_, r6.zxyy, r5.zxyy | |
| /* 75 */ mad r0.xyz_, r6.xyzz, r5.yzxx, -r0.xyzz | |
| /* 76 */ dp3 o5._y__, r4.xyzz, r0.xyzz | |
| /* 77 */ dp3 o7.__z_, -c51.xyzz, r0.xyzz | |
| /* 78 */ dp3 o4._y__, -c49.xyzz, r0.xyzz | |
| /* 79 */ mul o2.__z_, r3.zzzz, r1.xxxx | |
| /* 7.1 */ exece | |
| /* 80 */ mad r0.xy__, r1.zzzz, r3.xyyy, c255.yyyy | |
| /* 81 */ max o2._, r0, r0 | |
| + maxs o2.x___, r0.xx | |
| /* 82 */ max o2._, r0, r0 | |
| + subsc o2._y__, c255.z, r0.y | |
| /* 83 */ max o3.xyz_, r2.xzww, r2.xzww | |
| G> 00000004 Generated pixel shader at 0x00000002096433C0 (1188b): | |
| /* 0.0 */ exec | |
| /* 11 */ tfetch2D r8, r0.xy, tf0 | |
| /* 12 */ tfetch2D r10, r0.zw, tf1 | |
| /* 13 */ tfetch2D r9, r1.xy, tf2 | |
| /* 14 */ tfetch2D r0._xyw, r1.zw, tf3 | |
| /* 15 */ serialize | |
| add r11.xy__, r0.yzzz, c254.yyyy | |
| /* 16 */ add r11.xy__, r11.xyyy, r0.yzzz | |
| /* 0.1 */ exec | |
| /* 17 */ dp2add r0.x___, r11.xyyy, r11.xyyy, c254.xxxx | |
| /* 18 */ subsc r0.x___, c255.y, r0.x | |
| /* 19 */ max r11.___w, r0.wwww, r0.wwww | |
| + sqrt r11.__z_, r_abs[0].x | |
| /* 20 */ dp4 r0.x___, r11, r11 | |
| /* 21 */ max r0._yzw, r11.zzxy, r11.zzxy | |
| + rsq r0.x___, r_abs[0].x | |
| /* 22 */ dp3 r4.___w, r4.xyzz, r4.xyzz | |
| /* 1.0 */ exec | |
| /* 23 */ dp3 r3.___w, r7.yzww, r7.yzww | |
| + rsq r4.___w, r_abs[4].w | |
| /* 24 */ mul r11._yzw, r4.wwww, r4.xxyz | |
| + rsq r3.___w, r_abs[3].w | |
| /* 25 */ mul r12.xyz_, r3.wwww, r7.yzww | |
| /* 26 */ mul r0.xyz_, r0.zwxx, r0.xxyy | |
| /* 27 */ dp3 r11.x___, r12.xyzz, r0.xyzz | |
| /* 28 */ dp3 r11._y__, r11.yzww, r0.xyzz | |
| /* 1.1 */ exec | |
| /* 29 */ mul r12.xyz_, c8.xyzz, c255.xxxx | |
| /* 30 */ sge r11.__zw, c254.xxxx, r3.xxxy | |
| /* 31 */ sge r13._yzw, r3.xxzy, c255.yyyy | |
| /* 32 */ add r7.__z_, r11.zzzz, r13.yyyy | |
| + maxs r6._, c7.xx | |
| /* 33 */ add r7.__z_, r7.zzzz, r11.wwww | |
| + muls_prev r13.x___, c255.x | |
| /* 34 */ add r7.__z_, r7.zzzz, r13.wwww | |
| + maxs r6._, c7.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 35 */ add r7.__z_, r7.zzzz, r13.zzzz | |
| + muls_prev r13._y__, c255.x | |
| /* 36 */ setp_ne_push r7.__z_, c254.xxxx, r7.zzzz | |
| + maxs r6._, c7.zz | |
| /* 37 */ max r11.xy__, r11.xyyy, c254.xxxx | |
| + muls_prev r13.__z_, c255.x | |
| /* 38 */ mad r6.xyz_, r13.yxzz, r11.yyyy, r6.yxzz | |
| /* 39 */ mad r6.xyz_, r12.xyzz, r11.xxxx, r6.yxzz | |
| /* 40 */ (p0) sge r11.xy__, c254.xxxx, r2.yxxx | |
| /* 2.1 */ exec // PredicateClean=false | |
| /* 41 */ (p0) sge r3.xyz_, r2.yzxx, c255.yyyy | |
| /* 42 */ (p0) add r0.___w, r11.yyyy, r3.zzzz | |
| /* 43 */ (p0) add r0.___w, r0.wwww, r11.xxxx | |
| /* 44 */ (p0) add r0.___w, r0.wwww, r3.xxxx | |
| /* 45 */ (p0) add r0.___w, r0.wwww, r3.yyyy | |
| /* 46 */ setp_ne_push r7.__z_, r7.zzzz, r0.wwww | |
| /* 3.0 */ (p0) exec | |
| /* 47 */ (p0) maxs r7._y__, c255.yy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 48 */ setp_inv r7.__z_, r7.z | |
| /* 4.0 */ (p0) exec | |
| /* 49 */ (p0) tfetch2D r3.___x, r2.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 50 */ (p0) tfetch2D r3.__x_, r2.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 51 */ (p0) tfetch2D r3._x__, r2.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 52 */ (p0) tfetch2D r3.x___, r2.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 53 */ serialize | |
| (p0) mad r11.__zw, r2.xxxy, c255.zzzz, c255.wwww | |
| /* 54 */ (p0) sge r3, r3.ywzx, r2.zzzz | |
| + (p0) frcs r0.___w, r11.z | |
| /* 4.1 */ (p0) exec | |
| /* 55 */ (p0) add r11.xy__, r3.xyyy, -r3.wzzz | |
| + (p0) frcs r7._y__, r11.w | |
| /* 56 */ (p0) mad r3.xy__, r11.xyyy, r0.wwww, r3.wzzz | |
| /* 57 */ (p0) subs r0.___w, r3.yx | |
| /* 58 */ (p0) mad r7._y__, r0.wwww, r7.yyyy, r3.xxxx | |
| /* 5.0 */ exec // PredicateClean=false | |
| /* 59 */ setp_pop r7.__z_, r7.z | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 60 */ setp_inv r7.__z_, r7.z | |
| /* 6.0 */ (p0) exec | |
| /* 61 */ (p0) tfetch2D r12.___x, r3.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 62 */ (p0) tfetch2D r12.__x_, r3.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 63 */ (p0) tfetch2D r12._x__, r3.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 64 */ (p0) tfetch2D r12.x___, r3.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 65 */ serialize | |
| (p0) mad r11.__zw, r3.xxxy, c255.zzzz, c255.wwww | |
| /* 66 */ (p0) sge r3, r12.zxyw, r3.zzzz | |
| + (p0) frcs r0.___w, r11.z | |
| /* 6.1 */ (p0) exec | |
| /* 67 */ (p0) add r11.xy__, r3.zwww, -r3.yxxx | |
| + (p0) frcs r7._y__, r11.w | |
| /* 68 */ (p0) mad r3.xy__, r11.xyyy, r0.wwww, r3.yxxx | |
| /* 69 */ (p0) subs r0.___w, r3.yx | |
| /* 70 */ (p0) mad r7._y__, r0.wwww, r7.yyyy, r3.xxxx | |
| /* 7.0 */ exec // PredicateClean=false | |
| /* 71 */ setp_pop r7.__z_, r7.z | |
| /* 72 */ tfetch2D r2.xyz_, r1.zw, tf4 | |
| /* 7.1 */ alloc colors | |
| /* 8.0 */ exec | |
| /* 73 */ mul r0.___w, r9.wwww, r6.wwww | |
| /* 74 */ mul r1.x___, r10.wwww, r6.wwww | |
| /* 75 */ add r1._yzw, r4.xxyz, r5.xxyz | |
| /* 76 */ mad r3.xyz_, r6.xyzz, -c13.wwww, r6.xyzz | |
| /* 77 */ add r3.xyz_, r3.zxyy, r3.zxyy | |
| + maxs r6._, r7.yy | |
| /* 78 */ dp3 r6.___w, r1.yzww, r1.yzww | |
| + muls_prev r7._y__, r2.w | |
| /* 8.1 */ exec | |
| /* 79 */ mul r7._yzw, r3.zzyx, r7.yyyy | |
| + rsq r6.___w, r_abs[6].w | |
| /* 80 */ mul r3.xyz_, r1.yzww, r6.wwww | |
| + adds r6.___w, c13.ww | |
| /* 81 */ mad r7._yzw, r6.wwww, r6.zzxy, r7.wwzy | |
| /* 82 */ mul r1._yzw, r7.zzwy, r10.xxyz | |
| /* 83 */ mul r6._yzw, r7.zzwy, r8.xxyz | |
| /* 84 */ dp3 r6.x___, r3.xyzz, r0.xyzz | |
| /* 9.0 */ exec | |
| /* 85 */ mul r6._yzw, r6.yyzw, c0.xxyz | |
| + logc r6.x___, r_abs[6].x | |
| /* 86 */ mulsc r6.x___, c14.w, r6.x | |
| /* 87 */ mad r0.xyz_, r1.yzww, c1.xyzz, -r6.yzww | |
| /* 88 */ mad r6._yzw, r1.xxxx, r0.xxyz, r6.yyzw | |
| /* 89 */ mul r7._yzw, r7.zzwy, r9.xxyz | |
| + exp r6.x___, r6.x | |
| /* 90 */ max r6.x___, r6.xxxx, c254.xxxx | |
| /* 9.1 */ exec | |
| /* 91 */ mad r7._yzw, r7.yyzw, c2.xxyz, -r6.yyzw | |
| /* 92 */ mad r6._yzw, r0.wwww, r7.yyzw, r6.yyzw | |
| /* 93 */ mul r7._yzw, r6.xxxx, r2.xxyz | |
| + mulsc r6.x___, c5.w, r7.x | |
| /* 94 */ mul r7._yzw, r7.yyzw, c7.xxyz | |
| + subsc r7.x___, c255.y, r6.x | |
| /* 95 */ mad r6._yzw, r7.yyzw, c14.xxyz, r6.yyzw | |
| /* 96 */ mul r6._yzw, r7.xxxx, r6.yyzw | |
| /* 10.0 */ exece | |
| /* 97 */ mad r8.xyz_, r6.xxxx, c5.xyzz, r6.yzww | |
| /* 98 */ max oC0, r8, r8 | |
| /* 10.1 */ cnop | |
| G> 00000004 Generated pixel shader at 0x0000000209688800 (1068b): | |
| /* 0.0 */ exec | |
| /* 10 */ tfetch2D r7, r0.xy, tf0 | |
| /* 11 */ tfetch2D r9.xyw_, r0.zw, tf1 | |
| /* 12 */ serialize | |
| add r8.xy__, r9.xyyy, c254.yyyy | |
| /* 13 */ add r8.xy__, r8.xyyy, r9.xyyy | |
| /* 14 */ dp2add r0.x___, r8.xyyy, r8.xyyy, c254.xxxx | |
| /* 15 */ subsc r2.___w, c255.y, r0.x | |
| /* 0.1 */ exec | |
| /* 16 */ max r8.___w, r9.zzzz, r9.zzzz | |
| + sqrt r8.__z_, r_abs[2].w | |
| /* 17 */ dp4 r2.___w, r8, r8 | |
| /* 18 */ max r8._yzw, r8.zzxy, r8.zzxy | |
| + rsq r8.x___, r_abs[2].w | |
| /* 19 */ dp3 r3.___w, r3.xyzz, r3.xyzz | |
| /* 20 */ dp3 r2.___w, r6.yzww, r6.yzww | |
| + rsq r3.___w, r_abs[3].w | |
| /* 21 */ mul r9._yzw, r3.wwww, r3.xxyz | |
| + rsq r2.___w, r_abs[2].w | |
| /* 1.0 */ exec | |
| /* 22 */ mul r10.xyz_, r2.wwww, r6.yzww | |
| /* 23 */ mul r8.xyz_, r8.zwxx, r8.xxyy | |
| /* 24 */ dp3 r9.x___, r10.xyzz, r8.xyzz | |
| /* 25 */ dp3 r9._y__, r9.yzww, r8.xyzz | |
| /* 26 */ mul r10.xyz_, c8.xyzz, c255.xxxx | |
| /* 27 */ sge r9.__zw, c254.xxxx, r2.xxxy | |
| /* 1.1 */ exec // PredicateClean=false | |
| /* 28 */ sge r11._yzw, r2.xxzy, c255.yyyy | |
| /* 29 */ add r6.__z_, r9.zzzz, r11.yyyy | |
| + maxs r5._, c7.xx | |
| /* 30 */ add r6.__z_, r6.zzzz, r9.wwww | |
| + muls_prev r11.x___, c255.x | |
| /* 31 */ add r6.__z_, r6.zzzz, r11.wwww | |
| + maxs r5._, c7.yy | |
| /* 32 */ add r6.__z_, r6.zzzz, r11.zzzz | |
| + muls_prev r11._y__, c255.x | |
| /* 33 */ setp_ne_push r6.__z_, c254.xxxx, r6.zzzz | |
| + maxs r5._, c7.zz | |
| /* 2.0 */ exec | |
| /* 34 */ max r9.xy__, r9.xyyy, c254.xxxx | |
| + muls_prev r11.__z_, c255.x | |
| /* 35 */ mad r5.xyz_, r11.yxzz, r9.yyyy, r5.yxzz | |
| /* 36 */ mad r5.xyz_, r10.xyzz, r9.xxxx, r5.yxzz | |
| /* 37 */ (p0) sge r9.xy__, c254.xxxx, r1.yxxx | |
| /* 38 */ (p0) sge r2.xyz_, r1.yzxx, c255.yyyy | |
| /* 39 */ (p0) add r2.___w, r9.yyyy, r2.zzzz | |
| /* 2.1 */ exec // PredicateClean=false | |
| /* 40 */ (p0) add r2.___w, r2.wwww, r9.xxxx | |
| /* 41 */ (p0) add r2.___w, r2.wwww, r2.xxxx | |
| /* 42 */ (p0) add r2.x___, r2.wwww, r2.yyyy | |
| /* 43 */ setp_ne_push r6.__z_, r6.zzzz, r2.xxxx | |
| /* 3.0 */ (p0) exec | |
| /* 44 */ (p0) maxs r6._y__, c255.yy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 45 */ setp_inv r6.__z_, r6.z | |
| /* 4.0 */ (p0) exec | |
| /* 46 */ (p0) tfetch2D r2.___x, r1.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 47 */ (p0) tfetch2D r2.__x_, r1.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 48 */ (p0) tfetch2D r2._x__, r1.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 49 */ (p0) tfetch2D r2.x___, r1.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 50 */ serialize | |
| (p0) mad r9.__zw, r1.xxxy, c255.zzzz, c255.wwww | |
| /* 51 */ (p0) sge r2, r2.ywzx, r1.zzzz | |
| + (p0) frcs r3.___w, r9.z | |
| /* 4.1 */ (p0) exec | |
| /* 52 */ (p0) add r9.xy__, r2.xyyy, -r2.wzzz | |
| + (p0) frcs r6._y__, r9.w | |
| /* 53 */ (p0) mad r2.xy__, r9.xyyy, r3.wwww, r2.wzzz | |
| /* 54 */ (p0) subs r2.__z_, r2.yx | |
| /* 55 */ (p0) mad r6._y__, r2.zzzz, r6.yyyy, r2.xxxx | |
| /* 5.0 */ exec // PredicateClean=false | |
| /* 56 */ setp_pop r6.__z_, r6.z | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 57 */ setp_inv r6.__z_, r6.z | |
| /* 6.0 */ (p0) exec | |
| /* 58 */ (p0) tfetch2D r10.___x, r2.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 59 */ (p0) tfetch2D r10.__x_, r2.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 60 */ (p0) tfetch2D r10._x__, r2.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 61 */ (p0) tfetch2D r10.x___, r2.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 62 */ serialize | |
| (p0) mad r9.__zw, r2.xxxy, c255.zzzz, c255.wwww | |
| /* 63 */ (p0) sge r2, r10.zxyw, r2.zzzz | |
| + (p0) frcs r3.___w, r9.z | |
| /* 6.1 */ (p0) exec | |
| /* 64 */ (p0) add r9.xy__, r2.zwww, -r2.yxxx | |
| + (p0) frcs r6._y__, r9.w | |
| /* 65 */ (p0) mad r2.xy__, r9.xyyy, r3.wwww, r2.yxxx | |
| /* 66 */ (p0) subs r2.__z_, r2.yx | |
| /* 67 */ (p0) mad r6._y__, r2.zzzz, r6.yyyy, r2.xxxx | |
| /* 7.0 */ exec // PredicateClean=false | |
| /* 68 */ setp_pop r6.__z_, r6.z | |
| /* 69 */ tfetch2D r1.xyz_, r0.zw, tf2 | |
| /* 7.1 */ alloc colors | |
| /* 8.0 */ exec | |
| /* 70 */ mul oC0.___w, r7.wwww, r5.wwww | |
| /* 71 */ add r0.xyz_, r3.xyzz, r4.xyzz | |
| + adds r0.___w, c13.ww | |
| /* 72 */ mad r2.xyz_, r5.xyzz, -c13.wwww, r5.xyzz | |
| /* 73 */ add r2.xyz_, r2.zxyy, r2.zxyy | |
| + maxs r5._, r6.yy | |
| /* 74 */ dp3 r5.___w, r0.xyzz, r0.xyzz | |
| + muls_prev r6._y__, r1.w | |
| /* 75 */ mul r6._yzw, r2.zzyx, r6.yyyy | |
| + rsq r5.___w, r_abs[5].w | |
| /* 8.1 */ exec | |
| /* 76 */ mad r6._yzw, r0.wwww, r5.zzxy, r6.wwzy | |
| /* 77 */ mul r5.xyz_, r0.xyzz, r5.wwww | |
| /* 78 */ dp3 r5.x___, r5.xyzz, r8.xyzz | |
| + mulsc r5.___w, c5.w, r6.x | |
| /* 79 */ add r6.x___, -r5.wwww, c255.yyyy | |
| + logc r5.x___, r_abs[5].x | |
| /* 80 */ mulsc r5.x___, c14.w, r5.x | |
| /* 81 */ mul r6._yzw, r6.zzwy, r7.xxyz | |
| + exp r5.x___, r5.x | |
| /* 9.0 */ exec | |
| /* 82 */ max r5.x___, r5.xxxx, c254.xxxx | |
| /* 83 */ mul r5.xyz_, r5.xxxx, r1.xyzz | |
| /* 84 */ mul r5.xyz_, r5.xyzz, c7.xyzz | |
| /* 85 */ mul r5.xyz_, r5.xyzz, c14.xyzz | |
| /* 86 */ mad r5.xyz_, r6.yzww, c0.xyzz, r5.xyzz | |
| /* 87 */ mul r5.xyz_, r6.xxxx, r5.xyzz | |
| /* 9.1 */ exece | |
| /* 88 */ mad oC0.xyz_, r5.wwww, c5.xyzz, r5.xyzz | |
| G> 00000004 Generated pixel shader at 0x0000000209680BE0 (732b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r5, r0.xy, tf0 | |
| /* 9 */ tfetch2D r4._xyz, r0.zw, tf1 | |
| /* 10 */ serialize | |
| sge r6.xy__, c255.xxxx, r2.xyyy | |
| /* 11 */ sge r0.xyz_, r2.xzyy, c255.yyyy | |
| /* 12 */ add r0.___w, r6.xxxx, r0.xxxx | |
| /* 13 */ add r0.___w, r0.wwww, r6.yyyy | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r0.___w, r0.wwww, r0.zzzz | |
| /* 15 */ add r0.x___, r0.wwww, r0.yyyy | |
| /* 16 */ setp_ne_push r0.x___, c255.xxxx, r0.xxxx | |
| /* 17 */ (p0) sge r2.xy__, c255.xxxx, r1.yxxx | |
| /* 18 */ (p0) sge r0._yzw, r1.yyzx, c255.yyyy | |
| /* 19 */ (p0) add r2.__z_, r2.yyyy, r0.wwww | |
| /* 1.0 */ exec // PredicateClean=false | |
| /* 20 */ (p0) add r2.x___, r2.zzzz, r2.xxxx | |
| /* 21 */ (p0) add r2.x___, r2.xxxx, r0.yyyy | |
| /* 22 */ (p0) add r0._y__, r2.xxxx, r0.zzzz | |
| /* 23 */ setp_ne_push r0.x___, r0.xxxx, r0.yyyy | |
| /* 1.1 */ (p0) exec | |
| /* 24 */ (p0) maxs r3.___w, c255.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 25 */ setp_inv r0.x___, r0.x | |
| /* 2.1 */ (p0) exec | |
| /* 26 */ (p0) tfetch2D r2.___x, r1.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 27 */ (p0) tfetch2D r2.__x_, r1.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 28 */ (p0) tfetch2D r2._x__, r1.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 29 */ (p0) tfetch2D r2.x___, r1.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 30 */ serialize | |
| (p0) mad r6.xy__, r1.xyyy, c255.zzzz, c255.wwww | |
| /* 31 */ (p0) sge r2, r2.ywzx, r1.zzzz | |
| + (p0) frcs r0._y__, r6.x | |
| /* 3.0 */ (p0) exec | |
| /* 32 */ (p0) add r0.__zw, r2.xxxy, -r2.wwwz | |
| + (p0) frcs r3.___w, r6.y | |
| /* 33 */ (p0) mad r0._yz_, r0.zzww, r0.yyyy, r2.wwzz | |
| /* 34 */ (p0) subs r0.___w, r0.zy | |
| /* 35 */ (p0) mad r3.___w, r0.wwww, r3.wwww, r0.yyyy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 36 */ setp_pop r0.x___, r0.x | |
| /* 4.0 */ exec // PredicateClean=false | |
| /* 37 */ setp_inv r0.x___, r0.x | |
| /* 4.1 */ (p0) exec | |
| /* 38 */ (p0) tfetch2D r7.___x, r2.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 39 */ (p0) tfetch2D r7.__x_, r2.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 40 */ (p0) tfetch2D r7._x__, r2.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 41 */ (p0) tfetch2D r7.x___, r2.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 42 */ serialize | |
| (p0) mad r6.xy__, r2.xyyy, c255.zzzz, c255.wwww | |
| /* 43 */ (p0) sge r2, r7.zxyw, r2.zzzz | |
| + (p0) frcs r0._y__, r6.x | |
| /* 5.0 */ (p0) exec | |
| /* 44 */ (p0) add r0.__zw, r2.zzzw, -r2.yyyx | |
| + (p0) frcs r3.___w, r6.y | |
| /* 45 */ (p0) mad r0._yz_, r0.zzww, r0.yyyy, r2.yyxx | |
| /* 46 */ (p0) subs r0.___w, r0.zy | |
| /* 47 */ (p0) mad r3.___w, r0.wwww, r3.wwww, r0.yyyy | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 48 */ setp_pop r0.x___, r0.x | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 49 */ dp2add r3.___w, r3.wwww, r1.wwww, c255.xxxx | |
| /* 50 */ mad r0.xyz_, r3.xyzz, -c13.wwww, r3.xyzz | |
| /* 51 */ mul r0.xyz_, r3.wwww, r0.yxzz | |
| + adds r3.___w, c13.ww | |
| /* 52 */ mad r3.xyz_, r3.wwww, r3.zxyy, r0.zyxx | |
| /* 53 */ mul r4._yzw, r3.yyzx, r4.yyzw | |
| /* 54 */ mul r3._yzw, r3.yyzx, r5.xxyz | |
| + mulsc r3.x___, c5.w, r4.x | |
| /* 7.0 */ exece | |
| /* 55 */ mul r3._yzw, r3.yyzw, c0.xxyz | |
| + subsc r4.x___, c255.y, r3.x | |
| /* 56 */ mad r4._yzw, r4.yyzw, c1.xxyz, -r3.yyzw | |
| /* 57 */ mad r3._yzw, r4.yyzw, r5.wwww, r3.yyzw | |
| /* 58 */ mul r3._yzw, r4.xxxx, r3.yyzw | |
| /* 59 */ mad r5.xyz_, r3.xxxx, c5.xyzz, r3.yzww | |
| /* 60 */ max oC0, r5, r5 | |
| /* 7.1 */ cnop | |
| G> 00000004 Generated vertex shader at 0x00000002096DC4A0 (588b): | |
| /* 0.0 */ exec | |
| /* 5 */ vfetch_full r4.xyz_, r0.x, vf0, Offset=3, DataFormat=FMT_32_32_32_FLOAT, Stride=10, Signed=true, NumFormat=integer, PrefetchCount=7 | |
| /* 6 */ vfetch_mini r3.zyxw, Offset=7, DataFormat=FMT_8_8_8_8 | |
| /* 7 */ vfetch_mini r2.xy1_, Offset=8, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 8 */ vfetch_full r0.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=10, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 9 */ mad r1.xyz_, r4.yyyy, c41.xzyy, r0.xzyy | |
| /* 10 */ mad r1.xyz_, r4.xxxx, c40.xzyy, r1.xyzz | |
| /* 11 */ mad r4.xyz_, r4.zzzz, c42.xyzz, r1.xzyy | |
| /* 12 */ mad r1, r4.xxxx, c0.zywx, c3.zywx | |
| /* 13 */ mad r1, r4.yyyy, c1.xwzy, r1.wzxy | |
| /* 14 */ mad oPos, r4.zzzz, c2, r1.xwzy | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exec | |
| /* 15 */ mul r4, r0.wwww, c7.xwzy | |
| /* 16 */ mul r5, r0.zzzz, c6.xwzy | |
| /* 17 */ mul r7, r0.xxxx, c4.xwzy | |
| /* 18 */ mul r6, r0.yyyy, c5.xwzy | |
| /* 19 */ add r0, r7.wzxy, r6.wzxy | |
| /* 20 */ add r0, r0.wzxy, r5.yxwz | |
| /* 2.1 */ exec | |
| /* 21 */ add r8, r0.wzxy, r4.zwyx | |
| /* 22 */ mul r0, r8.yyyy, c9.wxyz | |
| /* 23 */ mul r1, r8.yyyy, c13.wxyz | |
| /* 24 */ mad r1, r8.wwww, c12, r1.yzwx | |
| /* 25 */ mad r0, r8.wwww, c8, r0.yzwx | |
| /* 26 */ mad r0, r8.xxxx, c10.yxzw, r0.yxzw | |
| /* 3.0 */ exec | |
| /* 27 */ mad r1, r8.xxxx, c14.yxzw, r1.yxzw | |
| /* 28 */ mad r1, r8.zzzz, c15.wzyx, r1.wzxy | |
| /* 29 */ mad r8, r8.zzzz, c11.wzyx, r0.wzxy | |
| /* 30 */ rcp r0.x___, r8.x | |
| /* 31 */ rcp r0._y__, r1.x | |
| /* 32 */ mul r9.xy__, r0.xyyy, c255.xxxx | |
| + maxs r0._, r1.yy | |
| /* 3.1 */ exec | |
| /* 33 */ mad r1.xy__, r9.yyyy, r1.wzzz, c255.xxxx | |
| /* 34 */ add r1.__z_, -r1.yyyy, c255.yyyy | |
| + muls_prev r1.___w, r0.y | |
| /* 35 */ mul r0.___w, r8.yyyy, r0.xxxx | |
| /* 36 */ mad r0.xy__, r9.xxxx, r8.zwww, c255.xxxx | |
| /* 37 */ subsc r0.__z_, c255.y, r0.x | |
| /* 38 */ add r0.x___, r7.zzzz, -c43.xxxx | |
| /* 4.0 */ exec | |
| /* 39 */ add r0.x___, r0.xxxx, r6.zzzz | |
| /* 40 */ add r0.x___, r0.xxxx, r5.zzzz | |
| /* 41 */ add r0.x___, r0.xxxx, r4.zzzz | |
| /* 42 */ add o3, r3, r3 | |
| /* 43 */ dp3 o0.x___, c24.xyww, r2.xyzz | |
| /* 44 */ dp3 o0._y__, c25.xyww, r2.xyzz | |
| /* 4.1 */ exece | |
| /* 45 */ mulsc_sat r2.x___, c43.z, r0.x | |
| /* 46 */ max o4._, r0, r0 | |
| + maxs o4.x___, r2.xx | |
| /* 47 */ max o1.xyz1, r0.yzww, r0.yzww | |
| /* 48 */ max o2.xyz_, r1.xzww, r1.xzww | |
| G> 00000004 Generated vertex shader at 0x00000002096E3580 (144b): | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r3.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=6, Signed=true, NumFormat=integer, PrefetchCount=6 | |
| /* 4 */ vfetch_mini r1.zyxw, Offset=3, DataFormat=FMT_8_8_8_8 | |
| /* 5 */ vfetch_mini r0._xy_, Offset=4, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 6 */ mul r2, r3.yyyy, c1.xwzy | |
| /* 7 */ mad r2, r3.xxxx, c0.yzxw, r2.wzxy | |
| /* 8 */ mad r2, r3.zzzz, c2.wxyz, r2.wzxy | |
| /* 9 */ mad oPos, r3.wwww, c3, r2.yzwx | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exece | |
| /* 10 */ max o1, r1, r1 | |
| /* 11 */ max o0.xy__, r0.yzzz, r0.yzzz | |
| /* 2.1 */ cnop | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2FDFF0, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| G> 00000004 Generated vertex shader at 0x00000002096B2B40 (156b): | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r3.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=8, Signed=true, NumFormat=integer, PrefetchCount=8 | |
| /* 4 */ vfetch_mini r1.zyxw, Offset=5, DataFormat=FMT_8_8_8_8 | |
| /* 5 */ vfetch_mini r0._xy1, Offset=6, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 6 */ mul r2, r3.yyyy, c1.xwzy | |
| /* 7 */ mad r2, r3.xxxx, c0.yzxw, r2.wzxy | |
| /* 8 */ mad r2, r3.zzzz, c2.wxyz, r2.wzxy | |
| /* 9 */ mad oPos, r3.wwww, c3, r2.yzwx | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exece | |
| /* 10 */ max o1, r1, r1 | |
| /* 11 */ dp3 o0.x___, c24.xyww, r0.yzww | |
| /* 12 */ dp3 o0._y__, c25.xyww, r0.yzww | |
| /* 2.1 */ cnop | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD30B65C, 401AB6B0, BFFF5008, 4018F170, BEEF0001, 4018F130(ACB30000), 4018F13C(00000006), 4018F140(00000000), 4018F138(00000500), 4018F134(000002D0)) | |
| i> 00000004 XE_SWAP | |
| F> 00000028 Device::ResolvePath(\Compressed\cutscenes\ho_1a\xen) | |
| i> 00000028 VdSwap(AD31C15C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000028 VdSwap(AD32C1DC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD33C25C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD34C2DC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD35C35C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD36C3DC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000028 VdSwap(AD37C45C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD38C4DC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD39C55C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3AC5DC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3BC65C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3CC6DC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3DC75C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3EC7DC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000028 VdSwap(AD3FC85C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD40C8DC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD41C95C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD42C9DC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD43CA5C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD44CADC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD26017C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2701FC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD28027C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000028 VdSwap(AD2902FC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| F> 00000038 Device::ResolvePath(\Compressed\cutscenes\ho_1a\xen\ho_1a_main) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2A037C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2B03FC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2C047C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000028 VdSwap(AD2D04FC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2E057C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000028 VdSwap(AD2F05FC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD30067C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3106FC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000028 VdSwap(AD32077C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3307FC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD34087C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3508FC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000028 VdSwap(AD36097C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3709FC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\cutscenes\ho_1a) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD380A7C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD390AFC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3A0B7C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3B0BFC, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| F> 00000038 Device::ResolvePath(\Compressed\cutscenes\ho_1a\xen\ho_1a_cam0) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3C0C7C, 401AB6B0, BFFF5008, 4018E9C0, BEEF0001, 4018E980(ACB30000), 4018E98C(00000006), 4018E990(00000000), 4018E988(00000500), 4018E984(000002D0)) | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000038 RtlNtStatusToDosError(00000103) | |
| i> 00000038 RtlNtStatusToDosError => 3E5 | |
| i> 00000004 XE_SWAP | |
| i> 00000004 XE_SWAP | |
| A> 00000010 WriteRegister(1A40, 00000001) | |
| A> 00000010 XmaContext: disabling context 0 | |
| A> 00000010 WriteRegister(1A80, 00000001) | |
| A> 00000010 XmaContext: reset context 0 | |
| A> 00000010 WriteRegister(1940, 00000001) | |
| A> 00000010 XmaContext: kicking context 0 (buffer 0 32/1048576 bits) | |
| A> 0000000C Processing context 0 (offset 32, buffer 0, ptr 10428000) | |
| A> 00000010 WriteRegister(1940, 00000001) | |
| A> 00000010 XmaContext: kicking context 0 (buffer 0 851/1048576 bits) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD3D0CFC, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000028 VdSwap(AD408DA0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD435C40, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| G> 00000004 Generated vertex shader at 0x00000002096B36C0 (108b): | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r1.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=5, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 4 */ mul r0, r1.yyyy, c1.wxyz | |
| /* 5 */ mad r0, r1.xxxx, c0.zywx, r0.wzxy | |
| /* 6 */ mad r0, r1.zzzz, c2.xwzy, r0.wzxy | |
| /* 7 */ mad oPos, r1.wwww, c3, r0.xwzy | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exece | |
| /* 8 */ nop | |
| /* 2.1 */ cnop | |
| G> 00000004 Generated vertex shader at 0x00000002096B22E0 (156b): | |
| /* 0.0 */ exec | |
| /* 3 */ vfetch_full r3.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=5, Signed=true, NumFormat=integer | |
| /* 4 */ vfetch_full r1.zyxw, r0.x, vf1, DataFormat=FMT_8_8_8_8, Stride=5, PrefetchCount=3 | |
| /* 5 */ vfetch_mini r0._xy1, Offset=1, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 6 */ mul r2, r3.yyyy, c1.wxyz | |
| /* 7 */ mad r2, r3.xxxx, c0.zywx, r2.wzxy | |
| /* 8 */ mad r2, r3.zzzz, c2.xwzy, r2.wzxy | |
| /* 9 */ mad oPos, r3.wwww, c3, r2.xwzy | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exece | |
| /* 10 */ max o1, r1, r1 | |
| /* 11 */ dp3 o0.x___, c24.xyww, r0.yzww | |
| /* 12 */ dp3 o0._y__, c25.xyww, r0.yzww | |
| /* 2.1 */ cnop | |
| G> 00000004 Generated vertex shader at 0x00000002096D47C0 (756b): | |
| /* 0.0 */ exec | |
| /* 6 */ vfetch_full r3.___w, r0.x, vf1, DataFormat=FMT_8_8_8_8, Stride=5, PrefetchCount=5 | |
| /* 7 */ vfetch_mini r8.xy1_, Offset=1, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 8 */ vfetch_mini r3.xy1_, Offset=3, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 9 */ vfetch_full r10.xyz_, r0.x, vf0, Offset=3, DataFormat=FMT_2_10_10_10, Stride=5, Signed=true | |
| /* 10 */ vfetch_full r0.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=5, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 11 */ mul r1, r0.yyyy, c1.wxyz | |
| /* 12 */ mad r1, r0.xxxx, c0.zywx, r1.wzxy | |
| /* 13 */ mad r1, r0.zzzz, c2.xwzy, r1.wzxy | |
| /* 14 */ mad oPos, r0.wwww, c3, r1.xwzy | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exec | |
| /* 15 */ mul r5, r0.wwww, c7.wxyz | |
| /* 16 */ mul r7, r0.zzzz, c6.wxyz | |
| /* 17 */ mul r11, r0.xxxx, c4.wxyz | |
| /* 18 */ mul r9, r0.yyyy, c5.wxyz | |
| /* 19 */ add r0, r11.wzxy, r9.wzxy | |
| /* 20 */ add r0, r0.wzxy, r7.yxwz | |
| /* 2.1 */ exec | |
| /* 21 */ add r2, r0.wzxy, r5.zwyx | |
| /* 22 */ mul r0, r2.xxxx, c9.wxyz | |
| /* 23 */ mul r1, r2.xxxx, c13.wxyz | |
| /* 24 */ mad r1, r2.zzzz, c12.yzxw, r1.zwyx | |
| /* 25 */ mad r0, r2.zzzz, c8.yzxw, r0.zwyx | |
| /* 26 */ mad r0, r2.yyyy, c10.wxyz, r0.wzxy | |
| /* 3.0 */ exec | |
| /* 27 */ mad r1, r2.yyyy, c14.wxyz, r1.wzxy | |
| /* 28 */ mad r1, r2.wwww, c15, r1.yzwx | |
| /* 29 */ mad r2, r2.wwww, c11, r0.yzwx | |
| /* 30 */ rcp r0._y__, r2.w | |
| /* 31 */ rcp r0.x___, r1.w | |
| /* 32 */ mul r0.__zw, r0.yyyx, c255.xxxx | |
| + maxs r0._, r1.zz | |
| /* 3.1 */ exec | |
| /* 33 */ mad r1.xy__, r0.wwww, r1.xyyy, c255.xxxx | |
| /* 34 */ add r1.__z_, -r1.yyyy, c255.zzzz | |
| + muls_prev r1.___w, r0.x | |
| /* 35 */ dp3 r4.x___, r10.xyzz, -c51.xyzz | |
| /* 36 */ dp3 r4._y__, r10.xyzz, -c53.xyzz | |
| /* 37 */ dp3 r4.__z_, r10.xyzz, -c49.xyzz | |
| /* 38 */ mul r6.xyz_, r10.yyyy, c5.xzyy | |
| /* 4.0 */ exec | |
| /* 39 */ add r0.x___, r11.wwww, -c43.xxxx | |
| /* 40 */ mad r6.xyz_, r10.xxxx, c4.xyzz, r6.xzyy | |
| /* 41 */ mad r6.xyz_, -r10.zzzz, c6.yxzz, -r6.yxzz | |
| /* 42 */ add r0.x___, r0.xxxx, r9.wwww | |
| /* 43 */ max r4.xyz_, r4.xyzz, c255.yyyy | |
| /* 44 */ max o3._, r0, r0 | |
| + adds o3.___w, r3.ww | |
| /* 4.1 */ exec | |
| /* 45 */ dp3 o0.x___, c24.xyww, r8.xyzz | |
| /* 46 */ dp3 o0._y__, c25.xyww, r8.xyzz | |
| /* 47 */ dp3 o0.__z_, c28.xyww, r3.xyzz | |
| /* 48 */ dp3 o0.___w, c29.xyww, r3.xyzz | |
| /* 49 */ mad r3.xyz_, r4.zzzz, c50.xyzz, c48.xyzz | |
| /* 50 */ add r0.x___, r0.xxxx, r7.wwww | |
| /* 5.0 */ exec | |
| /* 51 */ dp3 r3.___w, c44.xyzz, r6.yxzz | |
| /* 52 */ max o1.___w, r3.wwww, c255.yyyy | |
| /* 53 */ add r0.x___, r0.xxxx, r5.wwww | |
| /* 54 */ mad r3.xyz_, r4.xxxx, c52.xyzz, r3.xyzz | |
| /* 55 */ mad o3.xyz_, r4.yyyy, c54.xyzz, r3.xyzz | |
| /* 56 */ mulsc_sat r0.x___, c43.z, r0.x | |
| /* 5.1 */ exece | |
| /* 57 */ max o4._, r0, r0 | |
| + maxs o4.x___, r0.xx | |
| /* 58 */ mul o1.__z_, r2.zzzz, r0.yyyy | |
| /* 59 */ mad r0.xy__, r0.zzzz, r2.xyyy, c255.xxxx | |
| /* 60 */ max o1._, r0, r0 | |
| + maxs o1.x___, r0.xx | |
| /* 61 */ max o1._, r0, r0 | |
| + subsc o1._y__, c255.z, r0.y | |
| /* 62 */ max o2.xyz_, r1.xzww, r1.xzww | |
| G> 00000004 Generated pixel shader at 0x000000020967D740 (744b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r5, r0.xy, tf0 | |
| /* 9 */ tfetch2D r0, r0.zw, tf1 | |
| /* 10 */ serialize | |
| sge r6.xy__, c255.xxxx, r2.xyyy | |
| /* 11 */ sge r4._yzw, r2.xxzy, c255.yyyy | |
| /* 12 */ add r2.___w, r6.xxxx, r4.yyyy | |
| /* 13 */ add r2.___w, r2.wwww, r6.yyyy | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r2.___w, r2.wwww, r4.wwww | |
| /* 15 */ add r4._y__, r2.wwww, r4.zzzz | |
| /* 16 */ setp_ne_push r4.__z_, c255.xxxx, r4.yyyy | |
| /* 17 */ (p0) sge r4._y_w, c255.xxxx, r1.yyxx | |
| /* 18 */ (p0) sge r2.xyz_, r1.yzxx, c255.yyyy | |
| /* 19 */ (p0) add r2.___w, r4.wwww, r2.zzzz | |
| /* 1.0 */ exec // PredicateClean=false | |
| /* 20 */ (p0) add r4._y__, r2.wwww, r4.yyyy | |
| /* 21 */ (p0) add r4._y__, r4.yyyy, r2.xxxx | |
| /* 22 */ (p0) add r4._y__, r4.yyyy, r2.yyyy | |
| /* 23 */ setp_ne_push r4.__z_, r4.zzzz, r4.yyyy | |
| /* 1.1 */ (p0) exec | |
| /* 24 */ (p0) maxs r4._y__, c255.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 25 */ setp_inv r4.__z_, r4.z | |
| /* 2.1 */ (p0) exec | |
| /* 26 */ (p0) tfetch2D r6.___x, r1.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 27 */ (p0) tfetch2D r6.__x_, r1.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 28 */ (p0) tfetch2D r6._x__, r1.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 29 */ (p0) tfetch2D r6.x___, r1.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 30 */ serialize | |
| (p0) mad r2.x__w, r1.xyyy, c255.zzzz, c255.wwww | |
| /* 31 */ (p0) sge r6, r6.ywzx, r1.zzzz | |
| + (p0) frcs r4._y__, r2.x | |
| /* 3.0 */ (p0) exec | |
| /* 32 */ (p0) add r2._yz_, r6.xxyy, -r6.wwzz | |
| + (p0) frcs r2.x___, r2.w | |
| /* 33 */ (p0) mad r4._y_w, r2.yyzz, r4.yyyy, r6.wwzz | |
| /* 34 */ (p0) subs r2._y__, r4.wy | |
| /* 35 */ (p0) mad r4._y__, r2.yyyy, r2.xxxx, r4.yyyy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 36 */ setp_pop r4.__z_, r4.z | |
| /* 4.0 */ exec // PredicateClean=false | |
| /* 37 */ setp_inv r4.__z_, r4.z | |
| /* 4.1 */ (p0) exec | |
| /* 38 */ (p0) tfetch2D r6.___x, r2.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 39 */ (p0) tfetch2D r6.__x_, r2.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 40 */ (p0) tfetch2D r6._x__, r2.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 41 */ (p0) tfetch2D r6.x___, r2.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 42 */ serialize | |
| (p0) mad r2.x__w, r2.xyyy, c255.zzzz, c255.wwww | |
| /* 43 */ (p0) sge r6, r6.zxyw, r2.zzzz | |
| + (p0) frcs r4._y__, r2.x | |
| /* 5.0 */ (p0) exec | |
| /* 44 */ (p0) add r2._yz_, r6.zzww, -r6.yyxx | |
| + (p0) frcs r2.x___, r2.w | |
| /* 45 */ (p0) mad r4._y_w, r2.yyzz, r4.yyyy, r6.yyxx | |
| /* 46 */ (p0) subs r2._y__, r4.wy | |
| /* 47 */ (p0) mad r4._y__, r2.yyyy, r2.xxxx, r4.yyyy | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 48 */ setp_pop r4.__z_, r4.z | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 49 */ dp2add r1.x___, r4.yyyy, r1.wwww, c255.xxxx | |
| /* 50 */ mad r4._yzw, r3.xxyz, -c13.wwww, r3.xxyz | |
| /* 51 */ mul r4._yzw, r1.xxxx, r4.zzyw | |
| + adds r1.x___, c13.ww | |
| /* 52 */ mad r3.xyz_, r1.xxxx, r3.zxyy, r4.wzyy | |
| /* 53 */ mul r4._yzw, r3.yyzx, r5.xxyz | |
| /* 54 */ mul r3.xyz_, r3.yzxx, r0.xyzz | |
| /* 7.0 */ exec | |
| /* 55 */ mul r3.xyz_, r3.xyzz, c1.xyzz | |
| /* 56 */ mul r3._yzw, r3.yyxz, r3.wwww | |
| + mulsc r3.x___, c5.w, r4.x | |
| /* 57 */ mul r3._yzw, r3.zzyw, r0.wwww | |
| + subsc r4.x___, c255.y, r3.x | |
| /* 58 */ mad r3._yzw, r4.yyzw, c0.xxyz, r3.yyzw | |
| /* 59 */ mul r3._yzw, r4.xxxx, r3.yyzw | |
| /* 60 */ mad r5.xyz_, r3.xxxx, c5.xyzz, r3.yzww | |
| /* 7.1 */ exece | |
| /* 61 */ max oC0, r5, r5 | |
| G> 00000004 Generated vertex shader at 0x00000002096D4F20 (840b): | |
| /* 0.0 */ exec | |
| /* 7 */ vfetch_full r1.xyz1, r0.x, vf0, DataFormat=FMT_32_32_32_FLOAT, Stride=5, Signed=true, NumFormat=integer, PrefetchCount=4 | |
| /* 8 */ vfetch_mini r0._xzy, Offset=3, DataFormat=FMT_2_10_10_10, Signed=true | |
| /* 9 */ vfetch_full r4.___w, r0.x, vf1, DataFormat=FMT_8_8_8_8, Stride=3, PrefetchCount=3 | |
| /* 10 */ vfetch_mini r6.xy1_, Offset=1, DataFormat=FMT_32_32_FLOAT, Signed=true, NumFormat=integer | |
| /* 0.1 */ alloc position | |
| /* 1.0 */ exec | |
| /* 11 */ mul r2, r1.yyyy, c1.wxyz | |
| /* 12 */ mad r2, r1.xxxx, c0.xwyz, r2.yxzw | |
| /* 13 */ mad r2, r1.zzzz, c2.zxyw, r2.wxzy | |
| /* 14 */ mad oPos, r1.wwww, c3, r2.yzxw | |
| /* 1.1 */ alloc interpolators | |
| /* 2.0 */ exec | |
| /* 15 */ mul r8, r1.wwww, c7.wzyx | |
| /* 16 */ mul r9, r1.zzzz, c6.wzyx | |
| /* 17 */ mul r13, r1.xxxx, c4.wzyx | |
| /* 18 */ mul r11, r1.yyyy, c5.wzyx | |
| /* 19 */ add r1, r13.yzwx, r11.yzwx | |
| /* 20 */ add r1, r1.zyxw, r9.wzyx | |
| /* 2.1 */ exec | |
| /* 21 */ add r5, r1.wxyz, r8.xwzy | |
| /* 22 */ mul r1, r5.zzzz, c9.xwzy | |
| /* 23 */ mul r2, r5.zzzz, c13.xwzy | |
| /* 24 */ mad r2, r5.yyyy, c12.yzxw, r2.wzxy | |
| /* 25 */ mad r1, r5.yyyy, c8.yzxw, r1.wzxy | |
| /* 26 */ mad r1, r5.wwww, c10.wxyz, r1.wzxy | |
| /* 3.0 */ exec | |
| /* 27 */ mad r2, r5.wwww, c14.wxyz, r2.wzxy | |
| /* 28 */ mad r2, r5.xxxx, c15.zyxw, r2.wzyx | |
| /* 29 */ mad r3, r5.xxxx, c11.zyxw, r1.wzyx | |
| /* 30 */ rcp r1.x___, r3.w | |
| /* 31 */ rcp r1._y__, r2.w | |
| /* 32 */ mul r1.__zw, r1.xxxy, c255.xxxx | |
| + maxs r0._, r2.xx | |
| /* 3.1 */ exec | |
| /* 33 */ mad r2.xy__, r1.wwww, r2.zyyy, c255.xxxx | |
| /* 34 */ add r2.__z_, -r2.yyyy, c255.zzzz | |
| + muls_prev r2.___w, r1.y | |
| /* 35 */ dp3 r7.x___, r0.ywzz, -c51.xyzz | |
| /* 36 */ dp3 r7._y__, r0.ywzz, -c53.xyzz | |
| /* 37 */ dp3 r7.__z_, r0.ywzz, -c49.xyzz | |
| /* 38 */ dp3 r1._y__, r0.ywzz, r0.ywzz | |
| /* 4.0 */ exec | |
| /* 39 */ mul r12.xyz_, r0.zzzz, c6.xzyy | |
| + mulsc r4.x___, c5.x, r0.w | |
| /* 40 */ mul r14.xyz_, r0.yyyy, c4.xzyy | |
| + mulsc r4._y__, c5.z, r0.w | |
| /* 41 */ add r10.xyz_, r12.zyxx, r14.zyxx | |
| + mulsc r4.__z_, c5.y, r0.w | |
| /* 42 */ add r0.xyz_, r14.xzyy, r4.xzyy | |
| + maxs r0._, r13.yy | |
| /* 43 */ add r0._yzw, -r0.yyxz, -r12.zzxy | |
| + adds_prev r0.x___, -c43.x | |
| /* 44 */ add r0.x___, r0.xxxx, r11.yyyy | |
| /* 4.1 */ exec | |
| /* 45 */ max r7.xyz_, r7.xyzz, c255.yyyy | |
| /* 46 */ add r4.xyz_, r10.zyxx, r4.xyzz | |
| + rsq r1._y__, r_abs[1].y | |
| /* 47 */ max o3._, r0, r0 | |
| + adds o3.___w, r4.ww | |
| /* 48 */ dp3 o0.x___, c24.xyww, r6.xyzz | |
| /* 49 */ dp3 o0._y__, c25.xyww, r6.xyzz | |
| /* 50 */ mul r4.xyz_, r4.xyzz, r1.yyyy | |
| /* 5.0 */ exec | |
| /* 51 */ mad r6.xyz_, r7.zzzz, c50.xyzz, c48.xyzz | |
| /* 52 */ add r0.x___, r0.xxxx, r9.yyyy | |
| /* 53 */ dp3 r0._y__, c44.xyzz, r0.zyww | |
| /* 54 */ max o1.___w, r0.yyyy, c255.yyyy | |
| /* 55 */ add r0._y__, r0.xxxx, r8.yyyy | |
| /* 56 */ dp3 r0.x___, r5.yzww, r5.yzww | |
| /* 5.1 */ exec | |
| /* 57 */ mad r6.xyz_, r7.xxxx, c52.xyzz, r6.xyzz | |
| /* 58 */ mad o3.xyz_, r7.yyyy, c54.xyzz, r6.xyzz | |
| /* 59 */ mul_sat r0._y__, r0.yyyy, c43.zzzz | |
| + rsq r0.x___, r_abs[0].x | |
| /* 60 */ max o4._, r0, r0 | |
| + maxs o4.x___, r0.yy | |
| /* 61 */ mul r0.xyz_, r5.zyww, r0.xxxx | |
| /* 62 */ dp3 r0.___w, -r0.yxzz, r4.xzyy | |
| /* 6.0 */ exec | |
| /* 63 */ adds r0.___w, r0.ww | |
| /* 64 */ mul o1.__z_, r3.xxxx, r1.xxxx | |
| /* 65 */ mad o0.__zw, r0.wwww, r4.xxxz, r0.yyyx | |
| /* 66 */ mad r0.xy__, r1.zzzz, r3.zyyy, c255.xxxx | |
| /* 67 */ max o1._, r0, r0 | |
| + maxs o1.x___, r0.xx | |
| /* 68 */ max o1._, r0, r0 | |
| + subsc o1._y__, c255.z, r0.y | |
| /* 6.1 */ exece | |
| /* 69 */ max o2.xyz_, r2.xzww, r2.xzww | |
| G> 00000004 Generated pixel shader at 0x0000000209684060 (744b): | |
| /* 0.0 */ exec | |
| /* 8 */ tfetch2D r5, r0.xy, tf0 | |
| /* 9 */ tfetch2D r0, r0.zw, tf1 | |
| /* 10 */ serialize | |
| sge r6.xy__, c255.xxxx, r2.xyyy | |
| /* 11 */ sge r4._yzw, r2.xxzy, c255.yyyy | |
| /* 12 */ add r2.___w, r6.xxxx, r4.yyyy | |
| /* 13 */ add r2.___w, r2.wwww, r6.yyyy | |
| /* 0.1 */ exec // PredicateClean=false | |
| /* 14 */ add r2.___w, r2.wwww, r4.wwww | |
| /* 15 */ add r4._y__, r2.wwww, r4.zzzz | |
| /* 16 */ setp_ne_push r4.__z_, c255.xxxx, r4.yyyy | |
| /* 17 */ (p0) sge r4._y_w, c255.xxxx, r1.yyxx | |
| /* 18 */ (p0) sge r2.xyz_, r1.yzxx, c255.yyyy | |
| /* 19 */ (p0) add r2.___w, r4.wwww, r2.zzzz | |
| /* 1.0 */ exec // PredicateClean=false | |
| /* 20 */ (p0) add r4._y__, r2.wwww, r4.yyyy | |
| /* 21 */ (p0) add r4._y__, r4.yyyy, r2.xxxx | |
| /* 22 */ (p0) add r4._y__, r4.yyyy, r2.yyyy | |
| /* 23 */ setp_ne_push r4.__z_, r4.zzzz, r4.yyyy | |
| /* 1.1 */ (p0) exec | |
| /* 24 */ (p0) maxs r4._y__, c255.yy | |
| /* 2.0 */ exec // PredicateClean=false | |
| /* 25 */ setp_inv r4.__z_, r4.z | |
| /* 2.1 */ (p0) exec | |
| /* 26 */ (p0) tfetch2D r6.___x, r1.xy, tf12, OffsetX=0.5, OffsetY=0.5 | |
| /* 27 */ (p0) tfetch2D r6.__x_, r1.xy, tf12, OffsetX=-0.5, OffsetY=0.5 | |
| /* 28 */ (p0) tfetch2D r6._x__, r1.xy, tf12, OffsetX=0.5, OffsetY=-0.5 | |
| /* 29 */ (p0) tfetch2D r6.x___, r1.xy, tf12, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 30 */ serialize | |
| (p0) mad r2.x__w, r1.xyyy, c255.zzzz, c255.wwww | |
| /* 31 */ (p0) sge r6, r6.ywzx, r1.zzzz | |
| + (p0) frcs r4._y__, r2.x | |
| /* 3.0 */ (p0) exec | |
| /* 32 */ (p0) add r2._yz_, r6.xxyy, -r6.wwzz | |
| + (p0) frcs r2.x___, r2.w | |
| /* 33 */ (p0) mad r4._y_w, r2.yyzz, r4.yyyy, r6.wwzz | |
| /* 34 */ (p0) subs r2._y__, r4.wy | |
| /* 35 */ (p0) mad r4._y__, r2.yyyy, r2.xxxx, r4.yyyy | |
| /* 3.1 */ exec // PredicateClean=false | |
| /* 36 */ setp_pop r4.__z_, r4.z | |
| /* 4.0 */ exec // PredicateClean=false | |
| /* 37 */ setp_inv r4.__z_, r4.z | |
| /* 4.1 */ (p0) exec | |
| /* 38 */ (p0) tfetch2D r6.___x, r2.xy, tf13, OffsetX=0.5, OffsetY=0.5 | |
| /* 39 */ (p0) tfetch2D r6.__x_, r2.xy, tf13, OffsetX=-0.5, OffsetY=0.5 | |
| /* 40 */ (p0) tfetch2D r6._x__, r2.xy, tf13, OffsetX=0.5, OffsetY=-0.5 | |
| /* 41 */ (p0) tfetch2D r6.x___, r2.xy, tf13, OffsetX=-0.5, OffsetY=-0.5 | |
| /* 42 */ serialize | |
| (p0) mad r2.x__w, r2.xyyy, c255.zzzz, c255.wwww | |
| /* 43 */ (p0) sge r6, r6.zxyw, r2.zzzz | |
| + (p0) frcs r4._y__, r2.x | |
| /* 5.0 */ (p0) exec | |
| /* 44 */ (p0) add r2._yz_, r6.zzww, -r6.yyxx | |
| + (p0) frcs r2.x___, r2.w | |
| /* 45 */ (p0) mad r4._y_w, r2.yyzz, r4.yyyy, r6.yyxx | |
| /* 46 */ (p0) subs r2._y__, r4.wy | |
| /* 47 */ (p0) mad r4._y__, r2.yyyy, r2.xxxx, r4.yyyy | |
| /* 5.1 */ exec // PredicateClean=false | |
| /* 48 */ setp_pop r4.__z_, r4.z | |
| /* 6.0 */ alloc colors | |
| /* 6.1 */ exec | |
| /* 49 */ mul oC0.___w, r5.wwww, r3.wwww | |
| /* 50 */ dp2add r1.x___, r4.yyyy, r1.wwww, c255.xxxx | |
| /* 51 */ mad r4._yzw, r3.xxyz, -c13.wwww, r3.xxyz | |
| /* 52 */ mul r4._yzw, r1.xxxx, r4.zzyw | |
| + adds r1.x___, c13.ww | |
| /* 53 */ mad r3.xyz_, r1.xxxx, r3.zxyy, r4.wzyy | |
| /* 54 */ mul r4._yzw, r3.yyzx, r5.xxyz | |
| /* 7.0 */ exec | |
| /* 55 */ mul r3.xyz_, r3.yzxx, r0.xyzz | |
| /* 56 */ mul r3.xyz_, r3.xyzz, c1.xyzz | |
| /* 57 */ mul r3._yzw, r3.yyxz, r3.wwww | |
| + mulsc r3.x___, c5.w, r4.x | |
| /* 58 */ mul r3._yzw, r3.zzyw, r0.wwww | |
| + subsc r4.x___, c255.y, r3.x | |
| /* 59 */ mad r3._yzw, r4.yyzw, c0.xxyz, r3.yyzw | |
| /* 60 */ mul r3._yzw, r4.xxxx, r3.yyzw | |
| /* 7.1 */ exece | |
| /* 61 */ mad oC0.xyz_, r3.xxxx, c5.xyzz, r3.yzww | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD262C60, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2AF400, 401AB6B0, BFFF5008, 4018F940, BEEF0001, 4018F900(ACB30000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) | |
| i> 00000004 XE_SWAP | |
| i> 00000028 VdSwap(AD2F0AA0, 401AB670, BFFF5008, 4018F940, BEEF0001, 4018F900(ACEC8000), 4018F90C(00000006), 4018F910(00000000), 4018F908(00000500), 4018F904(000002D0)) |
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