riscv_mimpid_test.S

la x6, supervisor_exception_handler  
        csrw mtvec, x6       ## Writing address of the exception handler into MTVEC
    csrr x30, 0x341    ## Reading initial value MEPC CSR
    csrr x31, 0x342    ## Reading initial value of MCAUSE CSR

 

    
    ## set start address range t0 x7
     la x7, supervisor_code
     li x28, 0x10000
     add x7, x7, x28
     # Enable R,W,X,TOR IN PMPCFG CSR t0 x8
     li x8, 0x0F
    #set PMPADDR0 CSR with x7
     csrw 0x3B0, x7
    # set PMPCFG0 CSR with x8
     csrw 0x3A0, x8

 


    # Save the current mode in x28
        csrr x28, 0x300

 

        # Set the MPP field to supervisor mode (1)
        li x29, 0b1
        slli x29, x29, 11
        addi x28, x29, 0

 

        # Write the modified MSTATUS value back to the CSR
        csrw 0x300, x28
    la x28, supervisor_code
        csrw 0x341, x28
    csrr x31, 0x300

 

    mret

 

 

 

# Supervisor code starts here
supervisor_code:
    csrr x1, 3859
      li x5, 0x00000000
      bne x5, x1, csr_fail
    csrr x1, 3859
      li x5, 0x00000000
      bne x5, x1, csr_fail
    csrr x6, 3859
    li x7, 0x00000000
    bne x6, x7, csr_fail
    # CSR_MIMPID
    li x5, 0xa5a5a5a5
    csrrw x1, 3859, x5
    li x5, 0x00000000
    bne x5, x1, csr_fail
    li x5, 0x5a5a5a5a
    csrrw x1, 3859, x5
    li x5, 0x00000000
    bne x5, x1, csr_fail
    li x5, 0x067ec813
    csrrw x1, 3859, x5
    li x5, 0x00000000
    bne x5, x1, csr_fail
    li x5, 0xa5a5a5a5
    csrrs x1, 3859, x5
    li x5, 0x00000000
    bne x5, x1, csr_fail
    li x5, 0x5a5a5a5a
    csrrs x1, 3859, x5
    li x5, 0x00000000
    bne x5, x1, csr_fail
    li x5, 0x52f12149
    csrrs x1, 3859, x5
    li x5, 0x00000000
    bne x5, x1, csr_fail
    li x5, 0xa5a5a5a5
    csrrc x1, 3859, x5
    li x5, 0x00000000
    bne x5, x1, csr_fail
    li x5, 0x5a5a5a5a
    csrrc x1, 3859, x5
    li x5, 0x00000000
    bne x5, x1, csr_fail
    li x5, 0xd8bf28b7
    csrrc x1, 3859, x5
    li x5, 0x00000000
    bne x5, x1, csr_fail
    csrrwi x1, 3859, 0b00101
    li x5, 0x00000000
    bne x5, x1, csr_fail
    csrrwi x1, 3859, 0b11010
    li x5, 0x00000000
    bne x5, x1, csr_fail
    csrrwi x1, 3859, 0b11000
    li x5, 0x00000000
    bne x5, x1, csr_fail
    csrrsi x1, 3859, 0b00101
    li x5, 0x00000000
    bne x5, x1, csr_fail
    csrrsi x1, 3859, 0b11010
    li x5, 0x00000000
    bne x5, x1, csr_fail
    csrrsi x1, 3859, 0b10100
    li x5, 0x00000000
    bne x5, x1, csr_fail
    csrrci x1, 3859, 0b00101
    li x5, 0x00000000
    bne x5, x1, csr_fail
    csrrci x1, 3859, 0b11010
    li x5, 0x00000000
    bne x5, x1, csr_fail
    csrrci x1, 3859, 0b10111
    li x5, 0x00000000
    bne x5, x1, csr_fail
      csrr x1, 3859
      li x5, 0x00000000
      bne x5, x1, csr_fail
    j user_mode_code_start

 

supervisor_exception_handler:
        csrr x30, 0x341        ## Reading MEPC CSR which holds exception origin Address        
        csrr x31, 0x342     ## Reading MCAUSE CSR which holds the cause of exception
        li x2 ,2
        beq x31, x2, next_iter1   ## Checking is exception is expected exception or not
        j csr_fail

 

next_iter1:
    csrw 0x342, 0        ## Reseting MCAUSE value to 0 before handling new exception
    beq x30, x0, csr_fail

    li x29, 0b1
        slli x29, x29, 11
        addi x28, x29, 0

 

        # Write the modified MSTATUS value back to the CSR
        csrw 0x300, x28
    addi x7, x30, 12
        jr x7            ## Jump to MEPC + 12 Address location

csr_pass:
li x1, 0
slli x1, x1, 1
addi x1, x1, 1
sw x1, tohost, x30
self_loop: j self_loop

csr_fail:
li x1, 1
slli x1, x1, 1
addi x1, x1, 1
sw x1, tohost, x30
self_loop_2: j self_loop_2