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@spirilis
Created September 21, 2015 08:41
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RX GPIO Template class - fabooh-esque
/***************************************************************/
/* */
/* PROJECT NAME : sci_uart_drv */
/* FILE : sci_uart_drv.cpp */
/* DESCRIPTION : Main Program */
/* CPU SERIES : RX200 */
/* CPU TYPE : RX210 */
/* */
/* This file is generated by e2 studio. */
/* */
/***************************************************************/
/************************************************************************/
/* File Version: V1.00 */
/* Date Generated: 08/07/2013 */
/************************************************************************/
#include "iodefine.h"
#include <rx_peripherals.h>
#include <AbstractWiring.h>
#include <SCIC_UART.h>
#ifdef CPPAPP
//Initialize global constructors
extern "C" void __main()
{
static int initialized;
if (! initialized)
{
typedef void (*pfunc) ();
extern pfunc __ctors[];
extern pfunc __ctors_end[];
pfunc *p;
initialized = 1;
for (p = __ctors_end; p > __ctors; )
(*--p) ();
}
}
#endif
SCIC_UART<SFRBASE_SCI5, 128, 128> Serial;
#include <RXGPIO.h>
RXGPIO_PIN<RXGPIO_PORT<RX_PORT1>,5> P1_5;
RXGPIO_PIN<RXGPIO_PORT<RX_PORT1>,6> P1_6;
RXGPIO_PIN<RXGPIO_PORT<RX_PORT1>,7> P1_7;
int main(void)
{
__main(); // Run CTORS
// TODO: add application code here
// Using PA4 (TXD5), PA3 (RXD5) for SCI UART
SYSTEM.PRCR.WORD = 0xA502; // Enable SCI5 module
MSTP(SCI5) = 0;
SYSTEM.PRCR.WORD = 0xA500;
IEN(SCI5, RXI5) = 1;
IEN(SCI5, TXI5) = 1;
IPR(SCI5, RXI5) = 4;
IPR(SCI5, TXI5) = 4;
//__builtin_rx_setpsw(8); // Interrupts active - this happens by default in reset_program.asm
PORTA.PMR.BYTE &= ~(BIT3 | BIT4);
PORTA.PDR.BYTE = (PORTA.PDR.BYTE & ~(BIT3|BIT4)) | BIT4; // PA4 = TXD = Output, PA3 = RXD = Input
MPC.PWPR.BIT.B0WI = 0; // Disable MPC write protection
MPC.PWPR.BIT.PFSWE = 1;
MPC.PA4PFS.BIT.PSEL = 0x0A; // 0x0A = Communications peripheral function
MPC.PA3PFS.BIT.PSEL = 0x0A;
MPC.PWPR.BIT.PFSWE = 0;
MPC.PWPR.BIT.B0WI = 1; // Re-enable MPC write protection
PORTA.PMR.BYTE |= BIT3 | BIT4;
// Port config done
Serial.begin(115200);
static unsigned long i = 0;
P1_5.pinMode(true); P1_5.digitalWrite(1);
P1_6.pinMode(true); P1_6.digitalWrite(1);
P1_7.pinMode(true); P1_7.digitalWrite(1);
while (1) {
Serial.print("Hi there- ");
Serial.println(++i);
P1_7.digitalWrite(!P1_7.digitalRead());
P1_6.digitalWrite(!P1_6.digitalRead());
}
return 0;
}
/* GPIO type for Renesas RX (useful for hardcoding port+bit information
* for use by other templated C++ class libraries)
*
* Applicable for RX2xx and RX63x chips only thus far.
*/
#ifndef RXGPIO_H
#define RXGPIO_H
#include <AbstractWiring.h>
#include <iodefine.h>
// RX GPIO Ports - generic struct for the basics
struct rx_gpio_port_t {
uint8_t PDR;
char deadspace0[31];
uint8_t PODR;
char deadspace1[31];
uint8_t PIDR;
char deadspace2[31];
uint8_t PMR;
char deadspace3[31];
};
enum rx_gpio_port {
RX_PORT0 = 0,
RX_PORT1,
RX_PORT2,
RX_PORT3,
RX_PORT4,
RX_PORT5,
RX_PORT6,
RX_PORT7,
RX_PORT8,
RX_PORT9,
RX_PORTA,
RX_PORTB,
RX_PORTC,
RX_PORTD,
RX_PORTE,
RX_PORTF,
RX_PORTG,
RX_PORTH,
RX_PORTJ,
RX_PORTK,
RX_PORTL,
};
typedef volatile struct rx_gpio_port_t rx_portstruct;
template <const rx_gpio_port portnum>
struct RXGPIO_PORT {
static const rx_gpio_port _portnum = portnum; // not sure if this is necessary?
__inline static rx_portstruct * portdef() { // can't get past having to return a pointer here
if (_portnum == RX_PORT0)
return (rx_portstruct *)&SFRBASE_PORT0;
if (_portnum == RX_PORT1)
return (rx_portstruct *)&SFRBASE_PORT1;
if (_portnum == RX_PORT2)
return (rx_portstruct *)&SFRBASE_PORT2;
if (_portnum == RX_PORT3)
return (rx_portstruct *)&SFRBASE_PORT3;
if (_portnum == RX_PORT4)
return (rx_portstruct *)&SFRBASE_PORT4;
if (_portnum == RX_PORT5)
return (rx_portstruct *)&SFRBASE_PORT5;
if (_portnum == RX_PORT6)
return (rx_portstruct *)&SFRBASE_PORT6;
if (_portnum == RX_PORT7)
return (rx_portstruct *)&SFRBASE_PORT7;
if (_portnum == RX_PORT8)
return (rx_portstruct *)&SFRBASE_PORT8;
if (_portnum == RX_PORT9)
return (rx_portstruct *)&SFRBASE_PORT9;
if (_portnum == RX_PORTA)
return (rx_portstruct *)&SFRBASE_PORTA;
if (_portnum == RX_PORTB)
return (rx_portstruct *)&SFRBASE_PORTB;
if (_portnum == RX_PORTC)
return (rx_portstruct *)&SFRBASE_PORTC;
if (_portnum == RX_PORTD)
return (rx_portstruct *)&SFRBASE_PORTD;
if (_portnum == RX_PORTE)
return (rx_portstruct *)&SFRBASE_PORTE;
if (_portnum == RX_PORTF)
return (rx_portstruct *)&SFRBASE_PORTF;
#ifdef PORTG
if (_portnum == RX_PORTG)
return (rx_portstruct *)&SFRBASE_PORTG;
#endif
#ifdef PORTH
if (_portnum == RX_PORTH)
return (rx_portstruct *)&SFRBASE_PORTH;
#endif
#ifdef PORTI
if (_portnum == RX_PORTI)
return (rx_portstruct *)&SFRBASE_PORTI;
#endif
#ifdef PORTJ
if (_portnum == RX_PORTJ)
return (rx_portstruct *)&SFRBASE_PORTJ;
#endif
#ifdef PORTK
if (_portnum == RX_PORTK)
return (rx_portstruct *)&SFRBASE_PORTK;
#endif
#ifdef PORTL
if (_portnum == RX_PORTL)
return (rx_portstruct *)&SFRBASE_PORTL;
#endif
return (rx_portstruct *)&SFRBASE_PORT0;
}
__inline static volatile uint8_t & PIN() { return portdef()->PIDR; }
__inline static volatile uint8_t & POUT() { return portdef()->PODR; }
__inline static volatile uint8_t & PDIR() { return portdef()->PDR; }
};
// RX GPIO Pins (based on the PORT)
template <
typename PORT,
uint8_t PIN >
struct RXGPIO_PIN {
static const uint8_t _pinmask = (1 << PIN);
__inline static boolean digitalRead() {
if (PORT::PIN() & _pinmask)
return 1;
return 0;
};
__inline static void digitalWrite(boolean value) {
if (value)
PORT::POUT() |= _pinmask;
else
PORT::POUT() &= ~_pinmask;
};
__inline static void pinMode(boolean outyn) {
if (outyn)
PORT::PDIR() |= _pinmask;
else
PORT::PDIR() &= ~_pinmask;
}
};
#endif /* RXGPIO_H */
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