MSP430FR2433 basic dual UART loopback echo with UART_DETECT line lighting up P1.1 (green LED) and P1.0 during activity

main.c

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#include "driverlib.h"
#include "Board.h"

/* 12V EV Battery Monitor firmware pins */
#define UART_DETECT_PxDIR P2DIR
#define UART_DETECT_PxIN P2IN
#define UART_DETECT_PxREN P2REN
#define UART_DETECT_PxOUT P2OUT
#define UART_DETECT_PxIE P2IE
#define UART_DETECT_PxIES P2IES
#define UART_DETECT_PxIFG P2IFG
#define UART_DETECT_PxBIT BIT2

#define EN_12VMEAS_PxDIR P2DIR
#define EN_12VMEAS_PxIN P2IN
#define EN_12VMEAS_PxREN P2REN
#define EN_12VMEAS_PxOUT P2OUT
#define EN_12VMEAS_PxIE P2IE
#define EN_12VMEAS_PxIES P2IES
#define EN_12VMEAS_PxIFG P2IFG
#define EN_12VMEAS_PxBIT BIT4

#define SOLARCHG_EN_PxDIR P2DIR
#define SOLARCHG_EN_PxIN P2IN
#define SOLARCHG_EN_PxREN P2REN
#define SOLARCHG_EN_PxOUT P2OUT
#define SOLARCHG_EN_PxIE P2IE
#define SOLARCHG_EN_PxIES P2IES
#define SOLARCHG_EN_PxIFG P2IFG
#define SOLARCHG_EN_PxBIT BIT7

void main (void)
{
    volatile uint32_t clockSpeed = 0;
    WDTCTL = WDTPW | WDTHOLD;
    P1DIR |= BIT0|BIT1;
    P1OUT &= ~(BIT0|BIT1);
    // XT1 support
    P2SEL1 &= ~(BIT0 | BIT1);
    P2SEL0 |= BIT0|BIT1;
    // eUSCI_A0 support
    P1SEL1 &= ~(BIT4 | BIT5);
    P1SEL0 |= BIT4|BIT5;
    // eUSCI_A1 support
    P2SEL1 &= ~(BIT5 | BIT6);
    P2SEL0 |= BIT5|BIT6;

    // Init UART_DETECT, 12VMEAS_EN, SOLARCHG_EN
    UART_DETECT_PxDIR &= ~UART_DETECT_PxBIT;
    UART_DETECT_PxREN |= UART_DETECT_PxBIT;
    UART_DETECT_PxOUT |= UART_DETECT_PxBIT;
    UART_DETECT_PxIES |= UART_DETECT_PxBIT; // Trigger on high-to-low transition
    UART_DETECT_PxIFG &= ~UART_DETECT_PxBIT;
    UART_DETECT_PxIE |= UART_DETECT_PxBIT;  // Enable interrupt

    EN_12VMEAS_PxDIR |= EN_12VMEAS_PxBIT;
    EN_12VMEAS_PxOUT &= ~EN_12VMEAS_PxBIT;
    EN_12VMEAS_PxIE &= ~EN_12VMEAS_PxBIT;

    SOLARCHG_EN_PxDIR |= SOLARCHG_EN_PxBIT;
    SOLARCHG_EN_PxOUT &= ~SOLARCHG_EN_PxBIT;
    SOLARCHG_EN_PxIE &= ~SOLARCHG_EN_PxBIT;

    PMM_unlockLPM5();

    FRAMCtl_configureWaitStateControl(FRAMCTL_ACCESS_TIME_CYCLES_1);

    CS_setExternalClockSource(32768);
    bool xt1Ret = CS_turnOnXT1LFWithTimeout(CS_XT1_DRIVE_3, 65535);
    if (xt1Ret) {
        CS_initClockSignal(CS_FLLREF, CS_XT1CLK_SELECT, CS_CLOCK_DIVIDER_1); // DCO FLL ref = REFO
    } else {
        CS_initClockSignal(CS_FLLREF, CS_REFOCLK_SELECT, CS_CLOCK_DIVIDER_1); // DCO FLL ref = REFO
    }
    bool fllRet = CS_initFLLSettle(16000, 488); // 488 is 16000000 / 32768
    CS_initClockSignal(CS_MCLK, CS_DCOCLKDIV_SELECT, CS_CLOCK_DIVIDER_1); // Activate MCLK = DCO w/ FLL

    if (!xt1Ret) {
        P1OUT |= BIT0;
    }
    if (!fllRet) {
        P1OUT |= BIT0;
    }

    // Initialize eUSCI_A0
    EUSCI_A_UART_initParam ea0Init;
    ea0Init.uartMode = EUSCI_A_UART_MODE;
    ea0Init.selectClockSource = EUSCI_A_UART_CLOCKSOURCE_SMCLK;
    ea0Init.parity = EUSCI_A_UART_NO_PARITY;
    ea0Init.overSampling = EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION;
    ea0Init.msborLsbFirst = EUSCI_A_UART_LSB_FIRST;
    ea0Init.numberofStopBits = EUSCI_A_UART_ONE_STOP_BIT;
    uint32_t brDiv, brMod;
    brDiv = (16000000 << 4) / 115200;
    brMod = brDiv & 0xFFF0;
    brDiv >>= 8;
    brMod >>= 4;
    ea0Init.clockPrescalar = brDiv;
    ea0Init.firstModReg = brMod & 0x0F;
    ea0Init.secondModReg = brMod >> 4;
    EUSCI_A_UART_init(EUSCI_A0_BASE, &ea0Init);
    EUSCI_A_UART_enable(EUSCI_A0_BASE);
    EUSCI_A_UART_resetDormant(EUSCI_A0_BASE);
    EUSCI_A_UART_enableInterrupt(EUSCI_A0_BASE, EUSCI_A_UART_TRANSMIT_INTERRUPT | EUSCI_A_UART_RECEIVE_INTERRUPT);

    // Initialize eUSCI_A1
    EUSCI_A_UART_init(EUSCI_A1_BASE, &ea0Init);
    EUSCI_A_UART_enable(EUSCI_A1_BASE);
    EUSCI_A_UART_resetDormant(EUSCI_A1_BASE);
    EUSCI_A_UART_enableInterrupt(EUSCI_A1_BASE, EUSCI_A_UART_TRANSMIT_INTERRUPT | EUSCI_A_UART_RECEIVE_INTERRUPT);

    if (UART_DETECT_PxIN & UART_DETECT_PxBIT) // High level = not connected, low = connected
        P1OUT &= ~BIT1;
    else
        P1OUT |= BIT1;

    __enable_interrupt();

    //Toggle LED1
    while (1) {
        P1OUT &= ~BIT0;
        __delay_cycles(2000000);
    }
}

#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=USCI_A0_VECTOR
__interrupt void USCI_A0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(USCI_A0_VECTOR))) USCI_A0_ISR (void)
#else
#error Compiler not supported!
#endif
{
  switch(__even_in_range(UCA0IV,USCI_UART_UCTXCPTIFG))
  {
    case USCI_NONE: break;
    case USCI_UART_UCRXIFG:
      P1OUT |= BIT0;
      while(UCA0STATW&UCBUSY);
      UCA0TXBUF = UCA0RXBUF;
      __no_operation();
      break;
    case USCI_UART_UCTXIFG:
      //P1OUT &= ~BIT0;
      break;
    case USCI_UART_UCSTTIFG: break;
    case USCI_UART_UCTXCPTIFG: break;
    default: break;
  }
}

#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=USCI_A1_VECTOR
__interrupt void USCI_A1_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(USCI_A1_VECTOR))) USCI_A1_ISR (void)
#else
#error Compiler not supported!
#endif
{
  switch(__even_in_range(UCA1IV,USCI_UART_UCTXCPTIFG))
  {
    case USCI_NONE: break;
    case USCI_UART_UCRXIFG:
      P1OUT |= BIT0;
      while(UCA1STATW&UCBUSY);
      UCA1TXBUF = UCA1RXBUF;
      __no_operation();
      break;
    case USCI_UART_UCTXIFG:
      //P1OUT &= ~BIT0;
      break;
    case USCI_UART_UCSTTIFG: break;
    case USCI_UART_UCTXCPTIFG: break;
    default: break;
  }
}

#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=PORT2_VECTOR
__interrupt void PORT2_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(PORT2_VECTOR))) PORT2_ISR (void)
#else
#error Compiler not supported!
#endif
{
  switch(__even_in_range(P2IV, P2IV_P2IFG7))
  {
    case P2IV_NONE: break;
    case P2IV_P2IFG0: break;
    case P2IV_P2IFG1: break;
    case P2IV_P2IFG2:
        if (UART_DETECT_PxIN & UART_DETECT_PxBIT) // High level = not connected, low = connected
            P1OUT &= ~BIT1;
        else
            P1OUT |= BIT1;
        UART_DETECT_PxIES = (UART_DETECT_PxIES & ~UART_DETECT_PxBIT) | (UART_DETECT_PxIN & UART_DETECT_PxBIT);
        break;
    case P2IV_P2IFG3: break;
    case P2IV_P2IFG4: break;
    case P2IV_P2IFG5: break;
    case P2IV_P2IFG6: break;
    case P2IV_P2IFG7: break;
    default: break;
  }
}