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Created September 24, 2016 15:46
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notes.md

The I2S_LRCLK and I2S_SCLK can be programmed as master (driven to an external target) or slave (driven from an external source). When the clocks are in slave mode, they must be synchronous to SYS_MCLK. For this reason the SGTL5000 can only operate in synchronous mode (see Clocking) while in I2S slave mode. In master mode, the clocks are synchronous to SYS_MCLK or the output of the PLL when the part is running in asynchronous mode

http://engineering.stackexchange.com/questions/3959/what-are-left-justified-and-right-justified-adc-results

http://cache.nxp.com/files/training/Serial-Audio-Interface-Training.pdf

http://www.nxp.com/files/microcontrollers/doc/app_note/AN4520.pdf

http://www.nxp.com/files/32bit/doc/app_note/AN4369.pdf

http://www.nxp.com/files/32bit/doc/app_note/AN4800.pdf

http://kex.nxp.com/apidoc/group__sai.html#gaefe0557861a223913d7b1d8959a56995

https://cache.freescale.com/files/32bit/doc/ref_manual/K20P64M50SF0RM.pdf

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