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from myhdl import Signal, block, always, delay | |
class Test: | |
def __init__(self, clock, sig=Signal(bool(0))): | |
self.clock = clock | |
self.sig = sig | |
@block | |
def process(self, i): | |
@always(self.clock.posedge) | |
def test(): | |
if i == 0: | |
self.sig.next = self.sig | |
else: | |
self.sig.next = not self.sig | |
return test | |
@block | |
def clock_driver(clock, d=1): | |
half_period = delay(d) | |
@always(half_period) | |
def drive_clock(): | |
clock.next = not clock | |
return drive_clock | |
@block | |
def test_bench(): | |
clock = Signal(bool(0)) | |
clk_drive = clock_driver(clock) | |
a = Test(clock) | |
ap = a.process(0) | |
ap.name = 'a' | |
b = Test(clock) | |
bp = b.process(1) | |
bp.name = 'b' | |
return clk_drive, bp, ap | |
t = test_bench() | |
t.config_sim(trace=True) | |
t.run_sim(100) |
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