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$ cat coin_jam.cr | |
n = 16 | |
j = 50 | |
max_bound = (2**n - 1).to_u64 | |
min_bound = (max_bound - 2**(n-1) + 2).to_u64 | |
puts "Case #1:" | |
cur = min_bound |
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/* | |
* Usage: gcc -DCPU_CLOCK_FREQUENCY=1200000000 test-arm-neon-mix.S && time ./a.out | |
* gcc -DCPU_CLOCK_FREQUENCY=1200000000 -DINTERLEAVED test-arm-neon-mix.S && time ./a.out | |
* | |
* | -DINTERLEAVED | separate ARM and NEON code chunks | |
* ------------+---------------+----------------------------------- | |
* Cortex-A15 | ~6.7 cycles | ~5.7 cycles (!) | |
* ------------+---------------+----------------------------------- | |
* Cortex-A8 | 7.0 cycles | 7.0 cycles | |
* ------------+---------------+----------------------------------- |
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diff --git a/util.c b/util.c | |
index 52e88b4..ec7c6ff 100644 | |
--- a/util.c | |
+++ b/util.c | |
@@ -59,26 +59,30 @@ void aligned_block_copy_backwards(int64_t * __restrict dst, | |
int size) | |
{ | |
int64_t t1, t2, t3, t4; | |
- src += size / 8 - 1; | |
- dst += size / 8 - 1; |
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int main() | |
{ | |
volatile double a = 1.0; | |
volatile double b = 1.0; | |
for (;;) { | |
a /= b; | |
} | |
return 0; | |
} |
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<6>[ 0.000000] Initializing cgroup subsys cpuset | |
<6>[ 0.000000] Initializing cgroup subsys cpu | |
<6>[ 0.000000] Initializing cgroup subsys cpuacct | |
<5>[ 0.000000] Linux version 3.10.93 (jenkins@pallas.corp.jide.com) (gcc version 4.9.3 20150113 (prerelease) (Linaro GCC 4.9-2015.01-3) ) #1 SMP PREEMPT Thu Jan 14 13:49:55 CST 2016 | |
<4>[ 0.000000] CPU: AArch64 Processor [410fd034] revision 4 | |
<6>[ 0.000000] Machine: sun50iw1p1 | |
<6>[ 0.000000] bootconsole [earlycon0] enabled | |
<6>[ 0.000000] cma: CMA: reserved 300 MiB at ad400000 | |
<7>[ 0.000000] On node 0 totalpages: 520192 | |
<7>[ 0.000000] DMA zone: 7112 pages used for memmap |
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U-Boot SPL 2016.01-00352-ge77e0e4-dirty (Jan 24 2016 - 10:26:33) | |
DRAM:DRAM driver version: V1.0 | |
DRAM Type = 3 (2:DDR2,3:DDR3,6:LPDDR2,7:LPDDR3) | |
DRAM clk = 672 MHz | |
DRAM zq value: 3b3bbb | |
DRAM single rank full DQ OK | |
DRAM size = 1024 MB | |
DRAM init ok | |
1024 MiB | |
Trying to boot from MMC |
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/* Usage: gcc -DCPU_CLOCK_FREQUENCY=1008000000 test.S && time ./a.out | |
*/ | |
.cpu cortex-a53+fp+simd | |
.file "1.c" | |
.text | |
.align 2 | |
.global main | |
.type main, %function | |
main: |
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/* Usage: gcc -DCPU_CLOCK_FREQUENCY=1008000000 arm64-neon-throughput-test.S && time ./a.out | |
*/ | |
.cpu cortex-a53+fp+simd | |
.file "1.c" | |
.text | |
.align 2 | |
.global main | |
.type main, %function | |
main: |
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From 29f1fc1eda7db3907a1f0f0ca7f2bdd0b541c62b Mon Sep 17 00:00:00 2001 | |
From: Siarhei Siamashka <siarhei.siamashka@gmail.com> | |
Date: Mon, 14 Dec 2015 08:47:38 +0200 | |
Subject: [PATCH] OpenRISC support for GCC 5.2.0 | |
This is the difference between 1672972457156a6b701152f0f1c7c8696220a4dc | |
from https://github.com/openrisc/or1k-gcc.git and vanilla GCC 5.2.0 | |
--- | |
ChangeLog.or1k | 8 + |
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From bd714466d306c1affb94da77b3343797c5e6450d Mon Sep 17 00:00:00 2001 | |
From: Siarhei Siamashka <siarhei.siamashka@gmail.com> | |
Date: Sat, 12 Dec 2015 04:30:55 +0200 | |
Subject: [PATCH] OpenRISC (or1k) support for GCC 4.9.2 | |
This is the difference between 80794b79e069d2dc28e15d2843ef55a7066ed9a1 | |
from https://github.com/openrisc/or1k-gcc.git and vanilla GCC 4.9.2 | |
--- | |
ChangeLog.or1k | 8 + | |
config.guess | 5 +- |