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@stintel
Created July 17, 2023 17:46
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root@OpenWrt:/# cat /proc/cpuinfo
system type : Unsupported Board (CN7020p1.2-1200-CP)
machine : Unknown
processor : 0
cpu model : Cavium Octeon III V0.2 FPU V0.0
BogoMIPS : 2400.00
wait instruction : yes
microsecond timers : yes
tlb_entries : 256
extra interrupt vector : yes
hardware watchpoint : yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
isa : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r2
ASEs implemented : vz
Options implemented : tlb rixiex 4kex octeon_cache fpu 32fpr prefetch mcheck ejtag llsc guestctl0ext guestctl2 rixi lpa vtag_icache userlocal perf_cntr_intr_bit nan_legacy ebase_wg badinstr badinstrp perf
shadow register sets : 1
kscratch registers : 4
package : 0
core : 0
VCED exceptions : not available
VCEI exceptions : not available
processor : 1
cpu model : Cavium Octeon III V0.2 FPU V0.0
BogoMIPS : 2400.00
wait instruction : yes
microsecond timers : yes
tlb_entries : 256
extra interrupt vector : yes
hardware watchpoint : yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
isa : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r2
ASEs implemented : vz
Options implemented : tlb rixiex 4kex octeon_cache fpu 32fpr prefetch mcheck ejtag llsc guestctl0ext guestctl2 rixi lpa vtag_icache userlocal perf_cntr_intr_bit nan_legacy ebase_wg badinstr badinstrp perf
shadow register sets : 1
kscratch registers : 4
package : 0
core : 1
VCED exceptions : not available
VCEI exceptions : not available
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