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diff is01-kernel and msm-kernel(dcdb890bc3e49ba5091230e73e976d9f6860fffe)
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| diff -x .git -rNU 8 kernel-msm/.gitignore kernel/.gitignore | |
| --- kernel-msm/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1,66 +0,0 @@ | |
| -# | |
| -# NOTE! Don't add files that are generated in specific | |
| -# subdirectories here. Add them in the ".gitignore" file | |
| -# in that subdirectory instead. | |
| -# | |
| -# NOTE! Please use 'git-ls-files -i --exclude-standard' | |
| -# command after changing this file, to see if there are | |
| -# any tracked files which get ignored after the change. | |
| -# | |
| -# Normal rules | |
| -# | |
| -.* | |
| -*.o | |
| -*.o.* | |
| -*.a | |
| -*.s | |
| -*.ko | |
| -*.so | |
| -*.so.dbg | |
| -*.mod.c | |
| -*.i | |
| -*.lst | |
| -*.symtypes | |
| -*.order | |
| -*.elf | |
| -*.bin | |
| -*.gz | |
| - | |
| -# | |
| -# Top-level generic files | |
| -# | |
| -tags | |
| -TAGS | |
| -vmlinux | |
| -System.map | |
| -Module.markers | |
| -Module.symvers | |
| -!.gitignore | |
| -!.mailmap | |
| - | |
| -# | |
| -# Generated include files | |
| -# | |
| -include/asm | |
| -include/asm-*/asm-offsets.h | |
| -include/config | |
| -include/linux/autoconf.h | |
| -include/linux/compile.h | |
| -include/linux/version.h | |
| -include/linux/utsrelease.h | |
| -include/linux/bounds.h | |
| - | |
| -# stgit generated dirs | |
| -patches-* | |
| - | |
| -# quilt's files | |
| -patches | |
| -series | |
| - | |
| -# cscope files | |
| -cscope.* | |
| -ncscope.* | |
| - | |
| -*.orig | |
| -*~ | |
| -\#*# | |
| diff -x .git -rNU 8 kernel-msm/AndroidKernel.mk kernel/AndroidKernel.mk | |
| --- kernel-msm/AndroidKernel.mk 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/AndroidKernel.mk 2010-08-27 11:17:28.000000000 +0900 | |
| @@ -1,21 +1,33 @@ | |
| #Android makefile to build kernel as a part of Android Build | |
| ifeq ($(TARGET_PREBUILT_KERNEL),) | |
| KERNEL_OUT := $(TARGET_OUT_INTERMEDIATES)/KERNEL_OBJ | |
| KERNEL_CONFIG := $(KERNEL_OUT)/.config | |
| -TARGET_PREBUILT_KERNEL := $(KERNEL_OUT)/arch/arm/boot/zImage | |
| +TARGET_PREBUILT_KERNEL := $(KERNEL_OUT)/arch/arm/boot/Image | |
| $(KERNEL_OUT): | |
| mkdir -p $(KERNEL_OUT) | |
| +ifeq ($(TARGET_BUILD_VARIANT),user) | |
| +define format_kernel_config_engineering | |
| +endef | |
| +else | |
| +define format_kernel_config_engineering | |
| + awk -F '[ =]' 'function no(a){print a"=y"} function yes(a){print "\# "a" is not set"} {if($$1~/^CONFIG_/)name=$$1;else if($$2~/CONFIG_/)name=$$2;else{print; next};if(name~/^CONFIG_DEVK?MEM$$/)no(name);else if(name=="CONFIG_ANDROID_ENGINEERING")no(name);else if(name=="CONFIG_SECURITY_DECKARD")yes(name);else print}' $(1) > $(KERNEL_OUT)/tmp | |
| + rm $(1) | |
| + cp $(KERNEL_OUT)/tmp $(1) | |
| +endef | |
| +endif | |
| + | |
| $(KERNEL_CONFIG): $(KERNEL_OUT) | |
| $(MAKE) -C kernel O=../$(KERNEL_OUT) ARCH=arm CROSS_COMPILE=arm-eabi- $(KERNEL_DEFCONFIG) | |
| + $(call format_kernel_config_engineering, $(KERNEL_CONFIG)) | |
| $(TARGET_PREBUILT_KERNEL): $(KERNEL_OUT) $(KERNEL_CONFIG) | |
| $(MAKE) -C kernel O=../$(KERNEL_OUT) ARCH=arm CROSS_COMPILE=arm-eabi- | |
| kerneltags: $(KERNEL_OUT) $(KERNEL_CONFIG) | |
| $(MAKE) -C kernel O=../$(KERNEL_OUT) ARCH=arm CROSS_COMPILE=arm-eabi- tags | |
| kernelconfig: $(KERNEL_OUT) $(KERNEL_CONFIG) | |
| diff -x .git -rNU 8 kernel-msm/Documentation/DocBook/.gitignore kernel/Documentation/DocBook/.gitignore | |
| --- kernel-msm/Documentation/DocBook/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/Documentation/DocBook/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1,6 +0,0 @@ | |
| -*.xml | |
| -*.ps | |
| -*.html | |
| -*.9.gz | |
| -*.9 | |
| diff -x .git -rNU 8 kernel-msm/Documentation/accounting/.gitignore kernel/Documentation/accounting/.gitignore | |
| --- kernel-msm/Documentation/accounting/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/Documentation/accounting/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1 +0,0 @@ | |
| -getdelays | |
| diff -x .git -rNU 8 kernel-msm/Documentation/android.txt kernel/Documentation/android.txt | |
| --- kernel-msm/Documentation/android.txt 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/Documentation/android.txt 2010-08-27 11:18:14.000000000 +0900 | |
| @@ -9,28 +9,35 @@ | |
| --------- | |
| 1. Android | |
| 1.1 Required enabled config options | |
| 1.2 Required disabled config options | |
| 1.3 Recommended enabled config options | |
| 2. Contact | |
| +0. Getting sources: | |
| +----------------- | |
| + | |
| +git clone --reference /path/to/linux-git/for/speedup/ git://android.git.kernel.org/kernel/msm.git | |
| +git checkout -b android-msm-2.6.29 origin/android-msm-2.6.29 | |
| + | |
| 1. Android | |
| ========== | |
| Android (www.android.com) is an open source operating system for mobile devices. | |
| This document describes configurations needed to run the Android framework on | |
| top of the Linux kernel. | |
| To see a working defconfig look at msm_defconfig or goldfish_defconfig | |
| which can be found at http://android.git.kernel.org in kernel/common.git | |
| and kernel/msm.git | |
| +msm_defconfig should work on qualcomm reference design, HTC Magic and G1/ADP1. | |
| 1.1 Required enabled config options | |
| ----------------------------------- | |
| After building a standard defconfig, ensure that these options are enabled in | |
| your .config or defconfig if they are not already. Based off the msm_defconfig. | |
| You should keep the rest of the default options enabled in the defconfig | |
| unless you know what you are doing. | |
| @@ -109,13 +116,30 @@ | |
| INPUT_TOUCHSCREEN | |
| I2C | |
| I2C_BOARDINFO | |
| LOG_BUF_SHIFT=17 | |
| SERIAL_CORE | |
| SERIAL_CORE_CONSOLE | |
| +Board code names | |
| +---------------- | |
| + | |
| +board-halibut - Qualcomm SURF 7201A | |
| +board-sapphire - HTC Magic | |
| +board-trout - HTC Dream / T-Mobile G1 / Android ADP1 | |
| + | |
| +Booting your kernel | |
| +------------------- | |
| + | |
| +hold down camera and red button to boot into rainbow screen. Then | |
| + | |
| +./fastboot boot linux-msm/arch/arm/boot/zImage ramdisk.img | |
| + | |
| +Machine will freeze at rainbow screen for a while, be | |
| +patient. ramdisk.img is required. | |
| + | |
| 2. Contact | |
| ========== | |
| website: http://android.git.kernel.org | |
| mailing-lists: android-kernel@googlegroups.com | |
| diff -x .git -rNU 8 kernel-msm/Documentation/auxdisplay/.gitignore kernel/Documentation/auxdisplay/.gitignore | |
| --- kernel-msm/Documentation/auxdisplay/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/Documentation/auxdisplay/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1 +0,0 @@ | |
| -cfag12864b-example | |
| diff -x .git -rNU 8 kernel-msm/Documentation/connector/.gitignore kernel/Documentation/connector/.gitignore | |
| --- kernel-msm/Documentation/connector/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/Documentation/connector/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1 +0,0 @@ | |
| -ucon | |
| diff -x .git -rNU 8 kernel-msm/Documentation/ia64/.gitignore kernel/Documentation/ia64/.gitignore | |
| --- kernel-msm/Documentation/ia64/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/Documentation/ia64/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1 +0,0 @@ | |
| -aliasing-test | |
| diff -x .git -rNU 8 kernel-msm/Documentation/networking/.gitignore kernel/Documentation/networking/.gitignore | |
| --- kernel-msm/Documentation/networking/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/Documentation/networking/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1 +0,0 @@ | |
| -ifenslave | |
| diff -x .git -rNU 8 kernel-msm/Documentation/pcmcia/.gitignore kernel/Documentation/pcmcia/.gitignore | |
| --- kernel-msm/Documentation/pcmcia/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/Documentation/pcmcia/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1 +0,0 @@ | |
| -crc32hash | |
| diff -x .git -rNU 8 kernel-msm/Documentation/spi/.gitignore kernel/Documentation/spi/.gitignore | |
| --- kernel-msm/Documentation/spi/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/Documentation/spi/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1,2 +0,0 @@ | |
| -spidev_fdx | |
| -spidev_test | |
| diff -x .git -rNU 8 kernel-msm/Documentation/video4linux/.gitignore kernel/Documentation/video4linux/.gitignore | |
| --- kernel-msm/Documentation/video4linux/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/Documentation/video4linux/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1 +0,0 @@ | |
| -v4lgrab | |
| diff -x .git -rNU 8 kernel-msm/Documentation/vm/.gitignore kernel/Documentation/vm/.gitignore | |
| --- kernel-msm/Documentation/vm/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/Documentation/vm/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1 +0,0 @@ | |
| -slabinfo | |
| diff -x .git -rNU 8 kernel-msm/Documentation/watchdog/src/.gitignore kernel/Documentation/watchdog/src/.gitignore | |
| --- kernel-msm/Documentation/watchdog/src/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/Documentation/watchdog/src/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1,2 +0,0 @@ | |
| -watchdog-simple | |
| -watchdog-test | |
| diff -x .git -rNU 8 kernel-msm/arch/.gitignore kernel/arch/.gitignore | |
| --- kernel-msm/arch/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1,2 +0,0 @@ | |
| -i386 | |
| -x86_64 | |
| diff -x .git -rNU 8 kernel-msm/arch/alpha/kernel/.gitignore kernel/arch/alpha/kernel/.gitignore | |
| --- kernel-msm/arch/alpha/kernel/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/alpha/kernel/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1 +0,0 @@ | |
| -vmlinux.lds | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/Makefile kernel/arch/arm/Makefile | |
| --- kernel-msm/arch/arm/Makefile 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/Makefile 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -200,17 +200,17 @@ | |
| drivers-$(CONFIG_OPROFILE) += arch/arm/oprofile/ | |
| libs-y := arch/arm/lib/ $(libs-y) | |
| # Default target when executing plain make | |
| ifeq ($(CONFIG_XIP_KERNEL),y) | |
| KBUILD_IMAGE := xipImage | |
| else | |
| -KBUILD_IMAGE := zImage | |
| +KBUILD_IMAGE := Image | |
| endif | |
| all: $(KBUILD_IMAGE) | |
| boot := arch/arm/boot | |
| # Update machine arch and proc symlinks if something which affects | |
| # them changed. We use .arch to indicate when they were updated | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/boot/.gitignore kernel/arch/arm/boot/.gitignore | |
| --- kernel-msm/arch/arm/boot/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/boot/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1,5 +0,0 @@ | |
| -Image | |
| -zImage | |
| -xipImage | |
| -bootpImage | |
| -uImage | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/boot/compressed/.gitignore kernel/arch/arm/boot/compressed/.gitignore | |
| --- kernel-msm/arch/arm/boot/compressed/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/boot/compressed/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1,3 +0,0 @@ | |
| -font.c | |
| -piggy.gz | |
| -vmlinux.lds | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/configs/deckard_defconfig kernel/arch/arm/configs/deckard_defconfig | |
| --- kernel-msm/arch/arm/configs/deckard_defconfig 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/configs/deckard_defconfig 2011-07-04 15:50:18.000000000 +0900 | |
| @@ -0,0 +1,1780 @@ | |
| +# | |
| +# Automatically generated make config: don't edit | |
| +# Linux kernel version: 2.6.29 | |
| +# | |
| +CONFIG_ARM=y | |
| +CONFIG_SYS_SUPPORTS_APM_EMULATION=y | |
| +CONFIG_GENERIC_GPIO=y | |
| +CONFIG_GENERIC_TIME=y | |
| +CONFIG_GENERIC_CLOCKEVENTS=y | |
| +CONFIG_MMU=y | |
| +# CONFIG_NO_IOPORT is not set | |
| +CONFIG_GENERIC_HARDIRQS=y | |
| +CONFIG_STACKTRACE_SUPPORT=y | |
| +CONFIG_HAVE_LATENCYTOP_SUPPORT=y | |
| +CONFIG_LOCKDEP_SUPPORT=y | |
| +CONFIG_TRACE_IRQFLAGS_SUPPORT=y | |
| +CONFIG_HARDIRQS_SW_RESEND=y | |
| +CONFIG_GENERIC_IRQ_PROBE=y | |
| +CONFIG_RWSEM_GENERIC_SPINLOCK=y | |
| +# CONFIG_ARCH_HAS_ILOG2_U32 is not set | |
| +# CONFIG_ARCH_HAS_ILOG2_U64 is not set | |
| +CONFIG_GENERIC_HWEIGHT=y | |
| +CONFIG_GENERIC_CALIBRATE_DELAY=y | |
| +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | |
| +CONFIG_OPROFILE_ARMV7=y | |
| +CONFIG_VECTORS_BASE=0xffff0000 | |
| +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | |
| + | |
| +# | |
| +# General setup | |
| +# | |
| +CONFIG_EXPERIMENTAL=y | |
| +CONFIG_BROKEN_ON_SMP=y | |
| +CONFIG_LOCK_KERNEL=y | |
| +CONFIG_INIT_ENV_ARG_LIMIT=32 | |
| +CONFIG_LOCALVERSION="$(KERNEL_LOCAL_VERSION)-perf" | |
| +# CONFIG_LOCALVERSION_AUTO is not set | |
| +# CONFIG_SWAP is not set | |
| +CONFIG_SYSVIPC=y | |
| +CONFIG_SYSVIPC_SYSCTL=y | |
| +# CONFIG_POSIX_MQUEUE is not set | |
| +# CONFIG_BSD_PROCESS_ACCT is not set | |
| +# CONFIG_TASKSTATS is not set | |
| +# CONFIG_AUDIT is not set | |
| + | |
| +# | |
| +# RCU Subsystem | |
| +# | |
| +CONFIG_CLASSIC_RCU=y | |
| +# CONFIG_TREE_RCU is not set | |
| +# CONFIG_PREEMPT_RCU is not set | |
| +# CONFIG_TREE_RCU_TRACE is not set | |
| +# CONFIG_PREEMPT_RCU_TRACE is not set | |
| +CONFIG_IKCONFIG=y | |
| +CONFIG_IKCONFIG_PROC=y | |
| +CONFIG_LOG_BUF_SHIFT=17 | |
| +# CONFIG_GROUP_SCHED is not set | |
| +# CONFIG_CGROUPS is not set | |
| +# CONFIG_SYSFS_DEPRECATED_V2 is not set | |
| +# CONFIG_RELAY is not set | |
| +# CONFIG_NAMESPACES is not set | |
| +CONFIG_BLK_DEV_INITRD=y | |
| +CONFIG_INITRAMFS_SOURCE="" | |
| +CONFIG_CC_OPTIMIZE_FOR_SIZE=y | |
| +CONFIG_SYSCTL=y | |
| +CONFIG_ANON_INODES=y | |
| +CONFIG_PANIC_TIMEOUT=1 | |
| +CONFIG_EMBEDDED=y | |
| +CONFIG_UID16=y | |
| +CONFIG_SYSCTL_SYSCALL=y | |
| +CONFIG_KALLSYMS=y | |
| +# CONFIG_KALLSYMS_ALL is not set | |
| +# CONFIG_KALLSYMS_EXTRA_PASS is not set | |
| +CONFIG_HOTPLUG=y | |
| +CONFIG_PRINTK=y | |
| +CONFIG_BUG=y | |
| +CONFIG_ELF_CORE=y | |
| +CONFIG_BASE_FULL=y | |
| +CONFIG_FUTEX=y | |
| +CONFIG_EPOLL=y | |
| +CONFIG_SIGNALFD=y | |
| +CONFIG_TIMERFD=y | |
| +CONFIG_EVENTFD=y | |
| +CONFIG_SHMEM=y | |
| +CONFIG_AIO=y | |
| +CONFIG_ASHMEM=y | |
| +CONFIG_VM_EVENT_COUNTERS=y | |
| +CONFIG_COMPAT_BRK=y | |
| +CONFIG_SLAB=y | |
| +# CONFIG_SLUB is not set | |
| +# CONFIG_SLOB is not set | |
| +CONFIG_PROFILING=y | |
| +CONFIG_TRACEPOINTS=y | |
| +# CONFIG_MARKERS is not set | |
| +CONFIG_OPROFILE=m | |
| +CONFIG_HAVE_OPROFILE=y | |
| +# CONFIG_KPROBES is not set | |
| +CONFIG_HAVE_KPROBES=y | |
| +CONFIG_HAVE_KRETPROBES=y | |
| +CONFIG_HAVE_CLK=y | |
| +CONFIG_HAVE_GENERIC_DMA_COHERENT=y | |
| +CONFIG_SLABINFO=y | |
| +CONFIG_RT_MUTEXES=y | |
| +CONFIG_BASE_SMALL=0 | |
| +CONFIG_MODULES=y | |
| +# CONFIG_MODULE_FORCE_LOAD is not set | |
| +CONFIG_MODULE_UNLOAD=y | |
| +CONFIG_MODULE_FORCE_UNLOAD=y | |
| +# CONFIG_MODVERSIONS is not set | |
| +# CONFIG_MODULE_SRCVERSION_ALL is not set | |
| +CONFIG_BLOCK=y | |
| +# CONFIG_LBD is not set | |
| +# CONFIG_BLK_DEV_IO_TRACE is not set | |
| +# CONFIG_BLK_DEV_BSG is not set | |
| +# CONFIG_BLK_DEV_INTEGRITY is not set | |
| + | |
| +# | |
| +# IO Schedulers | |
| +# | |
| +CONFIG_IOSCHED_NOOP=y | |
| +CONFIG_IOSCHED_AS=y | |
| +# CONFIG_IOSCHED_DEADLINE is not set | |
| +# CONFIG_IOSCHED_CFQ is not set | |
| +CONFIG_DEFAULT_AS=y | |
| +# CONFIG_DEFAULT_DEADLINE is not set | |
| +# CONFIG_DEFAULT_CFQ is not set | |
| +# CONFIG_DEFAULT_NOOP is not set | |
| +CONFIG_DEFAULT_IOSCHED="anticipatory" | |
| +CONFIG_FREEZER=y | |
| + | |
| +# | |
| +# System Type | |
| +# | |
| +# CONFIG_ARCH_AAEC2000 is not set | |
| +# CONFIG_ARCH_INTEGRATOR is not set | |
| +# CONFIG_ARCH_REALVIEW is not set | |
| +# CONFIG_ARCH_VERSATILE is not set | |
| +# CONFIG_ARCH_AT91 is not set | |
| +# CONFIG_ARCH_CLPS711X is not set | |
| +# CONFIG_ARCH_EBSA110 is not set | |
| +# CONFIG_ARCH_EP93XX is not set | |
| +# CONFIG_ARCH_FOOTBRIDGE is not set | |
| +# CONFIG_ARCH_NETX is not set | |
| +# CONFIG_ARCH_H720X is not set | |
| +# CONFIG_ARCH_IMX is not set | |
| +# CONFIG_ARCH_IOP13XX is not set | |
| +# CONFIG_ARCH_IOP32X is not set | |
| +# CONFIG_ARCH_IOP33X is not set | |
| +# CONFIG_ARCH_IXP23XX is not set | |
| +# CONFIG_ARCH_IXP2000 is not set | |
| +# CONFIG_ARCH_IXP4XX is not set | |
| +# CONFIG_ARCH_L7200 is not set | |
| +# CONFIG_ARCH_KIRKWOOD is not set | |
| +# CONFIG_ARCH_KS8695 is not set | |
| +# CONFIG_ARCH_NS9XXX is not set | |
| +# CONFIG_ARCH_LOKI is not set | |
| +# CONFIG_ARCH_MV78XX0 is not set | |
| +# CONFIG_ARCH_MXC is not set | |
| +# CONFIG_ARCH_ORION5X is not set | |
| +# CONFIG_ARCH_PNX4008 is not set | |
| +# CONFIG_ARCH_PXA is not set | |
| +# CONFIG_ARCH_RPC is not set | |
| +# CONFIG_ARCH_SA1100 is not set | |
| +# CONFIG_ARCH_S3C2410 is not set | |
| +# CONFIG_ARCH_S3C64XX is not set | |
| +# CONFIG_ARCH_SHARK is not set | |
| +# CONFIG_ARCH_LH7A40X is not set | |
| +# CONFIG_ARCH_DAVINCI is not set | |
| +# CONFIG_ARCH_OMAP is not set | |
| +CONFIG_ARCH_MSM=y | |
| +# CONFIG_ARCH_W90X900 is not set | |
| +# CONFIG_ARCH_MSM7X01A is not set | |
| +# CONFIG_ARCH_MSM7X27 is not set | |
| +# CONFIG_ARCH_MSM7X30 is not set | |
| +CONFIG_ARCH_QSD8X50=y | |
| +# CONFIG_ARCH_MSM7X25 is not set | |
| +CONFIG_ARCH_MSM_SCORPION=y | |
| + | |
| +# | |
| +# MSM Board Selection | |
| +# | |
| +CONFIG_MACH_QSD8X50_SURF=y | |
| +CONFIG_MACH_QSD8X50_FFA=y | |
| +CONFIG_MACH_QSD8X50_COMET=y | |
| +CONFIG_MACH_DECKARD=y | |
| +CONFIG_MSM_STACKED_MEMORY=y | |
| +CONFIG_MSM_DEBUG_UART_NONE=y | |
| +# CONFIG_MSM_DEBUG_UART1 is not set | |
| +# CONFIG_MSM_DEBUG_UART2 is not set | |
| +# CONFIG_MSM_DEBUG_UART3 is not set | |
| +CONFIG_CACHE_FLUSH_RANGE_LIMIT=0x40000 | |
| +# CONFIG_MSM7X00A_USE_GP_TIMER is not set | |
| +CONFIG_MSM7X00A_USE_DG_TIMER=y | |
| +CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE_SUSPEND=y | |
| +# CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE is not set | |
| +# CONFIG_MSM7X00A_SLEEP_MODE_APPS_SLEEP is not set | |
| +# CONFIG_MSM7X00A_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set | |
| +# CONFIG_MSM7X00A_SLEEP_WAIT_FOR_INTERRUPT is not set | |
| +CONFIG_MSM7X00A_SLEEP_MODE=0 | |
| +# CONFIG_MSM7X00A_IDLE_SLEEP_MODE_POWER_COLLAPSE_SUSPEND is not set | |
| +CONFIG_MSM7X00A_IDLE_SLEEP_MODE_POWER_COLLAPSE=y | |
| +# CONFIG_MSM7X00A_IDLE_SLEEP_MODE_APPS_SLEEP is not set | |
| +# CONFIG_MSM7X00A_IDLE_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set | |
| +# CONFIG_MSM7X00A_IDLE_SLEEP_WAIT_FOR_INTERRUPT is not set | |
| +CONFIG_MSM7X00A_IDLE_SLEEP_MODE=1 | |
| +CONFIG_MSM7X00A_IDLE_SLEEP_MIN_TIME=20000000 | |
| +CONFIG_MSM7X00A_IDLE_SPIN_TIME=80000 | |
| +CONFIG_MSM_IDLE_STATS=y | |
| +CONFIG_MSM_IDLE_STATS_FIRST_BUCKET=62500 | |
| +CONFIG_MSM_IDLE_STATS_BUCKET_SHIFT=2 | |
| +CONFIG_MSM_IDLE_STATS_BUCKET_COUNT=10 | |
| +CONFIG_MSM_SUSPEND_STATS_FIRST_BUCKET=1000000000 | |
| +# CONFIG_MSM_JTAG_V7 is not set | |
| +# CONFIG_HTC_HEADSET is not set | |
| +# CONFIG_HTC_PWRSINK is not set | |
| +CONFIG_QSD_SVS=y | |
| +CONFIG_QSD_PMIC_DEFAULT_DCDC1=1250 | |
| +CONFIG_MSM_FIQ_SUPPORT=y | |
| +# CONFIG_MSM_SERIAL_DEBUGGER is not set | |
| +CONFIG_MSM_SMD=y | |
| +# CONFIG_MSM_SMD_PKG3 is not set | |
| +CONFIG_MSM_SMD_PKG4=y | |
| +CONFIG_MSM_SMD_DEBUG=y | |
| +CONFIG_MSM_N_WAY_SMD=y | |
| +CONFIG_MSM_N_WAY_SMSM=y | |
| +CONFIG_MSM_RESET_MODEM=m | |
| +CONFIG_MSM_SMD_LOGGING=y | |
| +CONFIG_MSM_SMD_NMEA=y | |
| +CONFIG_MSM_SMD_TTY=y | |
| +CONFIG_MSM_SMD_QMI=y | |
| +CONFIG_MSM_SMD_CTL=y | |
| +CONFIG_MSM_ONCRPCROUTER=y | |
| +CONFIG_MSM_ONCRPCROUTER_DEBUG=y | |
| +CONFIG_MSM_RPCSERVERS=y | |
| +CONFIG_MSM_RPC_PING=y | |
| +CONFIG_MSM_RPC_OEM_RAPI=y | |
| +CONFIG_MSM_RPCSERVER_HANDSET=y | |
| +CONFIG_MSM_DALRPC=y | |
| +CONFIG_MSM_DALRPC_TEST=m | |
| +# CONFIG_MSM_CPU_FREQ_SET_MIN_MAX is not set | |
| +# CONFIG_MSM_HW3D is not set | |
| +# CONFIG_MSM_ADSP is not set | |
| +# CONFIG_MSM_VREG_SWITCH_INVERTED is not set | |
| +CONFIG_MSM_DMA_TEST=m | |
| +# CONFIG_WIFI_CONTROL_FUNC is not set | |
| +CONFIG_QSD_AUDIO=y | |
| +CONFIG_AUDIO_AAC_PLUS=y | |
| +CONFIG_AUDIO_ENHANCED_AAC_PLUS=y | |
| +CONFIG_SURF_FFA_GPIO_KEYPAD=y | |
| +# CONFIG_CLOCK_BASED_SLEEP_LIMIT is not set | |
| +# CONFIG_MSM_ADM_OFF_AT_POWER_COLLAPSE is not set | |
| +CONFIG_MSM_SLEEP_TIME_OVERRIDE=y | |
| +CONFIG_MSM_PM_TIMEOUT_HALT=y | |
| +# CONFIG_MSM_PM_TIMEOUT_RESET_MODEM is not set | |
| +# CONFIG_MSM_PM_TIMEOUT_RESET_CHIP is not set | |
| + | |
| +# | |
| +# Processor Type | |
| +# | |
| +CONFIG_CPU_32=y | |
| +CONFIG_CPU_32v6K=y | |
| +CONFIG_CPU_V7=y | |
| +CONFIG_CPU_32v7=y | |
| +CONFIG_CPU_ABRT_EV7=y | |
| +CONFIG_CPU_PABRT_IFAR=y | |
| +CONFIG_CPU_CACHE_V7=y | |
| +CONFIG_CPU_CACHE_VIPT=y | |
| +CONFIG_CPU_COPY_V6=y | |
| +CONFIG_CPU_TLB_V7=y | |
| +CONFIG_EMULATE_DOMAIN_MANAGER_V7=y | |
| +CONFIG_VERIFY_PERMISSION_FAULT=y | |
| +CONFIG_CPU_HAS_ASID=y | |
| +CONFIG_CPU_CP15=y | |
| +CONFIG_CPU_CP15_MMU=y | |
| + | |
| +# | |
| +# Processor Features | |
| +# | |
| +CONFIG_ARM_THUMB=y | |
| +# CONFIG_ARM_THUMBEE is not set | |
| +# CONFIG_CPU_ICACHE_DISABLE is not set | |
| +# CONFIG_CPU_DCACHE_DISABLE is not set | |
| +CONFIG_CPU_CACHE_ERR_REPORT=y | |
| +# CONFIG_CPU_BPREDICT_DISABLE is not set | |
| +CONFIG_HAS_TLS_REG=y | |
| +# CONFIG_OUTER_CACHE is not set | |
| + | |
| +# | |
| +# Bus support | |
| +# | |
| +# CONFIG_PCI_SYSCALL is not set | |
| +# CONFIG_ARCH_SUPPORTS_MSI is not set | |
| +# CONFIG_PCCARD is not set | |
| + | |
| +# | |
| +# Kernel Features | |
| +# | |
| +CONFIG_TICK_ONESHOT=y | |
| +CONFIG_NO_HZ=y | |
| +CONFIG_HIGH_RES_TIMERS=y | |
| +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | |
| +# CONFIG_VMSPLIT_3G is not set | |
| +CONFIG_VMSPLIT_2G=y | |
| +# CONFIG_VMSPLIT_1G is not set | |
| +CONFIG_PAGE_OFFSET=0x80000000 | |
| +CONFIG_PREEMPT=y | |
| +CONFIG_HZ=100 | |
| +CONFIG_AEABI=y | |
| +CONFIG_ARCH_FLATMEM_HAS_HOLES=y | |
| +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | |
| +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | |
| +CONFIG_SELECT_MEMORY_MODEL=y | |
| +CONFIG_FLATMEM_MANUAL=y | |
| +# CONFIG_DISCONTIGMEM_MANUAL is not set | |
| +# CONFIG_SPARSEMEM_MANUAL is not set | |
| +CONFIG_FLATMEM=y | |
| +CONFIG_FLAT_NODE_MEM_MAP=y | |
| +CONFIG_PAGEFLAGS_EXTENDED=y | |
| +CONFIG_SPLIT_PTLOCK_CPUS=4 | |
| +# CONFIG_PHYS_ADDR_T_64BIT is not set | |
| +CONFIG_ZONE_DMA_FLAG=0 | |
| +CONFIG_VIRT_TO_BUS=y | |
| +CONFIG_UNEVICTABLE_LRU=y | |
| +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | |
| +CONFIG_ALIGNMENT_TRAP=y | |
| + | |
| +# | |
| +# Boot options | |
| +# | |
| +CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| +CONFIG_ZBOOT_ROM_BSS=0x0 | |
| +CONFIG_CMDLINE="init=/sbin/init root=/dev/ram rw initrd=0x11000000,16M console=ttyDCC0 mem=88M" | |
| +# CONFIG_XIP_KERNEL is not set | |
| +# CONFIG_KEXEC is not set | |
| + | |
| +# | |
| +# CPU Power Management | |
| +# | |
| +CONFIG_CPU_FREQ=y | |
| +CONFIG_CPU_FREQ_TABLE=y | |
| +CONFIG_CPU_FREQ_DEBUG=y | |
| +CONFIG_CPU_FREQ_STAT=y | |
| +CONFIG_CPU_FREQ_STAT_DETAILS=y | |
| +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y | |
| +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set | |
| +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set | |
| +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set | |
| +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set | |
| +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y | |
| +CONFIG_CPU_FREQ_GOV_POWERSAVE=y | |
| +CONFIG_CPU_FREQ_GOV_USERSPACE=y | |
| +CONFIG_CPU_FREQ_GOV_ONDEMAND=y | |
| +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y | |
| +CONFIG_CPU_FREQ_MIN_TICKS=10 | |
| +CONFIG_CPU_FREQ_SAMPLING_LATENCY_MULTIPLIER=1000 | |
| +# CONFIG_CPU_IDLE is not set | |
| +CONFIG_CPU_FREQ_MSM=y | |
| + | |
| +# | |
| +# Floating point emulation | |
| +# | |
| + | |
| +# | |
| +# At least one emulation must be selected | |
| +# | |
| +CONFIG_VFP=y | |
| +CONFIG_VFPv3=y | |
| +CONFIG_NEON=y | |
| + | |
| +# | |
| +# Userspace binary formats | |
| +# | |
| +CONFIG_BINFMT_ELF=y | |
| +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | |
| +CONFIG_HAVE_AOUT=y | |
| +# CONFIG_BINFMT_AOUT is not set | |
| +# CONFIG_BINFMT_MISC is not set | |
| + | |
| +# | |
| +# Power management options | |
| +# | |
| +CONFIG_PM=y | |
| +# CONFIG_PM_DEBUG is not set | |
| +CONFIG_PM_SLEEP=y | |
| +CONFIG_SUSPEND=y | |
| +CONFIG_SUSPEND_FREEZER=y | |
| +CONFIG_HAS_WAKELOCK=y | |
| +CONFIG_HAS_EARLYSUSPEND=y | |
| +CONFIG_WAKELOCK=y | |
| +CONFIG_WAKELOCK_STAT=y | |
| +CONFIG_USER_WAKELOCK=y | |
| +CONFIG_EARLYSUSPEND=y | |
| +# CONFIG_NO_USER_SPACE_SCREEN_ACCESS_CONTROL is not set | |
| +CONFIG_CONSOLE_EARLYSUSPEND=y | |
| +# CONFIG_FB_EARLYSUSPEND is not set | |
| +# CONFIG_APM_EMULATION is not set | |
| +CONFIG_ARCH_SUSPEND_POSSIBLE=y | |
| +CONFIG_NET=y | |
| + | |
| +# | |
| +# Networking options | |
| +# | |
| +CONFIG_COMPAT_NET_DEV_OPS=y | |
| +CONFIG_PACKET=y | |
| +# CONFIG_PACKET_MMAP is not set | |
| +CONFIG_UNIX=y | |
| +# CONFIG_NET_KEY is not set | |
| +CONFIG_INET=y | |
| +# CONFIG_IP_MULTICAST is not set | |
| +# CONFIG_IP_ADVANCED_ROUTER is not set | |
| +CONFIG_IP_FIB_HASH=y | |
| +# CONFIG_IP_PNP is not set | |
| +# CONFIG_NET_IPIP is not set | |
| +# CONFIG_NET_IPGRE is not set | |
| +# CONFIG_ARPD is not set | |
| +# CONFIG_SYN_COOKIES is not set | |
| +# CONFIG_INET_AH is not set | |
| +# CONFIG_INET_ESP is not set | |
| +# CONFIG_INET_IPCOMP is not set | |
| +# CONFIG_INET_XFRM_TUNNEL is not set | |
| +# CONFIG_INET_TUNNEL is not set | |
| +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set | |
| +# CONFIG_INET_XFRM_MODE_TUNNEL is not set | |
| +# CONFIG_INET_XFRM_MODE_BEET is not set | |
| +# CONFIG_INET_LRO is not set | |
| +# CONFIG_INET_DIAG is not set | |
| +# CONFIG_TCP_CONG_ADVANCED is not set | |
| +CONFIG_TCP_CONG_CUBIC=y | |
| +CONFIG_DEFAULT_TCP_CONG="cubic" | |
| +# CONFIG_TCP_MD5SIG is not set | |
| +# CONFIG_IPV6 is not set | |
| +# CONFIG_NETLABEL is not set | |
| +CONFIG_ANDROID_PARANOID_NETWORK=y | |
| +# CONFIG_NETWORK_SECMARK is not set | |
| +CONFIG_NETFILTER=y | |
| +CONFIG_NETFILTER_DEBUG=y | |
| +CONFIG_NETFILTER_ADVANCED=y | |
| + | |
| +# | |
| +# Core Netfilter Configuration | |
| +# | |
| +CONFIG_NETFILTER_NETLINK=y | |
| +CONFIG_NETFILTER_NETLINK_QUEUE=y | |
| +CONFIG_NETFILTER_NETLINK_LOG=y | |
| +# CONFIG_NF_CONNTRACK is not set | |
| +CONFIG_NETFILTER_XTABLES=y | |
| +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set | |
| +# CONFIG_NETFILTER_XT_TARGET_MARK is not set | |
| +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set | |
| +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set | |
| +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set | |
| +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_ESP is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set | |
| +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y | |
| +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_MAC is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_MARK is not set | |
| +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y | |
| +CONFIG_NETFILTER_XT_MATCH_OWNER=y | |
| +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_REALM is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_STRING is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_TIME is not set | |
| +# CONFIG_NETFILTER_XT_MATCH_U32 is not set | |
| +# CONFIG_IP_VS is not set | |
| + | |
| +# | |
| +# IP: Netfilter Configuration | |
| +# | |
| +# CONFIG_NF_DEFRAG_IPV4 is not set | |
| +# CONFIG_IP_NF_QUEUE is not set | |
| +CONFIG_IP_NF_IPTABLES=y | |
| +# CONFIG_IP_NF_MATCH_ADDRTYPE is not set | |
| +# CONFIG_IP_NF_MATCH_AH is not set | |
| +# CONFIG_IP_NF_MATCH_ECN is not set | |
| +# CONFIG_IP_NF_MATCH_TTL is not set | |
| +CONFIG_IP_NF_FILTER=y | |
| +# CONFIG_IP_NF_TARGET_REJECT is not set | |
| +# CONFIG_IP_NF_TARGET_LOG is not set | |
| +# CONFIG_IP_NF_TARGET_ULOG is not set | |
| +# CONFIG_IP_NF_MANGLE is not set | |
| +# CONFIG_IP_NF_RAW is not set | |
| +# CONFIG_IP_NF_SECURITY is not set | |
| +# CONFIG_IP_NF_ARPTABLES is not set | |
| +# CONFIG_IP_DCCP is not set | |
| +# CONFIG_IP_SCTP is not set | |
| +# CONFIG_TIPC is not set | |
| +# CONFIG_ATM is not set | |
| +# CONFIG_BRIDGE is not set | |
| +# CONFIG_NET_DSA is not set | |
| +# CONFIG_VLAN_8021Q is not set | |
| +# CONFIG_DECNET is not set | |
| +# CONFIG_LLC2 is not set | |
| +# CONFIG_IPX is not set | |
| +# CONFIG_ATALK is not set | |
| +# CONFIG_X25 is not set | |
| +# CONFIG_LAPB is not set | |
| +# CONFIG_ECONET is not set | |
| +# CONFIG_WAN_ROUTER is not set | |
| +CONFIG_NET_SCHED=y | |
| + | |
| +# | |
| +# Queueing/Scheduling | |
| +# | |
| +# CONFIG_NET_SCH_CBQ is not set | |
| +# CONFIG_NET_SCH_HTB is not set | |
| +# CONFIG_NET_SCH_HFSC is not set | |
| +# CONFIG_NET_SCH_PRIO is not set | |
| +# CONFIG_NET_SCH_MULTIQ is not set | |
| +# CONFIG_NET_SCH_RED is not set | |
| +# CONFIG_NET_SCH_SFQ is not set | |
| +# CONFIG_NET_SCH_TEQL is not set | |
| +# CONFIG_NET_SCH_TBF is not set | |
| +# CONFIG_NET_SCH_GRED is not set | |
| +# CONFIG_NET_SCH_DSMARK is not set | |
| +# CONFIG_NET_SCH_NETEM is not set | |
| +# CONFIG_NET_SCH_DRR is not set | |
| + | |
| +# | |
| +# Classification | |
| +# | |
| +# CONFIG_NET_CLS_BASIC is not set | |
| +# CONFIG_NET_CLS_TCINDEX is not set | |
| +# CONFIG_NET_CLS_ROUTE4 is not set | |
| +# CONFIG_NET_CLS_FW is not set | |
| +# CONFIG_NET_CLS_U32 is not set | |
| +# CONFIG_NET_CLS_RSVP is not set | |
| +# CONFIG_NET_CLS_RSVP6 is not set | |
| +# CONFIG_NET_CLS_FLOW is not set | |
| +# CONFIG_NET_EMATCH is not set | |
| +# CONFIG_NET_CLS_ACT is not set | |
| +CONFIG_NET_SCH_FIFO=y | |
| +# CONFIG_DCB is not set | |
| + | |
| +# | |
| +# Network testing | |
| +# | |
| +# CONFIG_NET_PKTGEN is not set | |
| +# CONFIG_HAMRADIO is not set | |
| +# CONFIG_CAN is not set | |
| +# CONFIG_IRDA is not set | |
| +CONFIG_BT=y | |
| +CONFIG_BT_L2CAP=y | |
| +CONFIG_BT_SCO=y | |
| +CONFIG_BT_RFCOMM=y | |
| +CONFIG_BT_RFCOMM_TTY=y | |
| +CONFIG_BT_BNEP=y | |
| +CONFIG_BT_BNEP_MC_FILTER=y | |
| +CONFIG_BT_BNEP_PROTO_FILTER=y | |
| +CONFIG_BT_HIDP=y | |
| + | |
| +# | |
| +# Bluetooth device drivers | |
| +# | |
| +# CONFIG_BT_HCIBTSDIO is not set | |
| +CONFIG_BT_HCIUART=y | |
| +CONFIG_BT_HCIUART_H4=y | |
| +# CONFIG_BT_HCIUART_BCSP is not set | |
| +# CONFIG_BT_HCIUART_LL is not set | |
| +CONFIG_BT_MSM_SLEEP=y | |
| +# CONFIG_BT_HCIVHCI is not set | |
| +CONFIG_MSM_BT_POWER=y | |
| +# CONFIG_AF_RXRPC is not set | |
| +# CONFIG_PHONET is not set | |
| +CONFIG_WIRELESS=y | |
| +# CONFIG_CFG80211 is not set | |
| +CONFIG_WIRELESS_OLD_REGULATORY=y | |
| +CONFIG_WIRELESS_EXT=y | |
| +CONFIG_WIRELESS_EXT_SYSFS=y | |
| +# CONFIG_LIB80211 is not set | |
| +# CONFIG_MAC80211 is not set | |
| +# CONFIG_WIMAX is not set | |
| +CONFIG_RFKILL=y | |
| +# CONFIG_RFKILL_PM is not set | |
| +# CONFIG_RFKILL_INPUT is not set | |
| +# CONFIG_NET_9P is not set | |
| + | |
| +# | |
| +# Device Drivers | |
| +# | |
| + | |
| +# | |
| +# Generic Driver Options | |
| +# | |
| +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |
| +CONFIG_STANDALONE=y | |
| +CONFIG_PREVENT_FIRMWARE_BUILD=y | |
| +CONFIG_FW_LOADER=y | |
| +CONFIG_FIRMWARE_IN_KERNEL=y | |
| +CONFIG_EXTRA_FIRMWARE="" | |
| +# CONFIG_DEBUG_DRIVER is not set | |
| +# CONFIG_DEBUG_DEVRES is not set | |
| +# CONFIG_SYS_HYPERVISOR is not set | |
| +# CONFIG_CONNECTOR is not set | |
| +CONFIG_MTD=y | |
| +# CONFIG_MTD_DEBUG is not set | |
| +# CONFIG_MTD_CONCAT is not set | |
| +CONFIG_MTD_PARTITIONS=y | |
| +# CONFIG_MTD_LAZYECCSTATS is not set | |
| +# CONFIG_MTD_TESTS is not set | |
| +# CONFIG_MTD_REDBOOT_PARTS is not set | |
| +CONFIG_MTD_CMDLINE_PARTS=y | |
| +# CONFIG_MTD_AFS_PARTS is not set | |
| +# CONFIG_MTD_AR7_PARTS is not set | |
| + | |
| +# | |
| +# User Modules And Translation Layers | |
| +# | |
| +CONFIG_MTD_CHAR=y | |
| +CONFIG_MTD_BLKDEVS=y | |
| +CONFIG_MTD_BLOCK=y | |
| +# CONFIG_FTL is not set | |
| +# CONFIG_NFTL is not set | |
| +# CONFIG_INFTL is not set | |
| +# CONFIG_RFD_FTL is not set | |
| +# CONFIG_SSFDC is not set | |
| +# CONFIG_MTD_OOPS is not set | |
| + | |
| +# | |
| +# RAM/ROM/Flash chip drivers | |
| +# | |
| +# CONFIG_MTD_CFI is not set | |
| +# CONFIG_MTD_JEDECPROBE is not set | |
| +CONFIG_MTD_MAP_BANK_WIDTH_1=y | |
| +CONFIG_MTD_MAP_BANK_WIDTH_2=y | |
| +CONFIG_MTD_MAP_BANK_WIDTH_4=y | |
| +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | |
| +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | |
| +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | |
| +CONFIG_MTD_CFI_I1=y | |
| +CONFIG_MTD_CFI_I2=y | |
| +# CONFIG_MTD_CFI_I4 is not set | |
| +# CONFIG_MTD_CFI_I8 is not set | |
| +# CONFIG_MTD_RAM is not set | |
| +# CONFIG_MTD_ROM is not set | |
| +# CONFIG_MTD_ABSENT is not set | |
| + | |
| +# | |
| +# Mapping drivers for chip access | |
| +# | |
| +# CONFIG_MTD_COMPLEX_MAPPINGS is not set | |
| +# CONFIG_MTD_PLATRAM is not set | |
| + | |
| +# | |
| +# Self-contained MTD device drivers | |
| +# | |
| +CONFIG_MTD_MSM_NAND=y | |
| +# CONFIG_MTD_DATAFLASH is not set | |
| +# CONFIG_MTD_M25P80 is not set | |
| +# CONFIG_MTD_SLRAM is not set | |
| +# CONFIG_MTD_PHRAM is not set | |
| +# CONFIG_MTD_MTDRAM is not set | |
| +# CONFIG_MTD_BLOCK2MTD is not set | |
| + | |
| +# | |
| +# Disk-On-Chip Device Drivers | |
| +# | |
| +# CONFIG_MTD_DOC2000 is not set | |
| +# CONFIG_MTD_DOC2001 is not set | |
| +# CONFIG_MTD_DOC2001PLUS is not set | |
| +# CONFIG_MTD_NAND is not set | |
| +# CONFIG_MTD_ONENAND is not set | |
| + | |
| +# | |
| +# LPDDR flash memory drivers | |
| +# | |
| +# CONFIG_MTD_LPDDR is not set | |
| + | |
| +# | |
| +# UBI - Unsorted block images | |
| +# | |
| +CONFIG_MTD_UBI=y | |
| +CONFIG_MTD_UBI_WL_THRESHOLD=4096 | |
| +CONFIG_MTD_UBI_BEB_RESERVE=5 | |
| +# CONFIG_MTD_UBI_GLUEBI is not set | |
| + | |
| +# | |
| +# UBI debugging options | |
| +# | |
| +# CONFIG_MTD_UBI_DEBUG is not set | |
| +# CONFIG_PARPORT is not set | |
| +CONFIG_BLK_DEV=y | |
| +# CONFIG_BLK_DEV_COW_COMMON is not set | |
| +CONFIG_BLK_DEV_LOOP=y | |
| +# CONFIG_BLK_DEV_CRYPTOLOOP is not set | |
| +# CONFIG_BLK_DEV_NBD is not set | |
| +CONFIG_BLK_DEV_RAM=y | |
| +CONFIG_BLK_DEV_RAM_COUNT=8 | |
| +CONFIG_BLK_DEV_RAM_SIZE=16384 | |
| +# CONFIG_BLK_DEV_XIP is not set | |
| +# CONFIG_CDROM_PKTCDVD is not set | |
| +# CONFIG_ATA_OVER_ETH is not set | |
| +CONFIG_MISC_DEVICES=y | |
| +CONFIG_ANDROID_PMEM=y | |
| +# CONFIG_ANDROID_PMEM_DEBUG is not set | |
| +CONFIG_ANDROID_PMEM_KAPI_TEST=m | |
| +# CONFIG_ICS932S401 is not set | |
| +# CONFIG_ENCLOSURE_SERVICES is not set | |
| +# CONFIG_KERNEL_DEBUGGER_CORE is not set | |
| +# CONFIG_UID_STAT is not set | |
| +CONFIG_TSIF=y | |
| +CONFIG_TSIF_CHRDEV=y | |
| +# CONFIG_WL127X_RFKILL is not set | |
| +# CONFIG_C2PORT is not set | |
| + | |
| +# | |
| +# EEPROM support | |
| +# | |
| +# CONFIG_EEPROM_AT24 is not set | |
| +# CONFIG_EEPROM_AT25 is not set | |
| +# CONFIG_EEPROM_LEGACY is not set | |
| +# CONFIG_EEPROM_93CX6 is not set | |
| +CONFIG_HAVE_IDE=y | |
| +# CONFIG_IDE is not set | |
| + | |
| +# | |
| +# SCSI device support | |
| +# | |
| +# CONFIG_RAID_ATTRS is not set | |
| +CONFIG_SCSI=y | |
| +CONFIG_SCSI_DMA=y | |
| +CONFIG_SCSI_TGT=y | |
| +# CONFIG_SCSI_NETLINK is not set | |
| +CONFIG_SCSI_PROC_FS=y | |
| + | |
| +# | |
| +# SCSI support type (disk, tape, CD-ROM) | |
| +# | |
| +CONFIG_BLK_DEV_SD=y | |
| +# CONFIG_CHR_DEV_ST is not set | |
| +# CONFIG_CHR_DEV_OSST is not set | |
| +# CONFIG_BLK_DEV_SR is not set | |
| +CONFIG_CHR_DEV_SG=y | |
| +CONFIG_CHR_DEV_SCH=y | |
| + | |
| +# | |
| +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs | |
| +# | |
| +CONFIG_SCSI_MULTI_LUN=y | |
| +CONFIG_SCSI_CONSTANTS=y | |
| +CONFIG_SCSI_LOGGING=y | |
| +CONFIG_SCSI_SCAN_ASYNC=y | |
| +CONFIG_SCSI_WAIT_SCAN=m | |
| + | |
| +# | |
| +# SCSI Transports | |
| +# | |
| +# CONFIG_SCSI_SPI_ATTRS is not set | |
| +# CONFIG_SCSI_FC_ATTRS is not set | |
| +# CONFIG_SCSI_ISCSI_ATTRS is not set | |
| +# CONFIG_SCSI_SAS_LIBSAS is not set | |
| +# CONFIG_SCSI_SRP_ATTRS is not set | |
| +CONFIG_SCSI_LOWLEVEL=y | |
| +# CONFIG_ISCSI_TCP is not set | |
| +# CONFIG_LIBFC is not set | |
| +# CONFIG_SCSI_DEBUG is not set | |
| +# CONFIG_SCSI_DH is not set | |
| +# CONFIG_ATA is not set | |
| +# CONFIG_MD is not set | |
| +CONFIG_NETDEVICES=y | |
| +CONFIG_DUMMY=y | |
| +# CONFIG_BONDING is not set | |
| +# CONFIG_MACVLAN is not set | |
| +# CONFIG_EQUALIZER is not set | |
| +# CONFIG_TUN is not set | |
| +# CONFIG_VETH is not set | |
| +# CONFIG_PHYLIB is not set | |
| +CONFIG_NET_ETHERNET=y | |
| +CONFIG_MII=y | |
| +# CONFIG_AX88796 is not set | |
| +CONFIG_SMC91X=y | |
| +# CONFIG_SMC91X_POLL is not set | |
| +# CONFIG_DM9000 is not set | |
| +# CONFIG_ENC28J60 is not set | |
| +CONFIG_SMC911X=y | |
| +# CONFIG_SMSC911X is not set | |
| +# CONFIG_DNET is not set | |
| +# CONFIG_IBM_NEW_EMAC_ZMII is not set | |
| +# CONFIG_IBM_NEW_EMAC_RGMII is not set | |
| +# CONFIG_IBM_NEW_EMAC_TAH is not set | |
| +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set | |
| +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | |
| +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | |
| +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | |
| +# CONFIG_B44 is not set | |
| +# CONFIG_NETDEV_1000 is not set | |
| +# CONFIG_NETDEV_10000 is not set | |
| + | |
| +# | |
| +# Wireless LAN | |
| +# | |
| +# CONFIG_WLAN_PRE80211 is not set | |
| +# CONFIG_WLAN_80211 is not set | |
| +# CONFIG_IWLWIFI_LEDS is not set | |
| + | |
| +# | |
| +# Enable WiMAX (Networking options) to see the WiMAX drivers | |
| +# | |
| +# CONFIG_WAN is not set | |
| +CONFIG_PPP=y | |
| +# CONFIG_PPP_MULTILINK is not set | |
| +# CONFIG_PPP_FILTER is not set | |
| +# CONFIG_PPP_ASYNC is not set | |
| +# CONFIG_PPP_SYNC_TTY is not set | |
| +# CONFIG_PPP_DEFLATE is not set | |
| +# CONFIG_PPP_BSDCOMP is not set | |
| +CONFIG_PPP_MPPE=y | |
| +# CONFIG_PPPOE is not set | |
| +# CONFIG_PPPOL2TP is not set | |
| +# CONFIG_PPPOLAC is not set | |
| +CONFIG_PPPOPNS=y | |
| +CONFIG_SLIP=y | |
| +CONFIG_SLIP_COMPRESSED=y | |
| +CONFIG_SLHC=y | |
| +# CONFIG_SLIP_SMART is not set | |
| +CONFIG_SLIP_MODE_SLIP6=y | |
| +# CONFIG_NETCONSOLE is not set | |
| +CONFIG_MSM_RMNET=y | |
| +# CONFIG_MSM_RMNET_DEBUG is not set | |
| +# CONFIG_NETPOLL is not set | |
| +# CONFIG_NET_POLL_CONTROLLER is not set | |
| +# CONFIG_ISDN is not set | |
| + | |
| +# | |
| +# Input device support | |
| +# | |
| +CONFIG_INPUT=y | |
| +# CONFIG_INPUT_FF_MEMLESS is not set | |
| +# CONFIG_INPUT_POLLDEV is not set | |
| + | |
| +# | |
| +# Userland interfaces | |
| +# | |
| +# CONFIG_INPUT_MOUSEDEV is not set | |
| +# CONFIG_INPUT_JOYDEV is not set | |
| +CONFIG_INPUT_EVDEV=y | |
| +CONFIG_INPUT_EVBUG=m | |
| +# CONFIG_INPUT_KEYRESET is not set | |
| + | |
| +# | |
| +# Input Device Drivers | |
| +# | |
| +CONFIG_INPUT_KEYBOARD=y | |
| +# CONFIG_KEYBOARD_ATKBD is not set | |
| +# CONFIG_KEYBOARD_SUNKBD is not set | |
| +# CONFIG_KEYBOARD_LKKBD is not set | |
| +# CONFIG_KEYBOARD_XTKBD is not set | |
| +# CONFIG_KEYBOARD_NEWTON is not set | |
| +# CONFIG_KEYBOARD_STOWAWAY is not set | |
| +# CONFIG_KEYBOARD_GPIO is not set | |
| +CONFIG_KEYBOARD_I2C_MSM=y | |
| +# CONFIG_INPUT_MOUSE is not set | |
| +# CONFIG_INPUT_JOYSTICK is not set | |
| +# CONFIG_INPUT_TABLET is not set | |
| +CONFIG_INPUT_TOUCHSCREEN=y | |
| +# CONFIG_TOUCHSCREEN_ADS7846 is not set | |
| +# CONFIG_TOUCHSCREEN_FUJITSU is not set | |
| +# CONFIG_TOUCHSCREEN_GUNZE is not set | |
| +# CONFIG_TOUCHSCREEN_ELAN_I2C_8232 is not set | |
| +# CONFIG_TOUCHSCREEN_ELO is not set | |
| +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | |
| +# CONFIG_TOUCHSCREEN_MTOUCH is not set | |
| +# CONFIG_TOUCHSCREEN_INEXIO is not set | |
| +# CONFIG_TOUCHSCREEN_MK712 is not set | |
| +# CONFIG_TOUCHSCREEN_PENMOUNT is not set | |
| +# CONFIG_TOUCHSCREEN_MSM is not set | |
| +# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI is not set | |
| +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | |
| +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set | |
| +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | |
| +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | |
| +# CONFIG_TOUCHSCREEN_TSC2007 is not set | |
| +CONFIG_TOUCHSCREEN_MSM_LEGACY=y | |
| +CONFIG_TOUCHSCREEN_MSM_I2C=y | |
| +CONFIG_ANDROID_TOUCHSCREEN_MSM_HACKS=y | |
| +CONFIG_INPUT_MISC=y | |
| +# CONFIG_INPUT_ATI_REMOTE is not set | |
| +# CONFIG_INPUT_ATI_REMOTE2 is not set | |
| +# CONFIG_INPUT_KEYSPAN_REMOTE is not set | |
| +# CONFIG_INPUT_POWERMATE is not set | |
| +# CONFIG_INPUT_YEALINK is not set | |
| +# CONFIG_INPUT_CM109 is not set | |
| +CONFIG_INPUT_UINPUT=y | |
| +CONFIG_INPUT_GPIO=y | |
| +CONFIG_INPUT_KEYCHORD=y | |
| +CONFIG_BMA150=m | |
| + | |
| +# | |
| +# Hardware I/O ports | |
| +# | |
| +# CONFIG_SERIO is not set | |
| +# CONFIG_GAMEPORT is not set | |
| + | |
| +# | |
| +# Character devices | |
| +# | |
| +CONFIG_VT=y | |
| +CONFIG_CONSOLE_TRANSLATIONS=y | |
| +CONFIG_VT_CONSOLE=y | |
| +CONFIG_HW_CONSOLE=y | |
| +# CONFIG_VT_HW_CONSOLE_BINDING is not set | |
| +# CONFIG_DEVMEM is not set | |
| +# CONFIG_DEVKMEM is not set | |
| +# CONFIG_SERIAL_NONSTANDARD is not set | |
| + | |
| +# | |
| +# Serial drivers | |
| +# | |
| +# CONFIG_SERIAL_8250 is not set | |
| + | |
| +# | |
| +# Non-8250 serial port support | |
| +# | |
| +CONFIG_SERIAL_CORE=y | |
| +CONFIG_SERIAL_MSM=y | |
| +# CONFIG_SERIAL_MSM_CONSOLE is not set | |
| +CONFIG_SERIAL_MSM_CLOCK_CONTROL=y | |
| +# CONFIG_SERIAL_MSM_RX_WAKEUP is not set | |
| +CONFIG_SERIAL_MSM_HS=y | |
| + | |
| +# | |
| +# Diag Support | |
| +# | |
| +CONFIG_DIAG_CHAR=y | |
| +CONFIG_UNIX98_PTYS=y | |
| +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | |
| +# CONFIG_LEGACY_PTYS is not set | |
| +# CONFIG_IPMI_HANDLER is not set | |
| +# CONFIG_HW_RANDOM is not set | |
| +# CONFIG_R3964 is not set | |
| +# CONFIG_RAW_DRIVER is not set | |
| +# CONFIG_TCG_TPM is not set | |
| +# CONFIG_DCC_TTY is not set | |
| +CONFIG_Q6_VENC=y | |
| +CONFIG_MSM_KGSL=y | |
| +CONFIG_MSM_KGSL_DRM=y | |
| +CONFIG_MSM_Q6VDEC=y | |
| +CONFIG_I2C=y | |
| +CONFIG_I2C_BOARDINFO=y | |
| +CONFIG_I2C_CHARDEV=y | |
| +CONFIG_I2C_HELPER_AUTO=y | |
| +CONFIG_I2C_ALGOBIT=y | |
| + | |
| +# | |
| +# I2C Hardware Bus support | |
| +# | |
| + | |
| +# | |
| +# I2C system bus drivers (mostly embedded / system-on-chip) | |
| +# | |
| +# CONFIG_I2C_GPIO is not set | |
| +CONFIG_I2C_MSM=y | |
| +# CONFIG_I2C_OCORES is not set | |
| +# CONFIG_I2C_SIMTEC is not set | |
| + | |
| +# | |
| +# External I2C/SMBus adapter drivers | |
| +# | |
| +# CONFIG_I2C_PARPORT_LIGHT is not set | |
| +# CONFIG_I2C_TAOS_EVM is not set | |
| + | |
| +# | |
| +# Other I2C/SMBus bus drivers | |
| +# | |
| +# CONFIG_I2C_PCA_PLATFORM is not set | |
| +# CONFIG_I2C_STUB is not set | |
| + | |
| +# | |
| +# Miscellaneous I2C Chip support | |
| +# | |
| +# CONFIG_DS1682 is not set | |
| +# CONFIG_SENSORS_PCF8574 is not set | |
| +# CONFIG_PCF8575 is not set | |
| +# CONFIG_SENSORS_PCA9539 is not set | |
| +# CONFIG_SENSORS_PCF8591 is not set | |
| +# CONFIG_SENSORS_MAX6875 is not set | |
| +# CONFIG_SENSORS_TSL2550 is not set | |
| +CONFIG_SENSORS_AK8973=y | |
| +# CONFIG_SENSORS_AKM8976 is not set | |
| +# CONFIG_SENSORS_PCA963X is not set | |
| +# CONFIG_SENSORS_MT9T013 is not set | |
| +CONFIG_BOSCH_SMB380=y | |
| +# CONFIG_I2C_DEBUG_CORE is not set | |
| +# CONFIG_I2C_DEBUG_ALGO is not set | |
| +# CONFIG_I2C_DEBUG_BUS is not set | |
| +# CONFIG_I2C_DEBUG_CHIP is not set | |
| +CONFIG_SPI=y | |
| +# CONFIG_SPI_DEBUG is not set | |
| +CONFIG_SPI_MASTER=y | |
| + | |
| +# | |
| +# SPI Master Controller Drivers | |
| +# | |
| +# CONFIG_SPI_BITBANG is not set | |
| +# CONFIG_SPI_GPIO is not set | |
| +CONFIG_SPI_QSD=m | |
| + | |
| +# | |
| +# SPI Protocol Masters | |
| +# | |
| +# CONFIG_SPI_SPIDEV is not set | |
| +# CONFIG_SPI_TLE62X0 is not set | |
| +# CONFIG_W1 is not set | |
| +CONFIG_POWER_SUPPLY=y | |
| +# CONFIG_POWER_SUPPLY_DEBUG is not set | |
| +# CONFIG_PDA_POWER is not set | |
| +# CONFIG_BATTERY_DS2760 is not set | |
| +# CONFIG_BATTERY_BQ27x00 is not set | |
| +CONFIG_BATTERY_MSM=y | |
| +# CONFIG_HWMON is not set | |
| +# CONFIG_THERMAL is not set | |
| +# CONFIG_THERMAL_HWMON is not set | |
| +# CONFIG_WATCHDOG is not set | |
| +CONFIG_SSB_POSSIBLE=y | |
| + | |
| +# | |
| +# Sonics Silicon Backplane | |
| +# | |
| +# CONFIG_SSB is not set | |
| + | |
| +# | |
| +# Multifunction device drivers | |
| +# | |
| +# CONFIG_MFD_CORE is not set | |
| +# CONFIG_MFD_SM501 is not set | |
| +# CONFIG_HTC_PASIC3 is not set | |
| +# CONFIG_TWL4030_CORE is not set | |
| +# CONFIG_MFD_TMIO is not set | |
| +# CONFIG_MFD_T7L66XB is not set | |
| +# CONFIG_MFD_TC6387XB is not set | |
| +# CONFIG_PMIC_DA903X is not set | |
| +# CONFIG_MFD_WM8400 is not set | |
| +# CONFIG_MFD_WM8350_I2C is not set | |
| +# CONFIG_MFD_PCF50633 is not set | |
| +CONFIG_TPS65023=y | |
| + | |
| +# | |
| +# Multimedia devices | |
| +# | |
| + | |
| +# | |
| +# Multimedia core support | |
| +# | |
| +CONFIG_VIDEO_DEV=y | |
| +CONFIG_VIDEO_V4L2_COMMON=y | |
| +CONFIG_VIDEO_ALLOW_V4L1=y | |
| +CONFIG_VIDEO_V4L1_COMPAT=y | |
| +# CONFIG_DVB_CORE is not set | |
| +CONFIG_VIDEO_MEDIA=y | |
| + | |
| +# | |
| +# Multimedia drivers | |
| +# | |
| +# CONFIG_MEDIA_ATTACH is not set | |
| +CONFIG_MEDIA_TUNER=y | |
| +# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set | |
| +CONFIG_MEDIA_TUNER_SIMPLE=y | |
| +CONFIG_MEDIA_TUNER_TDA8290=y | |
| +CONFIG_MEDIA_TUNER_TDA9887=y | |
| +CONFIG_MEDIA_TUNER_TEA5761=y | |
| +CONFIG_MEDIA_TUNER_TEA5767=y | |
| +CONFIG_MEDIA_TUNER_MT20XX=y | |
| +CONFIG_MEDIA_TUNER_XC2028=y | |
| +CONFIG_MEDIA_TUNER_XC5000=y | |
| +CONFIG_VIDEO_V4L2=y | |
| +CONFIG_VIDEO_V4L1=y | |
| +CONFIG_VIDEO_CAPTURE_DRIVERS=y | |
| +# CONFIG_VIDEO_ADV_DEBUG is not set | |
| +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | |
| +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y | |
| +# CONFIG_VIDEO_VIVI is not set | |
| +# CONFIG_VIDEO_CPIA is not set | |
| +# CONFIG_VIDEO_SAA5246A is not set | |
| +# CONFIG_VIDEO_SAA5249 is not set | |
| +# CONFIG_SOC_CAMERA is not set | |
| + | |
| +# | |
| +# Qualcomm MSM Camera And Video | |
| +# | |
| +CONFIG_MSM_CAMERA=y | |
| +# CONFIG_MSM_CAMERA_DEBUG is not set | |
| + | |
| +# | |
| +# Camera Sensor Selection | |
| +# | |
| +# CONFIG_MT9T013 is not set | |
| +CONFIG_MT9D112=y | |
| +# CONFIG_MT9P012 is not set | |
| +# CONFIG_MSM_CAMERA_AF_FOXCONN is not set | |
| +# CONFIG_MSM_CAMERA_AF_BAM is not set | |
| +# CONFIG_S5K3E2FX is not set | |
| +# CONFIG_VB6801 is not set | |
| +# CONFIG_MSM_CAMERA_FLASH is not set | |
| +CONFIG_RADIO_ADAPTERS=y | |
| +# CONFIG_RADIO_TEA5764 is not set | |
| +CONFIG_DAB=y | |
| + | |
| +# | |
| +# Graphics support | |
| +# | |
| +CONFIG_DRM=y | |
| +# CONFIG_DRM_MGA is not set | |
| +# CONFIG_DRM_VIA is not set | |
| +# CONFIG_DRM_SAVAGE is not set | |
| +# CONFIG_VGASTATE is not set | |
| +CONFIG_VIDEO_OUTPUT_CONTROL=y | |
| +CONFIG_FB=y | |
| +# CONFIG_FIRMWARE_EDID is not set | |
| +# CONFIG_FB_DDC is not set | |
| +# CONFIG_FB_BOOT_VESA_SUPPORT is not set | |
| +CONFIG_FB_CFB_FILLRECT=y | |
| +CONFIG_FB_CFB_COPYAREA=y | |
| +CONFIG_FB_CFB_IMAGEBLIT=y | |
| +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | |
| +# CONFIG_FB_SYS_FILLRECT is not set | |
| +# CONFIG_FB_SYS_COPYAREA is not set | |
| +# CONFIG_FB_SYS_IMAGEBLIT is not set | |
| +# CONFIG_FB_FOREIGN_ENDIAN is not set | |
| +# CONFIG_FB_SYS_FOPS is not set | |
| +# CONFIG_FB_SVGALIB is not set | |
| +# CONFIG_FB_MACMODES is not set | |
| +# CONFIG_FB_BACKLIGHT is not set | |
| +CONFIG_FB_MODE_HELPERS=y | |
| +CONFIG_FB_TILEBLITTING=y | |
| + | |
| +# | |
| +# Frame buffer hardware drivers | |
| +# | |
| +# CONFIG_FB_S1D13XXX is not set | |
| +# CONFIG_FB_VIRTUAL is not set | |
| +# CONFIG_FB_METRONOME is not set | |
| +# CONFIG_FB_MB862XX is not set | |
| +CONFIG_FB_MSM=y | |
| +# CONFIG_FB_MSM_BACKLIGHT is not set | |
| +CONFIG_FB_MSM_LOGO=y | |
| +CONFIG_FB_MSM_LCDC_HW=y | |
| +# CONFIG_FB_MSM_MDP22 is not set | |
| +# CONFIG_FB_MSM_MDP30 is not set | |
| +CONFIG_FB_MSM_MDP31=y | |
| +# CONFIG_FB_MSM_MDP40 is not set | |
| +# CONFIG_FB_MSM_EBI2 is not set | |
| +CONFIG_FB_MSM_MDDI=y | |
| +# CONFIG_FB_MSM_LCDC is not set | |
| +# CONFIG_FB_MSM_EXTMDDI is not set | |
| +# CONFIG_FB_MSM_TVOUT is not set | |
| +# CONFIG_FB_MSM_MDDI_TOSHIBA_COMMON is not set | |
| +# CONFIG_FB_MSM_MDDI_TOSHIBA_COMMON_VGA is not set | |
| +# CONFIG_FB_MSM_MDDI_AUTO_DETECT is not set | |
| +# CONFIG_FB_MSM_LCDC_PANEL is not set | |
| +# CONFIG_FB_MSM_LCDC_PRISM_WVGA is not set | |
| +# CONFIG_FB_MSM_LCDC_GORDON_VGA is not set | |
| +# CONFIG_FB_MSM_LCDC_TOSHIBA_WVGA_PT is not set | |
| +# CONFIG_FB_MSM_LCDC_WXGA is not set | |
| +# CONFIG_FB_MSM_LCDC_PRISM_WVGA_PANEL is not set | |
| +# CONFIG_FB_MSM_LCDC_GORDON_VGA_PANEL is not set | |
| +# CONFIG_FB_MSM_LCDC_TOSHIBA_WVGA_PT_PANEL is not set | |
| +# CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM is not set | |
| +# CONFIG_FB_MSM_MDDI_PANEL_AUTO_DETECT is not set | |
| +# CONFIG_FB_MSM_MDDI_PRISM_WVGA is not set | |
| +# CONFIG_FB_MSM_MDDI_TOSHIBA_WVGA_PORTRAIT is not set | |
| +# CONFIG_FB_MSM_MDDI_TOSHIBA_VGA is not set | |
| +# CONFIG_FB_MSM_MDDI_TOSHIBA_WVGA is not set | |
| +CONFIG_FB_MSM_MDDI_SHARP_QVGA_128x128=y | |
| +# CONFIG_FB_MSM_EBI2_TMD_QVGA_EPSON_QCIF is not set | |
| +# CONFIG_FB_MSM_PANEL_NONE is not set | |
| +# CONFIG_FB_MSM_LCDC_EXTERNAL_SVGA is not set | |
| +CONFIG_FB_MSM_SECONDARY_PANEL_NONE=y | |
| +# CONFIG_FB_MSM_TVOUT_NTSC is not set | |
| +# CONFIG_FB_MSM_TVOUT_PAL is not set | |
| +# CONFIG_FB_MSM_TVOUT_NTSC_M is not set | |
| +# CONFIG_FB_MSM_TVOUT_NTSC_J is not set | |
| +# CONFIG_FB_MSM_TVOUT_PAL_BDGHIN is not set | |
| +# CONFIG_FB_MSM_TVOUT_PAL_M is not set | |
| +# CONFIG_FB_MSM_TVOUT_PAL_N is not set | |
| +CONFIG_FB_MSM_TVOUT_NONE=y | |
| +CONFIG_SHLCDC_BOARD=y | |
| +CONFIG_BACKLIGHT_LCD_SUPPORT=y | |
| +CONFIG_LCD_CLASS_DEVICE=y | |
| +# CONFIG_LCD_LTV350QV is not set | |
| +# CONFIG_LCD_ILI9320 is not set | |
| +# CONFIG_LCD_TDO24M is not set | |
| +# CONFIG_LCD_VGG2432A4 is not set | |
| +# CONFIG_LCD_PLATFORM is not set | |
| +CONFIG_BACKLIGHT_CLASS_DEVICE=y | |
| +# CONFIG_BACKLIGHT_GENERIC is not set | |
| + | |
| +# | |
| +# Display device support | |
| +# | |
| +# CONFIG_DISPLAY_SUPPORT is not set | |
| + | |
| +# | |
| +# Console display driver support | |
| +# | |
| +# CONFIG_VGA_CONSOLE is not set | |
| +CONFIG_DUMMY_CONSOLE=y | |
| +CONFIG_FRAMEBUFFER_CONSOLE=y | |
| +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | |
| +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | |
| +# CONFIG_FONTS is not set | |
| +CONFIG_FONT_8x8=y | |
| +CONFIG_FONT_8x16=y | |
| +# CONFIG_LOGO is not set | |
| +CONFIG_SOUND=y | |
| +# CONFIG_SOUND_OSS_CORE is not set | |
| +CONFIG_SND=y | |
| +CONFIG_SND_TIMER=y | |
| +CONFIG_SND_PCM=y | |
| +# CONFIG_SND_SEQUENCER is not set | |
| +# CONFIG_SND_MIXER_OSS is not set | |
| +# CONFIG_SND_PCM_OSS is not set | |
| +# CONFIG_SND_HRTIMER is not set | |
| +# CONFIG_SND_DYNAMIC_MINORS is not set | |
| +CONFIG_SND_SUPPORT_OLD_API=y | |
| +CONFIG_SND_VERBOSE_PROCFS=y | |
| +# CONFIG_SND_VERBOSE_PRINTK is not set | |
| +# CONFIG_SND_DEBUG is not set | |
| +# CONFIG_SND_DRIVERS is not set | |
| +# CONFIG_SND_ARM is not set | |
| +# CONFIG_SND_SPI is not set | |
| +CONFIG_SND_SOC=y | |
| + | |
| +# | |
| +# MSM SoC Audio support | |
| +# | |
| +CONFIG_SND_QSD_SOC=y | |
| +CONFIG_SND_MSM_DAI_SOC=y | |
| +CONFIG_SND_QSD_SOC_QSD8K=y | |
| +CONFIG_SND_SOC_I2C_AND_SPI=y | |
| +# CONFIG_SND_SOC_ALL_CODECS is not set | |
| +# CONFIG_SOUND_PRIME is not set | |
| +CONFIG_HID_SUPPORT=y | |
| +CONFIG_HID=y | |
| +# CONFIG_HID_DEBUG is not set | |
| +# CONFIG_HIDRAW is not set | |
| +# CONFIG_HID_PID is not set | |
| + | |
| +# | |
| +# Special HID drivers | |
| +# | |
| +CONFIG_HID_COMPAT=y | |
| +# CONFIG_HID_APPLE is not set | |
| +CONFIG_USB_SUPPORT=y | |
| +CONFIG_USB_ARCH_HAS_HCD=y | |
| +# CONFIG_USB_ARCH_HAS_OHCI is not set | |
| +CONFIG_USB_ARCH_HAS_EHCI=y | |
| +# CONFIG_USB is not set | |
| +# CONFIG_USB_OTG_WHITELIST is not set | |
| +# CONFIG_USB_OTG_BLACKLIST_HUB is not set | |
| + | |
| +# | |
| +# Enable Host or Gadget support to see Inventra options | |
| +# | |
| + | |
| +# | |
| +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; | |
| +# | |
| +# CONFIG_USB_GADGET is not set | |
| + | |
| +# | |
| +# OTG and related infrastructure | |
| +# | |
| + | |
| +# | |
| +# USB Function Support | |
| +# | |
| +CONFIG_USB_FUNCTION=y | |
| +CONFIG_USB_FUNCTION_MSM_HSUSB=y | |
| +# CONFIG_USB_FUNCTION_NULL is not set | |
| +# CONFIG_USB_FUNCTION_ZERO is not set | |
| +# CONFIG_USB_FUNCTION_LOOPBACK is not set | |
| +CONFIG_USB_FUNCTION_ADB=y | |
| +# CONFIG_USB_FUNCTION_UMS is not set | |
| +# CONFIG_USB_FUNCTION_MASS_STORAGE is not set | |
| +CONFIG_USB_FUNCTION_DIAG=y | |
| +CONFIG_USB_FUNCTION_ETHER=y | |
| +CONFIG_USB_FUNCTION_SERIAL=y | |
| +CONFIG_USB_FUNCTION_MDLM=y | |
| +CONFIG_USB_FUNCTION_OBEX=y | |
| +CONFIG_USB_FUNCTION_MTP=y | |
| +CONFIG_USB_FUNCTION_MSC_TRANSPORT=y | |
| +CONFIG_MMC=y | |
| +# CONFIG_MMC_DEBUG is not set | |
| +CONFIG_MMC_UNSAFE_RESUME=y | |
| +# CONFIG_MMC_EMBEDDED_SDIO is not set | |
| +# CONFIG_MMC_PARANOID_SD_INIT is not set | |
| + | |
| +# | |
| +# MMC/SD/SDIO Card Drivers | |
| +# | |
| +CONFIG_MMC_BLOCK=y | |
| +CONFIG_MMC_BLOCK_BOUNCE=y | |
| +# CONFIG_MMC_BLOCK_DEFERRED_RESUME is not set | |
| +# CONFIG_SDIO_UART is not set | |
| +# CONFIG_MMC_TEST is not set | |
| + | |
| +# | |
| +# MMC/SD/SDIO Host Controller Drivers | |
| +# | |
| +# CONFIG_MMC_SDHCI is not set | |
| +# CONFIG_MMC_SPI is not set | |
| +CONFIG_MMC_MSM=y | |
| +# CONFIG_MMC_MSM7X00A_RESUME_IN_WQ is not set | |
| +CONFIG_MMC_MSM_SDIO_SUPPORT=y | |
| +# CONFIG_MMC_MSM_CARD_HW_DETECTION is not set | |
| +CONFIG_MMC_MSM_SDC1_SUPPORT=y | |
| +CONFIG_MMC_MSM_SDC2_SUPPORT=y | |
| +# CONFIG_MMC_MSM_SDC3_SUPPORT is not set | |
| +# CONFIG_MMC_MSM_SDC4_SUPPORT is not set | |
| +# CONFIG_MEMSTICK is not set | |
| +# CONFIG_ACCESSIBILITY is not set | |
| +CONFIG_NEW_LEDS=y | |
| +CONFIG_LEDS_CLASS=y | |
| + | |
| +# | |
| +# LED drivers | |
| +# | |
| +# CONFIG_LEDS_PCA9532 is not set | |
| +# CONFIG_LEDS_GPIO is not set | |
| +CONFIG_LEDS_CPLD=y | |
| +# CONFIG_LEDS_PCA955X is not set | |
| +CONFIG_LEDS_MSM_PMIC=y | |
| + | |
| +# | |
| +# LED Triggers | |
| +# | |
| +# CONFIG_LEDS_TRIGGERS is not set | |
| +CONFIG_SWITCH=y | |
| +CONFIG_SWITCH_GPIO=y | |
| +CONFIG_RTC_LIB=y | |
| +CONFIG_RTC_CLASS=y | |
| +CONFIG_RTC_HCTOSYS=y | |
| +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | |
| +CONFIG_RTC_DEBUG=y | |
| + | |
| +# | |
| +# RTC interfaces | |
| +# | |
| +CONFIG_RTC_INTF_SYSFS=y | |
| +CONFIG_RTC_INTF_PROC=y | |
| +CONFIG_RTC_INTF_DEV=y | |
| +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | |
| +CONFIG_RTC_INTF_ALARM=y | |
| +# CONFIG_RTC_DRV_TEST is not set | |
| + | |
| +# | |
| +# I2C RTC drivers | |
| +# | |
| +# CONFIG_RTC_DRV_DS1307 is not set | |
| +# CONFIG_RTC_DRV_DS1374 is not set | |
| +# CONFIG_RTC_DRV_DS1672 is not set | |
| +# CONFIG_RTC_DRV_MAX6900 is not set | |
| +# CONFIG_RTC_DRV_RS5C372 is not set | |
| +# CONFIG_RTC_DRV_ISL1208 is not set | |
| +# CONFIG_RTC_DRV_X1205 is not set | |
| +# CONFIG_RTC_DRV_PCF8563 is not set | |
| +# CONFIG_RTC_DRV_PCF8583 is not set | |
| +# CONFIG_RTC_DRV_M41T80 is not set | |
| +# CONFIG_RTC_DRV_S35390A is not set | |
| +# CONFIG_RTC_DRV_FM3130 is not set | |
| +# CONFIG_RTC_DRV_RX8581 is not set | |
| + | |
| +# | |
| +# SPI RTC drivers | |
| +# | |
| +# CONFIG_RTC_DRV_M41T94 is not set | |
| +# CONFIG_RTC_DRV_DS1305 is not set | |
| +# CONFIG_RTC_DRV_DS1390 is not set | |
| +# CONFIG_RTC_DRV_MAX6902 is not set | |
| +# CONFIG_RTC_DRV_R9701 is not set | |
| +# CONFIG_RTC_DRV_RS5C348 is not set | |
| +# CONFIG_RTC_DRV_DS3234 is not set | |
| + | |
| +# | |
| +# Platform RTC drivers | |
| +# | |
| +# CONFIG_RTC_DRV_CMOS is not set | |
| +# CONFIG_RTC_DRV_DS1286 is not set | |
| +# CONFIG_RTC_DRV_DS1511 is not set | |
| +# CONFIG_RTC_DRV_DS1553 is not set | |
| +# CONFIG_RTC_DRV_DS1742 is not set | |
| +# CONFIG_RTC_DRV_STK17TA8 is not set | |
| +# CONFIG_RTC_DRV_M48T86 is not set | |
| +# CONFIG_RTC_DRV_M48T35 is not set | |
| +# CONFIG_RTC_DRV_M48T59 is not set | |
| +# CONFIG_RTC_DRV_BQ4802 is not set | |
| +# CONFIG_RTC_DRV_V3020 is not set | |
| + | |
| +# | |
| +# on-CPU RTC drivers | |
| +# | |
| +CONFIG_RTC_DRV_MSM=y | |
| +CONFIG_RTC_SECURE_TIME_SUPPORT=y | |
| +# CONFIG_DMADEVICES is not set | |
| +# CONFIG_REGULATOR is not set | |
| +# CONFIG_UIO is not set | |
| +CONFIG_STAGING=y | |
| +# CONFIG_STAGING_EXCLUDE_BUILD is not set | |
| +# CONFIG_MEILHAUS is not set | |
| +# CONFIG_ECHO is not set | |
| +# CONFIG_COMEDI is not set | |
| + | |
| +# | |
| +# Android | |
| +# | |
| +CONFIG_ANDROID=y | |
| +CONFIG_ANDROID_BINDER_IPC=y | |
| +CONFIG_ANDROID_LOGGER=y | |
| +CONFIG_ANDROID_LOGGER_TEST=m | |
| +CONFIG_ANDROID_RAM_CONSOLE=y | |
| +CONFIG_ANDROID_RAM_CONSOLE_ENABLE_VERBOSE=y | |
| +# CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION is not set | |
| +# CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT is not set | |
| +CONFIG_ANDROID_TIMED_OUTPUT=y | |
| +CONFIG_ANDROID_TIMED_GPIO=y | |
| +CONFIG_ANDROID_LOW_MEMORY_KILLER=y | |
| +# CONFIG_ANDROID_ENGINEERING is not set | |
| + | |
| +# | |
| +# File systems | |
| +# | |
| +CONFIG_EXT2_FS=y | |
| +CONFIG_EXT2_FS_XATTR=y | |
| +# CONFIG_EXT2_FS_POSIX_ACL is not set | |
| +# CONFIG_EXT2_FS_SECURITY is not set | |
| +# CONFIG_EXT2_FS_XIP is not set | |
| +CONFIG_EXT3_FS=y | |
| +CONFIG_EXT3_FS_XATTR=y | |
| +# CONFIG_EXT3_FS_POSIX_ACL is not set | |
| +# CONFIG_EXT3_FS_SECURITY is not set | |
| +# CONFIG_EXT4_FS is not set | |
| +CONFIG_JBD=y | |
| +# CONFIG_JBD_DEBUG is not set | |
| +CONFIG_FS_MBCACHE=y | |
| +# CONFIG_REISERFS_FS is not set | |
| +# CONFIG_JFS_FS is not set | |
| +# CONFIG_FS_POSIX_ACL is not set | |
| +CONFIG_FILE_LOCKING=y | |
| +# CONFIG_XFS_FS is not set | |
| +# CONFIG_OCFS2_FS is not set | |
| +# CONFIG_BTRFS_FS is not set | |
| +CONFIG_DNOTIFY=y | |
| +CONFIG_INOTIFY=y | |
| +CONFIG_INOTIFY_USER=y | |
| +# CONFIG_QUOTA is not set | |
| +# CONFIG_AUTOFS_FS is not set | |
| +# CONFIG_AUTOFS4_FS is not set | |
| +CONFIG_FUSE_FS=y | |
| + | |
| +# | |
| +# CD-ROM/DVD Filesystems | |
| +# | |
| +# CONFIG_ISO9660_FS is not set | |
| +# CONFIG_UDF_FS is not set | |
| + | |
| +# | |
| +# DOS/FAT/NT Filesystems | |
| +# | |
| +CONFIG_FAT_FS=y | |
| +# CONFIG_MSDOS_FS is not set | |
| +CONFIG_VFAT_FS=y | |
| +CONFIG_FAT_DEFAULT_CODEPAGE=437 | |
| +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | |
| +# CONFIG_NTFS_FS is not set | |
| + | |
| +# | |
| +# Pseudo filesystems | |
| +# | |
| +CONFIG_PROC_FS=y | |
| +CONFIG_PROC_SYSCTL=y | |
| +CONFIG_PROC_PAGE_MONITOR=y | |
| +CONFIG_SYSFS=y | |
| +CONFIG_TMPFS=y | |
| +# CONFIG_TMPFS_POSIX_ACL is not set | |
| +# CONFIG_HUGETLB_PAGE is not set | |
| +# CONFIG_CONFIGFS_FS is not set | |
| +CONFIG_MISC_FILESYSTEMS=y | |
| +# CONFIG_ADFS_FS is not set | |
| +# CONFIG_AFFS_FS is not set | |
| +# CONFIG_HFS_FS is not set | |
| +# CONFIG_HFSPLUS_FS is not set | |
| +# CONFIG_BEFS_FS is not set | |
| +# CONFIG_BFS_FS is not set | |
| +# CONFIG_EFS_FS is not set | |
| +CONFIG_YAFFS_FS=y | |
| +CONFIG_YAFFS_YAFFS1=y | |
| +# CONFIG_YAFFS_9BYTE_TAGS is not set | |
| +# CONFIG_YAFFS_DOES_ECC is not set | |
| +CONFIG_YAFFS_YAFFS2=y | |
| +CONFIG_YAFFS_AUTO_YAFFS2=y | |
| +# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | |
| +# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | |
| +# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | |
| +CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | |
| +# CONFIG_JFFS2_FS is not set | |
| +# CONFIG_UBIFS_FS is not set | |
| +# CONFIG_CRAMFS is not set | |
| +# CONFIG_SQUASHFS is not set | |
| +# CONFIG_VXFS_FS is not set | |
| +# CONFIG_MINIX_FS is not set | |
| +# CONFIG_OMFS_FS is not set | |
| +# CONFIG_HPFS_FS is not set | |
| +# CONFIG_QNX4FS_FS is not set | |
| +# CONFIG_ROMFS_FS is not set | |
| +# CONFIG_SYSV_FS is not set | |
| +# CONFIG_UFS_FS is not set | |
| +CONFIG_NETWORK_FILESYSTEMS=y | |
| +CONFIG_NFS_FS=y | |
| +CONFIG_NFS_V3=y | |
| +# CONFIG_NFS_V3_ACL is not set | |
| +# CONFIG_NFS_V4 is not set | |
| +# CONFIG_NFSD is not set | |
| +CONFIG_LOCKD=y | |
| +CONFIG_LOCKD_V4=y | |
| +CONFIG_NFS_COMMON=y | |
| +CONFIG_SUNRPC=y | |
| +# CONFIG_SUNRPC_REGISTER_V4 is not set | |
| +# CONFIG_RPCSEC_GSS_KRB5 is not set | |
| +# CONFIG_RPCSEC_GSS_SPKM3 is not set | |
| +# CONFIG_SMB_FS is not set | |
| +# CONFIG_CIFS is not set | |
| +# CONFIG_NCP_FS is not set | |
| +# CONFIG_CODA_FS is not set | |
| +# CONFIG_AFS_FS is not set | |
| + | |
| +# | |
| +# Partition Types | |
| +# | |
| +# CONFIG_PARTITION_ADVANCED is not set | |
| +CONFIG_MSDOS_PARTITION=y | |
| +CONFIG_NLS=y | |
| +CONFIG_NLS_DEFAULT="iso8859-1" | |
| +CONFIG_NLS_CODEPAGE_437=y | |
| +# CONFIG_NLS_CODEPAGE_737 is not set | |
| +# CONFIG_NLS_CODEPAGE_775 is not set | |
| +# CONFIG_NLS_CODEPAGE_850 is not set | |
| +# CONFIG_NLS_CODEPAGE_852 is not set | |
| +# CONFIG_NLS_CODEPAGE_855 is not set | |
| +# CONFIG_NLS_CODEPAGE_857 is not set | |
| +# CONFIG_NLS_CODEPAGE_860 is not set | |
| +# CONFIG_NLS_CODEPAGE_861 is not set | |
| +# CONFIG_NLS_CODEPAGE_862 is not set | |
| +# CONFIG_NLS_CODEPAGE_863 is not set | |
| +# CONFIG_NLS_CODEPAGE_864 is not set | |
| +# CONFIG_NLS_CODEPAGE_865 is not set | |
| +# CONFIG_NLS_CODEPAGE_866 is not set | |
| +# CONFIG_NLS_CODEPAGE_869 is not set | |
| +# CONFIG_NLS_CODEPAGE_936 is not set | |
| +# CONFIG_NLS_CODEPAGE_950 is not set | |
| +# CONFIG_NLS_CODEPAGE_932 is not set | |
| +# CONFIG_NLS_CODEPAGE_949 is not set | |
| +# CONFIG_NLS_CODEPAGE_874 is not set | |
| +# CONFIG_NLS_ISO8859_8 is not set | |
| +# CONFIG_NLS_CODEPAGE_1250 is not set | |
| +# CONFIG_NLS_CODEPAGE_1251 is not set | |
| +CONFIG_NLS_ASCII=y | |
| +CONFIG_NLS_ISO8859_1=y | |
| +# CONFIG_NLS_ISO8859_2 is not set | |
| +# CONFIG_NLS_ISO8859_3 is not set | |
| +# CONFIG_NLS_ISO8859_4 is not set | |
| +# CONFIG_NLS_ISO8859_5 is not set | |
| +# CONFIG_NLS_ISO8859_6 is not set | |
| +# CONFIG_NLS_ISO8859_7 is not set | |
| +# CONFIG_NLS_ISO8859_9 is not set | |
| +# CONFIG_NLS_ISO8859_13 is not set | |
| +# CONFIG_NLS_ISO8859_14 is not set | |
| +# CONFIG_NLS_ISO8859_15 is not set | |
| +# CONFIG_NLS_KOI8_R is not set | |
| +# CONFIG_NLS_KOI8_U is not set | |
| +# CONFIG_NLS_UTF8 is not set | |
| +# CONFIG_DLM is not set | |
| + | |
| +# | |
| +# Kernel hacking | |
| +# | |
| +CONFIG_PRINTK_TIME=y | |
| +CONFIG_ENABLE_WARN_DEPRECATED=y | |
| +CONFIG_ENABLE_MUST_CHECK=y | |
| +CONFIG_FRAME_WARN=1024 | |
| +# CONFIG_MAGIC_SYSRQ is not set | |
| +# CONFIG_UNUSED_SYMBOLS is not set | |
| +CONFIG_DEBUG_FS=y | |
| +# CONFIG_HEADERS_CHECK is not set | |
| +CONFIG_DEBUG_KERNEL=y | |
| +# CONFIG_DEBUG_SHIRQ is not set | |
| +# CONFIG_DETECT_SOFTLOCKUP is not set | |
| +# CONFIG_SCHED_DEBUG is not set | |
| +# CONFIG_SCHEDSTATS is not set | |
| +# CONFIG_TIMER_STATS is not set | |
| +# CONFIG_DEBUG_OBJECTS is not set | |
| +# CONFIG_DEBUG_SLAB is not set | |
| +# CONFIG_DEBUG_PREEMPT is not set | |
| +# CONFIG_DEBUG_RT_MUTEXES is not set | |
| +# CONFIG_RT_MUTEX_TESTER is not set | |
| +# CONFIG_DEBUG_SPINLOCK is not set | |
| +# CONFIG_DEBUG_MUTEXES is not set | |
| +# CONFIG_DEBUG_LOCK_ALLOC is not set | |
| +# CONFIG_PROVE_LOCKING is not set | |
| +# CONFIG_LOCK_STAT is not set | |
| +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set | |
| +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | |
| +CONFIG_STACKTRACE=y | |
| +# CONFIG_DEBUG_KOBJECT is not set | |
| +CONFIG_DEBUG_BUGVERBOSE=y | |
| +CONFIG_DEBUG_INFO=y | |
| +# CONFIG_DEBUG_VM is not set | |
| +# CONFIG_DEBUG_WRITECOUNT is not set | |
| +# CONFIG_DEBUG_MEMORY_INIT is not set | |
| +# CONFIG_DEBUG_LIST is not set | |
| +# CONFIG_DEBUG_SG is not set | |
| +# CONFIG_DEBUG_NOTIFIERS is not set | |
| +CONFIG_FRAME_POINTER=y | |
| +# CONFIG_BOOT_PRINTK_DELAY is not set | |
| +# CONFIG_RCU_TORTURE_TEST is not set | |
| +# CONFIG_RCU_CPU_STALL_DETECTOR is not set | |
| +# CONFIG_BACKTRACE_SELF_TEST is not set | |
| +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | |
| +# CONFIG_FAULT_INJECTION is not set | |
| +# CONFIG_LATENCYTOP is not set | |
| +# CONFIG_SYSCTL_SYSCALL_CHECK is not set | |
| +CONFIG_NOP_TRACER=y | |
| +CONFIG_HAVE_FUNCTION_TRACER=y | |
| +CONFIG_RING_BUFFER=y | |
| +CONFIG_TRACING=y | |
| + | |
| +# | |
| +# Tracers | |
| +# | |
| +# CONFIG_FUNCTION_TRACER is not set | |
| +# CONFIG_IRQSOFF_TRACER is not set | |
| +# CONFIG_PREEMPT_TRACER is not set | |
| +# CONFIG_SCHED_TRACER is not set | |
| +# CONFIG_CONTEXT_SWITCH_TRACER is not set | |
| +# CONFIG_BOOT_TRACER is not set | |
| +# CONFIG_TRACE_BRANCH_PROFILING is not set | |
| +# CONFIG_STACK_TRACER is not set | |
| +# CONFIG_FTRACE_STARTUP_TEST is not set | |
| +# CONFIG_DYNAMIC_PRINTK_DEBUG is not set | |
| +# CONFIG_SAMPLES is not set | |
| +CONFIG_HAVE_ARCH_KGDB=y | |
| +# CONFIG_KGDB is not set | |
| +CONFIG_DEBUG_USER=y | |
| +CONFIG_DEBUG_ERRORS=y | |
| +# CONFIG_DEBUG_STACK_USAGE is not set | |
| +# CONFIG_DEBUG_LL is not set | |
| + | |
| +# | |
| +# Security options | |
| +# | |
| +# CONFIG_KEYS is not set | |
| +CONFIG_SECURITY=y | |
| +# CONFIG_SECURITYFS is not set | |
| +CONFIG_SECURITY_NETWORK=y | |
| +CONFIG_SECURITY_PATH=y | |
| +# CONFIG_SECURITY_FILE_CAPABILITIES is not set | |
| +CONFIG_SECURITY_DECKARD=y | |
| +CONFIG_SECURITY_DECKARD_SYSTEM_DEV_PATH="/dev/block/mtdblock5" | |
| +CONFIG_SECURITY_DECKARD_CHROOT_PATH="" | |
| +CONFIG_CRYPTO=y | |
| + | |
| +# | |
| +# Crypto core or helper | |
| +# | |
| +# CONFIG_CRYPTO_FIPS is not set | |
| +CONFIG_CRYPTO_ALGAPI=y | |
| +CONFIG_CRYPTO_ALGAPI2=y | |
| +CONFIG_CRYPTO_HASH=y | |
| +CONFIG_CRYPTO_HASH2=y | |
| +# CONFIG_CRYPTO_MANAGER is not set | |
| +# CONFIG_CRYPTO_MANAGER2 is not set | |
| +# CONFIG_CRYPTO_GF128MUL is not set | |
| +# CONFIG_CRYPTO_NULL is not set | |
| +# CONFIG_CRYPTO_CRYPTD is not set | |
| +# CONFIG_CRYPTO_AUTHENC is not set | |
| +# CONFIG_CRYPTO_TEST is not set | |
| + | |
| +# | |
| +# Authenticated Encryption with Associated Data | |
| +# | |
| +# CONFIG_CRYPTO_CCM is not set | |
| +# CONFIG_CRYPTO_GCM is not set | |
| +# CONFIG_CRYPTO_SEQIV is not set | |
| + | |
| +# | |
| +# Block modes | |
| +# | |
| +# CONFIG_CRYPTO_CBC is not set | |
| +# CONFIG_CRYPTO_CTR is not set | |
| +# CONFIG_CRYPTO_CTS is not set | |
| +# CONFIG_CRYPTO_ECB is not set | |
| +# CONFIG_CRYPTO_LRW is not set | |
| +# CONFIG_CRYPTO_PCBC is not set | |
| +# CONFIG_CRYPTO_XTS is not set | |
| + | |
| +# | |
| +# Hash modes | |
| +# | |
| +# CONFIG_CRYPTO_HMAC is not set | |
| +# CONFIG_CRYPTO_XCBC is not set | |
| + | |
| +# | |
| +# Digest | |
| +# | |
| +# CONFIG_CRYPTO_CRC32C is not set | |
| +# CONFIG_CRYPTO_MD4 is not set | |
| +# CONFIG_CRYPTO_MD5 is not set | |
| +# CONFIG_CRYPTO_MICHAEL_MIC is not set | |
| +# CONFIG_CRYPTO_RMD128 is not set | |
| +# CONFIG_CRYPTO_RMD160 is not set | |
| +# CONFIG_CRYPTO_RMD256 is not set | |
| +# CONFIG_CRYPTO_RMD320 is not set | |
| +# CONFIG_CRYPTO_SHA1 is not set | |
| +CONFIG_CRYPTO_SHA256=y | |
| +# CONFIG_CRYPTO_SHA512 is not set | |
| +# CONFIG_CRYPTO_TGR192 is not set | |
| +# CONFIG_CRYPTO_WP512 is not set | |
| + | |
| +# | |
| +# Ciphers | |
| +# | |
| +# CONFIG_CRYPTO_AES is not set | |
| +# CONFIG_CRYPTO_ANUBIS is not set | |
| +# CONFIG_CRYPTO_ARC4 is not set | |
| +# CONFIG_CRYPTO_BLOWFISH is not set | |
| +# CONFIG_CRYPTO_CAMELLIA is not set | |
| +# CONFIG_CRYPTO_CAST5 is not set | |
| +# CONFIG_CRYPTO_CAST6 is not set | |
| +# CONFIG_CRYPTO_DES is not set | |
| +# CONFIG_CRYPTO_FCRYPT is not set | |
| +# CONFIG_CRYPTO_KHAZAD is not set | |
| +# CONFIG_CRYPTO_SALSA20 is not set | |
| +# CONFIG_CRYPTO_SEED is not set | |
| +# CONFIG_CRYPTO_SERPENT is not set | |
| +# CONFIG_CRYPTO_TEA is not set | |
| +# CONFIG_CRYPTO_TWOFISH is not set | |
| + | |
| +# | |
| +# Compression | |
| +# | |
| +CONFIG_CRYPTO_DEFLATE=y | |
| +CONFIG_CRYPTO_LZO=y | |
| + | |
| +# | |
| +# Random Number Generation | |
| +# | |
| +# CONFIG_CRYPTO_ANSI_CPRNG is not set | |
| +CONFIG_CRYPTO_HW=y | |
| + | |
| +# | |
| +# Library routines | |
| +# | |
| +CONFIG_BITREVERSE=y | |
| +CONFIG_GENERIC_FIND_LAST_BIT=y | |
| +CONFIG_CRC_CCITT=y | |
| +CONFIG_CRC16=y | |
| +# CONFIG_CRC_T10DIF is not set | |
| +# CONFIG_CRC_ITU_T is not set | |
| +CONFIG_CRC32=y | |
| +# CONFIG_CRC7 is not set | |
| +# CONFIG_LIBCRC32C is not set | |
| +CONFIG_ZLIB_INFLATE=y | |
| +CONFIG_ZLIB_DEFLATE=y | |
| +CONFIG_LZO_COMPRESS=y | |
| +CONFIG_LZO_DECOMPRESS=y | |
| +CONFIG_GENERIC_ALLOCATOR=y | |
| +CONFIG_PLIST=y | |
| +CONFIG_HAS_IOMEM=y | |
| +CONFIG_HAS_IOPORT=y | |
| +CONFIG_HAS_DMA=y | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/configs/msm7201a-perf_defconfig kernel/arch/arm/configs/msm7201a-perf_defconfig | |
| --- kernel-msm/arch/arm/configs/msm7201a-perf_defconfig 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/configs/msm7201a-perf_defconfig 2010-08-27 11:17:50.000000000 +0900 | |
| @@ -169,36 +169,32 @@ | |
| # CONFIG_ARCH_DAVINCI is not set | |
| # CONFIG_ARCH_OMAP is not set | |
| CONFIG_ARCH_MSM=y | |
| # CONFIG_ARCH_W90X900 is not set | |
| CONFIG_ARCH_MSM7X01A=y | |
| # CONFIG_ARCH_MSM7X27 is not set | |
| # CONFIG_ARCH_MSM7X30 is not set | |
| # CONFIG_ARCH_QSD8X50 is not set | |
| -# CONFIG_ARCH_MSM7X25 is not set | |
| CONFIG_ARCH_MSM_ARM11=y | |
| # | |
| # MSM Board Selection | |
| # | |
| CONFIG_MACH_HALIBUT=y | |
| CONFIG_MACH_MSM7201A_SURF=y | |
| CONFIG_MACH_MSM7201A_FFA=y | |
| # CONFIG_MACH_TROUT is not set | |
| # CONFIG_MACH_SAPPHIRE is not set | |
| CONFIG_MSM_STACKED_MEMORY=y | |
| -CONFIG_MSM_AMSS_VERSION=6225 | |
| -# CONFIG_MSM_AMSS_VERSION_6210 is not set | |
| -# CONFIG_MSM_AMSS_VERSION_6220 is not set | |
| -CONFIG_MSM_AMSS_VERSION_6225=y | |
| CONFIG_MSM_DEBUG_UART_NONE=y | |
| # CONFIG_MSM_DEBUG_UART1 is not set | |
| # CONFIG_MSM_DEBUG_UART2 is not set | |
| # CONFIG_MSM_DEBUG_UART3 is not set | |
| +CONFIG_CACHE_FLUSH_RANGE_LIMIT=0x40000 | |
| # CONFIG_MSM7X00A_USE_GP_TIMER is not set | |
| CONFIG_MSM7X00A_USE_DG_TIMER=y | |
| CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE_SUSPEND=y | |
| # CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_APPS_SLEEP is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set | |
| # CONFIG_MSM7X00A_SLEEP_WAIT_FOR_INTERRUPT is not set | |
| CONFIG_MSM7X00A_SLEEP_MODE=0 | |
| @@ -309,16 +305,17 @@ | |
| CONFIG_FLATMEM=y | |
| CONFIG_FLAT_NODE_MEM_MAP=y | |
| CONFIG_PAGEFLAGS_EXTENDED=y | |
| CONFIG_SPLIT_PTLOCK_CPUS=4 | |
| # CONFIG_PHYS_ADDR_T_64BIT is not set | |
| CONFIG_ZONE_DMA_FLAG=0 | |
| CONFIG_VIRT_TO_BUS=y | |
| CONFIG_UNEVICTABLE_LRU=y | |
| +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | |
| CONFIG_ALIGNMENT_TRAP=y | |
| # | |
| # Boot options | |
| # | |
| CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| CONFIG_ZBOOT_ROM_BSS=0x0 | |
| CONFIG_CMDLINE="init=/sbin/init root=/dev/ram rw initrd=0x11000000,16M console=ttyDCC0 mem=88M" | |
| @@ -589,16 +586,17 @@ | |
| CONFIG_ANDROID_PMEM=y | |
| # CONFIG_ANDROID_PMEM_DEBUG is not set | |
| CONFIG_ANDROID_PMEM_KAPI_TEST=m | |
| # CONFIG_ICS932S401 is not set | |
| # CONFIG_ENCLOSURE_SERVICES is not set | |
| # CONFIG_KERNEL_DEBUGGER_CORE is not set | |
| # CONFIG_UID_STAT is not set | |
| # CONFIG_TSIF is not set | |
| +# CONFIG_WL127X_RFKILL is not set | |
| # CONFIG_C2PORT is not set | |
| # | |
| # EEPROM support | |
| # | |
| # CONFIG_EEPROM_AT24 is not set | |
| # CONFIG_EEPROM_LEGACY is not set | |
| # CONFIG_EEPROM_93CX6 is not set | |
| @@ -960,17 +958,16 @@ | |
| # | |
| # Camera Sensor Selection | |
| # | |
| CONFIG_MT9T013=y | |
| CONFIG_MT9D112=y | |
| CONFIG_MT9P012=y | |
| CONFIG_MSM_CAMERA_AF_FOXCONN=y | |
| # CONFIG_MSM_CAMERA_AF_BAM is not set | |
| -# CONFIG_MSM_CAMERA_AF_KM is not set | |
| CONFIG_S5K3E2FX=y | |
| # CONFIG_VB6801 is not set | |
| CONFIG_MSM_CAMERA_FLASH=y | |
| # CONFIG_RADIO_ADAPTERS is not set | |
| CONFIG_DAB=y | |
| # | |
| # Graphics support | |
| @@ -1142,17 +1139,17 @@ | |
| # CONFIG_MMC_EMBEDDED_SDIO is not set | |
| # CONFIG_MMC_PARANOID_SD_INIT is not set | |
| # | |
| # MMC/SD/SDIO Card Drivers | |
| # | |
| CONFIG_MMC_BLOCK=y | |
| CONFIG_MMC_BLOCK_BOUNCE=y | |
| -CONFIG_MMC_BLOCK_PARANOID_RESUME=y | |
| +# CONFIG_MMC_BLOCK_DEFERRED_RESUME is not set | |
| # CONFIG_SDIO_UART is not set | |
| # CONFIG_MMC_TEST is not set | |
| # | |
| # MMC/SD/SDIO Host Controller Drivers | |
| # | |
| # CONFIG_MMC_SDHCI is not set | |
| CONFIG_MMC_MSM=y | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/configs/msm7201a_defconfig kernel/arch/arm/configs/msm7201a_defconfig | |
| --- kernel-msm/arch/arm/configs/msm7201a_defconfig 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/configs/msm7201a_defconfig 2010-08-27 11:17:53.000000000 +0900 | |
| @@ -169,36 +169,32 @@ | |
| # CONFIG_ARCH_DAVINCI is not set | |
| # CONFIG_ARCH_OMAP is not set | |
| CONFIG_ARCH_MSM=y | |
| # CONFIG_ARCH_W90X900 is not set | |
| CONFIG_ARCH_MSM7X01A=y | |
| # CONFIG_ARCH_MSM7X27 is not set | |
| # CONFIG_ARCH_MSM7X30 is not set | |
| # CONFIG_ARCH_QSD8X50 is not set | |
| -# CONFIG_ARCH_MSM7X25 is not set | |
| CONFIG_ARCH_MSM_ARM11=y | |
| # | |
| # MSM Board Selection | |
| # | |
| CONFIG_MACH_HALIBUT=y | |
| CONFIG_MACH_MSM7201A_SURF=y | |
| CONFIG_MACH_MSM7201A_FFA=y | |
| # CONFIG_MACH_TROUT is not set | |
| # CONFIG_MACH_SAPPHIRE is not set | |
| CONFIG_MSM_STACKED_MEMORY=y | |
| -CONFIG_MSM_AMSS_VERSION=6225 | |
| -# CONFIG_MSM_AMSS_VERSION_6210 is not set | |
| -# CONFIG_MSM_AMSS_VERSION_6220 is not set | |
| -CONFIG_MSM_AMSS_VERSION_6225=y | |
| CONFIG_MSM_DEBUG_UART_NONE=y | |
| # CONFIG_MSM_DEBUG_UART1 is not set | |
| # CONFIG_MSM_DEBUG_UART2 is not set | |
| # CONFIG_MSM_DEBUG_UART3 is not set | |
| +CONFIG_CACHE_FLUSH_RANGE_LIMIT=0x40000 | |
| # CONFIG_MSM7X00A_USE_GP_TIMER is not set | |
| CONFIG_MSM7X00A_USE_DG_TIMER=y | |
| CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE_SUSPEND=y | |
| # CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_APPS_SLEEP is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set | |
| # CONFIG_MSM7X00A_SLEEP_WAIT_FOR_INTERRUPT is not set | |
| CONFIG_MSM7X00A_SLEEP_MODE=0 | |
| @@ -309,16 +305,17 @@ | |
| CONFIG_FLATMEM=y | |
| CONFIG_FLAT_NODE_MEM_MAP=y | |
| CONFIG_PAGEFLAGS_EXTENDED=y | |
| CONFIG_SPLIT_PTLOCK_CPUS=4 | |
| # CONFIG_PHYS_ADDR_T_64BIT is not set | |
| CONFIG_ZONE_DMA_FLAG=0 | |
| CONFIG_VIRT_TO_BUS=y | |
| CONFIG_UNEVICTABLE_LRU=y | |
| +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | |
| CONFIG_ALIGNMENT_TRAP=y | |
| # | |
| # Boot options | |
| # | |
| CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| CONFIG_ZBOOT_ROM_BSS=0x0 | |
| CONFIG_CMDLINE="init=/sbin/init root=/dev/ram rw initrd=0x11000000,16M console=ttyDCC0 mem=88M" | |
| @@ -589,16 +586,17 @@ | |
| CONFIG_ANDROID_PMEM=y | |
| CONFIG_ANDROID_PMEM_DEBUG=y | |
| CONFIG_ANDROID_PMEM_KAPI_TEST=m | |
| # CONFIG_ICS932S401 is not set | |
| # CONFIG_ENCLOSURE_SERVICES is not set | |
| # CONFIG_KERNEL_DEBUGGER_CORE is not set | |
| # CONFIG_UID_STAT is not set | |
| # CONFIG_TSIF is not set | |
| +# CONFIG_WL127X_RFKILL is not set | |
| # CONFIG_C2PORT is not set | |
| # | |
| # EEPROM support | |
| # | |
| # CONFIG_EEPROM_AT24 is not set | |
| # CONFIG_EEPROM_LEGACY is not set | |
| # CONFIG_EEPROM_93CX6 is not set | |
| @@ -960,17 +958,16 @@ | |
| # | |
| # Camera Sensor Selection | |
| # | |
| CONFIG_MT9T013=y | |
| CONFIG_MT9D112=y | |
| CONFIG_MT9P012=y | |
| CONFIG_MSM_CAMERA_AF_FOXCONN=y | |
| # CONFIG_MSM_CAMERA_AF_BAM is not set | |
| -# CONFIG_MSM_CAMERA_AF_KM is not set | |
| CONFIG_S5K3E2FX=y | |
| # CONFIG_VB6801 is not set | |
| CONFIG_MSM_CAMERA_FLASH=y | |
| # CONFIG_RADIO_ADAPTERS is not set | |
| CONFIG_DAB=y | |
| # | |
| # Graphics support | |
| @@ -1142,17 +1139,17 @@ | |
| # CONFIG_MMC_EMBEDDED_SDIO is not set | |
| # CONFIG_MMC_PARANOID_SD_INIT is not set | |
| # | |
| # MMC/SD/SDIO Card Drivers | |
| # | |
| CONFIG_MMC_BLOCK=y | |
| CONFIG_MMC_BLOCK_BOUNCE=y | |
| -CONFIG_MMC_BLOCK_PARANOID_RESUME=y | |
| +# CONFIG_MMC_BLOCK_DEFERRED_RESUME is not set | |
| # CONFIG_SDIO_UART is not set | |
| # CONFIG_MMC_TEST is not set | |
| # | |
| # MMC/SD/SDIO Host Controller Drivers | |
| # | |
| # CONFIG_MMC_SDHCI is not set | |
| CONFIG_MMC_MSM=y | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/configs/msm7625-perf_defconfig kernel/arch/arm/configs/msm7625-perf_defconfig | |
| --- kernel-msm/arch/arm/configs/msm7625-perf_defconfig 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/configs/msm7625-perf_defconfig 2010-08-27 11:17:50.000000000 +0900 | |
| @@ -0,0 +1,1512 @@ | |
| +# | |
| +# Automatically generated make config: don't edit | |
| +# Linux kernel version: 2.6.29 | |
| +# | |
| +CONFIG_ARM=y | |
| +CONFIG_SYS_SUPPORTS_APM_EMULATION=y | |
| +CONFIG_GENERIC_GPIO=y | |
| +CONFIG_GENERIC_TIME=y | |
| +CONFIG_GENERIC_CLOCKEVENTS=y | |
| +CONFIG_MMU=y | |
| +# CONFIG_NO_IOPORT is not set | |
| +CONFIG_GENERIC_HARDIRQS=y | |
| +CONFIG_STACKTRACE_SUPPORT=y | |
| +CONFIG_HAVE_LATENCYTOP_SUPPORT=y | |
| +CONFIG_LOCKDEP_SUPPORT=y | |
| +CONFIG_TRACE_IRQFLAGS_SUPPORT=y | |
| +CONFIG_HARDIRQS_SW_RESEND=y | |
| +CONFIG_GENERIC_IRQ_PROBE=y | |
| +CONFIG_RWSEM_GENERIC_SPINLOCK=y | |
| +# CONFIG_ARCH_HAS_ILOG2_U32 is not set | |
| +# CONFIG_ARCH_HAS_ILOG2_U64 is not set | |
| +CONFIG_GENERIC_HWEIGHT=y | |
| +CONFIG_GENERIC_CALIBRATE_DELAY=y | |
| +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | |
| +CONFIG_OPROFILE_ARMV6=y | |
| +CONFIG_OPROFILE_ARM11_CORE=y | |
| +CONFIG_VECTORS_BASE=0xffff0000 | |
| +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | |
| + | |
| +# | |
| +# General setup | |
| +# | |
| +CONFIG_EXPERIMENTAL=y | |
| +CONFIG_BROKEN_ON_SMP=y | |
| +CONFIG_LOCK_KERNEL=y | |
| +CONFIG_INIT_ENV_ARG_LIMIT=32 | |
| +CONFIG_LOCALVERSION="$(KERNEL_LOCAL_VERSION)-perf" | |
| +# CONFIG_LOCALVERSION_AUTO is not set | |
| +# CONFIG_SWAP is not set | |
| +CONFIG_SYSVIPC=y | |
| +CONFIG_SYSVIPC_SYSCTL=y | |
| +# CONFIG_POSIX_MQUEUE is not set | |
| +# CONFIG_BSD_PROCESS_ACCT is not set | |
| +# CONFIG_TASKSTATS is not set | |
| +# CONFIG_AUDIT is not set | |
| + | |
| +# | |
| +# RCU Subsystem | |
| +# | |
| +CONFIG_CLASSIC_RCU=y | |
| +# CONFIG_TREE_RCU is not set | |
| +# CONFIG_PREEMPT_RCU is not set | |
| +# CONFIG_TREE_RCU_TRACE is not set | |
| +# CONFIG_PREEMPT_RCU_TRACE is not set | |
| +CONFIG_IKCONFIG=y | |
| +CONFIG_IKCONFIG_PROC=y | |
| +CONFIG_LOG_BUF_SHIFT=17 | |
| +# CONFIG_GROUP_SCHED is not set | |
| +# CONFIG_CGROUPS is not set | |
| +# CONFIG_SYSFS_DEPRECATED_V2 is not set | |
| +# CONFIG_RELAY is not set | |
| +# CONFIG_NAMESPACES is not set | |
| +CONFIG_BLK_DEV_INITRD=y | |
| +CONFIG_INITRAMFS_SOURCE="" | |
| +CONFIG_CC_OPTIMIZE_FOR_SIZE=y | |
| +CONFIG_SYSCTL=y | |
| +CONFIG_ANON_INODES=y | |
| +CONFIG_PANIC_TIMEOUT=0 | |
| +CONFIG_EMBEDDED=y | |
| +CONFIG_UID16=y | |
| +CONFIG_SYSCTL_SYSCALL=y | |
| +CONFIG_KALLSYMS=y | |
| +CONFIG_KALLSYMS_ALL=y | |
| +# CONFIG_KALLSYMS_EXTRA_PASS is not set | |
| +CONFIG_HOTPLUG=y | |
| +CONFIG_PRINTK=y | |
| +CONFIG_BUG=y | |
| +CONFIG_ELF_CORE=y | |
| +CONFIG_BASE_FULL=y | |
| +CONFIG_FUTEX=y | |
| +CONFIG_EPOLL=y | |
| +CONFIG_SIGNALFD=y | |
| +CONFIG_TIMERFD=y | |
| +CONFIG_EVENTFD=y | |
| +CONFIG_SHMEM=y | |
| +CONFIG_AIO=y | |
| +CONFIG_ASHMEM=y | |
| +CONFIG_VM_EVENT_COUNTERS=y | |
| +CONFIG_COMPAT_BRK=y | |
| +CONFIG_SLAB=y | |
| +# CONFIG_SLUB is not set | |
| +# CONFIG_SLOB is not set | |
| +CONFIG_PROFILING=y | |
| +CONFIG_TRACEPOINTS=y | |
| +# CONFIG_MARKERS is not set | |
| +CONFIG_OPROFILE=m | |
| +CONFIG_HAVE_OPROFILE=y | |
| +# CONFIG_KPROBES is not set | |
| +CONFIG_HAVE_KPROBES=y | |
| +CONFIG_HAVE_KRETPROBES=y | |
| +CONFIG_HAVE_CLK=y | |
| +CONFIG_HAVE_GENERIC_DMA_COHERENT=y | |
| +CONFIG_SLABINFO=y | |
| +CONFIG_RT_MUTEXES=y | |
| +CONFIG_BASE_SMALL=0 | |
| +CONFIG_MODULES=y | |
| +# CONFIG_MODULE_FORCE_LOAD is not set | |
| +CONFIG_MODULE_UNLOAD=y | |
| +CONFIG_MODULE_FORCE_UNLOAD=y | |
| +# CONFIG_MODVERSIONS is not set | |
| +# CONFIG_MODULE_SRCVERSION_ALL is not set | |
| +CONFIG_BLOCK=y | |
| +# CONFIG_LBD is not set | |
| +# CONFIG_BLK_DEV_IO_TRACE is not set | |
| +# CONFIG_BLK_DEV_BSG is not set | |
| +# CONFIG_BLK_DEV_INTEGRITY is not set | |
| + | |
| +# | |
| +# IO Schedulers | |
| +# | |
| +CONFIG_IOSCHED_NOOP=y | |
| +CONFIG_IOSCHED_AS=y | |
| +# CONFIG_IOSCHED_DEADLINE is not set | |
| +# CONFIG_IOSCHED_CFQ is not set | |
| +CONFIG_DEFAULT_AS=y | |
| +# CONFIG_DEFAULT_DEADLINE is not set | |
| +# CONFIG_DEFAULT_CFQ is not set | |
| +# CONFIG_DEFAULT_NOOP is not set | |
| +CONFIG_DEFAULT_IOSCHED="anticipatory" | |
| +CONFIG_FREEZER=y | |
| + | |
| +# | |
| +# System Type | |
| +# | |
| +# CONFIG_ARCH_AAEC2000 is not set | |
| +# CONFIG_ARCH_INTEGRATOR is not set | |
| +# CONFIG_ARCH_REALVIEW is not set | |
| +# CONFIG_ARCH_VERSATILE is not set | |
| +# CONFIG_ARCH_AT91 is not set | |
| +# CONFIG_ARCH_CLPS711X is not set | |
| +# CONFIG_ARCH_EBSA110 is not set | |
| +# CONFIG_ARCH_EP93XX is not set | |
| +# CONFIG_ARCH_FOOTBRIDGE is not set | |
| +# CONFIG_ARCH_NETX is not set | |
| +# CONFIG_ARCH_H720X is not set | |
| +# CONFIG_ARCH_IMX is not set | |
| +# CONFIG_ARCH_IOP13XX is not set | |
| +# CONFIG_ARCH_IOP32X is not set | |
| +# CONFIG_ARCH_IOP33X is not set | |
| +# CONFIG_ARCH_IXP23XX is not set | |
| +# CONFIG_ARCH_IXP2000 is not set | |
| +# CONFIG_ARCH_IXP4XX is not set | |
| +# CONFIG_ARCH_L7200 is not set | |
| +# CONFIG_ARCH_KIRKWOOD is not set | |
| +# CONFIG_ARCH_KS8695 is not set | |
| +# CONFIG_ARCH_NS9XXX is not set | |
| +# CONFIG_ARCH_LOKI is not set | |
| +# CONFIG_ARCH_MV78XX0 is not set | |
| +# CONFIG_ARCH_MXC is not set | |
| +# CONFIG_ARCH_ORION5X is not set | |
| +# CONFIG_ARCH_PNX4008 is not set | |
| +# CONFIG_ARCH_PXA is not set | |
| +# CONFIG_ARCH_RPC is not set | |
| +# CONFIG_ARCH_SA1100 is not set | |
| +# CONFIG_ARCH_S3C2410 is not set | |
| +# CONFIG_ARCH_S3C64XX is not set | |
| +# CONFIG_ARCH_SHARK is not set | |
| +# CONFIG_ARCH_LH7A40X is not set | |
| +# CONFIG_ARCH_DAVINCI is not set | |
| +# CONFIG_ARCH_OMAP is not set | |
| +CONFIG_ARCH_MSM=y | |
| +# CONFIG_ARCH_W90X900 is not set | |
| +# CONFIG_ARCH_MSM7X01A is not set | |
| +# CONFIG_ARCH_MSM7X27 is not set | |
| +# CONFIG_ARCH_MSM7X30 is not set | |
| +# CONFIG_ARCH_QSD8X50 is not set | |
| +CONFIG_ARCH_MSM7X25=y | |
| +CONFIG_ARCH_MSM_ARM11=y | |
| +CONFIG_REMOTE_SPINLOCK_SWP=y | |
| + | |
| +# | |
| +# MSM Board Selection | |
| +# | |
| +CONFIG_MACH_MSM7X25_SURF=y | |
| +CONFIG_MACH_MSM7X25_FFA=y | |
| +# CONFIG_MSM_STACKED_MEMORY is not set | |
| +CONFIG_MSM_AMSS_VERSION=6225 | |
| +# CONFIG_MSM_AMSS_VERSION_6210 is not set | |
| +# CONFIG_MSM_AMSS_VERSION_6220 is not set | |
| +CONFIG_MSM_AMSS_VERSION_6225=y | |
| +CONFIG_MSM_DEBUG_UART_NONE=y | |
| +# CONFIG_MSM_DEBUG_UART1 is not set | |
| +# CONFIG_MSM_DEBUG_UART2 is not set | |
| +# CONFIG_MSM_DEBUG_UART3 is not set | |
| +# CONFIG_MSM7X00A_USE_GP_TIMER is not set | |
| +CONFIG_MSM7X00A_USE_DG_TIMER=y | |
| +CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE_SUSPEND=y | |
| +# CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE is not set | |
| +# CONFIG_MSM7X00A_SLEEP_MODE_APPS_SLEEP is not set | |
| +# CONFIG_MSM7X00A_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set | |
| +# CONFIG_MSM7X00A_SLEEP_WAIT_FOR_INTERRUPT is not set | |
| +CONFIG_MSM7X00A_SLEEP_MODE=0 | |
| +# CONFIG_MSM7X00A_IDLE_SLEEP_MODE_POWER_COLLAPSE_SUSPEND is not set | |
| +CONFIG_MSM7X00A_IDLE_SLEEP_MODE_POWER_COLLAPSE=y | |
| +# CONFIG_MSM7X00A_IDLE_SLEEP_MODE_APPS_SLEEP is not set | |
| +# CONFIG_MSM7X00A_IDLE_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set | |
| +# CONFIG_MSM7X00A_IDLE_SLEEP_WAIT_FOR_INTERRUPT is not set | |
| +CONFIG_MSM7X00A_IDLE_SLEEP_MODE=1 | |
| +CONFIG_MSM7X00A_IDLE_SLEEP_MIN_TIME=20000000 | |
| +CONFIG_MSM7X00A_IDLE_SPIN_TIME=80000 | |
| +CONFIG_MSM_IDLE_STATS=y | |
| +CONFIG_MSM_IDLE_STATS_FIRST_BUCKET=62500 | |
| +CONFIG_MSM_IDLE_STATS_BUCKET_SHIFT=2 | |
| +CONFIG_MSM_IDLE_STATS_BUCKET_COUNT=10 | |
| +CONFIG_MSM_SUSPEND_STATS_FIRST_BUCKET=1000000000 | |
| +# CONFIG_HTC_HEADSET is not set | |
| +# CONFIG_HTC_PWRSINK is not set | |
| +# CONFIG_MSM_FIQ_SUPPORT is not set | |
| +# CONFIG_MSM_SERIAL_DEBUGGER is not set | |
| +CONFIG_MSM_SMD=y | |
| +CONFIG_MSM_SMD_PKG3=y | |
| +# CONFIG_MSM_SMD_PKG4 is not set | |
| +CONFIG_MSM_SMD_DEBUG=y | |
| +CONFIG_MSM_RESET_MODEM=m | |
| +CONFIG_MSM_SMD_LOGGING=y | |
| +CONFIG_MSM_SMD_NMEA=y | |
| +CONFIG_MSM_SMD_TTY=y | |
| +CONFIG_MSM_SMD_QMI=y | |
| +CONFIG_MSM_SMD_CTL=y | |
| +CONFIG_MSM_ONCRPCROUTER=y | |
| +CONFIG_MSM_ONCRPCROUTER_DEBUG=y | |
| +CONFIG_MSM_RPCSERVERS=y | |
| +CONFIG_MSM_RPC_PING=y | |
| +CONFIG_MSM_RPC_PROC_COMM_TEST=y | |
| +CONFIG_MSM_RPC_OEM_RAPI=y | |
| +CONFIG_MSM_RPCSERVER_HANDSET=y | |
| +# CONFIG_MSM_CPU_FREQ_SET_MIN_MAX is not set | |
| +# CONFIG_MSM_HW3D is not set | |
| +CONFIG_MSM_ADSP=y | |
| +CONFIG_MSM_ADSP_REPORT_EVENTS=y | |
| +# CONFIG_MSM_VREG_SWITCH_INVERTED is not set | |
| +CONFIG_MSM_DMA_TEST=m | |
| +# CONFIG_WIFI_CONTROL_FUNC is not set | |
| +CONFIG_AUDIO_AAC_PLUS=y | |
| +CONFIG_AUDIO_ENHANCED_AAC_PLUS=y | |
| +CONFIG_SURF_FFA_GPIO_KEYPAD=y | |
| +CONFIG_CLOCK_BASED_SLEEP_LIMIT=y | |
| +# CONFIG_MSM_ADM_OFF_AT_POWER_COLLAPSE is not set | |
| +CONFIG_MSM_SLEEP_TIME_OVERRIDE=y | |
| +CONFIG_MSM_PM_TIMEOUT_HALT=y | |
| +# CONFIG_MSM_PM_TIMEOUT_RESET_MODEM is not set | |
| +# CONFIG_MSM_PM_TIMEOUT_RESET_CHIP is not set | |
| + | |
| +# | |
| +# Processor Type | |
| +# | |
| +CONFIG_CPU_32=y | |
| +CONFIG_CPU_V6=y | |
| +# CONFIG_CPU_32v6K is not set | |
| +CONFIG_CPU_32v6=y | |
| +CONFIG_CPU_ABRT_EV6=y | |
| +CONFIG_CPU_PABRT_NOIFAR=y | |
| +CONFIG_CPU_CACHE_V6=y | |
| +CONFIG_CPU_CACHE_VIPT=y | |
| +CONFIG_CPU_COPY_V6=y | |
| +CONFIG_CPU_TLB_V6=y | |
| +CONFIG_CPU_HAS_ASID=y | |
| +CONFIG_CPU_CP15=y | |
| +CONFIG_CPU_CP15_MMU=y | |
| + | |
| +# | |
| +# Processor Features | |
| +# | |
| +CONFIG_ARM_THUMB=y | |
| +# CONFIG_CPU_ICACHE_DISABLE is not set | |
| +# CONFIG_CPU_DCACHE_DISABLE is not set | |
| +# CONFIG_CPU_BPREDICT_DISABLE is not set | |
| +# CONFIG_OUTER_CACHE is not set | |
| + | |
| +# | |
| +# Bus support | |
| +# | |
| +# CONFIG_PCI_SYSCALL is not set | |
| +# CONFIG_ARCH_SUPPORTS_MSI is not set | |
| +# CONFIG_PCCARD is not set | |
| + | |
| +# | |
| +# Kernel Features | |
| +# | |
| +CONFIG_TICK_ONESHOT=y | |
| +CONFIG_NO_HZ=y | |
| +CONFIG_HIGH_RES_TIMERS=y | |
| +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | |
| +# CONFIG_VMSPLIT_3G is not set | |
| +CONFIG_VMSPLIT_2G=y | |
| +# CONFIG_VMSPLIT_1G is not set | |
| +CONFIG_PAGE_OFFSET=0x80000000 | |
| +CONFIG_PREEMPT=y | |
| +CONFIG_HZ=100 | |
| +CONFIG_AEABI=y | |
| +CONFIG_ARCH_FLATMEM_HAS_HOLES=y | |
| +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | |
| +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | |
| +CONFIG_SELECT_MEMORY_MODEL=y | |
| +CONFIG_FLATMEM_MANUAL=y | |
| +# CONFIG_DISCONTIGMEM_MANUAL is not set | |
| +# CONFIG_SPARSEMEM_MANUAL is not set | |
| +CONFIG_FLATMEM=y | |
| +CONFIG_FLAT_NODE_MEM_MAP=y | |
| +CONFIG_PAGEFLAGS_EXTENDED=y | |
| +CONFIG_SPLIT_PTLOCK_CPUS=4 | |
| +# CONFIG_PHYS_ADDR_T_64BIT is not set | |
| +CONFIG_ZONE_DMA_FLAG=0 | |
| +CONFIG_VIRT_TO_BUS=y | |
| +CONFIG_UNEVICTABLE_LRU=y | |
| +CONFIG_ALIGNMENT_TRAP=y | |
| + | |
| +# | |
| +# Boot options | |
| +# | |
| +CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| +CONFIG_ZBOOT_ROM_BSS=0x0 | |
| +CONFIG_CMDLINE="init=/sbin/init root=/dev/ram rw initrd=0x11000000,16M console=ttyDCC0 mem=88M" | |
| +# CONFIG_XIP_KERNEL is not set | |
| +# CONFIG_KEXEC is not set | |
| + | |
| +# | |
| +# CPU Power Management | |
| +# | |
| +CONFIG_CPU_FREQ=y | |
| +CONFIG_CPU_FREQ_TABLE=y | |
| +CONFIG_CPU_FREQ_DEBUG=y | |
| +CONFIG_CPU_FREQ_STAT=y | |
| +CONFIG_CPU_FREQ_STAT_DETAILS=y | |
| +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y | |
| +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set | |
| +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set | |
| +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set | |
| +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set | |
| +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y | |
| +CONFIG_CPU_FREQ_GOV_POWERSAVE=y | |
| +CONFIG_CPU_FREQ_GOV_USERSPACE=y | |
| +CONFIG_CPU_FREQ_GOV_ONDEMAND=y | |
| +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y | |
| +CONFIG_CPU_FREQ_MIN_TICKS=10 | |
| +CONFIG_CPU_FREQ_SAMPLING_LATENCY_MULTIPLIER=1000 | |
| +# CONFIG_CPU_IDLE is not set | |
| +CONFIG_CPU_FREQ_MSM=y | |
| + | |
| +# | |
| +# Floating point emulation | |
| +# | |
| + | |
| +# | |
| +# At least one emulation must be selected | |
| +# | |
| +# CONFIG_VFP is not set | |
| + | |
| +# | |
| +# Userspace binary formats | |
| +# | |
| +CONFIG_BINFMT_ELF=y | |
| +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | |
| +CONFIG_HAVE_AOUT=y | |
| +# CONFIG_BINFMT_AOUT is not set | |
| +# CONFIG_BINFMT_MISC is not set | |
| + | |
| +# | |
| +# Power management options | |
| +# | |
| +CONFIG_PM=y | |
| +# CONFIG_PM_DEBUG is not set | |
| +CONFIG_PM_SLEEP=y | |
| +CONFIG_SUSPEND=y | |
| +CONFIG_SUSPEND_FREEZER=y | |
| +CONFIG_HAS_WAKELOCK=y | |
| +CONFIG_HAS_EARLYSUSPEND=y | |
| +CONFIG_WAKELOCK=y | |
| +CONFIG_WAKELOCK_STAT=y | |
| +CONFIG_USER_WAKELOCK=y | |
| +CONFIG_EARLYSUSPEND=y | |
| +# CONFIG_NO_USER_SPACE_SCREEN_ACCESS_CONTROL is not set | |
| +CONFIG_CONSOLE_EARLYSUSPEND=y | |
| +# CONFIG_FB_EARLYSUSPEND is not set | |
| +# CONFIG_APM_EMULATION is not set | |
| +CONFIG_ARCH_SUSPEND_POSSIBLE=y | |
| +CONFIG_NET=y | |
| + | |
| +# | |
| +# Networking options | |
| +# | |
| +CONFIG_COMPAT_NET_DEV_OPS=y | |
| +CONFIG_PACKET=y | |
| +# CONFIG_PACKET_MMAP is not set | |
| +CONFIG_UNIX=y | |
| +# CONFIG_NET_KEY is not set | |
| +CONFIG_INET=y | |
| +# CONFIG_IP_MULTICAST is not set | |
| +# CONFIG_IP_ADVANCED_ROUTER is not set | |
| +CONFIG_IP_FIB_HASH=y | |
| +# CONFIG_IP_PNP is not set | |
| +# CONFIG_NET_IPIP is not set | |
| +# CONFIG_NET_IPGRE is not set | |
| +# CONFIG_ARPD is not set | |
| +# CONFIG_SYN_COOKIES is not set | |
| +# CONFIG_INET_AH is not set | |
| +# CONFIG_INET_ESP is not set | |
| +# CONFIG_INET_IPCOMP is not set | |
| +# CONFIG_INET_XFRM_TUNNEL is not set | |
| +# CONFIG_INET_TUNNEL is not set | |
| +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set | |
| +# CONFIG_INET_XFRM_MODE_TUNNEL is not set | |
| +# CONFIG_INET_XFRM_MODE_BEET is not set | |
| +# CONFIG_INET_LRO is not set | |
| +# CONFIG_INET_DIAG is not set | |
| +# CONFIG_TCP_CONG_ADVANCED is not set | |
| +CONFIG_TCP_CONG_CUBIC=y | |
| +CONFIG_DEFAULT_TCP_CONG="cubic" | |
| +# CONFIG_TCP_MD5SIG is not set | |
| +# CONFIG_IPV6 is not set | |
| +CONFIG_ANDROID_PARANOID_NETWORK=y | |
| +# CONFIG_NETWORK_SECMARK is not set | |
| +# CONFIG_NETFILTER is not set | |
| +# CONFIG_IP_DCCP is not set | |
| +# CONFIG_IP_SCTP is not set | |
| +# CONFIG_TIPC is not set | |
| +# CONFIG_ATM is not set | |
| +# CONFIG_BRIDGE is not set | |
| +# CONFIG_NET_DSA is not set | |
| +# CONFIG_VLAN_8021Q is not set | |
| +# CONFIG_DECNET is not set | |
| +# CONFIG_LLC2 is not set | |
| +# CONFIG_IPX is not set | |
| +# CONFIG_ATALK is not set | |
| +# CONFIG_X25 is not set | |
| +# CONFIG_LAPB is not set | |
| +# CONFIG_ECONET is not set | |
| +# CONFIG_WAN_ROUTER is not set | |
| +# CONFIG_NET_SCHED is not set | |
| +# CONFIG_DCB is not set | |
| + | |
| +# | |
| +# Network testing | |
| +# | |
| +# CONFIG_NET_PKTGEN is not set | |
| +# CONFIG_HAMRADIO is not set | |
| +# CONFIG_CAN is not set | |
| +# CONFIG_IRDA is not set | |
| +CONFIG_BT=y | |
| +CONFIG_BT_L2CAP=y | |
| +CONFIG_BT_SCO=y | |
| +CONFIG_BT_RFCOMM=y | |
| +CONFIG_BT_RFCOMM_TTY=y | |
| +# CONFIG_BT_BNEP is not set | |
| +# CONFIG_BT_HIDP is not set | |
| + | |
| +# | |
| +# Bluetooth device drivers | |
| +# | |
| +# CONFIG_BT_HCIBTSDIO is not set | |
| +CONFIG_BT_HCIUART=y | |
| +CONFIG_BT_HCIUART_H4=y | |
| +# CONFIG_BT_HCIUART_BCSP is not set | |
| +# CONFIG_BT_HCIUART_LL is not set | |
| +CONFIG_BT_MSM_SLEEP=y | |
| +# CONFIG_BT_HCIVHCI is not set | |
| +CONFIG_MSM_BT_POWER=y | |
| +# CONFIG_AF_RXRPC is not set | |
| +# CONFIG_PHONET is not set | |
| +# CONFIG_WIRELESS is not set | |
| +# CONFIG_WIMAX is not set | |
| +CONFIG_RFKILL=y | |
| +# CONFIG_RFKILL_PM is not set | |
| +# CONFIG_RFKILL_INPUT is not set | |
| +# CONFIG_NET_9P is not set | |
| + | |
| +# | |
| +# Device Drivers | |
| +# | |
| + | |
| +# | |
| +# Generic Driver Options | |
| +# | |
| +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |
| +CONFIG_STANDALONE=y | |
| +CONFIG_PREVENT_FIRMWARE_BUILD=y | |
| +# CONFIG_FW_LOADER is not set | |
| +# CONFIG_DEBUG_DRIVER is not set | |
| +# CONFIG_DEBUG_DEVRES is not set | |
| +# CONFIG_SYS_HYPERVISOR is not set | |
| +# CONFIG_CONNECTOR is not set | |
| +CONFIG_MTD=y | |
| +# CONFIG_MTD_DEBUG is not set | |
| +# CONFIG_MTD_CONCAT is not set | |
| +CONFIG_MTD_PARTITIONS=y | |
| +# CONFIG_MTD_LAZYECCSTATS is not set | |
| +# CONFIG_MTD_TESTS is not set | |
| +# CONFIG_MTD_REDBOOT_PARTS is not set | |
| +CONFIG_MTD_CMDLINE_PARTS=y | |
| +# CONFIG_MTD_AFS_PARTS is not set | |
| +# CONFIG_MTD_AR7_PARTS is not set | |
| + | |
| +# | |
| +# User Modules And Translation Layers | |
| +# | |
| +CONFIG_MTD_CHAR=y | |
| +CONFIG_MTD_BLKDEVS=y | |
| +CONFIG_MTD_BLOCK=y | |
| +# CONFIG_FTL is not set | |
| +# CONFIG_NFTL is not set | |
| +# CONFIG_INFTL is not set | |
| +# CONFIG_RFD_FTL is not set | |
| +# CONFIG_SSFDC is not set | |
| +# CONFIG_MTD_OOPS is not set | |
| + | |
| +# | |
| +# RAM/ROM/Flash chip drivers | |
| +# | |
| +# CONFIG_MTD_CFI is not set | |
| +# CONFIG_MTD_JEDECPROBE is not set | |
| +CONFIG_MTD_MAP_BANK_WIDTH_1=y | |
| +CONFIG_MTD_MAP_BANK_WIDTH_2=y | |
| +CONFIG_MTD_MAP_BANK_WIDTH_4=y | |
| +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | |
| +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | |
| +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | |
| +CONFIG_MTD_CFI_I1=y | |
| +CONFIG_MTD_CFI_I2=y | |
| +# CONFIG_MTD_CFI_I4 is not set | |
| +# CONFIG_MTD_CFI_I8 is not set | |
| +# CONFIG_MTD_RAM is not set | |
| +# CONFIG_MTD_ROM is not set | |
| +# CONFIG_MTD_ABSENT is not set | |
| + | |
| +# | |
| +# Mapping drivers for chip access | |
| +# | |
| +# CONFIG_MTD_COMPLEX_MAPPINGS is not set | |
| +# CONFIG_MTD_PLATRAM is not set | |
| + | |
| +# | |
| +# Self-contained MTD device drivers | |
| +# | |
| +CONFIG_MTD_MSM_NAND=y | |
| +# CONFIG_MTD_SLRAM is not set | |
| +# CONFIG_MTD_PHRAM is not set | |
| +# CONFIG_MTD_MTDRAM is not set | |
| +# CONFIG_MTD_BLOCK2MTD is not set | |
| + | |
| +# | |
| +# Disk-On-Chip Device Drivers | |
| +# | |
| +# CONFIG_MTD_DOC2000 is not set | |
| +# CONFIG_MTD_DOC2001 is not set | |
| +# CONFIG_MTD_DOC2001PLUS is not set | |
| +# CONFIG_MTD_NAND is not set | |
| +# CONFIG_MTD_ONENAND is not set | |
| + | |
| +# | |
| +# LPDDR flash memory drivers | |
| +# | |
| +# CONFIG_MTD_LPDDR is not set | |
| + | |
| +# | |
| +# UBI - Unsorted block images | |
| +# | |
| +# CONFIG_MTD_UBI is not set | |
| +# CONFIG_PARPORT is not set | |
| +CONFIG_BLK_DEV=y | |
| +# CONFIG_BLK_DEV_COW_COMMON is not set | |
| +CONFIG_BLK_DEV_LOOP=y | |
| +# CONFIG_BLK_DEV_CRYPTOLOOP is not set | |
| +# CONFIG_BLK_DEV_NBD is not set | |
| +CONFIG_BLK_DEV_RAM=y | |
| +CONFIG_BLK_DEV_RAM_COUNT=8 | |
| +CONFIG_BLK_DEV_RAM_SIZE=16384 | |
| +# CONFIG_BLK_DEV_XIP is not set | |
| +# CONFIG_CDROM_PKTCDVD is not set | |
| +# CONFIG_ATA_OVER_ETH is not set | |
| +CONFIG_MISC_DEVICES=y | |
| +CONFIG_ANDROID_PMEM=y | |
| +# CONFIG_ANDROID_PMEM_DEBUG is not set | |
| +CONFIG_ANDROID_PMEM_KAPI_TEST=m | |
| +# CONFIG_ICS932S401 is not set | |
| +# CONFIG_ENCLOSURE_SERVICES is not set | |
| +# CONFIG_KERNEL_DEBUGGER_CORE is not set | |
| +# CONFIG_UID_STAT is not set | |
| +# CONFIG_TSIF is not set | |
| +# CONFIG_C2PORT is not set | |
| + | |
| +# | |
| +# EEPROM support | |
| +# | |
| +# CONFIG_EEPROM_AT24 is not set | |
| +# CONFIG_EEPROM_LEGACY is not set | |
| +# CONFIG_EEPROM_93CX6 is not set | |
| +CONFIG_HAVE_IDE=y | |
| +# CONFIG_IDE is not set | |
| + | |
| +# | |
| +# SCSI device support | |
| +# | |
| +# CONFIG_RAID_ATTRS is not set | |
| +# CONFIG_SCSI is not set | |
| +# CONFIG_SCSI_DMA is not set | |
| +# CONFIG_SCSI_NETLINK is not set | |
| +# CONFIG_ATA is not set | |
| +# CONFIG_MD is not set | |
| +CONFIG_NETDEVICES=y | |
| +CONFIG_DUMMY=y | |
| +# CONFIG_BONDING is not set | |
| +# CONFIG_MACVLAN is not set | |
| +# CONFIG_EQUALIZER is not set | |
| +# CONFIG_TUN is not set | |
| +# CONFIG_VETH is not set | |
| +# CONFIG_NET_ETHERNET is not set | |
| +# CONFIG_NETDEV_1000 is not set | |
| +# CONFIG_NETDEV_10000 is not set | |
| + | |
| +# | |
| +# Wireless LAN | |
| +# | |
| +# CONFIG_WLAN_PRE80211 is not set | |
| +# CONFIG_WLAN_80211 is not set | |
| +# CONFIG_LIBRA_SDIOIF is not set | |
| +# CONFIG_IWLWIFI_LEDS is not set | |
| + | |
| +# | |
| +# Enable WiMAX (Networking options) to see the WiMAX drivers | |
| +# | |
| +# CONFIG_WAN is not set | |
| +# CONFIG_PPP is not set | |
| +CONFIG_SLIP=y | |
| +CONFIG_SLIP_COMPRESSED=y | |
| +CONFIG_SLHC=y | |
| +# CONFIG_SLIP_SMART is not set | |
| +CONFIG_SLIP_MODE_SLIP6=y | |
| +# CONFIG_NETCONSOLE is not set | |
| +CONFIG_MSM_RMNET=y | |
| +# CONFIG_MSM_RMNET_DEBUG is not set | |
| +# CONFIG_NETPOLL is not set | |
| +# CONFIG_NET_POLL_CONTROLLER is not set | |
| +# CONFIG_ISDN is not set | |
| + | |
| +# | |
| +# Input device support | |
| +# | |
| +CONFIG_INPUT=y | |
| +# CONFIG_INPUT_FF_MEMLESS is not set | |
| +# CONFIG_INPUT_POLLDEV is not set | |
| + | |
| +# | |
| +# Userland interfaces | |
| +# | |
| +# CONFIG_INPUT_MOUSEDEV is not set | |
| +# CONFIG_INPUT_JOYDEV is not set | |
| +CONFIG_INPUT_EVDEV=y | |
| +CONFIG_INPUT_EVBUG=m | |
| +# CONFIG_INPUT_KEYRESET is not set | |
| + | |
| +# | |
| +# Input Device Drivers | |
| +# | |
| +# CONFIG_INPUT_KEYBOARD is not set | |
| +# CONFIG_INPUT_MOUSE is not set | |
| +# CONFIG_INPUT_JOYSTICK is not set | |
| +# CONFIG_INPUT_TABLET is not set | |
| +CONFIG_INPUT_TOUCHSCREEN=y | |
| +# CONFIG_TOUCHSCREEN_FUJITSU is not set | |
| +# CONFIG_TOUCHSCREEN_GUNZE is not set | |
| +# CONFIG_TOUCHSCREEN_ELAN_I2C_8232 is not set | |
| +# CONFIG_TOUCHSCREEN_ELO is not set | |
| +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | |
| +# CONFIG_TOUCHSCREEN_MTOUCH is not set | |
| +# CONFIG_TOUCHSCREEN_INEXIO is not set | |
| +# CONFIG_TOUCHSCREEN_MK712 is not set | |
| +# CONFIG_TOUCHSCREEN_PENMOUNT is not set | |
| +# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI is not set | |
| +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | |
| +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set | |
| +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | |
| +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | |
| +# CONFIG_TOUCHSCREEN_TSC2007 is not set | |
| +CONFIG_TOUCHSCREEN_MSM_LEGACY=y | |
| +CONFIG_ANDROID_TOUCHSCREEN_MSM_HACKS=y | |
| +CONFIG_INPUT_MISC=y | |
| +# CONFIG_INPUT_ATI_REMOTE is not set | |
| +# CONFIG_INPUT_ATI_REMOTE2 is not set | |
| +# CONFIG_INPUT_KEYSPAN_REMOTE is not set | |
| +# CONFIG_INPUT_POWERMATE is not set | |
| +# CONFIG_INPUT_YEALINK is not set | |
| +# CONFIG_INPUT_CM109 is not set | |
| +CONFIG_INPUT_UINPUT=y | |
| +CONFIG_INPUT_GPIO=y | |
| +CONFIG_INPUT_KEYCHORD=y | |
| +# CONFIG_BMA150 is not set | |
| + | |
| +# | |
| +# Hardware I/O ports | |
| +# | |
| +# CONFIG_SERIO is not set | |
| +# CONFIG_GAMEPORT is not set | |
| + | |
| +# | |
| +# Character devices | |
| +# | |
| +CONFIG_VT=y | |
| +CONFIG_CONSOLE_TRANSLATIONS=y | |
| +CONFIG_VT_CONSOLE=y | |
| +CONFIG_HW_CONSOLE=y | |
| +# CONFIG_VT_HW_CONSOLE_BINDING is not set | |
| +CONFIG_DEVMEM=y | |
| +CONFIG_DEVKMEM=y | |
| +# CONFIG_SERIAL_NONSTANDARD is not set | |
| + | |
| +# | |
| +# Serial drivers | |
| +# | |
| +# CONFIG_SERIAL_8250 is not set | |
| + | |
| +# | |
| +# Non-8250 serial port support | |
| +# | |
| +CONFIG_SERIAL_CORE=y | |
| +# CONFIG_SERIAL_MSM is not set | |
| +CONFIG_SERIAL_MSM_HS=y | |
| + | |
| +# | |
| +# Diag Support | |
| +# | |
| +CONFIG_DIAG_CHAR=y | |
| +CONFIG_UNIX98_PTYS=y | |
| +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | |
| +# CONFIG_LEGACY_PTYS is not set | |
| +# CONFIG_IPMI_HANDLER is not set | |
| +# CONFIG_HW_RANDOM is not set | |
| +# CONFIG_R3964 is not set | |
| +# CONFIG_RAW_DRIVER is not set | |
| +# CONFIG_TCG_TPM is not set | |
| +# CONFIG_DCC_TTY is not set | |
| +CONFIG_I2C=y | |
| +CONFIG_I2C_BOARDINFO=y | |
| +CONFIG_I2C_CHARDEV=y | |
| +CONFIG_I2C_HELPER_AUTO=y | |
| +CONFIG_I2C_ALGOBIT=y | |
| + | |
| +# | |
| +# I2C Hardware Bus support | |
| +# | |
| + | |
| +# | |
| +# I2C system bus drivers (mostly embedded / system-on-chip) | |
| +# | |
| +# CONFIG_I2C_GPIO is not set | |
| +CONFIG_I2C_MSM=y | |
| +# CONFIG_I2C_OCORES is not set | |
| +# CONFIG_I2C_SIMTEC is not set | |
| + | |
| +# | |
| +# External I2C/SMBus adapter drivers | |
| +# | |
| +# CONFIG_I2C_PARPORT_LIGHT is not set | |
| +# CONFIG_I2C_TAOS_EVM is not set | |
| + | |
| +# | |
| +# Other I2C/SMBus bus drivers | |
| +# | |
| +# CONFIG_I2C_PCA_PLATFORM is not set | |
| +# CONFIG_I2C_STUB is not set | |
| + | |
| +# | |
| +# Miscellaneous I2C Chip support | |
| +# | |
| +# CONFIG_DS1682 is not set | |
| +# CONFIG_SENSORS_PCF8574 is not set | |
| +# CONFIG_PCF8575 is not set | |
| +# CONFIG_SENSORS_PCA9539 is not set | |
| +# CONFIG_SENSORS_PCF8591 is not set | |
| +# CONFIG_SENSORS_MAX6875 is not set | |
| +# CONFIG_SENSORS_TSL2550 is not set | |
| +# CONFIG_SENSORS_AKM8976 is not set | |
| +# CONFIG_SENSORS_PCA963X is not set | |
| +# CONFIG_SENSORS_MT9T013 is not set | |
| +# CONFIG_I2C_DEBUG_CORE is not set | |
| +# CONFIG_I2C_DEBUG_ALGO is not set | |
| +# CONFIG_I2C_DEBUG_BUS is not set | |
| +# CONFIG_I2C_DEBUG_CHIP is not set | |
| +# CONFIG_SPI is not set | |
| +# CONFIG_W1 is not set | |
| +CONFIG_POWER_SUPPLY=y | |
| +# CONFIG_POWER_SUPPLY_DEBUG is not set | |
| +# CONFIG_PDA_POWER is not set | |
| +# CONFIG_BATTERY_DS2760 is not set | |
| +# CONFIG_BATTERY_BQ27x00 is not set | |
| +CONFIG_BATTERY_MSM=y | |
| +# CONFIG_HWMON is not set | |
| +# CONFIG_THERMAL is not set | |
| +# CONFIG_THERMAL_HWMON is not set | |
| +# CONFIG_WATCHDOG is not set | |
| +CONFIG_SSB_POSSIBLE=y | |
| + | |
| +# | |
| +# Sonics Silicon Backplane | |
| +# | |
| +# CONFIG_SSB is not set | |
| + | |
| +# | |
| +# Multifunction device drivers | |
| +# | |
| +# CONFIG_MFD_CORE is not set | |
| +# CONFIG_MFD_SM501 is not set | |
| +# CONFIG_HTC_PASIC3 is not set | |
| +# CONFIG_TWL4030_CORE is not set | |
| +# CONFIG_MFD_TMIO is not set | |
| +# CONFIG_MFD_T7L66XB is not set | |
| +# CONFIG_MFD_TC6387XB is not set | |
| +# CONFIG_PMIC_DA903X is not set | |
| +# CONFIG_MFD_WM8400 is not set | |
| +# CONFIG_MFD_WM8350_I2C is not set | |
| +# CONFIG_MFD_PCF50633 is not set | |
| + | |
| +# | |
| +# Multimedia devices | |
| +# | |
| + | |
| +# | |
| +# Multimedia core support | |
| +# | |
| +CONFIG_VIDEO_DEV=y | |
| +CONFIG_VIDEO_V4L2_COMMON=y | |
| +CONFIG_VIDEO_ALLOW_V4L1=y | |
| +CONFIG_VIDEO_V4L1_COMPAT=y | |
| +# CONFIG_DVB_CORE is not set | |
| +CONFIG_VIDEO_MEDIA=y | |
| + | |
| +# | |
| +# Multimedia drivers | |
| +# | |
| +# CONFIG_MEDIA_ATTACH is not set | |
| +CONFIG_MEDIA_TUNER=y | |
| +CONFIG_MEDIA_TUNER_CUSTOMIZE=y | |
| +# CONFIG_MEDIA_TUNER_SIMPLE is not set | |
| +# CONFIG_MEDIA_TUNER_TDA8290 is not set | |
| +# CONFIG_MEDIA_TUNER_TDA827X is not set | |
| +# CONFIG_MEDIA_TUNER_TDA18271 is not set | |
| +# CONFIG_MEDIA_TUNER_TDA9887 is not set | |
| +# CONFIG_MEDIA_TUNER_TEA5761 is not set | |
| +# CONFIG_MEDIA_TUNER_TEA5767 is not set | |
| +# CONFIG_MEDIA_TUNER_MT20XX is not set | |
| +# CONFIG_MEDIA_TUNER_MT2060 is not set | |
| +# CONFIG_MEDIA_TUNER_MT2266 is not set | |
| +# CONFIG_MEDIA_TUNER_MT2131 is not set | |
| +# CONFIG_MEDIA_TUNER_QT1010 is not set | |
| +# CONFIG_MEDIA_TUNER_XC2028 is not set | |
| +# CONFIG_MEDIA_TUNER_XC5000 is not set | |
| +# CONFIG_MEDIA_TUNER_MXL5005S is not set | |
| +# CONFIG_MEDIA_TUNER_MXL5007T is not set | |
| +CONFIG_VIDEO_V4L2=y | |
| +CONFIG_VIDEO_V4L1=y | |
| +CONFIG_VIDEO_CAPTURE_DRIVERS=y | |
| +# CONFIG_VIDEO_ADV_DEBUG is not set | |
| +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | |
| +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set | |
| + | |
| +# | |
| +# Encoders/decoders and other helper chips | |
| +# | |
| + | |
| +# | |
| +# Audio decoders | |
| +# | |
| +# CONFIG_VIDEO_TVAUDIO is not set | |
| +# CONFIG_VIDEO_TDA7432 is not set | |
| +# CONFIG_VIDEO_TDA9840 is not set | |
| +# CONFIG_VIDEO_TDA9875 is not set | |
| +# CONFIG_VIDEO_TEA6415C is not set | |
| +# CONFIG_VIDEO_TEA6420 is not set | |
| +# CONFIG_VIDEO_MSP3400 is not set | |
| +# CONFIG_VIDEO_CS5345 is not set | |
| +# CONFIG_VIDEO_CS53L32A is not set | |
| +# CONFIG_VIDEO_M52790 is not set | |
| +# CONFIG_VIDEO_TLV320AIC23B is not set | |
| +# CONFIG_VIDEO_WM8775 is not set | |
| +# CONFIG_VIDEO_WM8739 is not set | |
| +# CONFIG_VIDEO_VP27SMPX is not set | |
| + | |
| +# | |
| +# Video decoders | |
| +# | |
| +# CONFIG_VIDEO_BT819 is not set | |
| +# CONFIG_VIDEO_BT856 is not set | |
| +# CONFIG_VIDEO_BT866 is not set | |
| +# CONFIG_VIDEO_KS0127 is not set | |
| +# CONFIG_VIDEO_OV7670 is not set | |
| +# CONFIG_VIDEO_TCM825X is not set | |
| +# CONFIG_VIDEO_SAA7110 is not set | |
| +# CONFIG_VIDEO_SAA7111 is not set | |
| +# CONFIG_VIDEO_SAA7114 is not set | |
| +# CONFIG_VIDEO_SAA711X is not set | |
| +# CONFIG_VIDEO_SAA717X is not set | |
| +# CONFIG_VIDEO_SAA7191 is not set | |
| +# CONFIG_VIDEO_TVP514X is not set | |
| +# CONFIG_VIDEO_TVP5150 is not set | |
| +# CONFIG_VIDEO_VPX3220 is not set | |
| + | |
| +# | |
| +# Video and audio decoders | |
| +# | |
| +# CONFIG_VIDEO_CX25840 is not set | |
| + | |
| +# | |
| +# MPEG video encoders | |
| +# | |
| +# CONFIG_VIDEO_CX2341X is not set | |
| + | |
| +# | |
| +# Video encoders | |
| +# | |
| +# CONFIG_VIDEO_SAA7127 is not set | |
| +# CONFIG_VIDEO_SAA7185 is not set | |
| +# CONFIG_VIDEO_ADV7170 is not set | |
| +# CONFIG_VIDEO_ADV7175 is not set | |
| + | |
| +# | |
| +# Video improvement chips | |
| +# | |
| +# CONFIG_VIDEO_UPD64031A is not set | |
| +# CONFIG_VIDEO_UPD64083 is not set | |
| +# CONFIG_VIDEO_VIVI is not set | |
| +# CONFIG_VIDEO_CPIA is not set | |
| +# CONFIG_VIDEO_SAA5246A is not set | |
| +# CONFIG_VIDEO_SAA5249 is not set | |
| +# CONFIG_SOC_CAMERA is not set | |
| + | |
| +# | |
| +# Qualcomm MSM Camera And Video | |
| +# | |
| +CONFIG_MSM_CAMERA=y | |
| +# CONFIG_MSM_CAMERA_DEBUG is not set | |
| + | |
| +# | |
| +# Camera Sensor Selection | |
| +# | |
| +CONFIG_MT9T013=y | |
| +CONFIG_MT9D112=y | |
| +CONFIG_MT9P012=y | |
| +CONFIG_MSM_CAMERA_AF_FOXCONN=y | |
| +# CONFIG_MSM_CAMERA_AF_BAM is not set | |
| +CONFIG_MT9P012_KM=y | |
| +CONFIG_S5K3E2FX=y | |
| +# CONFIG_VB6801 is not set | |
| +CONFIG_MSM_CAMERA_FLASH=y | |
| +# CONFIG_RADIO_ADAPTERS is not set | |
| +CONFIG_DAB=y | |
| + | |
| +# | |
| +# Graphics support | |
| +# | |
| +CONFIG_DRM=y | |
| +# CONFIG_DRM_MGA is not set | |
| +# CONFIG_DRM_VIA is not set | |
| +# CONFIG_DRM_SAVAGE is not set | |
| +# CONFIG_VGASTATE is not set | |
| +CONFIG_VIDEO_OUTPUT_CONTROL=y | |
| +CONFIG_FB=y | |
| +# CONFIG_FIRMWARE_EDID is not set | |
| +# CONFIG_FB_DDC is not set | |
| +# CONFIG_FB_BOOT_VESA_SUPPORT is not set | |
| +CONFIG_FB_CFB_FILLRECT=y | |
| +CONFIG_FB_CFB_COPYAREA=y | |
| +CONFIG_FB_CFB_IMAGEBLIT=y | |
| +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | |
| +# CONFIG_FB_SYS_FILLRECT is not set | |
| +# CONFIG_FB_SYS_COPYAREA is not set | |
| +# CONFIG_FB_SYS_IMAGEBLIT is not set | |
| +# CONFIG_FB_FOREIGN_ENDIAN is not set | |
| +# CONFIG_FB_SYS_FOPS is not set | |
| +# CONFIG_FB_SVGALIB is not set | |
| +# CONFIG_FB_MACMODES is not set | |
| +# CONFIG_FB_BACKLIGHT is not set | |
| +# CONFIG_FB_MODE_HELPERS is not set | |
| +# CONFIG_FB_TILEBLITTING is not set | |
| + | |
| +# | |
| +# Frame buffer hardware drivers | |
| +# | |
| +# CONFIG_FB_S1D13XXX is not set | |
| +# CONFIG_FB_VIRTUAL is not set | |
| +# CONFIG_FB_METRONOME is not set | |
| +# CONFIG_FB_MB862XX is not set | |
| +CONFIG_FB_MSM=y | |
| +# CONFIG_FB_MSM_BACKLIGHT is not set | |
| +# CONFIG_FB_MSM_LOGO is not set | |
| +CONFIG_FB_MSM_LCDC_HW=y | |
| +# CONFIG_FB_MSM_MDP22 is not set | |
| +CONFIG_FB_MSM_MDP30=y | |
| +# CONFIG_FB_MSM_MDP31 is not set | |
| +# CONFIG_FB_MSM_MDP40 is not set | |
| +# CONFIG_FB_MSM_EBI2 is not set | |
| +CONFIG_FB_MSM_MDDI=y | |
| +CONFIG_FB_MSM_LCDC=y | |
| +# CONFIG_FB_MSM_EXTMDDI is not set | |
| +# CONFIG_FB_MSM_TVOUT is not set | |
| +# CONFIG_FB_MSM_MDDI_TOSHIBA_COMMON is not set | |
| +# CONFIG_FB_MSM_MDDI_TOSHIBA_COMMON_VGA is not set | |
| +CONFIG_FB_MSM_MDDI_AUTO_DETECT=y | |
| +CONFIG_FB_MSM_LCDC_PANEL=y | |
| +CONFIG_FB_MSM_LCDC_PRISM_WVGA=y | |
| +CONFIG_FB_MSM_LCDC_GORDON_VGA=y | |
| +CONFIG_FB_MSM_LCDC_TOSHIBA_WVGA_PT=y | |
| +CONFIG_FB_MSM_LCDC_WXGA=y | |
| +# CONFIG_FB_MSM_LCDC_PRISM_WVGA_PANEL is not set | |
| +# CONFIG_FB_MSM_LCDC_GORDON_VGA_PANEL is not set | |
| +# CONFIG_FB_MSM_LCDC_TOSHIBA_WVGA_PT_PANEL is not set | |
| +CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM=y | |
| +# CONFIG_FB_MSM_MDDI_PANEL_AUTO_DETECT is not set | |
| +# CONFIG_FB_MSM_MDDI_PRISM_WVGA is not set | |
| +# CONFIG_FB_MSM_MDDI_TOSHIBA_WVGA_PORTRAIT is not set | |
| +# CONFIG_FB_MSM_MDDI_TOSHIBA_VGA is not set | |
| +# CONFIG_FB_MSM_MDDI_TOSHIBA_WVGA is not set | |
| +# CONFIG_FB_MSM_MDDI_SHARP_QVGA_128x128 is not set | |
| +# CONFIG_FB_MSM_EBI2_TMD_QVGA_EPSON_QCIF is not set | |
| +# CONFIG_FB_MSM_PANEL_NONE is not set | |
| +# CONFIG_FB_MSM_TVOUT_NTSC is not set | |
| +# CONFIG_FB_MSM_TVOUT_PAL is not set | |
| +CONFIG_BACKLIGHT_LCD_SUPPORT=y | |
| +CONFIG_LCD_CLASS_DEVICE=y | |
| +# CONFIG_LCD_ILI9320 is not set | |
| +# CONFIG_LCD_PLATFORM is not set | |
| +CONFIG_BACKLIGHT_CLASS_DEVICE=y | |
| +CONFIG_BACKLIGHT_GENERIC=y | |
| + | |
| +# | |
| +# Display device support | |
| +# | |
| +# CONFIG_DISPLAY_SUPPORT is not set | |
| + | |
| +# | |
| +# Console display driver support | |
| +# | |
| +# CONFIG_VGA_CONSOLE is not set | |
| +CONFIG_DUMMY_CONSOLE=y | |
| +CONFIG_FRAMEBUFFER_CONSOLE=y | |
| +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | |
| +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | |
| +# CONFIG_FONTS is not set | |
| +CONFIG_FONT_8x8=y | |
| +CONFIG_FONT_8x16=y | |
| +# CONFIG_LOGO is not set | |
| +CONFIG_SOUND=y | |
| +# CONFIG_SOUND_OSS_CORE is not set | |
| +CONFIG_SND=y | |
| +CONFIG_SND_TIMER=y | |
| +CONFIG_SND_PCM=y | |
| +# CONFIG_SND_SEQUENCER is not set | |
| +# CONFIG_SND_MIXER_OSS is not set | |
| +# CONFIG_SND_PCM_OSS is not set | |
| +# CONFIG_SND_HRTIMER is not set | |
| +# CONFIG_SND_DYNAMIC_MINORS is not set | |
| +CONFIG_SND_SUPPORT_OLD_API=y | |
| +CONFIG_SND_VERBOSE_PROCFS=y | |
| +# CONFIG_SND_VERBOSE_PRINTK is not set | |
| +# CONFIG_SND_DEBUG is not set | |
| +# CONFIG_SND_DRIVERS is not set | |
| +# CONFIG_SND_ARM is not set | |
| +CONFIG_SND_SOC=y | |
| + | |
| +# | |
| +# MSM SoC Audio support | |
| +# | |
| +CONFIG_SND_MSM_SOC=y | |
| +CONFIG_SND_MSM_DAI_SOC=y | |
| +CONFIG_SND_MSM_SOC_MSM7K=y | |
| +CONFIG_SND_SOC_I2C_AND_SPI=y | |
| +# CONFIG_SND_SOC_ALL_CODECS is not set | |
| +# CONFIG_SOUND_PRIME is not set | |
| +# CONFIG_HID_SUPPORT is not set | |
| +CONFIG_USB_SUPPORT=y | |
| +CONFIG_USB_ARCH_HAS_HCD=y | |
| +# CONFIG_USB_ARCH_HAS_OHCI is not set | |
| +CONFIG_USB_ARCH_HAS_EHCI=y | |
| +# CONFIG_USB is not set | |
| +# CONFIG_USB_OTG_WHITELIST is not set | |
| +# CONFIG_USB_OTG_BLACKLIST_HUB is not set | |
| + | |
| +# | |
| +# Enable Host or Gadget support to see Inventra options | |
| +# | |
| + | |
| +# | |
| +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; | |
| +# | |
| +# CONFIG_USB_GADGET is not set | |
| +CONFIG_USB_CSW_HACK=y | |
| + | |
| +# | |
| +# OTG and related infrastructure | |
| +# | |
| + | |
| +# | |
| +# USB Function Support | |
| +# | |
| +CONFIG_USB_FUNCTION=y | |
| +CONFIG_USB_FUNCTION_MSM_HSUSB=y | |
| +# CONFIG_USB_FUNCTION_NULL is not set | |
| +# CONFIG_USB_FUNCTION_ZERO is not set | |
| +# CONFIG_USB_FUNCTION_LOOPBACK is not set | |
| +CONFIG_USB_FUNCTION_ADB=y | |
| +# CONFIG_USB_FUNCTION_UMS is not set | |
| +CONFIG_USB_FUNCTION_MASS_STORAGE=y | |
| +CONFIG_USB_FUNCTION_DIAG=y | |
| +CONFIG_USB_FUNCTION_ETHER=y | |
| +CONFIG_USB_FUNCTION_SERIAL=y | |
| +CONFIG_MMC=y | |
| +# CONFIG_MMC_DEBUG is not set | |
| +CONFIG_MMC_UNSAFE_RESUME=y | |
| +# CONFIG_MMC_EMBEDDED_SDIO is not set | |
| +# CONFIG_MMC_PARANOID_SD_INIT is not set | |
| + | |
| +# | |
| +# MMC/SD/SDIO Card Drivers | |
| +# | |
| +CONFIG_MMC_BLOCK=y | |
| +CONFIG_MMC_BLOCK_BOUNCE=y | |
| +CONFIG_MMC_BLOCK_PARANOID_RESUME=y | |
| +# CONFIG_SDIO_UART is not set | |
| +# CONFIG_MMC_TEST is not set | |
| + | |
| +# | |
| +# MMC/SD/SDIO Host Controller Drivers | |
| +# | |
| +# CONFIG_MMC_SDHCI is not set | |
| +CONFIG_MMC_MSM=y | |
| +# CONFIG_MMC_MSM7X00A_RESUME_IN_WQ is not set | |
| +CONFIG_MMC_MSM_SDIO_SUPPORT=y | |
| +# CONFIG_MMC_MSM_CARD_HW_DETECTION is not set | |
| +CONFIG_MMC_MSM_SDC1_SUPPORT=y | |
| +# CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT is not set | |
| +CONFIG_MMC_MSM_SDC2_SUPPORT=y | |
| +# CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT is not set | |
| +# CONFIG_MMC_MSM_SDC3_SUPPORT is not set | |
| +CONFIG_MMC_MSM_SDC4_SUPPORT=y | |
| +# CONFIG_MMC_MSM_SDC4_8_BIT_SUPPORT is not set | |
| +# CONFIG_MEMSTICK is not set | |
| +# CONFIG_ACCESSIBILITY is not set | |
| +CONFIG_NEW_LEDS=y | |
| +CONFIG_LEDS_CLASS=y | |
| + | |
| +# | |
| +# LED drivers | |
| +# | |
| +# CONFIG_LEDS_PCA9532 is not set | |
| +# CONFIG_LEDS_GPIO is not set | |
| +CONFIG_LEDS_CPLD=y | |
| +# CONFIG_LEDS_PCA955X is not set | |
| + | |
| +# | |
| +# LED Triggers | |
| +# | |
| +# CONFIG_LEDS_TRIGGERS is not set | |
| +CONFIG_SWITCH=y | |
| +CONFIG_SWITCH_GPIO=y | |
| +CONFIG_RTC_LIB=y | |
| +CONFIG_RTC_CLASS=y | |
| +CONFIG_RTC_HCTOSYS=y | |
| +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | |
| +CONFIG_RTC_DEBUG=y | |
| + | |
| +# | |
| +# RTC interfaces | |
| +# | |
| +CONFIG_RTC_INTF_SYSFS=y | |
| +CONFIG_RTC_INTF_PROC=y | |
| +CONFIG_RTC_INTF_DEV=y | |
| +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | |
| +CONFIG_RTC_INTF_ALARM=y | |
| +# CONFIG_RTC_DRV_TEST is not set | |
| + | |
| +# | |
| +# I2C RTC drivers | |
| +# | |
| +# CONFIG_RTC_DRV_DS1307 is not set | |
| +# CONFIG_RTC_DRV_DS1374 is not set | |
| +# CONFIG_RTC_DRV_DS1672 is not set | |
| +# CONFIG_RTC_DRV_MAX6900 is not set | |
| +# CONFIG_RTC_DRV_RS5C372 is not set | |
| +# CONFIG_RTC_DRV_ISL1208 is not set | |
| +# CONFIG_RTC_DRV_X1205 is not set | |
| +# CONFIG_RTC_DRV_PCF8563 is not set | |
| +# CONFIG_RTC_DRV_PCF8583 is not set | |
| +# CONFIG_RTC_DRV_M41T80 is not set | |
| +# CONFIG_RTC_DRV_S35390A is not set | |
| +# CONFIG_RTC_DRV_FM3130 is not set | |
| +# CONFIG_RTC_DRV_RX8581 is not set | |
| + | |
| +# | |
| +# SPI RTC drivers | |
| +# | |
| + | |
| +# | |
| +# Platform RTC drivers | |
| +# | |
| +# CONFIG_RTC_DRV_CMOS is not set | |
| +# CONFIG_RTC_DRV_DS1286 is not set | |
| +# CONFIG_RTC_DRV_DS1511 is not set | |
| +# CONFIG_RTC_DRV_DS1553 is not set | |
| +# CONFIG_RTC_DRV_DS1742 is not set | |
| +# CONFIG_RTC_DRV_STK17TA8 is not set | |
| +# CONFIG_RTC_DRV_M48T86 is not set | |
| +# CONFIG_RTC_DRV_M48T35 is not set | |
| +# CONFIG_RTC_DRV_M48T59 is not set | |
| +# CONFIG_RTC_DRV_BQ4802 is not set | |
| +# CONFIG_RTC_DRV_V3020 is not set | |
| + | |
| +# | |
| +# on-CPU RTC drivers | |
| +# | |
| +CONFIG_RTC_DRV_MSM=y | |
| +CONFIG_RTC_SECURE_TIME_SUPPORT=y | |
| +# CONFIG_DMADEVICES is not set | |
| +# CONFIG_REGULATOR is not set | |
| +# CONFIG_UIO is not set | |
| +CONFIG_STAGING=y | |
| +# CONFIG_STAGING_EXCLUDE_BUILD is not set | |
| +# CONFIG_MEILHAUS is not set | |
| +# CONFIG_ECHO is not set | |
| +# CONFIG_COMEDI is not set | |
| + | |
| +# | |
| +# Android | |
| +# | |
| +CONFIG_ANDROID=y | |
| +CONFIG_ANDROID_BINDER_IPC=y | |
| +CONFIG_ANDROID_LOGGER=y | |
| +CONFIG_ANDROID_LOGGER_TEST=m | |
| +CONFIG_ANDROID_RAM_CONSOLE=y | |
| +CONFIG_ANDROID_RAM_CONSOLE_ENABLE_VERBOSE=y | |
| +# CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION is not set | |
| +# CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT is not set | |
| +CONFIG_ANDROID_TIMED_OUTPUT=y | |
| +CONFIG_ANDROID_TIMED_GPIO=y | |
| +CONFIG_ANDROID_LOW_MEMORY_KILLER=y | |
| + | |
| +# | |
| +# File systems | |
| +# | |
| +CONFIG_EXT2_FS=y | |
| +CONFIG_EXT2_FS_XATTR=y | |
| +# CONFIG_EXT2_FS_POSIX_ACL is not set | |
| +# CONFIG_EXT2_FS_SECURITY is not set | |
| +# CONFIG_EXT2_FS_XIP is not set | |
| +# CONFIG_EXT3_FS is not set | |
| +# CONFIG_EXT4_FS is not set | |
| +CONFIG_FS_MBCACHE=y | |
| +# CONFIG_REISERFS_FS is not set | |
| +# CONFIG_JFS_FS is not set | |
| +# CONFIG_FS_POSIX_ACL is not set | |
| +CONFIG_FILE_LOCKING=y | |
| +# CONFIG_XFS_FS is not set | |
| +# CONFIG_OCFS2_FS is not set | |
| +# CONFIG_BTRFS_FS is not set | |
| +CONFIG_DNOTIFY=y | |
| +CONFIG_INOTIFY=y | |
| +CONFIG_INOTIFY_USER=y | |
| +# CONFIG_QUOTA is not set | |
| +# CONFIG_AUTOFS_FS is not set | |
| +# CONFIG_AUTOFS4_FS is not set | |
| +# CONFIG_FUSE_FS is not set | |
| + | |
| +# | |
| +# CD-ROM/DVD Filesystems | |
| +# | |
| +# CONFIG_ISO9660_FS is not set | |
| +# CONFIG_UDF_FS is not set | |
| + | |
| +# | |
| +# DOS/FAT/NT Filesystems | |
| +# | |
| +CONFIG_FAT_FS=y | |
| +# CONFIG_MSDOS_FS is not set | |
| +CONFIG_VFAT_FS=y | |
| +CONFIG_FAT_DEFAULT_CODEPAGE=437 | |
| +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | |
| +# CONFIG_NTFS_FS is not set | |
| + | |
| +# | |
| +# Pseudo filesystems | |
| +# | |
| +CONFIG_PROC_FS=y | |
| +CONFIG_PROC_SYSCTL=y | |
| +CONFIG_PROC_PAGE_MONITOR=y | |
| +CONFIG_SYSFS=y | |
| +CONFIG_TMPFS=y | |
| +# CONFIG_TMPFS_POSIX_ACL is not set | |
| +# CONFIG_HUGETLB_PAGE is not set | |
| +# CONFIG_CONFIGFS_FS is not set | |
| +CONFIG_MISC_FILESYSTEMS=y | |
| +# CONFIG_ADFS_FS is not set | |
| +# CONFIG_AFFS_FS is not set | |
| +# CONFIG_HFS_FS is not set | |
| +# CONFIG_HFSPLUS_FS is not set | |
| +# CONFIG_BEFS_FS is not set | |
| +# CONFIG_BFS_FS is not set | |
| +# CONFIG_EFS_FS is not set | |
| +CONFIG_YAFFS_FS=y | |
| +CONFIG_YAFFS_YAFFS1=y | |
| +# CONFIG_YAFFS_9BYTE_TAGS is not set | |
| +# CONFIG_YAFFS_DOES_ECC is not set | |
| +CONFIG_YAFFS_YAFFS2=y | |
| +CONFIG_YAFFS_AUTO_YAFFS2=y | |
| +# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | |
| +# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | |
| +# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | |
| +CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | |
| +# CONFIG_JFFS2_FS is not set | |
| +# CONFIG_CRAMFS is not set | |
| +# CONFIG_SQUASHFS is not set | |
| +# CONFIG_VXFS_FS is not set | |
| +# CONFIG_MINIX_FS is not set | |
| +# CONFIG_OMFS_FS is not set | |
| +# CONFIG_HPFS_FS is not set | |
| +# CONFIG_QNX4FS_FS is not set | |
| +# CONFIG_ROMFS_FS is not set | |
| +# CONFIG_SYSV_FS is not set | |
| +# CONFIG_UFS_FS is not set | |
| +CONFIG_NETWORK_FILESYSTEMS=y | |
| +CONFIG_NFS_FS=y | |
| +CONFIG_NFS_V3=y | |
| +# CONFIG_NFS_V3_ACL is not set | |
| +# CONFIG_NFS_V4 is not set | |
| +# CONFIG_NFSD is not set | |
| +CONFIG_LOCKD=y | |
| +CONFIG_LOCKD_V4=y | |
| +CONFIG_NFS_COMMON=y | |
| +CONFIG_SUNRPC=y | |
| +# CONFIG_SUNRPC_REGISTER_V4 is not set | |
| +# CONFIG_RPCSEC_GSS_KRB5 is not set | |
| +# CONFIG_RPCSEC_GSS_SPKM3 is not set | |
| +# CONFIG_SMB_FS is not set | |
| +# CONFIG_CIFS is not set | |
| +# CONFIG_NCP_FS is not set | |
| +# CONFIG_CODA_FS is not set | |
| +# CONFIG_AFS_FS is not set | |
| + | |
| +# | |
| +# Partition Types | |
| +# | |
| +CONFIG_PARTITION_ADVANCED=y | |
| +# CONFIG_ACORN_PARTITION is not set | |
| +# CONFIG_OSF_PARTITION is not set | |
| +# CONFIG_AMIGA_PARTITION is not set | |
| +# CONFIG_ATARI_PARTITION is not set | |
| +# CONFIG_MAC_PARTITION is not set | |
| +CONFIG_MSDOS_PARTITION=y | |
| +# CONFIG_BSD_DISKLABEL is not set | |
| +# CONFIG_MINIX_SUBPARTITION is not set | |
| +# CONFIG_SOLARIS_X86_PARTITION is not set | |
| +# CONFIG_UNIXWARE_DISKLABEL is not set | |
| +# CONFIG_LDM_PARTITION is not set | |
| +# CONFIG_SGI_PARTITION is not set | |
| +# CONFIG_ULTRIX_PARTITION is not set | |
| +# CONFIG_SUN_PARTITION is not set | |
| +# CONFIG_KARMA_PARTITION is not set | |
| +# CONFIG_EFI_PARTITION is not set | |
| +# CONFIG_SYSV68_PARTITION is not set | |
| +CONFIG_NLS=y | |
| +CONFIG_NLS_DEFAULT="iso8859-1" | |
| +CONFIG_NLS_CODEPAGE_437=y | |
| +# CONFIG_NLS_CODEPAGE_737 is not set | |
| +# CONFIG_NLS_CODEPAGE_775 is not set | |
| +# CONFIG_NLS_CODEPAGE_850 is not set | |
| +# CONFIG_NLS_CODEPAGE_852 is not set | |
| +# CONFIG_NLS_CODEPAGE_855 is not set | |
| +# CONFIG_NLS_CODEPAGE_857 is not set | |
| +# CONFIG_NLS_CODEPAGE_860 is not set | |
| +# CONFIG_NLS_CODEPAGE_861 is not set | |
| +# CONFIG_NLS_CODEPAGE_862 is not set | |
| +# CONFIG_NLS_CODEPAGE_863 is not set | |
| +# CONFIG_NLS_CODEPAGE_864 is not set | |
| +# CONFIG_NLS_CODEPAGE_865 is not set | |
| +# CONFIG_NLS_CODEPAGE_866 is not set | |
| +# CONFIG_NLS_CODEPAGE_869 is not set | |
| +# CONFIG_NLS_CODEPAGE_936 is not set | |
| +# CONFIG_NLS_CODEPAGE_950 is not set | |
| +# CONFIG_NLS_CODEPAGE_932 is not set | |
| +# CONFIG_NLS_CODEPAGE_949 is not set | |
| +# CONFIG_NLS_CODEPAGE_874 is not set | |
| +# CONFIG_NLS_ISO8859_8 is not set | |
| +# CONFIG_NLS_CODEPAGE_1250 is not set | |
| +# CONFIG_NLS_CODEPAGE_1251 is not set | |
| +CONFIG_NLS_ASCII=y | |
| +CONFIG_NLS_ISO8859_1=y | |
| +# CONFIG_NLS_ISO8859_2 is not set | |
| +# CONFIG_NLS_ISO8859_3 is not set | |
| +# CONFIG_NLS_ISO8859_4 is not set | |
| +# CONFIG_NLS_ISO8859_5 is not set | |
| +# CONFIG_NLS_ISO8859_6 is not set | |
| +# CONFIG_NLS_ISO8859_7 is not set | |
| +# CONFIG_NLS_ISO8859_9 is not set | |
| +# CONFIG_NLS_ISO8859_13 is not set | |
| +# CONFIG_NLS_ISO8859_14 is not set | |
| +# CONFIG_NLS_ISO8859_15 is not set | |
| +# CONFIG_NLS_KOI8_R is not set | |
| +# CONFIG_NLS_KOI8_U is not set | |
| +# CONFIG_NLS_UTF8 is not set | |
| +# CONFIG_DLM is not set | |
| + | |
| +# | |
| +# Kernel hacking | |
| +# | |
| +CONFIG_PRINTK_TIME=y | |
| +CONFIG_ENABLE_WARN_DEPRECATED=y | |
| +CONFIG_ENABLE_MUST_CHECK=y | |
| +CONFIG_FRAME_WARN=1024 | |
| +# CONFIG_MAGIC_SYSRQ is not set | |
| +# CONFIG_UNUSED_SYMBOLS is not set | |
| +CONFIG_DEBUG_FS=y | |
| +# CONFIG_HEADERS_CHECK is not set | |
| +CONFIG_DEBUG_KERNEL=y | |
| +# CONFIG_DEBUG_SHIRQ is not set | |
| +# CONFIG_DETECT_SOFTLOCKUP is not set | |
| +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | |
| +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE is not set | |
| +# CONFIG_SCHED_DEBUG is not set | |
| +# CONFIG_SCHEDSTATS is not set | |
| +# CONFIG_TIMER_STATS is not set | |
| +# CONFIG_DEBUG_OBJECTS is not set | |
| +# CONFIG_DEBUG_SLAB is not set | |
| +# CONFIG_DEBUG_PREEMPT is not set | |
| +# CONFIG_DEBUG_RT_MUTEXES is not set | |
| +# CONFIG_RT_MUTEX_TESTER is not set | |
| +# CONFIG_DEBUG_SPINLOCK is not set | |
| +# CONFIG_DEBUG_MUTEXES is not set | |
| +# CONFIG_DEBUG_LOCK_ALLOC is not set | |
| +# CONFIG_PROVE_LOCKING is not set | |
| +# CONFIG_LOCKDEP is not set | |
| +# CONFIG_LOCK_STAT is not set | |
| +# CONFIG_DEBUG_LOCKDEP is not set | |
| +# CONFIG_TRACE_IRQFLAGS is not set | |
| +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set | |
| +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | |
| +CONFIG_STACKTRACE=y | |
| +# CONFIG_DEBUG_KOBJECT is not set | |
| +CONFIG_DEBUG_BUGVERBOSE=y | |
| +CONFIG_DEBUG_INFO=y | |
| +# CONFIG_DEBUG_VM is not set | |
| +# CONFIG_DEBUG_WRITECOUNT is not set | |
| +# CONFIG_DEBUG_MEMORY_INIT is not set | |
| +# CONFIG_DEBUG_LIST is not set | |
| +# CONFIG_DEBUG_SG is not set | |
| +# CONFIG_DEBUG_NOTIFIERS is not set | |
| +CONFIG_FRAME_POINTER=y | |
| +# CONFIG_BOOT_PRINTK_DELAY is not set | |
| +# CONFIG_RCU_TORTURE_TEST is not set | |
| +# CONFIG_RCU_CPU_STALL_DETECTOR is not set | |
| +# CONFIG_BACKTRACE_SELF_TEST is not set | |
| +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | |
| +# CONFIG_FAULT_INJECTION is not set | |
| +# CONFIG_LATENCYTOP is not set | |
| +# CONFIG_SYSCTL_SYSCALL_CHECK is not set | |
| +CONFIG_NOP_TRACER=y | |
| +CONFIG_HAVE_FUNCTION_TRACER=y | |
| +CONFIG_RING_BUFFER=y | |
| +CONFIG_TRACING=y | |
| + | |
| +# | |
| +# Tracers | |
| +# | |
| +# CONFIG_FUNCTION_TRACER is not set | |
| +# CONFIG_IRQSOFF_TRACER is not set | |
| +# CONFIG_PREEMPT_TRACER is not set | |
| +# CONFIG_SCHED_TRACER is not set | |
| +# CONFIG_CONTEXT_SWITCH_TRACER is not set | |
| +# CONFIG_BOOT_TRACER is not set | |
| +# CONFIG_TRACE_BRANCH_PROFILING is not set | |
| +# CONFIG_STACK_TRACER is not set | |
| +# CONFIG_FTRACE_STARTUP_TEST is not set | |
| +# CONFIG_DYNAMIC_PRINTK_DEBUG is not set | |
| +# CONFIG_SAMPLES is not set | |
| +CONFIG_HAVE_ARCH_KGDB=y | |
| +# CONFIG_KGDB is not set | |
| +CONFIG_DEBUG_USER=y | |
| +CONFIG_DEBUG_ERRORS=y | |
| +# CONFIG_DEBUG_STACK_USAGE is not set | |
| +# CONFIG_DEBUG_LL is not set | |
| +# CONFIG_DEBUG_ICEDCC is not set | |
| + | |
| +# | |
| +# Security options | |
| +# | |
| +# CONFIG_KEYS is not set | |
| +# CONFIG_SECURITY is not set | |
| +# CONFIG_SECURITYFS is not set | |
| +# CONFIG_SECURITY_FILE_CAPABILITIES is not set | |
| +# CONFIG_CRYPTO is not set | |
| + | |
| +# | |
| +# Library routines | |
| +# | |
| +CONFIG_BITREVERSE=y | |
| +CONFIG_GENERIC_FIND_LAST_BIT=y | |
| +CONFIG_CRC_CCITT=y | |
| +CONFIG_CRC16=y | |
| +# CONFIG_CRC_T10DIF is not set | |
| +# CONFIG_CRC_ITU_T is not set | |
| +CONFIG_CRC32=y | |
| +# CONFIG_CRC7 is not set | |
| +# CONFIG_LIBCRC32C is not set | |
| +CONFIG_PLIST=y | |
| +CONFIG_HAS_IOMEM=y | |
| +CONFIG_HAS_IOPORT=y | |
| +CONFIG_HAS_DMA=y | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/configs/msm7625_defconfig kernel/arch/arm/configs/msm7625_defconfig | |
| --- kernel-msm/arch/arm/configs/msm7625_defconfig 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/configs/msm7625_defconfig 2010-08-27 11:17:50.000000000 +0900 | |
| @@ -283,20 +283,20 @@ | |
| # | |
| # Kernel Features | |
| # | |
| CONFIG_TICK_ONESHOT=y | |
| CONFIG_NO_HZ=y | |
| CONFIG_HIGH_RES_TIMERS=y | |
| CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | |
| -CONFIG_VMSPLIT_3G=y | |
| -# CONFIG_VMSPLIT_2G is not set | |
| +# CONFIG_VMSPLIT_3G is not set | |
| +CONFIG_VMSPLIT_2G=y | |
| # CONFIG_VMSPLIT_1G is not set | |
| -CONFIG_PAGE_OFFSET=0xC0000000 | |
| +CONFIG_PAGE_OFFSET=0x80000000 | |
| CONFIG_PREEMPT=y | |
| CONFIG_HZ=100 | |
| CONFIG_AEABI=y | |
| CONFIG_ARCH_FLATMEM_HAS_HOLES=y | |
| # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | |
| # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | |
| CONFIG_SELECT_MEMORY_MODEL=y | |
| CONFIG_FLATMEM_MANUAL=y | |
| @@ -421,22 +421,42 @@ | |
| # | |
| # Network testing | |
| # | |
| # CONFIG_NET_PKTGEN is not set | |
| # CONFIG_HAMRADIO is not set | |
| # CONFIG_CAN is not set | |
| # CONFIG_IRDA is not set | |
| -# CONFIG_BT is not set | |
| +CONFIG_BT=y | |
| +CONFIG_BT_L2CAP=y | |
| +CONFIG_BT_SCO=y | |
| +CONFIG_BT_RFCOMM=y | |
| +CONFIG_BT_RFCOMM_TTY=y | |
| +# CONFIG_BT_BNEP is not set | |
| +# CONFIG_BT_HIDP is not set | |
| + | |
| +# | |
| +# Bluetooth device drivers | |
| +# | |
| +# CONFIG_BT_HCIBTSDIO is not set | |
| +CONFIG_BT_HCIUART=y | |
| +CONFIG_BT_HCIUART_H4=y | |
| +# CONFIG_BT_HCIUART_BCSP is not set | |
| +# CONFIG_BT_HCIUART_LL is not set | |
| +CONFIG_BT_MSM_SLEEP=y | |
| +# CONFIG_BT_HCIVHCI is not set | |
| +CONFIG_MSM_BT_POWER=y | |
| # CONFIG_AF_RXRPC is not set | |
| # CONFIG_PHONET is not set | |
| # CONFIG_WIRELESS is not set | |
| # CONFIG_WIMAX is not set | |
| -# CONFIG_RFKILL is not set | |
| +CONFIG_RFKILL=y | |
| +# CONFIG_RFKILL_PM is not set | |
| +# CONFIG_RFKILL_INPUT is not set | |
| # CONFIG_NET_9P is not set | |
| # | |
| # Device Drivers | |
| # | |
| # | |
| # Generic Driver Options | |
| @@ -577,16 +597,17 @@ | |
| # CONFIG_NETDEV_1000 is not set | |
| # CONFIG_NETDEV_10000 is not set | |
| # | |
| # Wireless LAN | |
| # | |
| # CONFIG_WLAN_PRE80211 is not set | |
| # CONFIG_WLAN_80211 is not set | |
| +# CONFIG_LIBRA_SDIOIF is not set | |
| # CONFIG_IWLWIFI_LEDS is not set | |
| # | |
| # Enable WiMAX (Networking options) to see the WiMAX drivers | |
| # | |
| # CONFIG_WAN is not set | |
| # CONFIG_PPP is not set | |
| CONFIG_SLIP=y | |
| @@ -677,20 +698,18 @@ | |
| # Serial drivers | |
| # | |
| # CONFIG_SERIAL_8250 is not set | |
| # | |
| # Non-8250 serial port support | |
| # | |
| CONFIG_SERIAL_CORE=y | |
| -CONFIG_SERIAL_MSM=y | |
| -# CONFIG_SERIAL_MSM_CONSOLE is not set | |
| -# CONFIG_SERIAL_MSM_CLOCK_CONTROL is not set | |
| -# CONFIG_SERIAL_MSM_HS is not set | |
| +# CONFIG_SERIAL_MSM is not set | |
| +CONFIG_SERIAL_MSM_HS=y | |
| # | |
| # Diag Support | |
| # | |
| CONFIG_DIAG_CHAR=y | |
| CONFIG_UNIX98_PTYS=y | |
| # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | |
| # CONFIG_LEGACY_PTYS is not set | |
| @@ -744,17 +763,22 @@ | |
| # CONFIG_SENSORS_PCA963X is not set | |
| # CONFIG_SENSORS_MT9T013 is not set | |
| # CONFIG_I2C_DEBUG_CORE is not set | |
| # CONFIG_I2C_DEBUG_ALGO is not set | |
| # CONFIG_I2C_DEBUG_BUS is not set | |
| # CONFIG_I2C_DEBUG_CHIP is not set | |
| # CONFIG_SPI is not set | |
| # CONFIG_W1 is not set | |
| -# CONFIG_POWER_SUPPLY is not set | |
| +CONFIG_POWER_SUPPLY=y | |
| +# CONFIG_POWER_SUPPLY_DEBUG is not set | |
| +# CONFIG_PDA_POWER is not set | |
| +# CONFIG_BATTERY_DS2760 is not set | |
| +# CONFIG_BATTERY_BQ27x00 is not set | |
| +CONFIG_BATTERY_MSM=y | |
| # CONFIG_HWMON is not set | |
| # CONFIG_THERMAL is not set | |
| # CONFIG_THERMAL_HWMON is not set | |
| # CONFIG_WATCHDOG is not set | |
| CONFIG_SSB_POSSIBLE=y | |
| # | |
| # Sonics Silicon Backplane | |
| @@ -778,24 +802,142 @@ | |
| # | |
| # Multimedia devices | |
| # | |
| # | |
| # Multimedia core support | |
| # | |
| -# CONFIG_VIDEO_DEV is not set | |
| +CONFIG_VIDEO_DEV=y | |
| +CONFIG_VIDEO_V4L2_COMMON=y | |
| +CONFIG_VIDEO_ALLOW_V4L1=y | |
| +CONFIG_VIDEO_V4L1_COMPAT=y | |
| # CONFIG_DVB_CORE is not set | |
| -# CONFIG_VIDEO_MEDIA is not set | |
| +CONFIG_VIDEO_MEDIA=y | |
| # | |
| # Multimedia drivers | |
| # | |
| -# CONFIG_DAB is not set | |
| +# CONFIG_MEDIA_ATTACH is not set | |
| +CONFIG_MEDIA_TUNER=y | |
| +CONFIG_MEDIA_TUNER_CUSTOMIZE=y | |
| +# CONFIG_MEDIA_TUNER_SIMPLE is not set | |
| +# CONFIG_MEDIA_TUNER_TDA8290 is not set | |
| +# CONFIG_MEDIA_TUNER_TDA827X is not set | |
| +# CONFIG_MEDIA_TUNER_TDA18271 is not set | |
| +# CONFIG_MEDIA_TUNER_TDA9887 is not set | |
| +# CONFIG_MEDIA_TUNER_TEA5761 is not set | |
| +# CONFIG_MEDIA_TUNER_TEA5767 is not set | |
| +# CONFIG_MEDIA_TUNER_MT20XX is not set | |
| +# CONFIG_MEDIA_TUNER_MT2060 is not set | |
| +# CONFIG_MEDIA_TUNER_MT2266 is not set | |
| +# CONFIG_MEDIA_TUNER_MT2131 is not set | |
| +# CONFIG_MEDIA_TUNER_QT1010 is not set | |
| +# CONFIG_MEDIA_TUNER_XC2028 is not set | |
| +# CONFIG_MEDIA_TUNER_XC5000 is not set | |
| +# CONFIG_MEDIA_TUNER_MXL5005S is not set | |
| +# CONFIG_MEDIA_TUNER_MXL5007T is not set | |
| +CONFIG_VIDEO_V4L2=y | |
| +CONFIG_VIDEO_V4L1=y | |
| +CONFIG_VIDEO_CAPTURE_DRIVERS=y | |
| +# CONFIG_VIDEO_ADV_DEBUG is not set | |
| +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | |
| +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set | |
| + | |
| +# | |
| +# Encoders/decoders and other helper chips | |
| +# | |
| + | |
| +# | |
| +# Audio decoders | |
| +# | |
| +# CONFIG_VIDEO_TVAUDIO is not set | |
| +# CONFIG_VIDEO_TDA7432 is not set | |
| +# CONFIG_VIDEO_TDA9840 is not set | |
| +# CONFIG_VIDEO_TDA9875 is not set | |
| +# CONFIG_VIDEO_TEA6415C is not set | |
| +# CONFIG_VIDEO_TEA6420 is not set | |
| +# CONFIG_VIDEO_MSP3400 is not set | |
| +# CONFIG_VIDEO_CS5345 is not set | |
| +# CONFIG_VIDEO_CS53L32A is not set | |
| +# CONFIG_VIDEO_M52790 is not set | |
| +# CONFIG_VIDEO_TLV320AIC23B is not set | |
| +# CONFIG_VIDEO_WM8775 is not set | |
| +# CONFIG_VIDEO_WM8739 is not set | |
| +# CONFIG_VIDEO_VP27SMPX is not set | |
| + | |
| +# | |
| +# Video decoders | |
| +# | |
| +# CONFIG_VIDEO_BT819 is not set | |
| +# CONFIG_VIDEO_BT856 is not set | |
| +# CONFIG_VIDEO_BT866 is not set | |
| +# CONFIG_VIDEO_KS0127 is not set | |
| +# CONFIG_VIDEO_OV7670 is not set | |
| +# CONFIG_VIDEO_TCM825X is not set | |
| +# CONFIG_VIDEO_SAA7110 is not set | |
| +# CONFIG_VIDEO_SAA7111 is not set | |
| +# CONFIG_VIDEO_SAA7114 is not set | |
| +# CONFIG_VIDEO_SAA711X is not set | |
| +# CONFIG_VIDEO_SAA717X is not set | |
| +# CONFIG_VIDEO_SAA7191 is not set | |
| +# CONFIG_VIDEO_TVP514X is not set | |
| +# CONFIG_VIDEO_TVP5150 is not set | |
| +# CONFIG_VIDEO_VPX3220 is not set | |
| + | |
| +# | |
| +# Video and audio decoders | |
| +# | |
| +# CONFIG_VIDEO_CX25840 is not set | |
| + | |
| +# | |
| +# MPEG video encoders | |
| +# | |
| +# CONFIG_VIDEO_CX2341X is not set | |
| + | |
| +# | |
| +# Video encoders | |
| +# | |
| +# CONFIG_VIDEO_SAA7127 is not set | |
| +# CONFIG_VIDEO_SAA7185 is not set | |
| +# CONFIG_VIDEO_ADV7170 is not set | |
| +# CONFIG_VIDEO_ADV7175 is not set | |
| + | |
| +# | |
| +# Video improvement chips | |
| +# | |
| +# CONFIG_VIDEO_UPD64031A is not set | |
| +# CONFIG_VIDEO_UPD64083 is not set | |
| +# CONFIG_VIDEO_VIVI is not set | |
| +# CONFIG_VIDEO_CPIA is not set | |
| +# CONFIG_VIDEO_SAA5246A is not set | |
| +# CONFIG_VIDEO_SAA5249 is not set | |
| +# CONFIG_SOC_CAMERA is not set | |
| + | |
| +# | |
| +# Qualcomm MSM Camera And Video | |
| +# | |
| +CONFIG_MSM_CAMERA=y | |
| +# CONFIG_MSM_CAMERA_DEBUG is not set | |
| + | |
| +# | |
| +# Camera Sensor Selection | |
| +# | |
| +CONFIG_MT9T013=y | |
| +CONFIG_MT9D112=y | |
| +CONFIG_MT9P012=y | |
| +CONFIG_MSM_CAMERA_AF_FOXCONN=y | |
| +# CONFIG_MSM_CAMERA_AF_BAM is not set | |
| +CONFIG_MT9P012_KM=y | |
| +CONFIG_S5K3E2FX=y | |
| +# CONFIG_VB6801 is not set | |
| +CONFIG_MSM_CAMERA_FLASH=y | |
| +# CONFIG_RADIO_ADAPTERS is not set | |
| +CONFIG_DAB=y | |
| # | |
| # Graphics support | |
| # | |
| CONFIG_DRM=y | |
| # CONFIG_DRM_MGA is not set | |
| # CONFIG_DRM_VIA is not set | |
| # CONFIG_DRM_SAVAGE is not set | |
| @@ -945,17 +1087,43 @@ | |
| # CONFIG_USB_FUNCTION_ZERO is not set | |
| # CONFIG_USB_FUNCTION_LOOPBACK is not set | |
| CONFIG_USB_FUNCTION_ADB=y | |
| # CONFIG_USB_FUNCTION_UMS is not set | |
| CONFIG_USB_FUNCTION_MASS_STORAGE=y | |
| CONFIG_USB_FUNCTION_DIAG=y | |
| CONFIG_USB_FUNCTION_ETHER=y | |
| CONFIG_USB_FUNCTION_SERIAL=y | |
| -# CONFIG_MMC is not set | |
| +CONFIG_MMC=y | |
| +# CONFIG_MMC_DEBUG is not set | |
| +CONFIG_MMC_UNSAFE_RESUME=y | |
| +# CONFIG_MMC_EMBEDDED_SDIO is not set | |
| +# CONFIG_MMC_PARANOID_SD_INIT is not set | |
| + | |
| +# | |
| +# MMC/SD/SDIO Card Drivers | |
| +# | |
| +CONFIG_MMC_BLOCK=y | |
| +CONFIG_MMC_BLOCK_BOUNCE=y | |
| +CONFIG_MMC_BLOCK_PARANOID_RESUME=y | |
| +# CONFIG_SDIO_UART is not set | |
| +# CONFIG_MMC_TEST is not set | |
| + | |
| +# | |
| +# MMC/SD/SDIO Host Controller Drivers | |
| +# | |
| +# CONFIG_MMC_SDHCI is not set | |
| +CONFIG_MMC_MSM=y | |
| +# CONFIG_MMC_MSM7X00A_RESUME_IN_WQ is not set | |
| +CONFIG_MMC_MSM_SDIO_SUPPORT=y | |
| +# CONFIG_MMC_MSM_CARD_HW_DETECTION is not set | |
| +CONFIG_MMC_MSM_SDC1_SUPPORT=y | |
| +CONFIG_MMC_MSM_SDC2_SUPPORT=y | |
| +# CONFIG_MMC_MSM_SDC3_SUPPORT is not set | |
| +CONFIG_MMC_MSM_SDC4_SUPPORT=y | |
| # CONFIG_MEMSTICK is not set | |
| # CONFIG_ACCESSIBILITY is not set | |
| CONFIG_NEW_LEDS=y | |
| CONFIG_LEDS_CLASS=y | |
| # | |
| # LED drivers | |
| # | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/configs/msm7627-perf_defconfig kernel/arch/arm/configs/msm7627-perf_defconfig | |
| --- kernel-msm/arch/arm/configs/msm7627-perf_defconfig 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/configs/msm7627-perf_defconfig 2010-08-27 11:17:50.000000000 +0900 | |
| @@ -169,33 +169,29 @@ | |
| # CONFIG_ARCH_DAVINCI is not set | |
| # CONFIG_ARCH_OMAP is not set | |
| CONFIG_ARCH_MSM=y | |
| # CONFIG_ARCH_W90X900 is not set | |
| # CONFIG_ARCH_MSM7X01A is not set | |
| CONFIG_ARCH_MSM7X27=y | |
| # CONFIG_ARCH_MSM7X30 is not set | |
| # CONFIG_ARCH_QSD8X50 is not set | |
| -# CONFIG_ARCH_MSM7X25 is not set | |
| CONFIG_ARCH_MSM_ARM11=y | |
| # | |
| # MSM Board Selection | |
| # | |
| CONFIG_MACH_MSM7X27_SURF=y | |
| CONFIG_MACH_MSM7X27_FFA=y | |
| # CONFIG_MSM_STACKED_MEMORY is not set | |
| -CONFIG_MSM_AMSS_VERSION=6225 | |
| -# CONFIG_MSM_AMSS_VERSION_6210 is not set | |
| -# CONFIG_MSM_AMSS_VERSION_6220 is not set | |
| -CONFIG_MSM_AMSS_VERSION_6225=y | |
| CONFIG_MSM_DEBUG_UART_NONE=y | |
| # CONFIG_MSM_DEBUG_UART1 is not set | |
| # CONFIG_MSM_DEBUG_UART2 is not set | |
| # CONFIG_MSM_DEBUG_UART3 is not set | |
| +CONFIG_CACHE_FLUSH_RANGE_LIMIT=0x40000 | |
| # CONFIG_MSM7X00A_USE_GP_TIMER is not set | |
| CONFIG_MSM7X00A_USE_DG_TIMER=y | |
| CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE_SUSPEND=y | |
| # CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_APPS_SLEEP is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set | |
| # CONFIG_MSM7X00A_SLEEP_WAIT_FOR_INTERRUPT is not set | |
| CONFIG_MSM7X00A_SLEEP_MODE=0 | |
| @@ -309,16 +305,17 @@ | |
| CONFIG_FLATMEM=y | |
| CONFIG_FLAT_NODE_MEM_MAP=y | |
| CONFIG_PAGEFLAGS_EXTENDED=y | |
| CONFIG_SPLIT_PTLOCK_CPUS=4 | |
| # CONFIG_PHYS_ADDR_T_64BIT is not set | |
| CONFIG_ZONE_DMA_FLAG=0 | |
| CONFIG_VIRT_TO_BUS=y | |
| CONFIG_UNEVICTABLE_LRU=y | |
| +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 | |
| CONFIG_ALIGNMENT_TRAP=y | |
| # | |
| # Boot options | |
| # | |
| CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| CONFIG_ZBOOT_ROM_BSS=0x0 | |
| CONFIG_CMDLINE="init=/sbin/init root=/dev/ram rw initrd=0x11000000,16M console=ttyDCC0 mem=88M" | |
| @@ -591,16 +588,17 @@ | |
| CONFIG_ANDROID_PMEM=y | |
| # CONFIG_ANDROID_PMEM_DEBUG is not set | |
| CONFIG_ANDROID_PMEM_KAPI_TEST=m | |
| # CONFIG_ICS932S401 is not set | |
| # CONFIG_ENCLOSURE_SERVICES is not set | |
| # CONFIG_KERNEL_DEBUGGER_CORE is not set | |
| # CONFIG_UID_STAT is not set | |
| # CONFIG_TSIF is not set | |
| +# CONFIG_WL127X_RFKILL is not set | |
| # CONFIG_C2PORT is not set | |
| # | |
| # EEPROM support | |
| # | |
| # CONFIG_EEPROM_AT24 is not set | |
| # CONFIG_EEPROM_LEGACY is not set | |
| # CONFIG_EEPROM_93CX6 is not set | |
| @@ -965,17 +963,16 @@ | |
| # | |
| # Camera Sensor Selection | |
| # | |
| CONFIG_MT9T013=y | |
| CONFIG_MT9D112=y | |
| CONFIG_MT9P012=y | |
| CONFIG_MSM_CAMERA_AF_FOXCONN=y | |
| # CONFIG_MSM_CAMERA_AF_BAM is not set | |
| -# CONFIG_MSM_CAMERA_AF_KM is not set | |
| CONFIG_S5K3E2FX=y | |
| # CONFIG_VB6801 is not set | |
| CONFIG_MSM_CAMERA_FLASH=y | |
| # CONFIG_RADIO_ADAPTERS is not set | |
| CONFIG_DAB=y | |
| # | |
| # Graphics support | |
| @@ -1142,17 +1139,17 @@ | |
| # CONFIG_MMC_EMBEDDED_SDIO is not set | |
| # CONFIG_MMC_PARANOID_SD_INIT is not set | |
| # | |
| # MMC/SD/SDIO Card Drivers | |
| # | |
| CONFIG_MMC_BLOCK=y | |
| CONFIG_MMC_BLOCK_BOUNCE=y | |
| -CONFIG_MMC_BLOCK_PARANOID_RESUME=y | |
| +# CONFIG_MMC_BLOCK_DEFERRED_RESUME is not set | |
| # CONFIG_SDIO_UART is not set | |
| # CONFIG_MMC_TEST is not set | |
| # | |
| # MMC/SD/SDIO Host Controller Drivers | |
| # | |
| # CONFIG_MMC_SDHCI is not set | |
| CONFIG_MMC_MSM=y | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/configs/msm7627_defconfig kernel/arch/arm/configs/msm7627_defconfig | |
| --- kernel-msm/arch/arm/configs/msm7627_defconfig 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/configs/msm7627_defconfig 2010-08-27 11:17:50.000000000 +0900 | |
| @@ -169,33 +169,29 @@ | |
| # CONFIG_ARCH_DAVINCI is not set | |
| # CONFIG_ARCH_OMAP is not set | |
| CONFIG_ARCH_MSM=y | |
| # CONFIG_ARCH_W90X900 is not set | |
| # CONFIG_ARCH_MSM7X01A is not set | |
| CONFIG_ARCH_MSM7X27=y | |
| # CONFIG_ARCH_MSM7X30 is not set | |
| # CONFIG_ARCH_QSD8X50 is not set | |
| -# CONFIG_ARCH_MSM7X25 is not set | |
| CONFIG_ARCH_MSM_ARM11=y | |
| # | |
| # MSM Board Selection | |
| # | |
| CONFIG_MACH_MSM7X27_SURF=y | |
| CONFIG_MACH_MSM7X27_FFA=y | |
| # CONFIG_MSM_STACKED_MEMORY is not set | |
| -CONFIG_MSM_AMSS_VERSION=6225 | |
| -# CONFIG_MSM_AMSS_VERSION_6210 is not set | |
| -# CONFIG_MSM_AMSS_VERSION_6220 is not set | |
| -CONFIG_MSM_AMSS_VERSION_6225=y | |
| CONFIG_MSM_DEBUG_UART_NONE=y | |
| # CONFIG_MSM_DEBUG_UART1 is not set | |
| # CONFIG_MSM_DEBUG_UART2 is not set | |
| # CONFIG_MSM_DEBUG_UART3 is not set | |
| +CONFIG_CACHE_FLUSH_RANGE_LIMIT=0x40000 | |
| # CONFIG_MSM7X00A_USE_GP_TIMER is not set | |
| CONFIG_MSM7X00A_USE_DG_TIMER=y | |
| CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE_SUSPEND=y | |
| # CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_APPS_SLEEP is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set | |
| # CONFIG_MSM7X00A_SLEEP_WAIT_FOR_INTERRUPT is not set | |
| CONFIG_MSM7X00A_SLEEP_MODE=0 | |
| @@ -309,16 +305,17 @@ | |
| CONFIG_FLATMEM=y | |
| CONFIG_FLAT_NODE_MEM_MAP=y | |
| CONFIG_PAGEFLAGS_EXTENDED=y | |
| CONFIG_SPLIT_PTLOCK_CPUS=4 | |
| # CONFIG_PHYS_ADDR_T_64BIT is not set | |
| CONFIG_ZONE_DMA_FLAG=0 | |
| CONFIG_VIRT_TO_BUS=y | |
| CONFIG_UNEVICTABLE_LRU=y | |
| +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | |
| CONFIG_ALIGNMENT_TRAP=y | |
| # | |
| # Boot options | |
| # | |
| CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| CONFIG_ZBOOT_ROM_BSS=0x0 | |
| CONFIG_CMDLINE="init=/sbin/init root=/dev/ram rw initrd=0x11000000,16M console=ttyDCC0 mem=88M" | |
| @@ -591,16 +588,17 @@ | |
| CONFIG_ANDROID_PMEM=y | |
| CONFIG_ANDROID_PMEM_DEBUG=y | |
| CONFIG_ANDROID_PMEM_KAPI_TEST=m | |
| # CONFIG_ICS932S401 is not set | |
| # CONFIG_ENCLOSURE_SERVICES is not set | |
| # CONFIG_KERNEL_DEBUGGER_CORE is not set | |
| # CONFIG_UID_STAT is not set | |
| # CONFIG_TSIF is not set | |
| +# CONFIG_WL127X_RFKILL is not set | |
| # CONFIG_C2PORT is not set | |
| # | |
| # EEPROM support | |
| # | |
| # CONFIG_EEPROM_AT24 is not set | |
| # CONFIG_EEPROM_LEGACY is not set | |
| # CONFIG_EEPROM_93CX6 is not set | |
| @@ -965,17 +963,16 @@ | |
| # | |
| # Camera Sensor Selection | |
| # | |
| CONFIG_MT9T013=y | |
| CONFIG_MT9D112=y | |
| CONFIG_MT9P012=y | |
| CONFIG_MSM_CAMERA_AF_FOXCONN=y | |
| # CONFIG_MSM_CAMERA_AF_BAM is not set | |
| -# CONFIG_MSM_CAMERA_AF_KM is not set | |
| CONFIG_S5K3E2FX=y | |
| # CONFIG_VB6801 is not set | |
| CONFIG_MSM_CAMERA_FLASH=y | |
| # CONFIG_RADIO_ADAPTERS is not set | |
| CONFIG_DAB=y | |
| # | |
| # Graphics support | |
| @@ -1142,17 +1139,17 @@ | |
| # CONFIG_MMC_EMBEDDED_SDIO is not set | |
| # CONFIG_MMC_PARANOID_SD_INIT is not set | |
| # | |
| # MMC/SD/SDIO Card Drivers | |
| # | |
| CONFIG_MMC_BLOCK=y | |
| CONFIG_MMC_BLOCK_BOUNCE=y | |
| -CONFIG_MMC_BLOCK_PARANOID_RESUME=y | |
| +# CONFIG_MMC_BLOCK_DEFERRED_RESUME is not set | |
| # CONFIG_SDIO_UART is not set | |
| # CONFIG_MMC_TEST is not set | |
| # | |
| # MMC/SD/SDIO Host Controller Drivers | |
| # | |
| # CONFIG_MMC_SDHCI is not set | |
| CONFIG_MMC_MSM=y | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/configs/msm7630_defconfig kernel/arch/arm/configs/msm7630_defconfig | |
| --- kernel-msm/arch/arm/configs/msm7630_defconfig 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/configs/msm7630_defconfig 2010-08-27 11:17:53.000000000 +0900 | |
| @@ -168,33 +168,29 @@ | |
| # CONFIG_ARCH_DAVINCI is not set | |
| # CONFIG_ARCH_OMAP is not set | |
| CONFIG_ARCH_MSM=y | |
| # CONFIG_ARCH_W90X900 is not set | |
| # CONFIG_ARCH_MSM7X01A is not set | |
| # CONFIG_ARCH_MSM7X27 is not set | |
| CONFIG_ARCH_MSM7X30=y | |
| # CONFIG_ARCH_QSD8X50 is not set | |
| -# CONFIG_ARCH_MSM7X25 is not set | |
| CONFIG_ARCH_MSM_SCORPION=y | |
| # | |
| # MSM Board Selection | |
| # | |
| CONFIG_MACH_MSM7X30_SURF=y | |
| CONFIG_MACH_MSM7X30_FFA=y | |
| # CONFIG_MSM_STACKED_MEMORY is not set | |
| -CONFIG_MSM_AMSS_VERSION=6225 | |
| -# CONFIG_MSM_AMSS_VERSION_6210 is not set | |
| -# CONFIG_MSM_AMSS_VERSION_6220 is not set | |
| -CONFIG_MSM_AMSS_VERSION_6225=y | |
| CONFIG_MSM_DEBUG_UART_NONE=y | |
| # CONFIG_MSM_DEBUG_UART1 is not set | |
| # CONFIG_MSM_DEBUG_UART2 is not set | |
| # CONFIG_MSM_DEBUG_UART3 is not set | |
| +CONFIG_CACHE_FLUSH_RANGE_LIMIT=0x40000 | |
| CONFIG_MSM7X00A_USE_GP_TIMER=y | |
| # CONFIG_MSM7X00A_USE_DG_TIMER is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE_SUSPEND is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_APPS_SLEEP is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set | |
| CONFIG_MSM7X00A_SLEEP_WAIT_FOR_INTERRUPT=y | |
| CONFIG_MSM7X00A_SLEEP_MODE=4 | |
| @@ -315,16 +311,17 @@ | |
| CONFIG_FLATMEM=y | |
| CONFIG_FLAT_NODE_MEM_MAP=y | |
| CONFIG_PAGEFLAGS_EXTENDED=y | |
| CONFIG_SPLIT_PTLOCK_CPUS=4 | |
| # CONFIG_PHYS_ADDR_T_64BIT is not set | |
| CONFIG_ZONE_DMA_FLAG=0 | |
| CONFIG_VIRT_TO_BUS=y | |
| CONFIG_UNEVICTABLE_LRU=y | |
| +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | |
| CONFIG_ALIGNMENT_TRAP=y | |
| # | |
| # Boot options | |
| # | |
| CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| CONFIG_ZBOOT_ROM_BSS=0x0 | |
| CONFIG_CMDLINE="init=/sbin/init root=/dev/ram rw initrd=0x11000000,16M console=ttyDCC0 mem=88M ip=dhcp" | |
| @@ -435,36 +432,27 @@ | |
| # | |
| # Network testing | |
| # | |
| # CONFIG_NET_PKTGEN is not set | |
| # CONFIG_HAMRADIO is not set | |
| # CONFIG_CAN is not set | |
| # CONFIG_IRDA is not set | |
| CONFIG_BT=y | |
| -CONFIG_BT_L2CAP=y | |
| -CONFIG_BT_SCO=y | |
| -CONFIG_BT_RFCOMM=y | |
| -CONFIG_BT_RFCOMM_TTY=y | |
| -CONFIG_BT_BNEP=y | |
| -CONFIG_BT_BNEP_MC_FILTER=y | |
| -CONFIG_BT_BNEP_PROTO_FILTER=y | |
| -CONFIG_BT_HIDP=y | |
| +# CONFIG_BT_L2CAP is not set | |
| +# CONFIG_BT_SCO is not set | |
| # | |
| # Bluetooth device drivers | |
| # | |
| # CONFIG_BT_HCIBTSDIO is not set | |
| -CONFIG_BT_HCIUART=y | |
| -CONFIG_BT_HCIUART_H4=y | |
| -# CONFIG_BT_HCIUART_BCSP is not set | |
| -# CONFIG_BT_HCIUART_LL is not set | |
| +# CONFIG_BT_HCIUART is not set | |
| # CONFIG_BT_MSM_SLEEP is not set | |
| # CONFIG_BT_HCIVHCI is not set | |
| -CONFIG_MSM_BT_POWER=y | |
| +CONFIG_MSM_BT_POWER=m | |
| # CONFIG_AF_RXRPC is not set | |
| # CONFIG_PHONET is not set | |
| CONFIG_WIRELESS=y | |
| # CONFIG_CFG80211 is not set | |
| # CONFIG_WIRELESS_OLD_REGULATORY is not set | |
| CONFIG_WIRELESS_EXT=y | |
| # CONFIG_WIRELESS_EXT_SYSFS is not set | |
| # CONFIG_LIB80211 is not set | |
| @@ -585,16 +573,17 @@ | |
| CONFIG_ANDROID_PMEM=y | |
| # CONFIG_ANDROID_PMEM_DEBUG is not set | |
| CONFIG_ANDROID_PMEM_KAPI_TEST=m | |
| # CONFIG_ICS932S401 is not set | |
| # CONFIG_ENCLOSURE_SERVICES is not set | |
| # CONFIG_KERNEL_DEBUGGER_CORE is not set | |
| # CONFIG_UID_STAT is not set | |
| # CONFIG_TSIF is not set | |
| +# CONFIG_WL127X_RFKILL is not set | |
| # CONFIG_C2PORT is not set | |
| # | |
| # EEPROM support | |
| # | |
| # CONFIG_EEPROM_AT24 is not set | |
| # CONFIG_EEPROM_AT25 is not set | |
| # CONFIG_EEPROM_LEGACY is not set | |
| @@ -1023,23 +1012,20 @@ | |
| # | |
| # Camera Sensor Selection | |
| # | |
| CONFIG_MT9T013=y | |
| CONFIG_MT9D112=y | |
| CONFIG_MT9P012=y | |
| CONFIG_MSM_CAMERA_AF_FOXCONN=y | |
| # CONFIG_MSM_CAMERA_AF_BAM is not set | |
| -# CONFIG_MSM_CAMERA_AF_KM is not set | |
| CONFIG_S5K3E2FX=y | |
| # CONFIG_VB6801 is not set | |
| # CONFIG_MSM_CAMERA_FLASH is not set | |
| -CONFIG_RADIO_ADAPTERS=y | |
| -# CONFIG_RADIO_TEA5764 is not set | |
| -CONFIG_RADIO_TAVARUA=y | |
| +# CONFIG_RADIO_ADAPTERS is not set | |
| CONFIG_DAB=y | |
| # | |
| # Graphics support | |
| # | |
| # CONFIG_DRM is not set | |
| # CONFIG_VGASTATE is not set | |
| CONFIG_VIDEO_OUTPUT_CONTROL=y | |
| @@ -1161,17 +1147,16 @@ | |
| # CONFIG_HID_DEBUG is not set | |
| # CONFIG_HIDRAW is not set | |
| # CONFIG_HID_PID is not set | |
| # | |
| # Special HID drivers | |
| # | |
| CONFIG_HID_COMPAT=y | |
| -# CONFIG_HID_APPLE is not set | |
| CONFIG_USB_SUPPORT=y | |
| CONFIG_USB_ARCH_HAS_HCD=y | |
| # CONFIG_USB_ARCH_HAS_OHCI is not set | |
| CONFIG_USB_ARCH_HAS_EHCI=y | |
| # CONFIG_USB is not set | |
| # CONFIG_USB_OTG_WHITELIST is not set | |
| # CONFIG_USB_OTG_BLACKLIST_HUB is not set | |
| @@ -1209,46 +1194,50 @@ | |
| # CONFIG_MMC_EMBEDDED_SDIO is not set | |
| # CONFIG_MMC_PARANOID_SD_INIT is not set | |
| # | |
| # MMC/SD/SDIO Card Drivers | |
| # | |
| CONFIG_MMC_BLOCK=y | |
| CONFIG_MMC_BLOCK_BOUNCE=y | |
| -CONFIG_MMC_BLOCK_PARANOID_RESUME=y | |
| +# CONFIG_MMC_BLOCK_DEFERRED_RESUME is not set | |
| # CONFIG_SDIO_UART is not set | |
| # CONFIG_MMC_TEST is not set | |
| # | |
| # MMC/SD/SDIO Host Controller Drivers | |
| # | |
| # CONFIG_MMC_SDHCI is not set | |
| # CONFIG_MMC_SPI is not set | |
| CONFIG_MMC_MSM=y | |
| # CONFIG_MMC_MSM7X00A_RESUME_IN_WQ is not set | |
| CONFIG_MMC_MSM_SDIO_SUPPORT=y | |
| # CONFIG_MMC_MSM_CARD_HW_DETECTION is not set | |
| CONFIG_MMC_MSM_SDC1_SUPPORT=y | |
| +# CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT is not set | |
| CONFIG_MMC_MSM_SDC2_SUPPORT=y | |
| +CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT=y | |
| CONFIG_MMC_MSM_SDC3_SUPPORT=y | |
| +# CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT is not set | |
| CONFIG_MMC_MSM_SDC4_SUPPORT=y | |
| +# CONFIG_MMC_MSM_SDC4_8_BIT_SUPPORT is not set | |
| # CONFIG_MEMSTICK is not set | |
| # CONFIG_ACCESSIBILITY is not set | |
| CONFIG_NEW_LEDS=y | |
| CONFIG_LEDS_CLASS=y | |
| # | |
| # LED drivers | |
| # | |
| # CONFIG_LEDS_PCA9532 is not set | |
| # CONFIG_LEDS_GPIO is not set | |
| CONFIG_LEDS_CPLD=y | |
| # CONFIG_LEDS_PCA955X is not set | |
| -CONFIG_LEDS_MSM_PMIC=y | |
| +# CONFIG_LEDS_MSM_PMIC is not set | |
| # | |
| # LED Triggers | |
| # | |
| # CONFIG_LEDS_TRIGGERS is not set | |
| CONFIG_SWITCH=y | |
| CONFIG_SWITCH_GPIO=y | |
| CONFIG_RTC_LIB=y | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/configs/msm_defconfig kernel/arch/arm/configs/msm_defconfig | |
| --- kernel-msm/arch/arm/configs/msm_defconfig 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/configs/msm_defconfig 2010-08-27 11:17:50.000000000 +0900 | |
| @@ -1,12 +1,12 @@ | |
| # | |
| # Automatically generated make config: don't edit | |
| # Linux kernel version: 2.6.29 | |
| -# Mon Apr 6 20:42:00 2009 | |
| +# Mon Apr 20 10:57:11 2009 | |
| # | |
| CONFIG_ARM=y | |
| CONFIG_SYS_SUPPORTS_APM_EMULATION=y | |
| CONFIG_GENERIC_GPIO=y | |
| CONFIG_GENERIC_TIME=y | |
| CONFIG_GENERIC_CLOCKEVENTS=y | |
| CONFIG_MMU=y | |
| # CONFIG_NO_IOPORT is not set | |
| @@ -48,18 +48,29 @@ | |
| CONFIG_CLASSIC_RCU=y | |
| # CONFIG_TREE_RCU is not set | |
| # CONFIG_PREEMPT_RCU is not set | |
| # CONFIG_TREE_RCU_TRACE is not set | |
| # CONFIG_PREEMPT_RCU_TRACE is not set | |
| CONFIG_IKCONFIG=y | |
| CONFIG_IKCONFIG_PROC=y | |
| CONFIG_LOG_BUF_SHIFT=17 | |
| -# CONFIG_GROUP_SCHED is not set | |
| -# CONFIG_CGROUPS is not set | |
| +CONFIG_GROUP_SCHED=y | |
| +CONFIG_FAIR_GROUP_SCHED=y | |
| +CONFIG_RT_GROUP_SCHED=y | |
| +# CONFIG_USER_SCHED is not set | |
| +CONFIG_CGROUP_SCHED=y | |
| +CONFIG_CGROUPS=y | |
| +CONFIG_CGROUP_DEBUG=y | |
| +# CONFIG_CGROUP_NS is not set | |
| +CONFIG_CGROUP_FREEZER=y | |
| +# CONFIG_CGROUP_DEVICE is not set | |
| +CONFIG_CGROUP_CPUACCT=y | |
| +CONFIG_RESOURCE_COUNTERS=y | |
| +# CONFIG_CGROUP_MEM_RES_CTLR is not set | |
| # CONFIG_SYSFS_DEPRECATED_V2 is not set | |
| # CONFIG_RELAY is not set | |
| # CONFIG_NAMESPACES is not set | |
| CONFIG_BLK_DEV_INITRD=y | |
| CONFIG_INITRAMFS_SOURCE="" | |
| CONFIG_CC_OPTIMIZE_FOR_SIZE=y | |
| CONFIG_SYSCTL=y | |
| CONFIG_ANON_INODES=y | |
| @@ -277,16 +288,17 @@ | |
| CONFIG_FLATMEM=y | |
| CONFIG_FLAT_NODE_MEM_MAP=y | |
| CONFIG_PAGEFLAGS_EXTENDED=y | |
| CONFIG_SPLIT_PTLOCK_CPUS=4 | |
| # CONFIG_PHYS_ADDR_T_64BIT is not set | |
| CONFIG_ZONE_DMA_FLAG=0 | |
| CONFIG_VIRT_TO_BUS=y | |
| CONFIG_UNEVICTABLE_LRU=y | |
| +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 | |
| CONFIG_ALIGNMENT_TRAP=y | |
| # | |
| # Boot options | |
| # | |
| CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| CONFIG_ZBOOT_ROM_BSS=0x0 | |
| CONFIG_CMDLINE="mem=64M console=ttyMSM,115200n8" | |
| @@ -354,32 +366,32 @@ | |
| # | |
| # Networking options | |
| # | |
| CONFIG_COMPAT_NET_DEV_OPS=y | |
| CONFIG_PACKET=y | |
| # CONFIG_PACKET_MMAP is not set | |
| CONFIG_UNIX=y | |
| -# CONFIG_NET_KEY is not set | |
| +CONFIG_NET_KEY=y | |
| CONFIG_INET=y | |
| # CONFIG_IP_MULTICAST is not set | |
| # CONFIG_IP_ADVANCED_ROUTER is not set | |
| CONFIG_IP_FIB_HASH=y | |
| # CONFIG_IP_PNP is not set | |
| # CONFIG_NET_IPIP is not set | |
| # CONFIG_NET_IPGRE is not set | |
| # CONFIG_ARPD is not set | |
| # CONFIG_SYN_COOKIES is not set | |
| # CONFIG_INET_AH is not set | |
| -# CONFIG_INET_ESP is not set | |
| +CONFIG_INET_ESP=y | |
| # CONFIG_INET_IPCOMP is not set | |
| # CONFIG_INET_XFRM_TUNNEL is not set | |
| # CONFIG_INET_TUNNEL is not set | |
| -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set | |
| +CONFIG_INET_XFRM_MODE_TRANSPORT=y | |
| # CONFIG_INET_XFRM_MODE_TUNNEL is not set | |
| # CONFIG_INET_XFRM_MODE_BEET is not set | |
| # CONFIG_INET_LRO is not set | |
| # CONFIG_INET_DIAG is not set | |
| # CONFIG_TCP_CONG_ADVANCED is not set | |
| CONFIG_TCP_CONG_CUBIC=y | |
| CONFIG_DEFAULT_TCP_CONG="cubic" | |
| # CONFIG_TCP_MD5SIG is not set | |
| @@ -583,17 +595,17 @@ | |
| # CONFIG_DM_MULTIPATH is not set | |
| # CONFIG_DM_DELAY is not set | |
| CONFIG_DM_UEVENT=y | |
| CONFIG_NETDEVICES=y | |
| CONFIG_DUMMY=y | |
| # CONFIG_BONDING is not set | |
| # CONFIG_MACVLAN is not set | |
| # CONFIG_EQUALIZER is not set | |
| -# CONFIG_TUN is not set | |
| +CONFIG_TUN=y | |
| # CONFIG_VETH is not set | |
| # CONFIG_PHYLIB is not set | |
| CONFIG_NET_ETHERNET=y | |
| CONFIG_MII=y | |
| # CONFIG_AX88796 is not set | |
| CONFIG_SMC91X=y | |
| # CONFIG_DM9000 is not set | |
| # CONFIG_SMC911X is not set | |
| @@ -623,19 +635,21 @@ | |
| # CONFIG_WAN is not set | |
| CONFIG_PPP=y | |
| # CONFIG_PPP_MULTILINK is not set | |
| # CONFIG_PPP_FILTER is not set | |
| CONFIG_PPP_ASYNC=y | |
| # CONFIG_PPP_SYNC_TTY is not set | |
| CONFIG_PPP_DEFLATE=y | |
| CONFIG_PPP_BSDCOMP=y | |
| -# CONFIG_PPP_MPPE is not set | |
| +CONFIG_PPP_MPPE=y | |
| # CONFIG_PPPOE is not set | |
| # CONFIG_PPPOL2TP is not set | |
| +CONFIG_PPPOLAC=y | |
| +CONFIG_PPPOPNS=y | |
| # CONFIG_SLIP is not set | |
| CONFIG_SLHC=y | |
| # CONFIG_NETCONSOLE is not set | |
| CONFIG_MSM_RMNET=y | |
| CONFIG_MSM_RMNET_DEBUG=y | |
| # CONFIG_NETPOLL is not set | |
| # CONFIG_NET_POLL_CONTROLLER is not set | |
| # CONFIG_ISDN is not set | |
| @@ -935,16 +949,17 @@ | |
| CONFIG_MMC_PARANOID_SD_INIT=y | |
| # | |
| # MMC/SD/SDIO Card Drivers | |
| # | |
| CONFIG_MMC_BLOCK=y | |
| # CONFIG_MMC_BLOCK_BOUNCE is not set | |
| CONFIG_MMC_BLOCK_PARANOID_RESUME=y | |
| +CONFIG_MMC_BLOCK_DEFERRED_RESUME=y | |
| # CONFIG_SDIO_UART is not set | |
| # CONFIG_MMC_TEST is not set | |
| # | |
| # MMC/SD/SDIO Host Controller Drivers | |
| # | |
| # CONFIG_MMC_SDHCI is not set | |
| CONFIG_MMC_MSM7X00A=y | |
| @@ -1214,34 +1229,34 @@ | |
| CONFIG_DETECT_SOFTLOCKUP=y | |
| # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | |
| CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | |
| CONFIG_SCHED_DEBUG=y | |
| CONFIG_SCHEDSTATS=y | |
| CONFIG_TIMER_STATS=y | |
| # CONFIG_DEBUG_OBJECTS is not set | |
| # CONFIG_DEBUG_SLAB is not set | |
| -CONFIG_DEBUG_PREEMPT=y | |
| +# CONFIG_DEBUG_PREEMPT is not set | |
| # CONFIG_DEBUG_RT_MUTEXES is not set | |
| # CONFIG_RT_MUTEX_TESTER is not set | |
| # CONFIG_DEBUG_SPINLOCK is not set | |
| -CONFIG_DEBUG_MUTEXES=y | |
| +# CONFIG_DEBUG_MUTEXES is not set | |
| # CONFIG_DEBUG_LOCK_ALLOC is not set | |
| # CONFIG_PROVE_LOCKING is not set | |
| # CONFIG_LOCK_STAT is not set | |
| -CONFIG_DEBUG_SPINLOCK_SLEEP=y | |
| +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set | |
| # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | |
| # CONFIG_DEBUG_KOBJECT is not set | |
| # CONFIG_DEBUG_BUGVERBOSE is not set | |
| CONFIG_DEBUG_INFO=y | |
| -CONFIG_DEBUG_VM=y | |
| +# CONFIG_DEBUG_VM is not set | |
| # CONFIG_DEBUG_WRITECOUNT is not set | |
| # CONFIG_DEBUG_MEMORY_INIT is not set | |
| # CONFIG_DEBUG_LIST is not set | |
| -CONFIG_DEBUG_SG=y | |
| +# CONFIG_DEBUG_SG is not set | |
| # CONFIG_DEBUG_NOTIFIERS is not set | |
| CONFIG_FRAME_POINTER=y | |
| # CONFIG_BOOT_PRINTK_DELAY is not set | |
| # CONFIG_RCU_TORTURE_TEST is not set | |
| # CONFIG_RCU_CPU_STALL_DETECTOR is not set | |
| # CONFIG_BACKTRACE_SELF_TEST is not set | |
| # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | |
| # CONFIG_FAULT_INJECTION is not set | |
| @@ -1312,47 +1327,47 @@ | |
| # CONFIG_CRYPTO_ECB is not set | |
| # CONFIG_CRYPTO_LRW is not set | |
| # CONFIG_CRYPTO_PCBC is not set | |
| # CONFIG_CRYPTO_XTS is not set | |
| # | |
| # Hash modes | |
| # | |
| -# CONFIG_CRYPTO_HMAC is not set | |
| +CONFIG_CRYPTO_HMAC=y | |
| # CONFIG_CRYPTO_XCBC is not set | |
| # | |
| # Digest | |
| # | |
| # CONFIG_CRYPTO_CRC32C is not set | |
| # CONFIG_CRYPTO_MD4 is not set | |
| -# CONFIG_CRYPTO_MD5 is not set | |
| +CONFIG_CRYPTO_MD5=y | |
| # CONFIG_CRYPTO_MICHAEL_MIC is not set | |
| # CONFIG_CRYPTO_RMD128 is not set | |
| # CONFIG_CRYPTO_RMD160 is not set | |
| # CONFIG_CRYPTO_RMD256 is not set | |
| # CONFIG_CRYPTO_RMD320 is not set | |
| -# CONFIG_CRYPTO_SHA1 is not set | |
| +CONFIG_CRYPTO_SHA1=y | |
| # CONFIG_CRYPTO_SHA256 is not set | |
| # CONFIG_CRYPTO_SHA512 is not set | |
| # CONFIG_CRYPTO_TGR192 is not set | |
| # CONFIG_CRYPTO_WP512 is not set | |
| # | |
| # Ciphers | |
| # | |
| CONFIG_CRYPTO_AES=y | |
| # CONFIG_CRYPTO_ANUBIS is not set | |
| # CONFIG_CRYPTO_ARC4 is not set | |
| # CONFIG_CRYPTO_BLOWFISH is not set | |
| # CONFIG_CRYPTO_CAMELLIA is not set | |
| # CONFIG_CRYPTO_CAST5 is not set | |
| # CONFIG_CRYPTO_CAST6 is not set | |
| -# CONFIG_CRYPTO_DES is not set | |
| +CONFIG_CRYPTO_DES=y | |
| # CONFIG_CRYPTO_FCRYPT is not set | |
| # CONFIG_CRYPTO_KHAZAD is not set | |
| # CONFIG_CRYPTO_SALSA20 is not set | |
| # CONFIG_CRYPTO_SEED is not set | |
| # CONFIG_CRYPTO_SERPENT is not set | |
| # CONFIG_CRYPTO_TEA is not set | |
| CONFIG_CRYPTO_TWOFISH=y | |
| CONFIG_CRYPTO_TWOFISH_COMMON=y | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/configs/qsd8650-comet-perf_defconfig kernel/arch/arm/configs/qsd8650-comet-perf_defconfig | |
| --- kernel-msm/arch/arm/configs/qsd8650-comet-perf_defconfig 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/configs/qsd8650-comet-perf_defconfig 2010-08-27 11:17:50.000000000 +0900 | |
| @@ -168,34 +168,30 @@ | |
| # CONFIG_ARCH_DAVINCI is not set | |
| # CONFIG_ARCH_OMAP is not set | |
| CONFIG_ARCH_MSM=y | |
| # CONFIG_ARCH_W90X900 is not set | |
| # CONFIG_ARCH_MSM7X01A is not set | |
| # CONFIG_ARCH_MSM7X27 is not set | |
| # CONFIG_ARCH_MSM7X30 is not set | |
| CONFIG_ARCH_QSD8X50=y | |
| -# CONFIG_ARCH_MSM7X25 is not set | |
| CONFIG_ARCH_MSM_SCORPION=y | |
| # | |
| # MSM Board Selection | |
| # | |
| CONFIG_MACH_QSD8X50_SURF=y | |
| CONFIG_MACH_QSD8X50_FFA=y | |
| CONFIG_MACH_QSD8X50_COMET=y | |
| CONFIG_MSM_STACKED_MEMORY=y | |
| -CONFIG_MSM_AMSS_VERSION=6225 | |
| -# CONFIG_MSM_AMSS_VERSION_6210 is not set | |
| -# CONFIG_MSM_AMSS_VERSION_6220 is not set | |
| -CONFIG_MSM_AMSS_VERSION_6225=y | |
| CONFIG_MSM_DEBUG_UART_NONE=y | |
| # CONFIG_MSM_DEBUG_UART1 is not set | |
| # CONFIG_MSM_DEBUG_UART2 is not set | |
| # CONFIG_MSM_DEBUG_UART3 is not set | |
| +CONFIG_CACHE_FLUSH_RANGE_LIMIT=0x40000 | |
| # CONFIG_MSM7X00A_USE_GP_TIMER is not set | |
| CONFIG_MSM7X00A_USE_DG_TIMER=y | |
| CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE_SUSPEND=y | |
| # CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_APPS_SLEEP is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set | |
| # CONFIG_MSM7X00A_SLEEP_WAIT_FOR_INTERRUPT is not set | |
| CONFIG_MSM7X00A_SLEEP_MODE=0 | |
| @@ -235,17 +231,17 @@ | |
| CONFIG_MSM_ONCRPCROUTER_DEBUG=y | |
| CONFIG_MSM_RPCSERVERS=y | |
| CONFIG_MSM_RPC_PING=y | |
| CONFIG_MSM_RPC_OEM_RAPI=y | |
| CONFIG_MSM_RPCSERVER_HANDSET=y | |
| CONFIG_MSM_DALRPC=y | |
| CONFIG_MSM_DALRPC_TEST=m | |
| # CONFIG_MSM_CPU_FREQ_SET_MIN_MAX is not set | |
| -CONFIG_MSM_CPU_AVS=y | |
| +CONFIG_MSM_CPU_AVS=n | |
| CONFIG_MSM_HW3D=y | |
| # CONFIG_MSM_ADSP is not set | |
| # CONFIG_MSM_VREG_SWITCH_INVERTED is not set | |
| CONFIG_MSM_DMA_TEST=m | |
| # CONFIG_WIFI_CONTROL_FUNC is not set | |
| CONFIG_QSD_AUDIO=y | |
| CONFIG_AUDIO_AAC_PLUS=y | |
| CONFIG_AUDIO_ENHANCED_AAC_PLUS=y | |
| @@ -319,16 +315,17 @@ | |
| CONFIG_FLATMEM=y | |
| CONFIG_FLAT_NODE_MEM_MAP=y | |
| CONFIG_PAGEFLAGS_EXTENDED=y | |
| CONFIG_SPLIT_PTLOCK_CPUS=4 | |
| # CONFIG_PHYS_ADDR_T_64BIT is not set | |
| CONFIG_ZONE_DMA_FLAG=0 | |
| CONFIG_VIRT_TO_BUS=y | |
| CONFIG_UNEVICTABLE_LRU=y | |
| +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | |
| CONFIG_ALIGNMENT_TRAP=y | |
| # | |
| # Boot options | |
| # | |
| CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| CONFIG_ZBOOT_ROM_BSS=0x0 | |
| CONFIG_CMDLINE="init=/sbin/init root=/dev/ram rw initrd=0x11000000,16M console=ttyDCC0 mem=88M" | |
| @@ -601,16 +598,17 @@ | |
| CONFIG_ANDROID_PMEM=y | |
| # CONFIG_ANDROID_PMEM_DEBUG is not set | |
| CONFIG_ANDROID_PMEM_KAPI_TEST=m | |
| # CONFIG_ICS932S401 is not set | |
| # CONFIG_ENCLOSURE_SERVICES is not set | |
| # CONFIG_KERNEL_DEBUGGER_CORE is not set | |
| # CONFIG_UID_STAT is not set | |
| # CONFIG_TSIF is not set | |
| +# CONFIG_WL127X_RFKILL is not set | |
| # CONFIG_C2PORT is not set | |
| # | |
| # EEPROM support | |
| # | |
| # CONFIG_EEPROM_AT24 is not set | |
| # CONFIG_EEPROM_AT25 is not set | |
| # CONFIG_EEPROM_LEGACY is not set | |
| @@ -1098,31 +1096,33 @@ | |
| # CONFIG_MMC_EMBEDDED_SDIO is not set | |
| # CONFIG_MMC_PARANOID_SD_INIT is not set | |
| # | |
| # MMC/SD/SDIO Card Drivers | |
| # | |
| CONFIG_MMC_BLOCK=y | |
| CONFIG_MMC_BLOCK_BOUNCE=y | |
| -CONFIG_MMC_BLOCK_PARANOID_RESUME=y | |
| +# CONFIG_MMC_BLOCK_DEFERRED_RESUME is not set | |
| # CONFIG_SDIO_UART is not set | |
| # CONFIG_MMC_TEST is not set | |
| # | |
| # MMC/SD/SDIO Host Controller Drivers | |
| # | |
| # CONFIG_MMC_SDHCI is not set | |
| # CONFIG_MMC_SPI is not set | |
| CONFIG_MMC_MSM=y | |
| # CONFIG_MMC_MSM7X00A_RESUME_IN_WQ is not set | |
| CONFIG_MMC_MSM_SDIO_SUPPORT=y | |
| # CONFIG_MMC_MSM_CARD_HW_DETECTION is not set | |
| CONFIG_MMC_MSM_SDC1_SUPPORT=y | |
| +# CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT is not set | |
| CONFIG_MMC_MSM_SDC2_SUPPORT=y | |
| +# CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT is not set | |
| # CONFIG_MMC_MSM_SDC3_SUPPORT is not set | |
| # CONFIG_MMC_MSM_SDC4_SUPPORT is not set | |
| # CONFIG_MEMSTICK is not set | |
| # CONFIG_ACCESSIBILITY is not set | |
| CONFIG_NEW_LEDS=y | |
| CONFIG_LEDS_CLASS=y | |
| # | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/configs/qsd8650-comet_defconfig kernel/arch/arm/configs/qsd8650-comet_defconfig | |
| --- kernel-msm/arch/arm/configs/qsd8650-comet_defconfig 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/configs/qsd8650-comet_defconfig 2010-08-27 11:17:53.000000000 +0900 | |
| @@ -168,34 +168,30 @@ | |
| # CONFIG_ARCH_DAVINCI is not set | |
| # CONFIG_ARCH_OMAP is not set | |
| CONFIG_ARCH_MSM=y | |
| # CONFIG_ARCH_W90X900 is not set | |
| # CONFIG_ARCH_MSM7X01A is not set | |
| # CONFIG_ARCH_MSM7X27 is not set | |
| # CONFIG_ARCH_MSM7X30 is not set | |
| CONFIG_ARCH_QSD8X50=y | |
| -# CONFIG_ARCH_MSM7X25 is not set | |
| CONFIG_ARCH_MSM_SCORPION=y | |
| # | |
| # MSM Board Selection | |
| # | |
| CONFIG_MACH_QSD8X50_SURF=y | |
| CONFIG_MACH_QSD8X50_FFA=y | |
| CONFIG_MACH_QSD8X50_COMET=y | |
| CONFIG_MSM_STACKED_MEMORY=y | |
| -CONFIG_MSM_AMSS_VERSION=6225 | |
| -# CONFIG_MSM_AMSS_VERSION_6210 is not set | |
| -# CONFIG_MSM_AMSS_VERSION_6220 is not set | |
| -CONFIG_MSM_AMSS_VERSION_6225=y | |
| CONFIG_MSM_DEBUG_UART_NONE=y | |
| # CONFIG_MSM_DEBUG_UART1 is not set | |
| # CONFIG_MSM_DEBUG_UART2 is not set | |
| # CONFIG_MSM_DEBUG_UART3 is not set | |
| +CONFIG_CACHE_FLUSH_RANGE_LIMIT=0x40000 | |
| # CONFIG_MSM7X00A_USE_GP_TIMER is not set | |
| CONFIG_MSM7X00A_USE_DG_TIMER=y | |
| CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE_SUSPEND=y | |
| # CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_APPS_SLEEP is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set | |
| # CONFIG_MSM7X00A_SLEEP_WAIT_FOR_INTERRUPT is not set | |
| CONFIG_MSM7X00A_SLEEP_MODE=0 | |
| @@ -235,17 +231,17 @@ | |
| CONFIG_MSM_ONCRPCROUTER_DEBUG=y | |
| CONFIG_MSM_RPCSERVERS=y | |
| CONFIG_MSM_RPC_PING=y | |
| CONFIG_MSM_RPC_OEM_RAPI=y | |
| CONFIG_MSM_RPCSERVER_HANDSET=y | |
| CONFIG_MSM_DALRPC=y | |
| CONFIG_MSM_DALRPC_TEST=m | |
| # CONFIG_MSM_CPU_FREQ_SET_MIN_MAX is not set | |
| -CONFIG_MSM_CPU_AVS=y | |
| +CONFIG_MSM_CPU_AVS=n | |
| CONFIG_MSM_HW3D=y | |
| # CONFIG_MSM_ADSP is not set | |
| # CONFIG_MSM_VREG_SWITCH_INVERTED is not set | |
| CONFIG_MSM_DMA_TEST=m | |
| # CONFIG_WIFI_CONTROL_FUNC is not set | |
| CONFIG_QSD_AUDIO=y | |
| CONFIG_AUDIO_AAC_PLUS=y | |
| CONFIG_AUDIO_ENHANCED_AAC_PLUS=y | |
| @@ -319,16 +315,17 @@ | |
| CONFIG_FLATMEM=y | |
| CONFIG_FLAT_NODE_MEM_MAP=y | |
| CONFIG_PAGEFLAGS_EXTENDED=y | |
| CONFIG_SPLIT_PTLOCK_CPUS=4 | |
| # CONFIG_PHYS_ADDR_T_64BIT is not set | |
| CONFIG_ZONE_DMA_FLAG=0 | |
| CONFIG_VIRT_TO_BUS=y | |
| CONFIG_UNEVICTABLE_LRU=y | |
| +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | |
| CONFIG_ALIGNMENT_TRAP=y | |
| # | |
| # Boot options | |
| # | |
| CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| CONFIG_ZBOOT_ROM_BSS=0x0 | |
| CONFIG_CMDLINE="init=/sbin/init root=/dev/ram rw initrd=0x11000000,16M console=ttyDCC0 mem=88M" | |
| @@ -601,16 +598,17 @@ | |
| CONFIG_ANDROID_PMEM=y | |
| # CONFIG_ANDROID_PMEM_DEBUG is not set | |
| CONFIG_ANDROID_PMEM_KAPI_TEST=m | |
| # CONFIG_ICS932S401 is not set | |
| # CONFIG_ENCLOSURE_SERVICES is not set | |
| # CONFIG_KERNEL_DEBUGGER_CORE is not set | |
| # CONFIG_UID_STAT is not set | |
| # CONFIG_TSIF is not set | |
| +# CONFIG_WL127X_RFKILL is not set | |
| # CONFIG_C2PORT is not set | |
| # | |
| # EEPROM support | |
| # | |
| # CONFIG_EEPROM_AT24 is not set | |
| # CONFIG_EEPROM_AT25 is not set | |
| # CONFIG_EEPROM_LEGACY is not set | |
| @@ -940,44 +938,17 @@ | |
| CONFIG_MEDIA_TUNER_TDA9887=y | |
| CONFIG_MEDIA_TUNER_TEA5761=y | |
| CONFIG_MEDIA_TUNER_TEA5767=y | |
| CONFIG_MEDIA_TUNER_MT20XX=y | |
| CONFIG_MEDIA_TUNER_XC2028=y | |
| CONFIG_MEDIA_TUNER_XC5000=y | |
| CONFIG_VIDEO_V4L2=y | |
| CONFIG_VIDEO_V4L1=y | |
| -CONFIG_VIDEO_CAPTURE_DRIVERS=y | |
| -# CONFIG_VIDEO_ADV_DEBUG is not set | |
| -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | |
| -CONFIG_VIDEO_HELPER_CHIPS_AUTO=y | |
| -# CONFIG_VIDEO_VIVI is not set | |
| -# CONFIG_VIDEO_CPIA is not set | |
| -# CONFIG_VIDEO_SAA5246A is not set | |
| -# CONFIG_VIDEO_SAA5249 is not set | |
| -# CONFIG_SOC_CAMERA is not set | |
| - | |
| -# | |
| -# Qualcomm MSM Camera And Video | |
| -# | |
| -CONFIG_MSM_CAMERA=y | |
| -# CONFIG_MSM_CAMERA_DEBUG is not set | |
| - | |
| -# | |
| -# Camera Sensor Selection | |
| -# | |
| -# CONFIG_MT9T013 is not set | |
| -# CONFIG_MT9D112 is not set | |
| -CONFIG_MT9P012=y | |
| -CONFIG_MSM_CAMERA_AF_FOXCONN=y | |
| -# CONFIG_MSM_CAMERA_AF_BAM is not set | |
| -# CONFIG_MSM_CAMERA_AF_KM is not set | |
| -# CONFIG_S5K3E2FX is not set | |
| -# CONFIG_VB6801 is not set | |
| -CONFIG_MSM_CAMERA_FLASH=y | |
| +# CONFIG_VIDEO_CAPTURE_DRIVERS is not set | |
| CONFIG_RADIO_ADAPTERS=y | |
| # CONFIG_RADIO_TEA5764 is not set | |
| CONFIG_DAB=y | |
| # | |
| # Graphics support | |
| # | |
| # CONFIG_DRM is not set | |
| @@ -1125,31 +1096,33 @@ | |
| # CONFIG_MMC_EMBEDDED_SDIO is not set | |
| # CONFIG_MMC_PARANOID_SD_INIT is not set | |
| # | |
| # MMC/SD/SDIO Card Drivers | |
| # | |
| CONFIG_MMC_BLOCK=y | |
| CONFIG_MMC_BLOCK_BOUNCE=y | |
| -CONFIG_MMC_BLOCK_PARANOID_RESUME=y | |
| +# CONFIG_MMC_BLOCK_DEFERRED_RESUME is not set | |
| # CONFIG_SDIO_UART is not set | |
| # CONFIG_MMC_TEST is not set | |
| # | |
| # MMC/SD/SDIO Host Controller Drivers | |
| # | |
| # CONFIG_MMC_SDHCI is not set | |
| # CONFIG_MMC_SPI is not set | |
| CONFIG_MMC_MSM=y | |
| # CONFIG_MMC_MSM7X00A_RESUME_IN_WQ is not set | |
| CONFIG_MMC_MSM_SDIO_SUPPORT=y | |
| # CONFIG_MMC_MSM_CARD_HW_DETECTION is not set | |
| CONFIG_MMC_MSM_SDC1_SUPPORT=y | |
| +# CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT is not set | |
| CONFIG_MMC_MSM_SDC2_SUPPORT=y | |
| +# CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT is not set | |
| # CONFIG_MMC_MSM_SDC3_SUPPORT is not set | |
| # CONFIG_MMC_MSM_SDC4_SUPPORT is not set | |
| # CONFIG_MEMSTICK is not set | |
| # CONFIG_ACCESSIBILITY is not set | |
| CONFIG_NEW_LEDS=y | |
| CONFIG_LEDS_CLASS=y | |
| # | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/configs/qsd8650-perf_defconfig kernel/arch/arm/configs/qsd8650-perf_defconfig | |
| --- kernel-msm/arch/arm/configs/qsd8650-perf_defconfig 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/configs/qsd8650-perf_defconfig 2010-08-27 11:17:50.000000000 +0900 | |
| @@ -1,11 +1,12 @@ | |
| # | |
| # Automatically generated make config: don't edit | |
| # Linux kernel version: 2.6.29 | |
| +# Fri Nov 6 19:50:03 2009 | |
| # | |
| CONFIG_ARM=y | |
| CONFIG_SYS_SUPPORTS_APM_EMULATION=y | |
| CONFIG_GENERIC_GPIO=y | |
| CONFIG_GENERIC_TIME=y | |
| CONFIG_GENERIC_CLOCKEVENTS=y | |
| CONFIG_MMU=y | |
| # CONFIG_NO_IOPORT is not set | |
| @@ -168,34 +169,31 @@ | |
| # CONFIG_ARCH_DAVINCI is not set | |
| # CONFIG_ARCH_OMAP is not set | |
| CONFIG_ARCH_MSM=y | |
| # CONFIG_ARCH_W90X900 is not set | |
| # CONFIG_ARCH_MSM7X01A is not set | |
| # CONFIG_ARCH_MSM7X27 is not set | |
| # CONFIG_ARCH_MSM7X30 is not set | |
| CONFIG_ARCH_QSD8X50=y | |
| -# CONFIG_ARCH_MSM7X25 is not set | |
| CONFIG_ARCH_MSM_SCORPION=y | |
| # | |
| # MSM Board Selection | |
| # | |
| CONFIG_MACH_QSD8X50_SURF=y | |
| CONFIG_MACH_QSD8X50_FFA=y | |
| CONFIG_MACH_QSD8X50_COMET=y | |
| +# CONFIG_MACH_DECKARD is not set | |
| CONFIG_MSM_STACKED_MEMORY=y | |
| -CONFIG_MSM_AMSS_VERSION=6225 | |
| -# CONFIG_MSM_AMSS_VERSION_6210 is not set | |
| -# CONFIG_MSM_AMSS_VERSION_6220 is not set | |
| -CONFIG_MSM_AMSS_VERSION_6225=y | |
| CONFIG_MSM_DEBUG_UART_NONE=y | |
| # CONFIG_MSM_DEBUG_UART1 is not set | |
| # CONFIG_MSM_DEBUG_UART2 is not set | |
| # CONFIG_MSM_DEBUG_UART3 is not set | |
| +CONFIG_CACHE_FLUSH_RANGE_LIMIT=0x40000 | |
| # CONFIG_MSM7X00A_USE_GP_TIMER is not set | |
| CONFIG_MSM7X00A_USE_DG_TIMER=y | |
| CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE_SUSPEND=y | |
| # CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_APPS_SLEEP is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set | |
| # CONFIG_MSM7X00A_SLEEP_WAIT_FOR_INTERRUPT is not set | |
| CONFIG_MSM7X00A_SLEEP_MODE=0 | |
| @@ -235,17 +233,17 @@ | |
| CONFIG_MSM_ONCRPCROUTER_DEBUG=y | |
| CONFIG_MSM_RPCSERVERS=y | |
| CONFIG_MSM_RPC_PING=y | |
| CONFIG_MSM_RPC_OEM_RAPI=y | |
| CONFIG_MSM_RPCSERVER_HANDSET=y | |
| CONFIG_MSM_DALRPC=y | |
| CONFIG_MSM_DALRPC_TEST=m | |
| # CONFIG_MSM_CPU_FREQ_SET_MIN_MAX is not set | |
| -CONFIG_MSM_CPU_AVS=y | |
| +CONFIG_MSM_CPU_AVS=n | |
| # CONFIG_MSM_HW3D is not set | |
| # CONFIG_MSM_ADSP is not set | |
| # CONFIG_MSM_VREG_SWITCH_INVERTED is not set | |
| CONFIG_MSM_DMA_TEST=m | |
| # CONFIG_WIFI_CONTROL_FUNC is not set | |
| CONFIG_QSD_AUDIO=y | |
| CONFIG_AUDIO_AAC_PLUS=y | |
| CONFIG_AUDIO_ENHANCED_AAC_PLUS=y | |
| @@ -319,16 +317,17 @@ | |
| CONFIG_FLATMEM=y | |
| CONFIG_FLAT_NODE_MEM_MAP=y | |
| CONFIG_PAGEFLAGS_EXTENDED=y | |
| CONFIG_SPLIT_PTLOCK_CPUS=4 | |
| # CONFIG_PHYS_ADDR_T_64BIT is not set | |
| CONFIG_ZONE_DMA_FLAG=0 | |
| CONFIG_VIRT_TO_BUS=y | |
| CONFIG_UNEVICTABLE_LRU=y | |
| +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 | |
| CONFIG_ALIGNMENT_TRAP=y | |
| # | |
| # Boot options | |
| # | |
| CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| CONFIG_ZBOOT_ROM_BSS=0x0 | |
| CONFIG_CMDLINE="init=/sbin/init root=/dev/ram rw initrd=0x11000000,16M console=ttyDCC0 mem=88M" | |
| @@ -610,16 +609,17 @@ | |
| CONFIG_ANDROID_PMEM=y | |
| # CONFIG_ANDROID_PMEM_DEBUG is not set | |
| CONFIG_ANDROID_PMEM_KAPI_TEST=m | |
| # CONFIG_ICS932S401 is not set | |
| # CONFIG_ENCLOSURE_SERVICES is not set | |
| # CONFIG_KERNEL_DEBUGGER_CORE is not set | |
| # CONFIG_UID_STAT is not set | |
| # CONFIG_TSIF is not set | |
| +# CONFIG_WL127X_RFKILL is not set | |
| # CONFIG_C2PORT is not set | |
| # | |
| # EEPROM support | |
| # | |
| # CONFIG_EEPROM_AT24 is not set | |
| # CONFIG_EEPROM_AT25 is not set | |
| # CONFIG_EEPROM_LEGACY is not set | |
| @@ -748,17 +748,25 @@ | |
| # CONFIG_INPUT_JOYDEV is not set | |
| CONFIG_INPUT_EVDEV=y | |
| CONFIG_INPUT_EVBUG=m | |
| # CONFIG_INPUT_KEYRESET is not set | |
| # | |
| # Input Device Drivers | |
| # | |
| -# CONFIG_INPUT_KEYBOARD is not set | |
| +CONFIG_INPUT_KEYBOARD=y | |
| +# CONFIG_KEYBOARD_ATKBD is not set | |
| +# CONFIG_KEYBOARD_SUNKBD is not set | |
| +# CONFIG_KEYBOARD_LKKBD is not set | |
| +# CONFIG_KEYBOARD_XTKBD is not set | |
| +# CONFIG_KEYBOARD_NEWTON is not set | |
| +# CONFIG_KEYBOARD_STOWAWAY is not set | |
| +# CONFIG_KEYBOARD_GPIO is not set | |
| +CONFIG_KEYBOARD_I2C_MSM=y | |
| # CONFIG_INPUT_MOUSE is not set | |
| # CONFIG_INPUT_JOYSTICK is not set | |
| # CONFIG_INPUT_TABLET is not set | |
| CONFIG_INPUT_TOUCHSCREEN=y | |
| # CONFIG_TOUCHSCREEN_ADS7846 is not set | |
| # CONFIG_TOUCHSCREEN_FUJITSU is not set | |
| # CONFIG_TOUCHSCREEN_GUNZE is not set | |
| # CONFIG_TOUCHSCREEN_ELAN_I2C_8232 is not set | |
| @@ -771,16 +779,17 @@ | |
| # CONFIG_TOUCHSCREEN_MSM is not set | |
| # CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI is not set | |
| # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | |
| # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | |
| # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | |
| # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | |
| # CONFIG_TOUCHSCREEN_TSC2007 is not set | |
| CONFIG_TOUCHSCREEN_MSM_LEGACY=y | |
| +CONFIG_TOUCHSCREEN_MSM_I2C=y | |
| CONFIG_ANDROID_TOUCHSCREEN_MSM_HACKS=y | |
| CONFIG_INPUT_MISC=y | |
| # CONFIG_INPUT_ATI_REMOTE is not set | |
| # CONFIG_INPUT_ATI_REMOTE2 is not set | |
| # CONFIG_INPUT_KEYSPAN_REMOTE is not set | |
| # CONFIG_INPUT_POWERMATE is not set | |
| # CONFIG_INPUT_YEALINK is not set | |
| # CONFIG_INPUT_CM109 is not set | |
| @@ -875,19 +884,21 @@ | |
| # | |
| # CONFIG_DS1682 is not set | |
| # CONFIG_SENSORS_PCF8574 is not set | |
| # CONFIG_PCF8575 is not set | |
| # CONFIG_SENSORS_PCA9539 is not set | |
| # CONFIG_SENSORS_PCF8591 is not set | |
| # CONFIG_SENSORS_MAX6875 is not set | |
| # CONFIG_SENSORS_TSL2550 is not set | |
| +CONFIG_SENSORS_AK8973=y | |
| # CONFIG_SENSORS_AKM8976 is not set | |
| # CONFIG_SENSORS_PCA963X is not set | |
| # CONFIG_SENSORS_MT9T013 is not set | |
| +CONFIG_BOSCH_SMB380=y | |
| # CONFIG_I2C_DEBUG_CORE is not set | |
| # CONFIG_I2C_DEBUG_ALGO is not set | |
| # CONFIG_I2C_DEBUG_BUS is not set | |
| # CONFIG_I2C_DEBUG_CHIP is not set | |
| CONFIG_SPI=y | |
| # CONFIG_SPI_DEBUG is not set | |
| CONFIG_SPI_MASTER=y | |
| @@ -987,17 +998,16 @@ | |
| # | |
| # Camera Sensor Selection | |
| # | |
| CONFIG_MT9T013=y | |
| CONFIG_MT9D112=y | |
| CONFIG_MT9P012=y | |
| CONFIG_MSM_CAMERA_AF_FOXCONN=y | |
| # CONFIG_MSM_CAMERA_AF_BAM is not set | |
| -# CONFIG_MSM_CAMERA_AF_KM is not set | |
| CONFIG_S5K3E2FX=y | |
| # CONFIG_VB6801 is not set | |
| CONFIG_MSM_CAMERA_FLASH=y | |
| # CONFIG_V4L_USB_DRIVERS is not set | |
| CONFIG_RADIO_ADAPTERS=y | |
| # CONFIG_USB_DSBR is not set | |
| # CONFIG_USB_SI470X is not set | |
| # CONFIG_USB_MR800 is not set | |
| @@ -1045,50 +1055,51 @@ | |
| CONFIG_FB_MSM_LOGO=y | |
| CONFIG_FB_MSM_LCDC_HW=y | |
| # CONFIG_FB_MSM_MDP22 is not set | |
| # CONFIG_FB_MSM_MDP30 is not set | |
| CONFIG_FB_MSM_MDP31=y | |
| # CONFIG_FB_MSM_MDP40 is not set | |
| # CONFIG_FB_MSM_EBI2 is not set | |
| CONFIG_FB_MSM_MDDI=y | |
| -CONFIG_FB_MSM_LCDC=y | |
| +# CONFIG_FB_MSM_LCDC is not set | |
| # CONFIG_FB_MSM_EXTMDDI is not set | |
| CONFIG_FB_MSM_TVOUT=y | |
| # CONFIG_FB_MSM_MDDI_TOSHIBA_COMMON is not set | |
| # CONFIG_FB_MSM_MDDI_TOSHIBA_COMMON_VGA is not set | |
| -CONFIG_FB_MSM_MDDI_AUTO_DETECT=y | |
| -CONFIG_FB_MSM_LCDC_PANEL=y | |
| -CONFIG_FB_MSM_LCDC_PRISM_WVGA=y | |
| -CONFIG_FB_MSM_LCDC_GORDON_VGA=y | |
| -CONFIG_FB_MSM_LCDC_TOSHIBA_WVGA_PT=y | |
| -CONFIG_FB_MSM_LCDC_WXGA=y | |
| +# CONFIG_FB_MSM_MDDI_AUTO_DETECT is not set | |
| +# CONFIG_FB_MSM_LCDC_PANEL is not set | |
| +# CONFIG_FB_MSM_LCDC_PRISM_WVGA is not set | |
| +# CONFIG_FB_MSM_LCDC_GORDON_VGA is not set | |
| +# CONFIG_FB_MSM_LCDC_TOSHIBA_WVGA_PT is not set | |
| +# CONFIG_FB_MSM_LCDC_WXGA is not set | |
| # CONFIG_FB_MSM_LCDC_PRISM_WVGA_PANEL is not set | |
| # CONFIG_FB_MSM_LCDC_GORDON_VGA_PANEL is not set | |
| # CONFIG_FB_MSM_LCDC_TOSHIBA_WVGA_PT_PANEL is not set | |
| -CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM=y | |
| +# CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM is not set | |
| # CONFIG_FB_MSM_MDDI_PANEL_AUTO_DETECT is not set | |
| # CONFIG_FB_MSM_MDDI_PRISM_WVGA is not set | |
| # CONFIG_FB_MSM_MDDI_TOSHIBA_WVGA_PORTRAIT is not set | |
| # CONFIG_FB_MSM_MDDI_TOSHIBA_VGA is not set | |
| # CONFIG_FB_MSM_MDDI_TOSHIBA_WVGA is not set | |
| -# CONFIG_FB_MSM_MDDI_SHARP_QVGA_128x128 is not set | |
| +CONFIG_FB_MSM_MDDI_SHARP_QVGA_128x128=y | |
| # CONFIG_FB_MSM_EBI2_TMD_QVGA_EPSON_QCIF is not set | |
| # CONFIG_FB_MSM_PANEL_NONE is not set | |
| # CONFIG_FB_MSM_LCDC_EXTERNAL_SVGA is not set | |
| CONFIG_FB_MSM_SECONDARY_PANEL_NONE=y | |
| CONFIG_FB_MSM_TVOUT_NTSC=y | |
| # CONFIG_FB_MSM_TVOUT_PAL is not set | |
| CONFIG_FB_MSM_TVOUT_NTSC_M=y | |
| # CONFIG_FB_MSM_TVOUT_NTSC_J is not set | |
| # CONFIG_FB_MSM_TVOUT_PAL_BDGHIN is not set | |
| # CONFIG_FB_MSM_TVOUT_PAL_M is not set | |
| # CONFIG_FB_MSM_TVOUT_PAL_N is not set | |
| # CONFIG_FB_MSM_TVOUT_NONE is not set | |
| # CONFIG_FB_MSM_TVOUT_SVIDEO is not set | |
| +CONFIG_SHLCDC_BOARD=y | |
| CONFIG_BACKLIGHT_LCD_SUPPORT=y | |
| CONFIG_LCD_CLASS_DEVICE=y | |
| # CONFIG_LCD_LTV350QV is not set | |
| # CONFIG_LCD_ILI9320 is not set | |
| # CONFIG_LCD_TDO24M is not set | |
| # CONFIG_LCD_VGG2432A4 is not set | |
| # CONFIG_LCD_PLATFORM is not set | |
| CONFIG_BACKLIGHT_CLASS_DEVICE=y | |
| @@ -1310,32 +1321,35 @@ | |
| # CONFIG_MMC_EMBEDDED_SDIO is not set | |
| # CONFIG_MMC_PARANOID_SD_INIT is not set | |
| # | |
| # MMC/SD/SDIO Card Drivers | |
| # | |
| CONFIG_MMC_BLOCK=y | |
| CONFIG_MMC_BLOCK_BOUNCE=y | |
| -CONFIG_MMC_BLOCK_PARANOID_RESUME=y | |
| +# CONFIG_MMC_BLOCK_DEFERRED_RESUME is not set | |
| # CONFIG_SDIO_UART is not set | |
| # CONFIG_MMC_TEST is not set | |
| # | |
| # MMC/SD/SDIO Host Controller Drivers | |
| # | |
| # CONFIG_MMC_SDHCI is not set | |
| # CONFIG_MMC_SPI is not set | |
| CONFIG_MMC_MSM=y | |
| # CONFIG_MMC_MSM7X00A_RESUME_IN_WQ is not set | |
| CONFIG_MMC_MSM_SDIO_SUPPORT=y | |
| # CONFIG_MMC_MSM_CARD_HW_DETECTION is not set | |
| CONFIG_MMC_MSM_SDC1_SUPPORT=y | |
| +# CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT is not set | |
| CONFIG_MMC_MSM_SDC2_SUPPORT=y | |
| -# CONFIG_MMC_MSM_SDC3_SUPPORT is not set | |
| +# CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT is not set | |
| +CONFIG_MMC_MSM_SDC3_SUPPORT=y | |
| +CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT=y | |
| # CONFIG_MMC_MSM_SDC4_SUPPORT is not set | |
| # CONFIG_MEMSTICK is not set | |
| # CONFIG_ACCESSIBILITY is not set | |
| CONFIG_NEW_LEDS=y | |
| CONFIG_LEDS_CLASS=y | |
| # | |
| # LED drivers | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/configs/qsd8650_defconfig kernel/arch/arm/configs/qsd8650_defconfig | |
| --- kernel-msm/arch/arm/configs/qsd8650_defconfig 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/configs/qsd8650_defconfig 2010-08-27 11:17:50.000000000 +0900 | |
| @@ -168,34 +168,30 @@ | |
| # CONFIG_ARCH_DAVINCI is not set | |
| # CONFIG_ARCH_OMAP is not set | |
| CONFIG_ARCH_MSM=y | |
| # CONFIG_ARCH_W90X900 is not set | |
| # CONFIG_ARCH_MSM7X01A is not set | |
| # CONFIG_ARCH_MSM7X27 is not set | |
| # CONFIG_ARCH_MSM7X30 is not set | |
| CONFIG_ARCH_QSD8X50=y | |
| -# CONFIG_ARCH_MSM7X25 is not set | |
| CONFIG_ARCH_MSM_SCORPION=y | |
| # | |
| # MSM Board Selection | |
| # | |
| CONFIG_MACH_QSD8X50_SURF=y | |
| CONFIG_MACH_QSD8X50_FFA=y | |
| CONFIG_MACH_QSD8X50_COMET=y | |
| CONFIG_MSM_STACKED_MEMORY=y | |
| -CONFIG_MSM_AMSS_VERSION=6225 | |
| -# CONFIG_MSM_AMSS_VERSION_6210 is not set | |
| -# CONFIG_MSM_AMSS_VERSION_6220 is not set | |
| -CONFIG_MSM_AMSS_VERSION_6225=y | |
| CONFIG_MSM_DEBUG_UART_NONE=y | |
| # CONFIG_MSM_DEBUG_UART1 is not set | |
| # CONFIG_MSM_DEBUG_UART2 is not set | |
| # CONFIG_MSM_DEBUG_UART3 is not set | |
| +CONFIG_CACHE_FLUSH_RANGE_LIMIT=0x40000 | |
| # CONFIG_MSM7X00A_USE_GP_TIMER is not set | |
| CONFIG_MSM7X00A_USE_DG_TIMER=y | |
| CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE_SUSPEND=y | |
| # CONFIG_MSM7X00A_SLEEP_MODE_POWER_COLLAPSE is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_APPS_SLEEP is not set | |
| # CONFIG_MSM7X00A_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT is not set | |
| # CONFIG_MSM7X00A_SLEEP_WAIT_FOR_INTERRUPT is not set | |
| CONFIG_MSM7X00A_SLEEP_MODE=0 | |
| @@ -235,26 +231,26 @@ | |
| CONFIG_MSM_ONCRPCROUTER_DEBUG=y | |
| CONFIG_MSM_RPCSERVERS=y | |
| CONFIG_MSM_RPC_PING=y | |
| CONFIG_MSM_RPC_OEM_RAPI=y | |
| CONFIG_MSM_RPCSERVER_HANDSET=y | |
| CONFIG_MSM_DALRPC=y | |
| CONFIG_MSM_DALRPC_TEST=m | |
| # CONFIG_MSM_CPU_FREQ_SET_MIN_MAX is not set | |
| -CONFIG_MSM_CPU_AVS=y | |
| +CONFIG_MSM_CPU_AVS=n | |
| # CONFIG_MSM_HW3D is not set | |
| # CONFIG_MSM_ADSP is not set | |
| # CONFIG_MSM_VREG_SWITCH_INVERTED is not set | |
| CONFIG_MSM_DMA_TEST=m | |
| # CONFIG_WIFI_CONTROL_FUNC is not set | |
| CONFIG_QSD_AUDIO=y | |
| CONFIG_AUDIO_AAC_PLUS=y | |
| CONFIG_AUDIO_ENHANCED_AAC_PLUS=y | |
| -CONFIG_SURF_FFA_GPIO_KEYPAD=y | |
| +# CONFIG_SURF_FFA_GPIO_KEYPAD=y | |
| # CONFIG_CLOCK_BASED_SLEEP_LIMIT is not set | |
| # CONFIG_MSM_ADM_OFF_AT_POWER_COLLAPSE is not set | |
| CONFIG_MSM_SLEEP_TIME_OVERRIDE=y | |
| CONFIG_MSM_PM_TIMEOUT_HALT=y | |
| # CONFIG_MSM_PM_TIMEOUT_RESET_MODEM is not set | |
| # CONFIG_MSM_PM_TIMEOUT_RESET_CHIP is not set | |
| # | |
| @@ -319,16 +315,17 @@ | |
| CONFIG_FLATMEM=y | |
| CONFIG_FLAT_NODE_MEM_MAP=y | |
| CONFIG_PAGEFLAGS_EXTENDED=y | |
| CONFIG_SPLIT_PTLOCK_CPUS=4 | |
| # CONFIG_PHYS_ADDR_T_64BIT is not set | |
| CONFIG_ZONE_DMA_FLAG=0 | |
| CONFIG_VIRT_TO_BUS=y | |
| CONFIG_UNEVICTABLE_LRU=y | |
| +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | |
| CONFIG_ALIGNMENT_TRAP=y | |
| # | |
| # Boot options | |
| # | |
| CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| CONFIG_ZBOOT_ROM_BSS=0x0 | |
| CONFIG_CMDLINE="init=/sbin/init root=/dev/ram rw initrd=0x11000000,16M console=ttyDCC0 mem=88M" | |
| @@ -610,16 +607,17 @@ | |
| CONFIG_ANDROID_PMEM=y | |
| CONFIG_ANDROID_PMEM_DEBUG=y | |
| CONFIG_ANDROID_PMEM_KAPI_TEST=m | |
| # CONFIG_ICS932S401 is not set | |
| # CONFIG_ENCLOSURE_SERVICES is not set | |
| # CONFIG_KERNEL_DEBUGGER_CORE is not set | |
| # CONFIG_UID_STAT is not set | |
| # CONFIG_TSIF is not set | |
| +# CONFIG_WL127X_RFKILL is not set | |
| # CONFIG_C2PORT is not set | |
| # | |
| # EEPROM support | |
| # | |
| # CONFIG_EEPROM_AT24 is not set | |
| # CONFIG_EEPROM_AT25 is not set | |
| # CONFIG_EEPROM_LEGACY is not set | |
| @@ -748,17 +746,17 @@ | |
| # CONFIG_INPUT_JOYDEV is not set | |
| CONFIG_INPUT_EVDEV=y | |
| CONFIG_INPUT_EVBUG=m | |
| # CONFIG_INPUT_KEYRESET is not set | |
| # | |
| # Input Device Drivers | |
| # | |
| -# CONFIG_INPUT_KEYBOARD is not set | |
| +CONFIG_INPUT_KEYBOARD=y | |
| # CONFIG_INPUT_MOUSE is not set | |
| # CONFIG_INPUT_JOYSTICK is not set | |
| # CONFIG_INPUT_TABLET is not set | |
| CONFIG_INPUT_TOUCHSCREEN=y | |
| # CONFIG_TOUCHSCREEN_ADS7846 is not set | |
| # CONFIG_TOUCHSCREEN_FUJITSU is not set | |
| # CONFIG_TOUCHSCREEN_GUNZE is not set | |
| # CONFIG_TOUCHSCREEN_ELAN_I2C_8232 is not set | |
| @@ -780,17 +778,17 @@ | |
| CONFIG_INPUT_MISC=y | |
| # CONFIG_INPUT_ATI_REMOTE is not set | |
| # CONFIG_INPUT_ATI_REMOTE2 is not set | |
| # CONFIG_INPUT_KEYSPAN_REMOTE is not set | |
| # CONFIG_INPUT_POWERMATE is not set | |
| # CONFIG_INPUT_YEALINK is not set | |
| # CONFIG_INPUT_CM109 is not set | |
| CONFIG_INPUT_UINPUT=y | |
| -CONFIG_INPUT_GPIO=y | |
| +# CONFIG_INPUT_GPIO=y | |
| CONFIG_INPUT_KEYCHORD=y | |
| CONFIG_BMA150=m | |
| # | |
| # Hardware I/O ports | |
| # | |
| # CONFIG_SERIO is not set | |
| # CONFIG_GAMEPORT is not set | |
| @@ -976,31 +974,30 @@ | |
| # CONFIG_VIDEO_CPIA2 is not set | |
| # CONFIG_VIDEO_SAA5246A is not set | |
| # CONFIG_VIDEO_SAA5249 is not set | |
| # CONFIG_SOC_CAMERA is not set | |
| # | |
| # Qualcomm MSM Camera And Video | |
| # | |
| -CONFIG_MSM_CAMERA=y | |
| +##CONFIG_MSM_CAMERA=y | |
| # CONFIG_MSM_CAMERA_DEBUG is not set | |
| # | |
| # Camera Sensor Selection | |
| # | |
| CONFIG_MT9T013=y | |
| CONFIG_MT9D112=y | |
| CONFIG_MT9P012=y | |
| -CONFIG_MSM_CAMERA_AF_FOXCONN=y | |
| +##CONFIG_MSM_CAMERA_AF_FOXCONN=y | |
| # CONFIG_MSM_CAMERA_AF_BAM is not set | |
| -# CONFIG_MSM_CAMERA_AF_KM is not set | |
| CONFIG_S5K3E2FX=y | |
| # CONFIG_VB6801 is not set | |
| -CONFIG_MSM_CAMERA_FLASH=y | |
| +##CONFIG_MSM_CAMERA_FLASH=y | |
| # CONFIG_V4L_USB_DRIVERS is not set | |
| CONFIG_RADIO_ADAPTERS=y | |
| # CONFIG_USB_DSBR is not set | |
| # CONFIG_USB_SI470X is not set | |
| # CONFIG_USB_MR800 is not set | |
| # CONFIG_RADIO_TEA5764 is not set | |
| CONFIG_DAB=y | |
| # CONFIG_USB_DABUSB is not set | |
| @@ -1045,37 +1042,37 @@ | |
| CONFIG_FB_MSM_LOGO=y | |
| CONFIG_FB_MSM_LCDC_HW=y | |
| # CONFIG_FB_MSM_MDP22 is not set | |
| # CONFIG_FB_MSM_MDP30 is not set | |
| CONFIG_FB_MSM_MDP31=y | |
| # CONFIG_FB_MSM_MDP40 is not set | |
| # CONFIG_FB_MSM_EBI2 is not set | |
| CONFIG_FB_MSM_MDDI=y | |
| -CONFIG_FB_MSM_LCDC=y | |
| +##CONFIG_FB_MSM_LCDC=y | |
| # CONFIG_FB_MSM_EXTMDDI is not set | |
| -CONFIG_FB_MSM_TVOUT=y | |
| +##CONFIG_FB_MSM_TVOUT=y | |
| # CONFIG_FB_MSM_MDDI_TOSHIBA_COMMON is not set | |
| # CONFIG_FB_MSM_MDDI_TOSHIBA_COMMON_VGA is not set | |
| -CONFIG_FB_MSM_MDDI_AUTO_DETECT=y | |
| +##CONFIG_FB_MSM_MDDI_AUTO_DETECT=y | |
| CONFIG_FB_MSM_LCDC_PANEL=y | |
| -CONFIG_FB_MSM_LCDC_PRISM_WVGA=y | |
| -CONFIG_FB_MSM_LCDC_GORDON_VGA=y | |
| -CONFIG_FB_MSM_LCDC_TOSHIBA_WVGA_PT=y | |
| +##CONFIG_FB_MSM_LCDC_PRISM_WVGA=y | |
| +##CONFIG_FB_MSM_LCDC_GORDON_VGA=y | |
| +##CONFIG_FB_MSM_LCDC_TOSHIBA_WVGA_PT=y | |
| CONFIG_FB_MSM_LCDC_WXGA=y | |
| # CONFIG_FB_MSM_LCDC_PRISM_WVGA_PANEL is not set | |
| # CONFIG_FB_MSM_LCDC_GORDON_VGA_PANEL is not set | |
| # CONFIG_FB_MSM_LCDC_TOSHIBA_WVGA_PT_PANEL is not set | |
| -CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM=y | |
| +##CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM=y | |
| # CONFIG_FB_MSM_MDDI_PANEL_AUTO_DETECT is not set | |
| # CONFIG_FB_MSM_MDDI_PRISM_WVGA is not set | |
| # CONFIG_FB_MSM_MDDI_TOSHIBA_WVGA_PORTRAIT is not set | |
| # CONFIG_FB_MSM_MDDI_TOSHIBA_VGA is not set | |
| # CONFIG_FB_MSM_MDDI_TOSHIBA_WVGA is not set | |
| -# CONFIG_FB_MSM_MDDI_SHARP_QVGA_128x128 is not set | |
| +CONFIG_FB_MSM_MDDI_SHARP_QVGA_128x128=y | |
| # CONFIG_FB_MSM_EBI2_TMD_QVGA_EPSON_QCIF is not set | |
| # CONFIG_FB_MSM_PANEL_NONE is not set | |
| # CONFIG_FB_MSM_LCDC_EXTERNAL_SVGA is not set | |
| CONFIG_FB_MSM_SECONDARY_PANEL_NONE=y | |
| CONFIG_FB_MSM_TVOUT_NTSC=y | |
| # CONFIG_FB_MSM_TVOUT_PAL is not set | |
| CONFIG_FB_MSM_TVOUT_NTSC_M=y | |
| # CONFIG_FB_MSM_TVOUT_NTSC_J is not set | |
| @@ -1089,16 +1086,18 @@ | |
| # CONFIG_LCD_LTV350QV is not set | |
| # CONFIG_LCD_ILI9320 is not set | |
| # CONFIG_LCD_TDO24M is not set | |
| # CONFIG_LCD_VGG2432A4 is not set | |
| # CONFIG_LCD_PLATFORM is not set | |
| CONFIG_BACKLIGHT_CLASS_DEVICE=y | |
| # CONFIG_BACKLIGHT_GENERIC is not set | |
| +CONFIG_SHLCDC_BOARD=y | |
| + | |
| # | |
| # Display device support | |
| # | |
| # CONFIG_DISPLAY_SUPPORT is not set | |
| # | |
| # Console display driver support | |
| # | |
| @@ -1310,32 +1309,35 @@ | |
| # CONFIG_MMC_EMBEDDED_SDIO is not set | |
| # CONFIG_MMC_PARANOID_SD_INIT is not set | |
| # | |
| # MMC/SD/SDIO Card Drivers | |
| # | |
| CONFIG_MMC_BLOCK=y | |
| CONFIG_MMC_BLOCK_BOUNCE=y | |
| -CONFIG_MMC_BLOCK_PARANOID_RESUME=y | |
| +# CONFIG_MMC_BLOCK_DEFERRED_RESUME is not set | |
| # CONFIG_SDIO_UART is not set | |
| # CONFIG_MMC_TEST is not set | |
| # | |
| # MMC/SD/SDIO Host Controller Drivers | |
| # | |
| # CONFIG_MMC_SDHCI is not set | |
| # CONFIG_MMC_SPI is not set | |
| CONFIG_MMC_MSM=y | |
| # CONFIG_MMC_MSM7X00A_RESUME_IN_WQ is not set | |
| CONFIG_MMC_MSM_SDIO_SUPPORT=y | |
| # CONFIG_MMC_MSM_CARD_HW_DETECTION is not set | |
| CONFIG_MMC_MSM_SDC1_SUPPORT=y | |
| +# CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT is not set | |
| CONFIG_MMC_MSM_SDC2_SUPPORT=y | |
| -# CONFIG_MMC_MSM_SDC3_SUPPORT is not set | |
| +# CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT is not set | |
| +CONFIG_MMC_MSM_SDC3_SUPPORT=y | |
| +CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT=y | |
| # CONFIG_MMC_MSM_SDC4_SUPPORT is not set | |
| # CONFIG_MEMSTICK is not set | |
| # CONFIG_ACCESSIBILITY is not set | |
| CONFIG_NEW_LEDS=y | |
| CONFIG_LEDS_CLASS=y | |
| # | |
| # LED drivers | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/include/asm/cacheflush.h kernel/arch/arm/include/asm/cacheflush.h | |
| --- kernel-msm/arch/arm/include/asm/cacheflush.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/include/asm/cacheflush.h 2010-08-27 11:17:54.000000000 +0900 | |
| @@ -408,16 +408,24 @@ | |
| struct page *page, unsigned long vmaddr) | |
| { | |
| extern void __flush_anon_page(struct vm_area_struct *vma, | |
| struct page *, unsigned long); | |
| if (PageAnon(page)) | |
| __flush_anon_page(vma, page, vmaddr); | |
| } | |
| +#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE | |
| +static inline void flush_kernel_dcache_page(struct page *page) | |
| +{ | |
| + /* highmem pages are always flushed upon kunmap already */ | |
| + if ((cache_is_vivt() || cache_is_vipt_aliasing()) && !PageHighMem(page)) | |
| + __cpuc_flush_dcache_page(page_address(page)); | |
| +} | |
| + | |
| #define flush_dcache_mmap_lock(mapping) \ | |
| spin_lock_irq(&(mapping)->tree_lock) | |
| #define flush_dcache_mmap_unlock(mapping) \ | |
| spin_unlock_irq(&(mapping)->tree_lock) | |
| #define flush_icache_user_range(vma,page,addr,len) \ | |
| flush_dcache_page(page) | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/include/asm/elf.h kernel/arch/arm/include/asm/elf.h | |
| --- kernel-msm/arch/arm/include/asm/elf.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/include/asm/elf.h 2010-08-27 11:17:54.000000000 +0900 | |
| @@ -40,21 +40,25 @@ | |
| #define EF_ARM_APCS_FLOAT 0x00000010 /* ABI 0, floats in fp regs */ | |
| #define EF_ARM_DYNSYMSUSESEGIDX 0x00000008 /* ABI 2 */ | |
| #define EF_ARM_APCS_26 0x00000008 /* ABI 0 */ | |
| #define EF_ARM_SYMSARESORTED 0x00000004 /* ABI 1,2 */ | |
| #define EF_ARM_INTERWORK 0x00000004 /* ABI 0 */ | |
| #define EF_ARM_HASENTRY 0x00000002 /* All */ | |
| #define EF_ARM_RELEXEC 0x00000001 /* All */ | |
| -#define R_ARM_NONE 0 | |
| -#define R_ARM_PC24 1 | |
| -#define R_ARM_ABS32 2 | |
| -#define R_ARM_CALL 28 | |
| -#define R_ARM_JUMP24 29 | |
| +#define R_ARM_NONE 0 | |
| +#define R_ARM_PC24 1 | |
| +#define R_ARM_ABS32 2 | |
| +#define R_ARM_CALL 28 | |
| +#define R_ARM_JUMP24 29 | |
| +#define R_ARM_V4BX 40 | |
| +#define R_ARM_PREL31 42 | |
| +#define R_ARM_MOVW_ABS_NC 43 | |
| +#define R_ARM_MOVT_ABS 44 | |
| /* | |
| * These are used to set parameters in the core dumps. | |
| */ | |
| #define ELF_CLASS ELFCLASS32 | |
| #ifdef __ARMEB__ | |
| #define ELF_DATA ELFDATA2MSB | |
| #else | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/include/asm/hardware/cache-l2x0.h kernel/arch/arm/include/asm/hardware/cache-l2x0.h | |
| --- kernel-msm/arch/arm/include/asm/hardware/cache-l2x0.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/include/asm/hardware/cache-l2x0.h 2010-08-27 11:17:54.000000000 +0900 | |
| @@ -46,14 +46,14 @@ | |
| #define L2X0_LOCKDOWN_WAY_I 0x904 | |
| #define L2X0_TEST_OPERATION 0xF00 | |
| #define L2X0_LINE_DATA 0xF10 | |
| #define L2X0_LINE_TAG 0xF30 | |
| #define L2X0_DEBUG_CTRL 0xF40 | |
| #ifndef __ASSEMBLY__ | |
| extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); | |
| -#endif | |
| - | |
| extern void l2x0_suspend(void); | |
| extern void l2x0_resume(int collapsed); | |
| +extern void l2x0_cache_sync(void); | |
| +#endif | |
| #endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/include/asm/mach/mmc.h kernel/arch/arm/include/asm/mach/mmc.h | |
| --- kernel-msm/arch/arm/include/asm/mach/mmc.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/include/asm/mach/mmc.h 2010-08-27 11:17:54.000000000 +0900 | |
| @@ -14,15 +14,17 @@ | |
| struct sdio_embedded_func *funcs; | |
| int num_funcs; | |
| }; | |
| struct mmc_platform_data { | |
| unsigned int ocr_mask; /* available voltages */ | |
| u32 (*translate_vdd)(struct device *, unsigned int); | |
| unsigned int (*status)(struct device *); | |
| - unsigned int status_irq; | |
| struct embedded_sdio_data *embedded_sdio; | |
| + unsigned int sdiowakeup_irq; | |
| int (*register_status_notify)(void (*callback)(int card_present, void *dev_id), void *dev_id); | |
| unsigned long irq_flags; | |
| + unsigned long mmc_bus_width; | |
| + int (*wpswitch) (struct device *); | |
| }; | |
| #endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/kernel/.gitignore kernel/arch/arm/kernel/.gitignore | |
| --- kernel-msm/arch/arm/kernel/.gitignore 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/kernel/.gitignore 1970-01-01 09:00:00.000000000 +0900 | |
| @@ -1 +0,0 @@ | |
| -vmlinux.lds | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/kernel/entry-armv.S kernel/arch/arm/kernel/entry-armv.S | |
| --- kernel-msm/arch/arm/kernel/entry-armv.S 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/kernel/entry-armv.S 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -701,17 +701,19 @@ | |
| #ifdef CONFIG_CPU_32v6K | |
| clrex | |
| #else | |
| strex r5, r4, [ip] @ Clear exclusive monitor | |
| #endif | |
| #endif | |
| #if defined(CONFIG_HAS_TLS_REG) | |
| mcr p15, 0, r3, c13, c0, 3 @ set TLS register | |
| -#elif !defined(CONFIG_TLS_REG_EMUL) | |
| +#endif | |
| +#if (!defined(CONFIG_HAS_TLS_REG) && !defined(CONFIG_TLS_REG_EMUL)) || \ | |
| + defined(CONFIG_ARCH_MSM_SCORPION) | |
| mov r4, #0xffff0fff | |
| str r3, [r4, #-15] @ TLS val at 0xffff0ff0 | |
| #endif | |
| #ifdef CONFIG_MMU | |
| #ifdef CONFIG_EMULATE_DOMAIN_MANAGER_V7 | |
| stmdb r13!, {r0-r3, lr} | |
| mov r0, r6 | |
| bl emulate_domain_manager_set | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/kernel/module.c kernel/arch/arm/kernel/module.c | |
| --- kernel-msm/arch/arm/kernel/module.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/kernel/module.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -127,16 +127,31 @@ | |
| } | |
| offset >>= 2; | |
| *(u32 *)loc &= 0xff000000; | |
| *(u32 *)loc |= offset & 0x00ffffff; | |
| break; | |
| + case R_ARM_MOVW_ABS_NC: | |
| + case R_ARM_MOVT_ABS: | |
| + offset = *(u32 *)loc; | |
| + offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff); | |
| + offset = (offset ^ 0x8000) - 0x8000; | |
| + | |
| + offset += sym->st_value; | |
| + if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_ABS) | |
| + offset >>= 16; | |
| + | |
| + *(u32 *)loc &= 0xfff0f000; | |
| + *(u32 *)loc |= ((offset & 0xf000) << 4) | | |
| + (offset & 0x0fff); | |
| + break; | |
| + | |
| default: | |
| printk(KERN_ERR "%s: unknown relocation: %u\n", | |
| module->name, ELF32_R_TYPE(rel->r_info)); | |
| return -ENOEXEC; | |
| } | |
| } | |
| return 0; | |
| } | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/kernel/traps.c kernel/arch/arm/kernel/traps.c | |
| --- kernel-msm/arch/arm/kernel/traps.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/kernel/traps.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -509,17 +509,20 @@ | |
| break; | |
| regs->ARM_cpsr |= MODE32_BIT; | |
| return regs->ARM_r0; | |
| case NR(set_tls): | |
| thread->tp_value = regs->ARM_r0; | |
| #if defined(CONFIG_HAS_TLS_REG) | |
| asm ("mcr p15, 0, %0, c13, c0, 3" : : "r" (regs->ARM_r0) ); | |
| -#elif !defined(CONFIG_TLS_REG_EMUL) | |
| +#endif | |
| + | |
| +#if (!defined(CONFIG_HAS_TLS_REG) && !defined(CONFIG_TLS_REG_EMUL)) || \ | |
| + defined(CONFIG_ARCH_MSM_SCORPION) | |
| /* | |
| * User space must never try to access this directly. | |
| * Expect your app to break eventually if you do so. | |
| * The user helper at 0xffff0fe0 must be used instead. | |
| * (see entry-armv.S for details) | |
| */ | |
| *((unsigned int *)0xffff0ff0) = regs->ARM_r0; | |
| #endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/Kconfig kernel/arch/arm/mach-msm/Kconfig | |
| --- kernel-msm/arch/arm/mach-msm/Kconfig 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/Kconfig 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -64,17 +64,25 @@ | |
| bool "MSM7201A FFA" | |
| help | |
| Support for the Qualcomm MSM7201A FFA eval board. | |
| config MACH_TROUT | |
| depends on ARCH_MSM7X01A | |
| depends on MSM_STACKED_MEMORY | |
| default y | |
| - bool "Trout" | |
| + bool "Trout (HTC Dream, T-Mobile G1, Google ADP1)" | |
| + help | |
| + Select this to support HTC Dream, T-Mobile G1, Google ADP1. | |
| + | |
| +config MACH_SAPPHIRE | |
| + depends on ARCH_MSM7X01A | |
| + depends on MSM_STACKED_MEMORY | |
| + default y | |
| + bool "Sapphire" | |
| config MACH_MSM7X27_SURF | |
| depends on ARCH_MSM7X27 | |
| depends on !MSM_STACKED_MEMORY | |
| default y | |
| bool "MSM7x27 SURF" | |
| help | |
| Support for the Qualcomm MSM7x27 SURF eval board. | |
| @@ -127,16 +135,24 @@ | |
| config MACH_QSD8X50_COMET | |
| depends on ARCH_QSD8X50 | |
| depends on MSM_STACKED_MEMORY | |
| default n | |
| bool "QSD8x50 Comet" | |
| help | |
| Support for the Qualcomm Comet eval board. | |
| +config MACH_DECKARD | |
| + depends on ARCH_QSD8X50 | |
| + depends on MSM_STACKED_MEMORY | |
| + default n | |
| + bool "SHARP DECKARD" | |
| + help | |
| + Support for the Sharp Deckard. | |
| + | |
| config MACH_MSM7X25_SURF | |
| depends on ARCH_MSM7X25 | |
| depends on !MSM_STACKED_MEMORY | |
| default y | |
| bool "MSM7x25 SURF" | |
| help | |
| Support for the Qualcomm MSM7x25 SURF eval board. | |
| @@ -153,37 +169,16 @@ | |
| config MSM_STACKED_MEMORY | |
| bool "Stacked Memory" | |
| default y | |
| help | |
| This option is used to indicate the presence of on-die stacked | |
| memory. When present this memory bank is used for a high speed | |
| shared memory interface. When not present regular RAM is used. | |
| -config MSM_AMSS_VERSION | |
| - int | |
| - default 6210 if MSM_AMSS_VERSION_6210 | |
| - default 6220 if MSM_AMSS_VERSION_6220 | |
| - default 6225 if MSM_AMSS_VERSION_6225 | |
| - | |
| -choice | |
| - prompt "AMSS modem firmware version" | |
| - | |
| - default MSM_AMSS_VERSION_6225 | |
| - | |
| - config MSM_AMSS_VERSION_6210 | |
| - bool "6.2.10" | |
| - | |
| - config MSM_AMSS_VERSION_6220 | |
| - bool "6.2.20" | |
| - | |
| - config MSM_AMSS_VERSION_6225 | |
| - bool "6.2.20 + New ADSP" | |
| -endchoice | |
| - | |
| config MSM_DEBUG_UART | |
| int | |
| default 1 if MSM_DEBUG_UART1 | |
| default 2 if MSM_DEBUG_UART2 | |
| default 3 if MSM_DEBUG_UART3 | |
| choice | |
| prompt "Debug UART" | |
| @@ -198,16 +193,24 @@ | |
| config MSM_DEBUG_UART2 | |
| bool "UART2" | |
| config MSM_DEBUG_UART3 | |
| bool "UART3" | |
| endchoice | |
| +config CACHE_FLUSH_RANGE_LIMIT | |
| + hex "Cache flush range limit" | |
| + default 0x40000 | |
| + help | |
| + When flushing a cache range larger then this (hex) limit, flush the | |
| + entire cache instead. Flushing a large range can be slower than | |
| + flushing, then refilling, the entire cache. | |
| + | |
| choice | |
| prompt "Default Timer" | |
| default MSM7X00A_USE_GP_TIMER | |
| config MSM7X00A_USE_GP_TIMER | |
| bool "GP Timer" | |
| help | |
| Low resolution timer that allows power collapse from idle. | |
| @@ -589,26 +592,16 @@ | |
| config MSM_CPU_FREQ_MIN | |
| int "Min CPU Frequency" | |
| depends on MSM_CPU_FREQ_SET_MIN_MAX | |
| default 245760 | |
| endif # CPU_FREQ_MSM | |
| -config MSM_CPU_AVS | |
| - bool "Enable Adaptive Voltage Scaling (AVS)" | |
| - depends on (ARCH_MSM_SCORPION && QSD_SVS) | |
| - depends on ARCH_QSD8X50 | |
| - default y | |
| - help | |
| - This enables the Adaptive Voltage Scaling feature of | |
| - Qualcomm ARMv7 CPUs. It adjusts the voltage for each frequency | |
| - based on feedback from three ring oscillators in the CPU. | |
| - | |
| config MSM_HW3D | |
| tristate "MSM Hardware 3D Register Driver" | |
| depends on ANDROID_PMEM | |
| default y | |
| help | |
| Provides access to registers needed by the userspace OpenGL|ES | |
| library. | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/Makefile kernel/arch/arm/mach-msm/Makefile | |
| --- kernel-msm/arch/arm/mach-msm/Makefile 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/Makefile 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -8,20 +8,26 @@ | |
| obj-y += nand_partitions.o | |
| obj-y += remote_spinlock.o modem_notifier.o | |
| obj-y += rpc_hsusb.o rpc_pmapp.o rpc_fsusb.o | |
| obj-y += socinfo.o | |
| obj-y += cpufreq.o | |
| obj-y += nohlt.o | |
| obj-y += pmic.o | |
| obj-y += internal_power_rail.o | |
| +obj-y += sh_sys_manager.o | |
| +obj-y += sh_smem.o | |
| +obj-y += smd_shdiag.o | |
| +obj-y += smd_support.o | |
| +obj-y += shtimer.o | |
| +#obj-y += rf24g_frontend.o | |
| +#obj-y += bluecore7.o | |
| obj-$(CONFIG_ARCH_MSM_ARM11) += acpuclock.o | |
| obj-$(CONFIG_ARCH_MSM_SCORPION) += acpuclock-8x50.o | |
| -obj-$(CONFIG_MSM_CPU_AVS) += avs.o avs_hw.o | |
| obj-$(CONFIG_CPU_V6) += idle-v6.o | |
| obj-$(CONFIG_CPU_V7) += idle-v7.o | |
| obj-$(CONFIG_MSM_JTAG_V7) += jtag-v7.o | |
| obj-$(CONFIG_ARCH_QSD8X50) += sirc.o | |
| obj-$(CONFIG_MSM_FIQ_SUPPORT) += fiq_glue.o | |
| obj-$(CONFIG_MACH_TROUT) += board-trout-rfkill.o | |
| obj-$(CONFIG_MSM_SMD) += smd.o | |
| @@ -31,16 +37,17 @@ | |
| obj-$(CONFIG_MSM_SMD_CTL) += smd_ctl2.o | |
| obj-$(CONFIG_MSM_SMD_NMEA) += smd_nmea.o | |
| obj-$(CONFIG_DEBUG_FS) += pmic_debugfs.o | |
| obj-$(CONFIG_MSM_RESET_MODEM) += reset_modem.o | |
| obj-$(CONFIG_MSM_ONCRPCROUTER) += smd_rpcrouter.o | |
| obj-$(CONFIG_MSM_ONCRPCROUTER) += smd_rpcrouter_device.o | |
| obj-$(CONFIG_MSM_ONCRPCROUTER) += smd_rpcrouter_servers.o | |
| obj-$(CONFIG_MSM_ONCRPCROUTER) += smd_rpcrouter_clients.o | |
| +obj-$(CONFIG_MSM_ONCRPCROUTER) += smd_rpcrouter_xdr.o | |
| obj-$(CONFIG_MSM_RPC_PING) += ping_mdm_rpc_client.o | |
| obj-$(CONFIG_MSM_RPC_OEM_RAPI) += oem_rapi_client.o | |
| obj-$(CONFIG_MSM_RPCSERVERS) += rpc_server_dog_keepalive.o | |
| obj-$(CONFIG_MSM_RPCSERVERS) += rpc_server_time_remote.o | |
| obj-$(CONFIG_MSM_DALRPC) += dal.o | |
| obj-$(CONFIG_MSM_DALRPC_TEST) += dal_remotetest.o | |
| obj-$(CONFIG_MSM_ADSP) += qdsp5/ | |
| obj-$(CONFIG_MSM7KV2_AUDIO) += qdsp5v2/ | |
| @@ -49,34 +56,43 @@ | |
| ifdef CONFIG_MSM_N_WAY_SMSM | |
| obj-$(CONFIG_PM) += pm2.o | |
| else | |
| obj-$(CONFIG_PM) += pm.o | |
| endif | |
| obj-$(CONFIG_MSM_DMA_TEST) += dma_test.o | |
| obj-$(CONFIG_SURF_FFA_GPIO_KEYPAD) += keypad-surf-ffa.o | |
| -obj-$(CONFIG_ARCH_MSM7X01A) += board-halibut.o | |
| +obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o board-halibut-panel.o | |
| +obj-$(CONFIG_MACH_HALIBUT) += board-halibut-keypad.o fish_battery.o | |
| obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o | |
| obj-$(CONFIG_MACH_TROUT) += board-trout-keypad.o board-trout-panel.o | |
| obj-$(CONFIG_MACH_TROUT) += htc_akm_cal.o htc_wifi_nvs.o htc_acoustic.o | |
| obj-$(CONFIG_MACH_TROUT) += board-trout-mmc.o board-trout-wifi.o | |
| +obj-$(CONFIG_MACH_TROUT) += devices_htc.o | |
| obj-$(CONFIG_MACH_QSD8X50_SURF) += board-qsd8x50.o | |
| obj-$(CONFIG_MACH_QSD8X50_FFA) += board-qsd8x50.o | |
| obj-$(CONFIG_MACH_QSD8X50_COMET) += board-comet.o | |
| +obj-$(CONFIG_MACH_DECKARD) += board-deckard.o | |
| obj-$(CONFIG_TROUT_H2W) += board-trout-h2w.o | |
| obj-$(CONFIG_TROUT_BATTCHG) += htc_battery.o | |
| obj-$(CONFIG_TROUT_PWRSINK) += htc_pwrsink.o | |
| obj-$(CONFIG_ARCH_MSM7X27) += board-msm7x27.o | |
| obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o clock-7x30.o | |
| -obj-$(CONFIG_ARCH_MSM7X25) += board-msm7x27.o | |
| obj-$(CONFIG_QSD_AUDIO) += qdsp6/ | |
| obj-$(CONFIG_MACH_SAPPHIRE) += board-sapphire.o board-sapphire-gpio.o | |
| obj-$(CONFIG_MACH_SAPPHIRE) += board-sapphire-keypad.o board-sapphire-panel.o | |
| obj-$(CONFIG_MACH_SAPPHIRE) += board-sapphire-mmc.o board-sapphire-wifi.o | |
| obj-$(CONFIG_MACH_SAPPHIRE) += board-sapphire-rfkill.o msm_vibrator.o | |
| +obj-$(CONFIG_MACH_SAPPHIRE) += devices_htc.o | |
| +obj-y += msm_vibrator.o | |
| obj-$(CONFIG_TROUT_BATTCHG) += htc_battery.o | |
| obj-$(CONFIG_HTC_PWRSINK) += htc_pwrsink.o | |
| obj-$(CONFIG_HTC_HEADSET) += htc_headset.o | |
| + | |
| +obj-y += sh_battery.o | |
| +obj-y += shterm.o shterm_kobject.o | |
| +obj-y += sh_sleepcheck.o | |
| +obj-y += shproc_kobject.o | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/SHPROC_COPYING kernel/arch/arm/mach-msm/SHPROC_COPYING | |
| --- kernel-msm/arch/arm/mach-msm/SHPROC_COPYING 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/SHPROC_COPYING 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -0,0 +1,15 @@ | |
| +/* | |
| + * | |
| + * Copyright (C) 2009 Sharp. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + */ | |
| + | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/acpuclock-8x50.c kernel/arch/arm/mach-msm/acpuclock-8x50.c | |
| --- kernel-msm/arch/arm/mach-msm/acpuclock-8x50.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/acpuclock-8x50.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -93,46 +93,66 @@ | |
| unsigned int ahbclk_div; | |
| unsigned int axiclk_khz; | |
| unsigned int sc_core_src_sel_mask; | |
| unsigned int sc_l_value; | |
| int vdd; | |
| unsigned long lpj; /* loops_per_jiffy */ | |
| }; | |
| -struct clkctl_acpu_speed acpu_freq_tbl[] = { | |
| +struct clkctl_acpu_speed acpu_freq_tbl_998[] = { | |
| { 0, 19200, ACPU_PLL_TCXO, 0, 0, 0, 0, 14000, 0, 0, 1000}, | |
| { 0, 48000, ACPU_PLL_1, 1, 0xF, 0, 0, 14000, 0, 0, 1000}, | |
| { 0, 64000, ACPU_PLL_1, 1, 0xB, 0, 0, 14000, 0, 0, 1000}, | |
| { 0, 96000, ACPU_PLL_1, 1, 7, 0, 0, 14000, 0, 0, 1000}, | |
| { 0, 128000, ACPU_PLL_1, 1, 5, 0, 0, 14000, 2, 0, 1000}, | |
| { 0, 192000, ACPU_PLL_1, 1, 3, 0, 0, 14000, 0, 0, 1000}, | |
| /* 235.93 on CDMA only. */ | |
| { 1, 245000, ACPU_PLL_0, 4, 0, 0, 0, 29000, 0, 0, 1000}, | |
| { 0, 256000, ACPU_PLL_1, 1, 2, 0, 0, 29000, 0, 0, 1000}, | |
| - { 1, 384000, ACPU_PLL_3, 0, 0, 0, 0, 58000, 1, 0xA, 1000}, | |
| + { 1, 384000, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xA, 1000}, | |
| { 0, 422400, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xB, 1000}, | |
| { 0, 460800, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xC, 1000}, | |
| - { 0, 499200, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xD, 1025}, | |
| + { 0, 499200, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xD, 1050}, | |
| { 0, 537600, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xE, 1050}, | |
| { 1, 576000, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xF, 1050}, | |
| { 0, 614400, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0x10, 1075}, | |
| { 0, 652800, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0x11, 1100}, | |
| { 0, 691200, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0x12, 1125}, | |
| { 0, 729600, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0x13, 1150}, | |
| { 1, 768000, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x14, 1150}, | |
| { 0, 806400, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x15, 1175}, | |
| - { 0, 844800, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x16, 1200}, | |
| - { 0, 883200, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x17, 1225}, | |
| - { 0, 921600, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x18, 1250}, | |
| - { 0, 960000, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x19, 1250}, | |
| - { 1, 998400, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x1A, 1250}, | |
| + { 0, 844800, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x16, 1225}, | |
| + { 0, 883200, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x17, 1250}, | |
| + { 0, 921600, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x18, 1300}, | |
| + { 0, 960000, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x19, 1300}, | |
| + { 1, 998400, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x1A, 1300}, | |
| { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, | |
| }; | |
| +struct clkctl_acpu_speed acpu_freq_tbl_768[] = { | |
| + { 0, 19200, ACPU_PLL_TCXO, 0, 0, 0, 0, 14000, 0, 0, 1000}, | |
| + /* Use AXI source. Row number in acpuclk_init() must match this. */ | |
| + { 0, 128000, ACPU_PLL_1, 1, 5, 0, 0, 14000, 2, 0, 1000}, | |
| + { 1, 245760, ACPU_PLL_0, 4, 0, 0, 0, 29000, 0, 0, 1000}, | |
| + { 1, 384000, ACPU_PLL_3, 0, 0, 0, 0, 58000, 1, 0xA, 1075}, | |
| + { 0, 422400, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xB, 1100}, | |
| + { 0, 460800, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xC, 1125}, | |
| + { 0, 499200, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xD, 1150}, | |
| + { 0, 537600, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xE, 1150}, | |
| + { 1, 576000, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xF, 1150}, | |
| + { 0, 614400, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0x10, 1175}, | |
| + { 0, 652800, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0x11, 1200}, | |
| + { 0, 691200, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0x12, 1225}, | |
| + { 0, 729600, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0x13, 1250}, | |
| + { 1, 768000, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x14, 1250}, | |
| + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, | |
| +}; | |
| +static struct clkctl_acpu_speed *acpu_freq_tbl = acpu_freq_tbl_998; | |
| + | |
| #ifdef CONFIG_CPU_FREQ_MSM | |
| static struct cpufreq_frequency_table freq_table[20]; | |
| static void __init cpufreq_table_init(void) | |
| { | |
| unsigned int i; | |
| unsigned int freq_cnt = 0; | |
| @@ -617,16 +637,17 @@ | |
| /* Check if the register is supported and meaningful. */ | |
| if ((tcsr_spare2 & 0xF000) != 0xA000) { | |
| pr_info("Efuse data on Max ACPU freq not present.\n"); | |
| goto skip_efuse_fixup; | |
| } | |
| switch (tcsr_spare2 & 0xF0) { | |
| case 0x70: | |
| + acpu_freq_tbl = acpu_freq_tbl_768; | |
| max_acpu_khz = 768000; | |
| break; | |
| case 0x30: | |
| case 0x00: | |
| max_acpu_khz = 998400; | |
| break; | |
| case 0x10: | |
| max_acpu_khz = 1267200; | |
| @@ -711,8 +732,9 @@ | |
| #ifdef CONFIG_MSM_CPU_AVS | |
| if (!acpu_avs_init(drv_state.acpu_set_vdd, | |
| drv_state.current_speed->a11clk_khz)) { | |
| /* avs init successful. avs will handle voltage changes */ | |
| drv_state.acpu_set_vdd = NULL; | |
| } | |
| #endif | |
| } | |
| + | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/acpuclock.c kernel/arch/arm/mach-msm/acpuclock.c | |
| --- kernel-msm/arch/arm/mach-msm/acpuclock.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/acpuclock.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -620,16 +620,21 @@ | |
| div = (readl(A11S_CLK_CNTL_ADDR) >> 8) & 0x0f; | |
| } else { | |
| /* CLK_SRC1_SEL */ | |
| sel = (readl(A11S_CLK_CNTL_ADDR) >> 4) & 0x07; | |
| /* CLK_SRC1_DIV */ | |
| div = readl(A11S_CLK_CNTL_ADDR) & 0x0f; | |
| } | |
| + /* Accomodate bootloaders that might not be implementing the | |
| + * workaround for the h/w bug in 7x25. */ | |
| + if (cpu_is_msm7x25() && sel == 2) | |
| + sel = 3; | |
| + | |
| for (speed = acpu_freq_tbl; speed->a11clk_khz != 0; speed++) { | |
| if (speed->a11clk_src_sel == sel | |
| && (speed->a11clk_src_div == div)) | |
| break; | |
| } | |
| if (speed->a11clk_khz == 0) { | |
| printk(KERN_WARNING "Warning - ACPU clock reports invalid speed\n"); | |
| return; | |
| @@ -881,20 +886,20 @@ | |
| drv_state.acpu_switch_time_us = clkdata->acpu_switch_time_us; | |
| drv_state.max_speed_delta_khz = clkdata->max_speed_delta_khz; | |
| drv_state.vdd_switch_time_us = clkdata->vdd_switch_time_us; | |
| drv_state.power_collapse_khz = clkdata->power_collapse_khz; | |
| drv_state.wait_for_irq_khz = clkdata->wait_for_irq_khz; | |
| drv_state.max_axi_khz = clkdata->max_axi_khz; | |
| acpu_freq_tbl_fixup(); | |
| precompute_stepping(); | |
| + if (cpu_is_msm7x25()) | |
| + msm7x25_acpu_pll_hw_bug_fix(); | |
| acpuclk_init(); | |
| lpj_init(); | |
| print_acpu_freq_tbl(); | |
| - if (cpu_is_msm7x25()) | |
| - msm7x25_acpu_pll_hw_bug_fix(); | |
| if (cpu_is_msm7x27()) | |
| shared_pll_control_init(); | |
| #ifdef CONFIG_CPU_FREQ_MSM | |
| cpufreq_table_init(); | |
| cpufreq_frequency_table_get_attr(freq_table, smp_processor_id()); | |
| #endif | |
| } | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-comet.c kernel/arch/arm/mach-msm/board-comet.c | |
| --- kernel-msm/arch/arm/mach-msm/board-comet.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-comet.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1333,29 +1333,31 @@ | |
| } | |
| set_bit(pdev->id, &vreg_sts); | |
| return 0; | |
| } | |
| static struct mmc_platform_data comet_sdcc_data = { | |
| .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, | |
| .translate_vdd = msm_sdcc_setup_power, | |
| + .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
| }; | |
| + | |
| static void __init comet_init_mmc(void) | |
| { | |
| vreg_mmc = vreg_get(NULL, "gp6"); | |
| if (IS_ERR(vreg_mmc)) { | |
| printk(KERN_ERR "%s: vreg get failed (%ld)\n", | |
| __func__, PTR_ERR(vreg_mmc)); | |
| return; | |
| } | |
| sdcc_gpio_init(); | |
| - msm_add_sdcc(1, &comet_sdcc_data); | |
| - msm_add_sdcc(3, &comet_sdcc_data); | |
| + msm_add_sdcc(1, &comet_sdcc_data, 0, 0); | |
| + msm_add_sdcc(3, &comet_sdcc_data, 0, 0); | |
| } | |
| static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR] = { | |
| [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].supported = 1, | |
| [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].suspend_enabled = 1, | |
| [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].idle_enabled = 1, | |
| [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].latency = 8594, | |
| [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].residency = 23740, | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-deckard.c kernel/arch/arm/mach-msm/board-deckard.c | |
| --- kernel-msm/arch/arm/mach-msm/board-deckard.c 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-deckard.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -0,0 +1,2685 @@ | |
| +/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. | |
| + * | |
| + * Redistribution and use in source and binary forms, with or without | |
| + * modification, are permitted provided that the following conditions are met: | |
| + * * Redistributions of source code must retain the above copyright | |
| + * notice, this list of conditions and the following disclaimer. | |
| + * * Redistributions in binary form must reproduce the above copyright | |
| + * notice, this list of conditions and the following disclaimer in the | |
| + * documentation and/or other materials provided with the distribution. | |
| + * * Neither the name of Code Aurora Forum nor | |
| + * the names of its contributors may be used to endorse or promote | |
| + * products derived from this software without specific prior written | |
| + * permission. | |
| + * | |
| + * Alternatively, provided that this notice is retained in full, this software | |
| + * may be relicensed by the recipient under the terms of the GNU General Public | |
| + * License version 2 ("GPL") and only version 2, in which case the provisions of | |
| + * the GPL apply INSTEAD OF those given above. If the recipient relicenses the | |
| + * software under the GPL, then the identification text in the MODULE_LICENSE | |
| + * macro must be changed to reflect "GPLv2" instead of "Dual BSD/GPL". Once a | |
| + * recipient changes the license terms to the GPL, subsequent recipients shall | |
| + * not relicense under alternate licensing terms, including the BSD or dual | |
| + * BSD/GPL terms. In addition, the following license statement immediately | |
| + * below and between the words START and END shall also then apply when this | |
| + * software is relicensed under the GPL: | |
| + * | |
| + * START | |
| + * | |
| + * This program is free software; you can redistribute it and/or modify it under | |
| + * the terms of the GNU General Public License version 2 and only version 2 as | |
| + * published by the Free Software Foundation. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, but WITHOUT | |
| + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS | |
| + * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more | |
| + * details. | |
| + * | |
| + * You should have received a copy of the GNU General Public License along with | |
| + * this program; if not, write to the Free Software Foundation, Inc., | |
| + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | |
| + * | |
| + * END | |
| + * | |
| + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE | |
| + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
| + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
| + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | |
| + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | |
| + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
| + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
| + * POSSIBILITY OF SUCH DAMAGE. | |
| + * | |
| + */ | |
| + | |
| +#include <linux/kernel.h> | |
| +#include <linux/irq.h> | |
| +#include <linux/gpio.h> | |
| +#include <linux/platform_device.h> | |
| +#include <linux/android_pmem.h> | |
| +#include <linux/bootmem.h> | |
| +#include <linux/usb/mass_storage_function.h> | |
| +#include <linux/i2c.h> | |
| +#include <linux/spi/spi.h> | |
| +#include <linux/delay.h> | |
| +#include <linux/mfd/tps65023.h> | |
| +#include <linux/bma150.h> | |
| +#include <linux/power_supply.h> | |
| + | |
| +#include <asm/mach-types.h> | |
| +#include <asm/mach/arch.h> | |
| +#include <asm/io.h> | |
| +#include <asm/setup.h> | |
| + | |
| +#include <asm/mach/mmc.h> | |
| +#include <mach/vreg.h> | |
| +#include <mach/mpp.h> | |
| +#include <mach/gpio.h> | |
| +#include <mach/board.h> | |
| +#include <mach/sirc.h> | |
| +#include <mach/rpc_hsusb.h> | |
| +#include <mach/msm_hsusb.h> | |
| +#include <mach/msm_hsusb_desc.h> | |
| +#include <mach/msm_hsusb_hw.h> | |
| +#include <mach/msm_serial_hs.h> | |
| +#include <mach/msm_touchpad.h> | |
| +#include <mach/msm_i2ckbd.h> | |
| +#if 1 | |
| +#include <mach/msm_i2ctps.h> | |
| +#endif | |
| +#include <mach/pmic.h> | |
| +#include <mach/camera.h> | |
| +#include <mach/memory.h> | |
| +#include <mach/msm_spi.h> | |
| +#include <mach/s1r72v05.h> | |
| +#include <mach/msm_tsif.h> | |
| +#include <mach/msm_battery.h> | |
| +#if 1 | |
| +#include <linux/i2c/smb380.h> | |
| +#include <linux/i2c/akm8973.h> | |
| +#endif | |
| + | |
| +#include "devices.h" | |
| +#include "timer.h" | |
| +#include "socinfo.h" | |
| +#include "msm-keypad-devices.h" | |
| +#include "pm.h" | |
| +#include "smd_private.h" | |
| +#include "proc_comm.h" | |
| +#include <linux/msm_kgsl.h> | |
| +#if 0 | |
| +#include "bluecore7.h" | |
| +#endif | |
| +#include "msm_hsusb_map.h" | |
| + | |
| +#include <sharp/shterm_k.h> | |
| + | |
| + | |
| +#define TOUCHPAD_SUSPEND 34 | |
| +#define TOUCHPAD_IRQ 38 | |
| + | |
| +#define MSM_PMEM_MDP_SIZE 0x2075000 | |
| + | |
| +#define SMEM_SPINLOCK_I2C 6 | |
| + | |
| +#define MSM_PMEM_ADSP_SIZE 0x1C00000 | |
| +#define MSM_PMEM_GPU1_SIZE 0x800000 | |
| +#define MSM_FB_SIZE 0x1C2000 | |
| +#define MSM_AUDIO_SIZE 0x80000 | |
| +#define MSM_GPU_PHYS_SIZE SZ_2M | |
| + | |
| +#define MSM_SMI_BASE 0x2b00000 | |
| +#define MSM_SMI_SIZE 0x1500000 | |
| + | |
| +#define MSM_FB_BASE MSM_SMI_BASE | |
| +#define MSM_GPU_PHYS_BASE (MSM_FB_BASE + MSM_FB_SIZE) | |
| +#define MSM_PMEM_GPU0_BASE (MSM_GPU_PHYS_BASE + MSM_GPU_PHYS_SIZE) | |
| +#define MSM_PMEM_GPU0_SIZE (MSM_SMI_SIZE - MSM_FB_SIZE - MSM_GPU_PHYS_SIZE) | |
| + | |
| +#define PMEM_KERNEL_EBI1_SIZE 0 | |
| + | |
| +#define PMIC_VREG_WLAN_LEVEL 2600 | |
| +#define PMIC_VREG_GP6_LEVEL 2900 | |
| + | |
| +static struct resource smc91x_resources[] = { | |
| + [0] = { | |
| + .flags = IORESOURCE_MEM, | |
| + }, | |
| + [1] = { | |
| + .flags = IORESOURCE_IRQ, | |
| + }, | |
| +}; | |
| + | |
| +static struct usb_mass_storage_platform_data usb_mass_storage_pdata = { | |
| + .nluns = 0x02, | |
| + .buf_size = 16384, | |
| + .vendor = "GOOGLE", | |
| + .product = "Mass storage", | |
| + .release = 0xffff, | |
| +}; | |
| + | |
| +static struct platform_device mass_storage_device = { | |
| + .name = "usb_mass_storage", | |
| + .id = -1, | |
| + .dev = { | |
| + .platform_data = &usb_mass_storage_pdata, | |
| + }, | |
| +}; | |
| + | |
| +static struct platform_device smc91x_device = { | |
| + .name = "smc91x", | |
| + .id = 0, | |
| + .num_resources = ARRAY_SIZE(smc91x_resources), | |
| + .resource = smc91x_resources, | |
| +}; | |
| + | |
| +#define S1R72V05_CS_GPIO 152 | |
| +#define S1R72V05_IRQ_GPIO 148 | |
| + | |
| +#if 1 | |
| +extern void msm_init_pmic_vibrator( void ); | |
| +#endif | |
| + | |
| +static int qsd8x50_init_s1r72v05(void) | |
| +{ | |
| + int rc; | |
| + u8 cs_gpio = S1R72V05_CS_GPIO; | |
| + u8 irq_gpio = S1R72V05_IRQ_GPIO; | |
| + | |
| + rc = gpio_request(cs_gpio, "ide_s1r72v05_cs"); | |
| + if (rc) { | |
| + pr_err("Failed to request GPIO pin %d (rc=%d)\n", | |
| + cs_gpio, rc); | |
| + goto err; | |
| + } | |
| + | |
| + rc = gpio_request(irq_gpio, "ide_s1r72v05_irq"); | |
| + if (rc) { | |
| + pr_err("Failed to request GPIO pin %d (rc=%d)\n", | |
| + irq_gpio, rc); | |
| + goto err; | |
| + } | |
| + if (gpio_tlmm_config(GPIO_CFG(cs_gpio, | |
| + 2, GPIO_OUTPUT, GPIO_NO_PULL, | |
| + GPIO_2MA), | |
| + GPIO_ENABLE)) { | |
| + printk(KERN_ALERT | |
| + "s1r72v05: Could not configure CS gpio\n"); | |
| + goto err; | |
| + } | |
| + | |
| + if (gpio_tlmm_config(GPIO_CFG(irq_gpio, | |
| + 0, GPIO_INPUT, GPIO_NO_PULL, | |
| + GPIO_2MA), | |
| + GPIO_ENABLE)) { | |
| + printk(KERN_ALERT | |
| + "s1r72v05: Could not configure IRQ gpio\n"); | |
| + goto err; | |
| + } | |
| + | |
| + if (gpio_configure(irq_gpio, IRQF_TRIGGER_FALLING)) { | |
| + printk(KERN_ALERT | |
| + "s1r72v05: Could not set IRQ polarity\n"); | |
| + goto err; | |
| + } | |
| + return 0; | |
| + | |
| +err: | |
| + gpio_free(cs_gpio); | |
| + gpio_free(irq_gpio); | |
| + return -ENODEV; | |
| +} | |
| + | |
| +static struct resource s1r72v05_resources[] = { | |
| + [0] = { | |
| + .start = 0x88000000, | |
| + .end = 0x88000000 + 0xFF, | |
| + .flags = IORESOURCE_MEM, | |
| + }, | |
| + [1] = { | |
| + .start = MSM_GPIO_TO_INT(S1R72V05_IRQ_GPIO), | |
| + .end = S1R72V05_IRQ_GPIO, | |
| + .flags = IORESOURCE_IRQ, | |
| + }, | |
| +}; | |
| + | |
| +static struct s1r72v05_platform_data s1r72v05_data = { | |
| + .gpio_setup = qsd8x50_init_s1r72v05, | |
| +}; | |
| + | |
| +static struct platform_device s1r72v05_device = { | |
| + .name = "s1r72v05", | |
| + .id = 0, | |
| + .num_resources = ARRAY_SIZE(s1r72v05_resources), | |
| + .resource = s1r72v05_resources, | |
| + .dev = { | |
| + .platform_data = &s1r72v05_data, | |
| + }, | |
| +}; | |
| + | |
| +static struct platform_device hs_device = { | |
| + .name = "msm-handset", | |
| + .id = -1, | |
| + .dev = { | |
| + .platform_data = "8k_handset", | |
| + }, | |
| +}; | |
| + | |
| + | |
| +static struct platform_device sh_pm_device = { | |
| + .name = "SH_pm_key", | |
| + .id = -1, | |
| + .dev = { | |
| + .platform_data = "SH_pm_key", | |
| + }, | |
| +}; | |
| +static struct platform_device sh_hs_device = { | |
| + .name = "SH_headset_key", | |
| + .id = -1, | |
| + .dev = { | |
| + .platform_data = "SH_headset_key", | |
| + }, | |
| +}; | |
| + | |
| + | |
| +#ifdef CONFIG_USB_FS_HOST | |
| +static int fsusb_gpio_init(void) | |
| +{ | |
| + int rc; | |
| + /* FSUSB GPIOs */ | |
| + | |
| +#if 0 | |
| + rc = gpio_request(139, "fs_dat"); | |
| + if (rc) { | |
| + pr_err("gpio_request failed on pin %d (rc=%d)\n", | |
| + 139, rc); | |
| + return rc; | |
| + } | |
| +#endif | |
| + | |
| + rc = gpio_request(140, "fs_se0"); | |
| + if (rc) { | |
| + pr_err("gpio_request failed on pin %d (rc=%d)\n", | |
| + 140, rc); | |
| + return rc; | |
| + } | |
| + rc = gpio_request(141, "fs_oe_n"); | |
| + if (rc) { | |
| + pr_err("gpio_request failed on pin %d (rc=%d)\n", | |
| + 141, rc); | |
| + return rc; | |
| + } | |
| + return 0; | |
| +} | |
| + | |
| +static unsigned fsusb_config[] = { | |
| + GPIO_CFG(139, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + GPIO_CFG(140, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + GPIO_CFG(141, 3, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), | |
| +}; | |
| + | |
| +static void msm_fsusb_setup_gpio(unsigned int enable) | |
| +{ | |
| + int rc, i; | |
| + | |
| + for (i = 0; i < ARRAY_SIZE(fsusb_config); i++) { | |
| + rc = gpio_tlmm_config(fsusb_config[i], | |
| + enable ? GPIO_ENABLE : GPIO_DISABLE); | |
| + if (rc) | |
| + pr_err("configure/unconfigure fsusb gpios failed \n"); | |
| + } | |
| +} | |
| +#endif | |
| + | |
| +#define MSM_USB_BASE ((unsigned)addr) | |
| +static unsigned ulpi_read(void __iomem *addr, unsigned reg) | |
| +{ | |
| + unsigned timeout = 100000; | |
| + | |
| + /* initiate read operation */ | |
| + writel(ULPI_RUN | ULPI_READ | ULPI_ADDR(reg), | |
| + USB_ULPI_VIEWPORT); | |
| + | |
| + /* wait for completion */ | |
| + while ((readl(USB_ULPI_VIEWPORT) & ULPI_RUN) && (--timeout)) | |
| + cpu_relax(); | |
| + | |
| + if (timeout == 0) { | |
| + printk(KERN_ERR "ulpi_read: timeout %08x\n", | |
| + readl(USB_ULPI_VIEWPORT)); | |
| + return 0xffffffff; | |
| + } | |
| + return ULPI_DATA_READ(readl(USB_ULPI_VIEWPORT)); | |
| +} | |
| + | |
| +static int ulpi_write(void __iomem *addr, unsigned val, unsigned reg) | |
| +{ | |
| + unsigned timeout = 10000; | |
| + | |
| + /* initiate write operation */ | |
| + writel(ULPI_RUN | ULPI_WRITE | | |
| + ULPI_ADDR(reg) | ULPI_DATA(val), | |
| + USB_ULPI_VIEWPORT); | |
| + | |
| + /* wait for completion */ | |
| + while ((readl(USB_ULPI_VIEWPORT) & ULPI_RUN) && (--timeout)) | |
| + cpu_relax(); | |
| + | |
| + if (timeout == 0) { | |
| + printk(KERN_ERR "ulpi_write: timeout\n"); | |
| + return -1; | |
| + } | |
| + | |
| + return 0; | |
| +} | |
| + | |
| +#define CLKRGM_APPS_RESET_USBH 37 | |
| +#define CLKRGM_APPS_RESET_USB_PHY 34 | |
| +static void msm_hsusb_apps_reset_link(int reset) | |
| +{ | |
| + unsigned usb_id = CLKRGM_APPS_RESET_USBH; | |
| + | |
| + if (reset) | |
| + msm_proc_comm(PCOM_CLK_REGIME_SEC_RESET_ASSERT, | |
| + &usb_id, NULL); | |
| + else | |
| + msm_proc_comm(PCOM_CLK_REGIME_SEC_RESET_DEASSERT, | |
| + &usb_id, NULL); | |
| +} | |
| + | |
| +static void msm_hsusb_apps_reset_phy(void) | |
| +{ | |
| + unsigned usb_phy_id = CLKRGM_APPS_RESET_USB_PHY; | |
| + | |
| + msm_proc_comm(PCOM_CLK_REGIME_SEC_RESET_ASSERT, | |
| + &usb_phy_id, NULL); | |
| + msleep(1); | |
| + msm_proc_comm(PCOM_CLK_REGIME_SEC_RESET_DEASSERT, | |
| + &usb_phy_id, NULL); | |
| +} | |
| + | |
| +#define ULPI_VERIFY_MAX_LOOP_COUNT 3 | |
| +static int msm_hsusb_phy_verify_access(void __iomem *addr) | |
| +{ | |
| + int temp; | |
| + | |
| + for (temp = 0; temp < ULPI_VERIFY_MAX_LOOP_COUNT; temp++) { | |
| + if (ulpi_read(addr, ULPI_DEBUG) != (unsigned)-1) | |
| + break; | |
| + msm_hsusb_apps_reset_phy(); | |
| + } | |
| + | |
| + if (temp == ULPI_VERIFY_MAX_LOOP_COUNT) { | |
| + pr_err("%s: ulpi read failed for %d times\n", | |
| + __func__, ULPI_VERIFY_MAX_LOOP_COUNT); | |
| + return -1; | |
| + } | |
| + | |
| + return 0; | |
| +} | |
| + | |
| +static unsigned msm_hsusb_ulpi_read_with_reset(void __iomem *addr, unsigned reg) | |
| +{ | |
| + int temp; | |
| + unsigned res; | |
| + | |
| + for (temp = 0; temp < ULPI_VERIFY_MAX_LOOP_COUNT; temp++) { | |
| + res = ulpi_read(addr, reg); | |
| + if (res != -1) | |
| + return res; | |
| + msm_hsusb_apps_reset_phy(); | |
| + } | |
| + | |
| + pr_err("%s: ulpi read failed for %d times\n", | |
| + __func__, ULPI_VERIFY_MAX_LOOP_COUNT); | |
| + | |
| + return -1; | |
| +} | |
| + | |
| +static int msm_hsusb_ulpi_write_with_reset(void __iomem *addr, | |
| + unsigned val, unsigned reg) | |
| +{ | |
| + int temp; | |
| + int res; | |
| + | |
| + for (temp = 0; temp < ULPI_VERIFY_MAX_LOOP_COUNT; temp++) { | |
| + res = ulpi_write(addr, val, reg); | |
| + if (!res) | |
| + return 0; | |
| + msm_hsusb_apps_reset_phy(); | |
| + } | |
| + | |
| + pr_err("%s: ulpi write failed for %d times\n", | |
| + __func__, ULPI_VERIFY_MAX_LOOP_COUNT); | |
| + return -1; | |
| +} | |
| + | |
| +static int msm_hsusb_phy_caliberate(void __iomem *addr) | |
| +{ | |
| + int ret; | |
| + unsigned res; | |
| + | |
| + ret = msm_hsusb_phy_verify_access(addr); | |
| + if (ret) | |
| + return -ETIMEDOUT; | |
| + | |
| + res = msm_hsusb_ulpi_read_with_reset(addr, ULPI_FUNC_CTRL_CLR); | |
| + if (res == -1) | |
| + return -ETIMEDOUT; | |
| + | |
| + res = msm_hsusb_ulpi_write_with_reset(addr, | |
| + res | ULPI_SUSPENDM, | |
| + ULPI_FUNC_CTRL_CLR); | |
| + if (res) | |
| + return -ETIMEDOUT; | |
| + | |
| + msm_hsusb_apps_reset_phy(); | |
| + | |
| + return msm_hsusb_phy_verify_access(addr); | |
| +} | |
| + | |
| +#define USB_LINK_RESET_TIMEOUT (msecs_to_jiffies(10)) | |
| +static int msm_hsusb_native_phy_reset(void __iomem *addr) | |
| +{ | |
| + u32 temp; | |
| + unsigned long timeout; | |
| + | |
| + if (machine_is_qsd8x50_ffa()) | |
| + return msm_hsusb_phy_reset(); | |
| + | |
| + msm_hsusb_apps_reset_link(1); | |
| + msm_hsusb_apps_reset_phy(); | |
| + msm_hsusb_apps_reset_link(0); | |
| + | |
| + /* select ULPI phy */ | |
| + temp = (readl(USB_PORTSC) & ~PORTSC_PTS); | |
| + writel(temp | PORTSC_PTS_ULPI, USB_PORTSC); | |
| + | |
| + if (msm_hsusb_phy_caliberate(addr)) | |
| + return -1; | |
| + | |
| + /* soft reset phy */ | |
| + writel(USBCMD_RESET, USB_USBCMD); | |
| + timeout = jiffies + USB_LINK_RESET_TIMEOUT; | |
| + while (readl(USB_USBCMD) & USBCMD_RESET) { | |
| + if (time_after(jiffies, timeout)) { | |
| + pr_err("usb link reset timeout\n"); | |
| + break; | |
| + } | |
| + msleep(1); | |
| + } | |
| + | |
| + return 0; | |
| +} | |
| + | |
| +static struct msm_hsusb_platform_data msm_hsusb_pdata = { | |
| + .version = 0x0100, | |
| + .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_180NM), | |
| + .vendor_id = 0x04DD, | |
| + .product_name = USB_PRODUCT_NAME, | |
| + .serial_number = "1234567890ABCDEF", | |
| + .manufacturer_name = "SHARP Corporation", | |
| + .compositions = usb_func_composition, | |
| + .num_compositions = ARRAY_SIZE(usb_func_composition), | |
| + .function_map = usb_functions_map, | |
| + .num_functions = ARRAY_SIZE(usb_functions_map), | |
| + .config_gpio = NULL, | |
| + | |
| + .phy_reset = msm_hsusb_native_phy_reset, | |
| +}; | |
| + | |
| + | |
| +static int __init msm_hsusb_set_serialno(char *serialno) | |
| +{ | |
| +#ifdef CONFIG_USB_FUNCTION | |
| + if (strlen(serialno)) | |
| + msm_hsusb_pdata.serial_number = serialno; | |
| +#endif | |
| + | |
| + return 1; | |
| +} | |
| + | |
| +__setup("androidboot.serialno=", msm_hsusb_set_serialno); | |
| + | |
| +static struct vreg *vreg_usb; | |
| +static void msm_hsusb_vbus_power(unsigned phy_info, int on) | |
| +{ | |
| + | |
| + switch (PHY_TYPE(phy_info)) { | |
| + case USB_PHY_INTEGRATED: | |
| + if (on) | |
| + msm_hsusb_vbus_powerup(); | |
| + else | |
| + msm_hsusb_vbus_shutdown(); | |
| + break; | |
| + case USB_PHY_SERIAL_PMIC: | |
| + if (on) | |
| + vreg_enable(vreg_usb); | |
| + else | |
| + vreg_disable(vreg_usb); | |
| + break; | |
| + default: | |
| + pr_err("%s: undefined phy type ( %X ) \n", __func__, | |
| + phy_info); | |
| + } | |
| + | |
| +} | |
| + | |
| +static struct msm_usb_host_platform_data msm_usb_host_pdata = { | |
| + .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_180NM), | |
| + .phy_reset = msm_hsusb_native_phy_reset, | |
| + .vbus_power = msm_hsusb_vbus_power, | |
| + .max_axi_khz = 128000, | |
| +}; | |
| + | |
| +#ifdef CONFIG_USB_FS_HOST | |
| +static struct msm_usb_host_platform_data msm_usb_host2_pdata = { | |
| + .phy_info = USB_PHY_SERIAL_PMIC, | |
| + .config_gpio = msm_fsusb_setup_gpio, | |
| + .vbus_power = msm_hsusb_vbus_power, | |
| + .max_axi_khz = 128000, | |
| +}; | |
| +#endif | |
| + | |
| +static struct android_pmem_platform_data android_pmem_kernel_ebi1_pdata = { | |
| + .name = PMEM_KERNEL_EBI1_DATA_NAME, | |
| + /* if no allocator_type, defaults to PMEM_ALLOCATORTYPE_BITMAP, | |
| + * the only valid choice at this time. The board structure is | |
| + * set to all zeros by the C runtime initialization and that is now | |
| + * the enum value of PMEM_ALLOCATORTYPE_BITMAP, now forced to 0 in | |
| + * include/linux/android_pmem.h. | |
| + */ | |
| + .cached = 0, | |
| +}; | |
| + | |
| +static struct android_pmem_platform_data android_pmem_pdata = { | |
| + .name = "pmem", | |
| + .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, | |
| + .cached = 1, | |
| +}; | |
| + | |
| +static struct android_pmem_platform_data android_pmem_adsp_pdata = { | |
| + .name = "pmem_adsp", | |
| + .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, | |
| + .cached = 0, | |
| +}; | |
| + | |
| +static struct android_pmem_platform_data android_pmem_gpu0_pdata = { | |
| + .name = "pmem_gpu0", | |
| + .start = MSM_PMEM_GPU0_BASE, | |
| + .size = MSM_PMEM_GPU0_SIZE, | |
| + .allocator_type = PMEM_ALLOCATORTYPE_BUDDYBESTFIT, | |
| + .cached = 0, | |
| +}; | |
| + | |
| +static struct android_pmem_platform_data android_pmem_gpu1_pdata = { | |
| + .name = "pmem_gpu1", | |
| + .allocator_type = PMEM_ALLOCATORTYPE_BUDDYBESTFIT, | |
| + .cached = 0, | |
| +}; | |
| + | |
| +static struct platform_device android_pmem_device = { | |
| + .name = "android_pmem", | |
| + .id = 0, | |
| + .dev = { .platform_data = &android_pmem_pdata }, | |
| +}; | |
| + | |
| +static struct platform_device android_pmem_adsp_device = { | |
| + .name = "android_pmem", | |
| + .id = 1, | |
| + .dev = { .platform_data = &android_pmem_adsp_pdata }, | |
| +}; | |
| + | |
| +static struct platform_device android_pmem_gpu0_device = { | |
| + .name = "android_pmem", | |
| + .id = 2, | |
| + .dev = { .platform_data = &android_pmem_gpu0_pdata }, | |
| +}; | |
| + | |
| +static struct platform_device android_pmem_gpu1_device = { | |
| + .name = "android_pmem", | |
| + .id = 3, | |
| + .dev = { .platform_data = &android_pmem_gpu1_pdata }, | |
| +}; | |
| + | |
| +static struct platform_device android_pmem_kernel_ebi1_device = { | |
| + .name = "android_pmem", | |
| + .id = 5, | |
| + .dev = { .platform_data = &android_pmem_kernel_ebi1_pdata }, | |
| +}; | |
| + | |
| +static struct resource msm_fb_resources[] = { | |
| + { | |
| + .flags = IORESOURCE_DMA, | |
| + } | |
| +}; | |
| + | |
| +static int msm_fb_detect_panel(const char *name) | |
| +{ | |
| + int ret = -EPERM; | |
| + | |
| + if (machine_is_qsd8x50_ffa()) { | |
| + if (!strncmp(name, "mddi_toshiba_wvga_pt", 20)) | |
| + ret = 0; | |
| + else | |
| + ret = -ENODEV; | |
| + } else if (machine_is_qsd8x50_surf() && !strcmp(name, "lcdc_external")) | |
| + ret = 0; | |
| + | |
| + return ret; | |
| +} | |
| + | |
| +static struct msm_fb_platform_data msm_fb_pdata = { | |
| + .detect_client = msm_fb_detect_panel, | |
| +}; | |
| + | |
| +static struct platform_device msm_fb_device = { | |
| + .name = "msm_fb", | |
| + .id = 0, | |
| + .num_resources = ARRAY_SIZE(msm_fb_resources), | |
| + .resource = msm_fb_resources, | |
| + .dev = { | |
| + .platform_data = &msm_fb_pdata, | |
| + } | |
| +}; | |
| + | |
| +static struct msm_gpio bma_spi_gpio_config_data[] = { | |
| + { GPIO_CFG(22, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), "bma_irq" }, | |
| +}; | |
| + | |
| +static int msm_bma_gpio_setup(struct device *dev) | |
| +{ | |
| + int rc; | |
| + | |
| + rc = msm_gpios_request_enable(bma_spi_gpio_config_data, | |
| + ARRAY_SIZE(bma_spi_gpio_config_data)); | |
| + | |
| + return rc; | |
| +} | |
| + | |
| +static void msm_bma_gpio_teardown(struct device *dev) | |
| +{ | |
| + msm_gpios_disable_free(bma_spi_gpio_config_data, | |
| + ARRAY_SIZE(bma_spi_gpio_config_data)); | |
| +} | |
| + | |
| +static struct bma150_platform_data bma_pdata = { | |
| + .setup = msm_bma_gpio_setup, | |
| + .teardown = msm_bma_gpio_teardown, | |
| +}; | |
| + | |
| +static struct resource qsd_spi_resources[] = { | |
| + { | |
| + .name = "spi_irq_in", | |
| + .start = INT_SPI_INPUT, | |
| + .end = INT_SPI_INPUT, | |
| + .flags = IORESOURCE_IRQ, | |
| + }, | |
| + { | |
| + .name = "spi_irq_out", | |
| + .start = INT_SPI_OUTPUT, | |
| + .end = INT_SPI_OUTPUT, | |
| + .flags = IORESOURCE_IRQ, | |
| + }, | |
| + { | |
| + .name = "spi_irq_err", | |
| + .start = INT_SPI_ERROR, | |
| + .end = INT_SPI_ERROR, | |
| + .flags = IORESOURCE_IRQ, | |
| + }, | |
| + { | |
| + .name = "spi_base", | |
| + .start = 0xA1200000, | |
| + .end = 0xA1200000 + SZ_4K - 1, | |
| + .flags = IORESOURCE_MEM, | |
| + }, | |
| +}; | |
| + | |
| +static struct platform_device qsd_device_spi = { | |
| + .name = "spi_qsd", | |
| + .id = 0, | |
| + .num_resources = ARRAY_SIZE(qsd_spi_resources), | |
| + .resource = qsd_spi_resources, | |
| +}; | |
| + | |
| +static struct spi_board_info msm_spi_board_info[] __initdata = { | |
| + { | |
| + .modalias = "bma150", | |
| + .mode = SPI_MODE_3, | |
| + .irq = MSM_GPIO_TO_INT(22), | |
| + .bus_num = 0, | |
| + .chip_select = 0, | |
| + .max_speed_hz = 10000000, | |
| + .platform_data = &bma_pdata, | |
| + } | |
| +}; | |
| + | |
| +static struct msm_gpio qsd_spi_gpio_config_data[] = { | |
| + { GPIO_CFG(17, 1, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), "spi_clk" }, | |
| + { GPIO_CFG(18, 1, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), "spi_mosi" }, | |
| + { GPIO_CFG(19, 1, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), "spi_miso" }, | |
| + { GPIO_CFG(20, 1, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), "spi_cs0" }, | |
| + { GPIO_CFG(21, 0, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_16MA), "spi_pwr" }, | |
| +}; | |
| + | |
| +static int msm_qsd_spi_gpio_config(void) | |
| +{ | |
| + int rc; | |
| + | |
| + rc = msm_gpios_request_enable(qsd_spi_gpio_config_data, | |
| + ARRAY_SIZE(qsd_spi_gpio_config_data)); | |
| + if (rc) | |
| + return rc; | |
| + | |
| + /* Set direction for SPI_PWR */ | |
| + gpio_direction_output(21, 1); | |
| + | |
| + return 0; | |
| +} | |
| + | |
| +static void msm_qsd_spi_gpio_release(void) | |
| +{ | |
| + msm_gpios_disable_free(qsd_spi_gpio_config_data, | |
| + ARRAY_SIZE(qsd_spi_gpio_config_data)); | |
| +} | |
| + | |
| +static struct msm_spi_platform_data qsd_spi_pdata = { | |
| + .gpio_config = msm_qsd_spi_gpio_config, | |
| + .gpio_release = msm_qsd_spi_gpio_release | |
| +}; | |
| + | |
| +static void __init msm_qsd_spi_init(void) | |
| +{ | |
| + qsd_device_spi.dev.platform_data = &qsd_spi_pdata; | |
| +} | |
| + | |
| +static int mddi_toshiba_pmic_bl(int level) | |
| +{ | |
| + int ret = -EPERM; | |
| + | |
| + if (machine_is_qsd8x50_ffa()) { | |
| + ret = pmic_set_led_intensity(LED_LCD, level); | |
| + | |
| + if (ret) | |
| + printk(KERN_WARNING "%s: can't set lcd backlight!\n", | |
| + __func__); | |
| + } | |
| + | |
| + return ret; | |
| +} | |
| + | |
| +static struct msm_panel_common_pdata mddi_toshiba_pdata = { | |
| + .pmic_backlight = mddi_toshiba_pmic_bl, | |
| +}; | |
| + | |
| +static struct platform_device mddi_toshiba_device = { | |
| + .name = "mddi_toshiba", | |
| + .id = 0, | |
| + .dev = { | |
| + .platform_data = &mddi_toshiba_pdata, | |
| + } | |
| +}; | |
| + | |
| +#ifndef CONFIG_SHLCDC_BOARD | |
| +static void msm_fb_vreg_config(const char *name, int on) | |
| +{ | |
| + struct vreg *vreg; | |
| + int ret = 0; | |
| + | |
| + vreg = vreg_get(NULL, name); | |
| + if (IS_ERR(vreg)) { | |
| + printk(KERN_ERR "%s: vreg_get(%s) failed (%ld)\n", | |
| + __func__, name, PTR_ERR(vreg)); | |
| + return; | |
| + } | |
| + | |
| + ret = (on) ? vreg_enable(vreg) : vreg_disable(vreg); | |
| + if (ret) | |
| + printk(KERN_ERR "%s: %s(%s) failed!\n", | |
| + __func__, (on) ? "vreg_enable" : "vreg_disable", name); | |
| +} | |
| +#endif | |
| + | |
| +#define MDDI_RST_OUT_GPIO 100 | |
| + | |
| +#ifndef CONFIG_SHLCDC_BOARD | |
| +static int mddi_power_save_on; | |
| +#endif | |
| +static void msm_fb_mddi_power_save(int on) | |
| +{ | |
| +#ifndef CONFIG_SHLCDC_BOARD | |
| + int flag_on = !!on; | |
| + int ret; | |
| + | |
| + | |
| + if (mddi_power_save_on == flag_on) | |
| + return; | |
| + | |
| + mddi_power_save_on = flag_on; | |
| + | |
| + if (!flag_on && machine_is_qsd8x50_ffa()) { | |
| + gpio_set_value(MDDI_RST_OUT_GPIO, 0); | |
| + mdelay(1); | |
| + } | |
| + | |
| + ret = pmic_lp_mode_control(flag_on ? OFF_CMD : ON_CMD, | |
| + PM_VREG_LP_MSME2_ID); | |
| + if (ret) | |
| + printk(KERN_ERR "%s: pmic_lp_mode_control failed!\n", __func__); | |
| + | |
| + msm_fb_vreg_config("gp5", flag_on); | |
| + msm_fb_vreg_config("boost", flag_on); | |
| + | |
| + if (flag_on && machine_is_qsd8x50_ffa()) { | |
| + gpio_set_value(MDDI_RST_OUT_GPIO, 0); | |
| + mdelay(1); | |
| + gpio_set_value(MDDI_RST_OUT_GPIO, 1); | |
| + gpio_set_value(MDDI_RST_OUT_GPIO, 1); | |
| + mdelay(1); | |
| + } | |
| +#endif | |
| +} | |
| + | |
| +static int msm_fb_mddi_sel_clk(u32 *clk_rate) | |
| +{ | |
| + *clk_rate *= 2; | |
| + return 0; | |
| +} | |
| + | |
| +static struct mddi_platform_data mddi_pdata = { | |
| + .mddi_power_save = msm_fb_mddi_power_save, | |
| + .mddi_sel_clk = msm_fb_mddi_sel_clk, | |
| +}; | |
| + | |
| +static struct msm_panel_common_pdata mdp_pdata = { | |
| +#ifdef CONFIG_SHLCDC_BOARD | |
| + .gpio = 114, | |
| +#else | |
| + .gpio = 98, | |
| +#endif | |
| +}; | |
| + | |
| +static void __init msm_fb_add_devices(void) | |
| +{ | |
| + msm_fb_register_device("mdp", &mdp_pdata); | |
| + msm_fb_register_device("pmdh", &mddi_pdata); | |
| + msm_fb_register_device("emdh", &mddi_pdata); | |
| + msm_fb_register_device("tvenc", 0); | |
| + msm_fb_register_device("lcdc", 0); | |
| +} | |
| + | |
| +static struct resource msm_audio_resources[] = { | |
| + { | |
| + .flags = IORESOURCE_DMA, | |
| + }, | |
| + { | |
| + .name = "aux_pcm_dout", | |
| + .start = 68, | |
| + .end = 68, | |
| + .flags = IORESOURCE_IO, | |
| + }, | |
| + { | |
| + .name = "aux_pcm_din", | |
| + .start = 69, | |
| + .end = 69, | |
| + .flags = IORESOURCE_IO, | |
| + }, | |
| + { | |
| + .name = "aux_pcm_syncout", | |
| + .start = 70, | |
| + .end = 70, | |
| + .flags = IORESOURCE_IO, | |
| + }, | |
| + { | |
| + .name = "aux_pcm_clkin_a", | |
| + .start = 71, | |
| + .end = 71, | |
| + .flags = IORESOURCE_IO, | |
| + }, | |
| + { | |
| + .name = "sdac_din", | |
| + .start = 144, | |
| + .end = 144, | |
| + .flags = IORESOURCE_IO, | |
| + }, | |
| + { | |
| + .name = "sdac_dout", | |
| + .start = 145, | |
| + .end = 145, | |
| + .flags = IORESOURCE_IO, | |
| + }, | |
| + { | |
| + .name = "sdac_wsout", | |
| + .start = 143, | |
| + .end = 143, | |
| + .flags = IORESOURCE_IO, | |
| + }, | |
| + { | |
| + .name = "cc_i2s_clk", | |
| + .start = 142, | |
| + .end = 142, | |
| + .flags = IORESOURCE_IO, | |
| + }, | |
| + { | |
| + .name = "audio_master_clkout", | |
| + .start = 146, | |
| + .end = 146, | |
| + .flags = IORESOURCE_IO, | |
| + }, | |
| + { | |
| + .name = "audio_base_addr", | |
| + .start = 0xa0700000, | |
| + .end = 0xa0700000 + 4, | |
| + .flags = IORESOURCE_MEM, | |
| + }, | |
| + | |
| +}; | |
| + | |
| +static unsigned audio_gpio_on[] = { | |
| + GPIO_CFG(68, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* PCM_DOUT */ | |
| + GPIO_CFG(69, 1, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), /* PCM_DIN */ | |
| + GPIO_CFG(70, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* PCM_SYNC */ | |
| + GPIO_CFG(71, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* PCM_CLK */ | |
| + GPIO_CFG(142, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* CC_I2S_CLK */ | |
| + GPIO_CFG(143, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* SADC_WSOUT */ | |
| + GPIO_CFG(144, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* SADC_DIN */ | |
| + GPIO_CFG(145, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* SDAC_DOUT */ | |
| + GPIO_CFG(146, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* MA_CLK_OUT */ | |
| +}; | |
| + | |
| +static void __init audio_gpio_init(void) | |
| +{ | |
| + int pin, rc; | |
| + | |
| + for (pin = 0; pin < ARRAY_SIZE(audio_gpio_on); pin++) { | |
| + rc = gpio_tlmm_config(audio_gpio_on[pin], | |
| + GPIO_ENABLE); | |
| + if (rc) { | |
| + printk(KERN_ERR | |
| + "%s: gpio_tlmm_config(%#x)=%d\n", | |
| + __func__, audio_gpio_on[pin], rc); | |
| + return; | |
| + } | |
| + } | |
| +} | |
| + | |
| +static struct platform_device msm_audio_device = { | |
| + .name = "msm_audio", | |
| + .id = 0, | |
| + .num_resources = ARRAY_SIZE(msm_audio_resources), | |
| + .resource = msm_audio_resources, | |
| +}; | |
| + | |
| +static struct resource bluesleep_resources[] = { | |
| + { | |
| + .name = "gpio_host_wake", | |
| + .start = 21, | |
| + .end = 21, | |
| + .flags = IORESOURCE_IO, | |
| + }, | |
| + { | |
| + .name = "gpio_ext_wake", | |
| + .start = 19, | |
| + .end = 19, | |
| + .flags = IORESOURCE_IO, | |
| + }, | |
| + { | |
| + .name = "host_wake", | |
| + .start = MSM_GPIO_TO_INT(21), | |
| + .end = MSM_GPIO_TO_INT(21), | |
| + .flags = IORESOURCE_IRQ, | |
| + }, | |
| +}; | |
| + | |
| +static struct platform_device msm_bluesleep_device = { | |
| + .name = "bluesleep", | |
| + .id = -1, | |
| + .num_resources = ARRAY_SIZE(bluesleep_resources), | |
| + .resource = bluesleep_resources, | |
| +}; | |
| + | |
| +#if 0 | |
| +#ifdef CONFIG_BT | |
| +static struct platform_device msm_bt_power_device = { | |
| + .name = "bt_power", | |
| +}; | |
| + | |
| +enum { | |
| + BT_SYSRST, | |
| + BT_WAKE, | |
| + BT_HOST_WAKE, | |
| + BT_VDD_IO, | |
| + BT_RFR, | |
| + BT_CTS, | |
| + BT_RX, | |
| + BT_TX, | |
| + BT_VDD_FREG | |
| +}; | |
| + | |
| +static unsigned bt_config_power_on[] = { | |
| + GPIO_CFG(18, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* SYSRST */ | |
| + GPIO_CFG(19, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* WAKE */ | |
| + GPIO_CFG(21, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), /* HOST_WAKE */ | |
| + GPIO_CFG(22, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* VDD_IO */ | |
| + GPIO_CFG(43, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* RFR */ | |
| + GPIO_CFG(44, 2, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), /* CTS */ | |
| + GPIO_CFG(45, 2, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), /* Rx */ | |
| + GPIO_CFG(46, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* Tx */ | |
| +}; | |
| +static unsigned bt_config_power_off[] = { | |
| + GPIO_CFG(18, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* SYSRST */ | |
| + GPIO_CFG(19, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* WAKE */ | |
| + GPIO_CFG(21, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* HOST_WAKE */ | |
| + GPIO_CFG(22, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* VDD_IO */ | |
| + GPIO_CFG(43, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* RFR */ | |
| + GPIO_CFG(44, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* CTS */ | |
| + GPIO_CFG(45, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* Rx */ | |
| + GPIO_CFG(46, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* Tx */ | |
| +}; | |
| + | |
| +static int bluetooth_power(int on) | |
| +{ | |
| + struct vreg *vreg_bt; | |
| + struct vreg *vreg_wlan; | |
| + int pin, rc; | |
| + | |
| + /* do not have vreg bt defined, gp6 is the same */ | |
| + /* vreg_get parameter 1 (struct device *) is ignored */ | |
| + vreg_bt = vreg_get(NULL, "gp6"); | |
| + | |
| + if (IS_ERR(vreg_bt)) { | |
| + printk(KERN_ERR "%s: vreg get failed (%ld)\n", | |
| + __func__, PTR_ERR(vreg_bt)); | |
| + return PTR_ERR(vreg_bt); | |
| + } | |
| + | |
| + vreg_wlan = vreg_get(NULL, "wlan"); | |
| + | |
| + if (IS_ERR(vreg_wlan)) { | |
| + printk(KERN_ERR "%s: vreg get failed (%ld)\n", | |
| + __func__, PTR_ERR(vreg_wlan)); | |
| + return PTR_ERR(vreg_wlan); | |
| + } | |
| + | |
| + if (on) { | |
| + for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on); pin++) { | |
| + rc = gpio_tlmm_config(bt_config_power_on[pin], | |
| + GPIO_ENABLE); | |
| + if (rc) { | |
| + printk(KERN_ERR | |
| + "%s: gpio_tlmm_config(%#x)=%d\n", | |
| + __func__, bt_config_power_on[pin], rc); | |
| + return -EIO; | |
| + } | |
| + } | |
| + | |
| + /* units of mV, steps of 50 mV */ | |
| + rc = vreg_set_level(vreg_bt, PMIC_VREG_GP6_LEVEL); | |
| + if (rc) { | |
| + printk(KERN_ERR "%s: vreg bt set level failed (%d)\n", | |
| + __func__, rc); | |
| + return -EIO; | |
| + } | |
| + rc = vreg_enable(vreg_bt); | |
| + if (rc) { | |
| + printk(KERN_ERR "%s: vreg bt enable failed (%d)\n", | |
| + __func__, rc); | |
| + return -EIO; | |
| + } | |
| + | |
| + /* units of mV, steps of 50 mV */ | |
| + rc = vreg_set_level(vreg_wlan, PMIC_VREG_WLAN_LEVEL); | |
| + if (rc) { | |
| + printk(KERN_ERR "%s: vreg wlan set level failed (%d)\n", | |
| + __func__, rc); | |
| + return -EIO; | |
| + } | |
| + rc = vreg_enable(vreg_wlan); | |
| + if (rc) { | |
| + printk(KERN_ERR "%s: vreg wlan enable failed (%d)\n", | |
| + __func__, rc); | |
| + return -EIO; | |
| + } | |
| + | |
| + gpio_set_value(22, on); /* VDD_IO */ | |
| + gpio_set_value(18, on); /* SYSRST */ | |
| + | |
| + } else { | |
| + gpio_set_value(18, on); /* SYSRST */ | |
| + gpio_set_value(22, on); /* VDD_IO */ | |
| + | |
| + rc = vreg_disable(vreg_wlan); | |
| + if (rc) { | |
| + printk(KERN_ERR "%s: vreg wlan disable failed (%d)\n", | |
| + __func__, rc); | |
| + return -EIO; | |
| + } | |
| + rc = vreg_disable(vreg_bt); | |
| + if (rc) { | |
| + printk(KERN_ERR "%s: vreg bt disable failed (%d)\n", | |
| + __func__, rc); | |
| + return -EIO; | |
| + } | |
| + | |
| + for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off); pin++) { | |
| + rc = gpio_tlmm_config(bt_config_power_off[pin], | |
| + GPIO_ENABLE); | |
| + if (rc) { | |
| + printk(KERN_ERR | |
| + "%s: gpio_tlmm_config(%#x)=%d\n", | |
| + __func__, bt_config_power_off[pin], rc); | |
| + return -EIO; | |
| + } | |
| + } | |
| + | |
| + } | |
| + | |
| + printk(KERN_DEBUG "Bluetooth power switch: %d\n", on); | |
| + | |
| + return 0; | |
| +} | |
| + | |
| +static void __init bt_power_init(void) | |
| +{ | |
| + msm_bt_power_device.dev.platform_data = &bluetooth_power; | |
| +} | |
| +#else | |
| +#define bt_power_init(x) do {} while (0) | |
| +#endif | |
| +#endif | |
| + | |
| +static struct resource kgsl_resources[] = { | |
| + { | |
| + .name = "kgsl_reg_memory", | |
| + .start = 0xA0000000, | |
| + .end = 0xA001ffff, | |
| + .flags = IORESOURCE_MEM, | |
| + }, | |
| + { | |
| + .name = "kgsl_phys_memory", | |
| + .start = MSM_GPU_PHYS_BASE, | |
| + .end = MSM_GPU_PHYS_BASE + MSM_GPU_PHYS_SIZE - 1, | |
| + .flags = IORESOURCE_MEM, | |
| + }, | |
| + { | |
| + .start = INT_GRAPHICS, | |
| + .end = INT_GRAPHICS, | |
| + .flags = IORESOURCE_IRQ, | |
| + }, | |
| +}; | |
| +static struct kgsl_platform_data kgsl_pdata = { | |
| + .max_axi_freq = 128000, /*Max for 8K*/ | |
| +}; | |
| + | |
| +static struct platform_device msm_device_kgsl = { | |
| + .name = "kgsl", | |
| + .id = -1, | |
| + .num_resources = ARRAY_SIZE(kgsl_resources), | |
| + .resource = kgsl_resources, | |
| + .dev = { | |
| + .platform_data = &kgsl_pdata, | |
| + }, | |
| +}; | |
| + | |
| +static struct platform_device msm_device_pmic_leds = { | |
| + .name = "pmic-leds", | |
| + .id = -1, | |
| +}; | |
| + | |
| +#if 1 | |
| +static struct platform_device msm_device_sh_battery = { | |
| + .name = "sh_battery", | |
| + .id = 0, | |
| +}; | |
| +#endif | |
| + | |
| +/* TSIF begin */ | |
| +#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) | |
| + | |
| +#define TSIF_A_SYNC GPIO_CFG(106, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA) | |
| +#define TSIF_A_DATA GPIO_CFG(107, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA) | |
| +#define TSIF_A_EN GPIO_CFG(108, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA) | |
| +#define TSIF_A_CLK GPIO_CFG(109, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA) | |
| + | |
| +static const struct msm_gpio tsif_gpios[] = { | |
| + { .gpio_cfg = TSIF_A_CLK, .label = "tsif_clk", }, | |
| + { .gpio_cfg = TSIF_A_EN, .label = "tsif_en", }, | |
| + { .gpio_cfg = TSIF_A_DATA, .label = "tsif_data", }, | |
| + { .gpio_cfg = TSIF_A_SYNC, .label = "tsif_sync", }, | |
| +#if 0 | |
| + { .gpio_cfg = 0, .label = "tsif_error", }, | |
| + { .gpio_cfg = 0, .label = "tsif_null", }, | |
| +#endif | |
| +}; | |
| + | |
| +static struct msm_tsif_platform_data tsif_platform_data = { | |
| + .num_gpios = ARRAY_SIZE(tsif_gpios), | |
| + .gpios = tsif_gpios, | |
| +}; | |
| + | |
| +#endif /* defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) */ | |
| +/* TSIF end */ | |
| + | |
| +#ifdef CONFIG_QSD_SVS | |
| +#define TPS65023_MAX_DCDC1 1600 | |
| +#else | |
| +#define TPS65023_MAX_DCDC1 CONFIG_QSD_PMIC_DEFAULT_DCDC1 | |
| +#endif | |
| + | |
| +static int qsd8x50_tps65023_set_dcdc1(int mVolts) | |
| +{ | |
| + int rc = 0; | |
| +#ifdef CONFIG_QSD_SVS | |
| + rc = tps65023_set_dcdc1_level(mVolts); | |
| + /* By default the TPS65023 will be initialized to 1.225V. | |
| + * So we can safely switch to any frequency within this | |
| + * voltage even if the device is not probed/ready. | |
| + */ | |
| + if (rc == -ENODEV && mVolts <= CONFIG_QSD_PMIC_DEFAULT_DCDC1) | |
| + rc = 0; | |
| +#else | |
| + /* Disallow frequencies not supported in the default PMIC | |
| + * output voltage. | |
| + */ | |
| + if (mVolts > CONFIG_QSD_PMIC_DEFAULT_DCDC1) | |
| + rc = -EFAULT; | |
| +#endif | |
| + return rc; | |
| +} | |
| + | |
| +static struct msm_acpu_clock_platform_data qsd8x50_clock_data = { | |
| + .acpu_switch_time_us = 20, | |
| + .max_speed_delta_khz = 256000, | |
| + .vdd_switch_time_us = 62, | |
| + .power_collapse_khz = 128000000, | |
| + .wait_for_irq_khz = 128000000, | |
| + .max_vdd = TPS65023_MAX_DCDC1, | |
| + .acpu_set_vdd = qsd8x50_tps65023_set_dcdc1, | |
| +}; | |
| + | |
| +#if 0 | |
| +static void touchpad_gpio_release(void) | |
| +{ | |
| + gpio_free(TOUCHPAD_IRQ); | |
| + gpio_free(TOUCHPAD_SUSPEND); | |
| +} | |
| + | |
| +static int touchpad_gpio_setup(void) | |
| +{ | |
| + int rc; | |
| + int suspend_pin = TOUCHPAD_SUSPEND; | |
| + int irq_pin = TOUCHPAD_IRQ; | |
| + unsigned suspend_cfg = | |
| + GPIO_CFG(suspend_pin, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA); | |
| + unsigned irq_cfg = | |
| + GPIO_CFG(irq_pin, 1, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA); | |
| + | |
| + rc = gpio_request(irq_pin, "msm_touchpad_irq"); | |
| + if (rc) { | |
| + pr_err("gpio_request failed on pin %d (rc=%d)\n", | |
| + irq_pin, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + rc = gpio_request(suspend_pin, "msm_touchpad_suspend"); | |
| + if (rc) { | |
| + pr_err("gpio_request failed on pin %d (rc=%d)\n", | |
| + suspend_pin, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + rc = gpio_tlmm_config(suspend_cfg, GPIO_ENABLE); | |
| + if (rc) { | |
| + pr_err("gpio_tlmm_config failed on pin %d (rc=%d)\n", | |
| + suspend_pin, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + rc = gpio_tlmm_config(irq_cfg, GPIO_ENABLE); | |
| + if (rc) { | |
| + pr_err("gpio_tlmm_config failed on pin %d (rc=%d)\n", | |
| + irq_pin, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + return rc; | |
| + | |
| +err_gpioconfig: | |
| + touchpad_gpio_release(); | |
| + return rc; | |
| +} | |
| + | |
| +static struct msm_touchpad_platform_data msm_touchpad_data = { | |
| + .gpioirq = TOUCHPAD_IRQ, | |
| + .gpiosuspend = TOUCHPAD_SUSPEND, | |
| + .gpio_setup = touchpad_gpio_setup, | |
| + .gpio_shutdown = touchpad_gpio_release | |
| +} | |
| +; | |
| +#endif | |
| + | |
| +#if 0 | |
| +#define KBD_RST 35 | |
| +#define KBD_IRQ 36 | |
| +#else | |
| +static const struct | |
| +{ | |
| + int pinno; | |
| + unsigned cfg; | |
| + char *msg; | |
| +} msm_i2ckbd[] = | |
| + { | |
| + { SH_KBD_IRQ, GPIO_CFG(SH_KBD_IRQ, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA), "gpio_keybd_irq" }, | |
| + { SH_JOG_U_IRQ, GPIO_CFG(SH_JOG_U_IRQ, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA), "gpio_jog_u_irq" }, | |
| + { SH_JOG_D_IRQ, GPIO_CFG(SH_JOG_D_IRQ, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA), "gpio_jog_d_irq" }, | |
| + { SH_JOG_L_IRQ, GPIO_CFG(SH_JOG_L_IRQ, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA), "gpio_jog_l_irq" }, | |
| + { SH_JOG_R_IRQ, GPIO_CFG(SH_JOG_R_IRQ, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA), "gpio_jog_r_irq" }, | |
| + { SH_JOG_POWER, GPIO_CFG(SH_JOG_POWER, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), "gpio_jog_power" }, | |
| + }; | |
| +#endif | |
| + | |
| +static void kbd_gpio_release(void) | |
| +{ | |
| +#if 0 | |
| + gpio_free(KBD_IRQ); | |
| + gpio_free(KBD_RST); | |
| +#else | |
| + int i; | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2ckbd); i++) | |
| + { | |
| + gpio_free(msm_i2ckbd[i].pinno); | |
| + } | |
| +#endif | |
| +} | |
| + | |
| +static int kbd_gpio_setup(void) | |
| +{ | |
| +#if 0 | |
| + int rc; | |
| + int respin = KBD_RST; | |
| + int irqpin = KBD_IRQ; | |
| + unsigned rescfg = | |
| + GPIO_CFG(respin, 0, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA); | |
| + unsigned irqcfg = | |
| + GPIO_CFG(irqpin, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA); | |
| + | |
| + rc = gpio_request(irqpin, "gpio_keybd_irq"); | |
| + if (rc) { | |
| + pr_err("gpio_request failed on pin %d (rc=%d)\n", | |
| + irqpin, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + rc = gpio_request(respin, "gpio_keybd_reset"); | |
| + if (rc) { | |
| + pr_err("gpio_request failed on pin %d (rc=%d)\n", | |
| + respin, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + rc = gpio_tlmm_config(rescfg, GPIO_ENABLE); | |
| + if (rc) { | |
| + pr_err("gpio_tlmm_config failed on pin %d (rc=%d)\n", | |
| + respin, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + rc = gpio_tlmm_config(irqcfg, GPIO_ENABLE); | |
| + if (rc) { | |
| + pr_err("gpio_tlmm_config failed on pin %d (rc=%d)\n", | |
| + irqpin, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| +#else | |
| + int rc; | |
| + int i; | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2ckbd); i++) | |
| + { | |
| + rc = gpio_request(msm_i2ckbd[i].pinno, msm_i2ckbd[i].msg); | |
| + if (rc) { | |
| + pr_err("[OctKey]gpio_request failed on pin %d (rc=%d)\n", msm_i2ckbd[i].pinno, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + } | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2ckbd); i++) | |
| + { | |
| + rc = gpio_tlmm_config(msm_i2ckbd[i].cfg, GPIO_ENABLE); | |
| + if (rc) { | |
| + pr_err("[OctKey]gpio_tlmm_config failed on pin %d (rc=%d)\n", msm_i2ckbd[i].pinno, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + } | |
| +#endif | |
| + return rc; | |
| + | |
| +err_gpioconfig: | |
| + kbd_gpio_release(); | |
| + return rc; | |
| +} | |
| + | |
| +#if 0 | |
| +/* use gpio output pin to toggle keyboard external reset pin */ | |
| +static void kbd_hwreset(int kbd_mclrpin) | |
| +{ | |
| + gpio_direction_output(kbd_mclrpin, 0); | |
| + gpio_direction_output(kbd_mclrpin, 1); | |
| +} | |
| + | |
| +static struct msm_i2ckbd_platform_data msm_kybd_data = { | |
| + .hwrepeat = 0, | |
| + .scanset1 = 1, | |
| + .gpioreset = KBD_RST, | |
| + .gpioirq = KBD_IRQ, | |
| + .gpio_setup = kbd_gpio_setup, | |
| + .gpio_shutdown = kbd_gpio_release, | |
| + .hw_reset = kbd_hwreset, | |
| +}; | |
| +#else | |
| +static struct msm_sh_i2ckbd_platform_data msm_kybd_data = { | |
| + .gpio_kbdirq = SH_KBD_IRQ, | |
| + .gpio_jogirq[0] = SH_JOG_U_IRQ, | |
| + .gpio_jogirq[1] = SH_JOG_D_IRQ, | |
| + .gpio_jogirq[2] = SH_JOG_L_IRQ, | |
| + .gpio_jogirq[3] = SH_JOG_R_IRQ, | |
| + .gpio_jogpower = SH_JOG_POWER, | |
| + .gpio_setup = kbd_gpio_setup, | |
| + .gpio_shutdown = kbd_gpio_release, | |
| +}; | |
| +#endif | |
| + | |
| +#if 1 | |
| +static const struct | |
| +{ | |
| + int pinno; | |
| + unsigned cfg; | |
| + char *msg; | |
| +} msm_i2ctps[] = | |
| + { | |
| + { SH_TOUCH_IRQ, GPIO_CFG(SH_TOUCH_IRQ, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA), "gpio_touch_irq" }, | |
| + { SH_TOUCH_HSSP_CLK, GPIO_CFG(SH_TOUCH_HSSP_CLK, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), "gpio_touch_hssp_clk" }, | |
| + { SH_TOUCH_HSSP_DATA, GPIO_CFG(SH_TOUCH_HSSP_DATA, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), "gpio_touch_hssp_data" }, | |
| + }; | |
| + | |
| +static void tps_gpio_release(void) | |
| +{ | |
| + int i; | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2ctps); i++) | |
| + { | |
| + gpio_free(msm_i2ctps[i].pinno); | |
| + } | |
| +} | |
| + | |
| +static int tps_gpio_setup(void) | |
| +{ | |
| + int rc; | |
| + int i; | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2ctps); i++) | |
| + { | |
| + rc = gpio_request(msm_i2ctps[i].pinno, msm_i2ctps[i].msg); | |
| + if (rc) { | |
| + pr_err("[OctTps]gpio_request failed on pin %d (rc=%d)\n", msm_i2ctps[i].pinno, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + } | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2ctps); i++) | |
| + { | |
| + rc = gpio_tlmm_config(msm_i2ctps[i].cfg, GPIO_ENABLE); | |
| + if (rc) { | |
| + pr_err("[OctTps]gpio_tlmm_config failed on pin %d (rc=%d)\n", msm_i2ctps[i].pinno, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + } | |
| + return rc; | |
| + | |
| +err_gpioconfig: | |
| + tps_gpio_release(); | |
| + return rc; | |
| +} | |
| + | |
| +static struct msm_sh_i2ctps_platform_data msm_touch_data = { | |
| + .gpio_irq = SH_TOUCH_IRQ, | |
| + .gpio_hssp_clk = SH_TOUCH_HSSP_CLK, | |
| + .gpio_hssp_data = SH_TOUCH_HSSP_DATA, | |
| + .gpio_setup = tps_gpio_setup, | |
| + .gpio_shutdown = tps_gpio_release, | |
| +}; | |
| +#endif | |
| + | |
| +#if 1 | |
| +static const struct | |
| +{ | |
| + int pinno; | |
| + unsigned cfg; | |
| + char *msg; | |
| +} msm_i2c_accel[] = | |
| + { | |
| + { SH_ACCEL_IRQ, GPIO_CFG(SH_ACCEL_IRQ, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA), "gpio_accel_irq" }, | |
| + }; | |
| + | |
| +static void accel_gpio_release(void) | |
| +{ | |
| + int i; | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2c_accel); i++) | |
| + { | |
| + gpio_free(msm_i2c_accel[i].pinno); | |
| + } | |
| +} | |
| + | |
| +static int accel_gpio_setup(void) | |
| +{ | |
| + int rc; | |
| + int i; | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2c_accel); i++) | |
| + { | |
| + rc = gpio_request(msm_i2c_accel[i].pinno, msm_i2c_accel[i].msg); | |
| + if (rc) { | |
| + pr_err("[ACCEL]gpio_request failed on pin %d (rc=%d)\n", msm_i2c_accel[i].pinno, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + } | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2c_accel); i++) | |
| + { | |
| + rc = gpio_tlmm_config(msm_i2c_accel[i].cfg, GPIO_ENABLE); | |
| + if (rc) { | |
| + pr_err("[ACCEL]gpio_tlmm_config failed on pin %d (rc=%d)\n", msm_i2c_accel[i].pinno, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + } | |
| + return rc; | |
| + | |
| +err_gpioconfig: | |
| + accel_gpio_release(); | |
| + return rc; | |
| +} | |
| + | |
| +static struct sh_i2c_accel_platform_data msm_accel_data = { | |
| + .gpio_irq = SH_ACCEL_IRQ, | |
| + .gpio_setup = accel_gpio_setup, | |
| + .gpio_shutdown = accel_gpio_release, | |
| +}; | |
| + | |
| + | |
| +static const struct | |
| +{ | |
| + int pinno; | |
| + unsigned cfg; | |
| + char *msg; | |
| +} msm_i2c_comps[] = | |
| + { | |
| + { SH_COMPS_IRQ, GPIO_CFG(SH_COMPS_IRQ, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA), "gpio_comps_irq" }, | |
| + { SH_COMPS_RST, GPIO_CFG(SH_COMPS_RST, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), "gpio_comps_rst" }, | |
| + }; | |
| + | |
| +static void comps_gpio_release(void) | |
| +{ | |
| + int i; | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2c_comps); i++) | |
| + { | |
| + gpio_free(msm_i2c_comps[i].pinno); | |
| + } | |
| +} | |
| + | |
| +static int comps_gpio_setup(void) | |
| +{ | |
| + int rc; | |
| + int i; | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2c_comps); i++) | |
| + { | |
| + rc = gpio_request(msm_i2c_comps[i].pinno, msm_i2c_comps[i].msg); | |
| + if (rc) { | |
| + pr_err("[COMPASS]gpio_request failed on pin %d (rc=%d)\n", msm_i2c_comps[i].pinno, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + } | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2c_comps); i++) | |
| + { | |
| + rc = gpio_tlmm_config(msm_i2c_comps[i].cfg, GPIO_ENABLE); | |
| + if (rc) { | |
| + pr_err("[COMPASS]gpio_tlmm_config failed on pin %d (rc=%d)\n", msm_i2c_comps[i].pinno, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + } | |
| + return rc; | |
| + | |
| +err_gpioconfig: | |
| + comps_gpio_release(); | |
| + return rc; | |
| +} | |
| + | |
| +static struct sh_i2c_compass_platform_data msm_comps_data = { | |
| + .gpio_irq = SH_COMPS_IRQ, | |
| + .gpio_rst = SH_COMPS_RST, | |
| + .gpio_setup = comps_gpio_setup, | |
| + .gpio_shutdown = comps_gpio_release, | |
| +}; | |
| +#endif | |
| + | |
| +static struct i2c_board_info msm_i2c_board_info[] __initdata = { | |
| +#if 1 | |
| + { | |
| + I2C_BOARD_INFO(SH_TOUCH_I2C_DEVNAME, SH_TOUCH_I2C_SLAVE), | |
| + .type = SH_TOUCH_I2C_DEVNAME, | |
| + .irq = MSM_GPIO_TO_INT(SH_TOUCH_IRQ), | |
| + .platform_data = &msm_touch_data | |
| + }, | |
| + { | |
| + I2C_BOARD_INFO(SH_KBD_I2C_DEVNAME, SH_KBD_I2C_SLAVE), | |
| + .type = SH_KBD_I2C_DEVNAME, | |
| + .irq = MSM_GPIO_TO_INT(SH_KBD_IRQ), | |
| + .platform_data = &msm_kybd_data | |
| + }, | |
| + { | |
| + I2C_BOARD_INFO(SH_ACCEL_I2C_DEVNAME, SH_ACCEL_I2C_SLAVE), | |
| + .type = SH_ACCEL_I2C_DEVNAME, | |
| + .irq = MSM_GPIO_TO_INT(SH_ACCEL_IRQ), | |
| + .platform_data = &msm_accel_data | |
| + }, | |
| + { | |
| + I2C_BOARD_INFO(SH_COMPS_I2C_DEVNAME, SH_COMPS_I2C_SLAVE), | |
| + .type = SH_COMPS_I2C_DEVNAME, | |
| + .irq = MSM_GPIO_TO_INT(SH_COMPS_IRQ), | |
| + .platform_data = &msm_comps_data | |
| + }, | |
| +#else | |
| + { | |
| + I2C_BOARD_INFO("glidesensor", 0x2A), | |
| + .irq = MSM_GPIO_TO_INT(TOUCHPAD_IRQ), | |
| + .platform_data = &msm_touchpad_data | |
| + }, | |
| + { | |
| +#if 0 | |
| + I2C_BOARD_INFO("msm-i2ckbd", 0x3A), | |
| + .type = "msm-i2ckbd", | |
| + .irq = MSM_GPIO_TO_INT(KBD_IRQ), | |
| +#else | |
| + I2C_BOARD_INFO(SH_KBD_I2C_DEVNAME, SH_KBD_I2C_SLAVE), | |
| + .type = SH_KBD_I2C_DEVNAME, | |
| + .irq = MSM_GPIO_TO_INT(KBD_IRQ), | |
| +#endif | |
| + .platform_data = &msm_kybd_data | |
| + }, | |
| +#ifdef CONFIG_MT9D112 | |
| + { | |
| + I2C_BOARD_INFO("mt9d112", 0x78 >> 1), | |
| + }, | |
| +#endif | |
| +#ifdef CONFIG_S5K3E2FX | |
| + { | |
| + I2C_BOARD_INFO("s5k3e2fx", 0x20 >> 1), | |
| + }, | |
| +#endif | |
| +#ifdef CONFIG_MT9P012 | |
| + { | |
| + I2C_BOARD_INFO("mt9p012", 0x6C >> 1), | |
| + }, | |
| +#endif | |
| +#if defined(CONFIG_MT9T013) || defined(CONFIG_SENSORS_MT9T013) | |
| + { | |
| + I2C_BOARD_INFO("mt9t013", 0x6C), | |
| + }, | |
| +#endif | |
| +#endif | |
| + { | |
| + I2C_BOARD_INFO("tps65023", 0x48), | |
| + }, | |
| +}; | |
| + | |
| +#ifdef CONFIG_MSM_CAMERA | |
| +static uint32_t camera_off_gpio_table[] = { | |
| + /* parallel CAMERA interfaces */ | |
| + GPIO_CFG(0, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT0 */ | |
| + GPIO_CFG(1, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT1 */ | |
| + GPIO_CFG(2, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT2 */ | |
| + GPIO_CFG(3, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT3 */ | |
| + GPIO_CFG(4, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT4 */ | |
| + GPIO_CFG(5, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT5 */ | |
| + GPIO_CFG(6, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT6 */ | |
| + GPIO_CFG(7, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT7 */ | |
| + GPIO_CFG(8, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT8 */ | |
| + GPIO_CFG(9, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT9 */ | |
| + GPIO_CFG(10, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT10 */ | |
| + GPIO_CFG(11, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT11 */ | |
| + GPIO_CFG(12, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* PCLK */ | |
| + GPIO_CFG(13, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* HSYNC_IN */ | |
| + GPIO_CFG(14, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* VSYNC_IN */ | |
| + GPIO_CFG(15, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* MCLK */ | |
| +}; | |
| + | |
| +static uint32_t camera_on_gpio_table[] = { | |
| + /* parallel CAMERA interfaces */ | |
| + GPIO_CFG(0, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT0 */ | |
| + GPIO_CFG(1, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT1 */ | |
| + GPIO_CFG(2, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT2 */ | |
| + GPIO_CFG(3, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT3 */ | |
| + GPIO_CFG(4, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT4 */ | |
| + GPIO_CFG(5, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT5 */ | |
| + GPIO_CFG(6, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT6 */ | |
| + GPIO_CFG(7, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT7 */ | |
| + GPIO_CFG(8, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT8 */ | |
| + GPIO_CFG(9, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT9 */ | |
| + GPIO_CFG(10, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT10 */ | |
| + GPIO_CFG(11, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT11 */ | |
| + GPIO_CFG(12, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* PCLK */ | |
| + GPIO_CFG(13, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* HSYNC_IN */ | |
| + GPIO_CFG(14, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* VSYNC_IN */ | |
| +#if 0 | |
| + GPIO_CFG(15, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_16MA), /* MCLK */ | |
| +#else | |
| + GPIO_CFG(15, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* MCLK */ | |
| +#endif | |
| +}; | |
| + | |
| +static uint32_t camera_on_gpio_ffa_table[] = { | |
| + /* parallel CAMERA interfaces */ | |
| + GPIO_CFG(95, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_16MA), /* I2C_SCL */ | |
| + GPIO_CFG(96, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_16MA), /* I2C_SDA */ | |
| + /* FFA front Sensor Reset */ | |
| + GPIO_CFG(137, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_16MA), | |
| + /* FFA front Sensor Standby */ | |
| + GPIO_CFG(134, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_16MA), | |
| +}; | |
| + | |
| +static uint32_t camera_off_gpio_ffa_table[] = { | |
| + /* FFA front Sensor Reset */ | |
| + GPIO_CFG(137, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_16MA), | |
| + /* FFA front Sensor Standby */ | |
| + GPIO_CFG(134, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_16MA), | |
| +}; | |
| + | |
| +static void config_gpio_table(uint32_t *table, int len) | |
| +{ | |
| + int n, rc; | |
| + for (n = 0; n < len; n++) { | |
| + rc = gpio_tlmm_config(table[n], GPIO_ENABLE); | |
| + if (rc) { | |
| + printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=%d\n", | |
| + __func__, table[n], rc); | |
| + break; | |
| + } | |
| + } | |
| +} | |
| + | |
| +static void msm_camera_vreg_config(void) | |
| +{ | |
| + struct vreg *vreg_gp2, *vreg_gp3; | |
| + int rc; | |
| + | |
| + vreg_gp2 = vreg_get(NULL, "gp2"); | |
| + if (IS_ERR(vreg_gp2)) { | |
| + printk(KERN_ERR "%s: vreg_get(%s) failed (%ld)\n", | |
| + __func__, "gp2", PTR_ERR(vreg_gp2)); | |
| + return; | |
| + } | |
| + | |
| + rc = vreg_set_level(vreg_gp2, 1800); | |
| + if (rc) { | |
| + printk(KERN_ERR "%s: vreg gp2 set level failed (%d)\n", | |
| + __func__, rc); | |
| + } | |
| + | |
| + rc = vreg_enable(vreg_gp2); | |
| + if (rc) { | |
| + printk(KERN_ERR "%s: vreg enable failed (%d)\n", | |
| + __func__, rc); | |
| + } | |
| + | |
| + vreg_gp3 = vreg_get(NULL, "gp3"); | |
| + if (IS_ERR(vreg_gp3)) { | |
| + printk(KERN_ERR "%s: vreg_get(%s) failed (%ld)\n", | |
| + __func__, "gp3", PTR_ERR(vreg_gp3)); | |
| + return; | |
| + } | |
| + | |
| + rc = vreg_set_level(vreg_gp3, 2800); | |
| + if (rc) { | |
| + printk(KERN_ERR "%s: vreg gp3 set level failed (%d)\n", | |
| + __func__, rc); | |
| + } | |
| + | |
| + rc = vreg_enable(vreg_gp3); | |
| + if (rc) { | |
| + printk(KERN_ERR "%s: vreg enable failed (%d)\n", | |
| + __func__, rc); | |
| + } | |
| +} | |
| + | |
| +static void config_camera_on_gpios(void) | |
| +{ | |
| + if (machine_is_qsd8x50_ffa()) { | |
| + config_gpio_table(camera_on_gpio_ffa_table, | |
| + ARRAY_SIZE(camera_on_gpio_ffa_table)); | |
| + | |
| + msm_camera_vreg_config(); | |
| + gpio_set_value(137, 0); | |
| + gpio_set_value(134, 1); | |
| + } | |
| + config_gpio_table(camera_on_gpio_table, | |
| + ARRAY_SIZE(camera_on_gpio_table)); | |
| +} | |
| + | |
| +static void config_camera_off_gpios(void) | |
| +{ | |
| + if (machine_is_qsd8x50_ffa()) { | |
| + config_gpio_table(camera_off_gpio_ffa_table, | |
| + ARRAY_SIZE(camera_off_gpio_ffa_table)); | |
| + } | |
| + config_gpio_table(camera_off_gpio_table, | |
| + ARRAY_SIZE(camera_off_gpio_table)); | |
| +} | |
| + | |
| +static struct resource msm_camera_resources[] = { | |
| + { | |
| + .start = 0xA0F00000, | |
| + .end = 0xA0F00000 + SZ_1M - 1, | |
| + .flags = IORESOURCE_MEM, | |
| + }, | |
| + { | |
| + .start = INT_VFE, | |
| + .end = INT_VFE, | |
| + .flags = IORESOURCE_IRQ, | |
| + }, | |
| +}; | |
| + | |
| +static struct msm_camera_device_platform_data msm_camera_device_data = { | |
| + .camera_gpio_on = config_camera_on_gpios, | |
| + .camera_gpio_off = config_camera_off_gpios, | |
| + .ioext.mdcphy = MSM_MDC_PHYS, | |
| + .ioext.mdcsz = MSM_MDC_SIZE, | |
| + .ioext.appphy = MSM_CLK_CTL_PHYS, | |
| + .ioext.appsz = MSM_CLK_CTL_SIZE, | |
| +}; | |
| + | |
| +#ifdef CONFIG_MT9D112 | |
| +static struct msm_camera_sensor_info msm_camera_sensor_mt9d112_data = { | |
| + .sensor_name = "mt9d112", | |
| + .sensor_reset = 17, | |
| + .sensor_pwd = 85, | |
| + .vcm_pwd = 0, | |
| + .pdata = &msm_camera_device_data, | |
| + .flash_type = MSM_CAMERA_FLASH_LED, | |
| + .resource = msm_camera_resources, | |
| + .num_resources = ARRAY_SIZE(msm_camera_resources) | |
| +}; | |
| + | |
| +static struct platform_device msm_camera_sensor_mt9d112 = { | |
| + .name = "msm_camera_mt9d112", | |
| + .dev = { | |
| + .platform_data = &msm_camera_sensor_mt9d112_data, | |
| + }, | |
| +}; | |
| +#endif | |
| + | |
| +#ifdef CONFIG_S5K3E2FX | |
| +static struct msm_camera_sensor_info msm_camera_sensor_s5k3e2fx_data = { | |
| + .sensor_name = "s5k3e2fx", | |
| + .sensor_reset = 17, | |
| + .sensor_pwd = 85, | |
| + .vcm_pwd = 0, | |
| + .pdata = &msm_camera_device_data, | |
| + .flash_type = MSM_CAMERA_FLASH_LED, | |
| + .resource = msm_camera_resources, | |
| + .num_resources = ARRAY_SIZE(msm_camera_resources) | |
| +}; | |
| + | |
| +static struct platform_device msm_camera_sensor_s5k3e2fx = { | |
| + .name = "msm_camera_s5k3e2fx", | |
| + .dev = { | |
| + .platform_data = &msm_camera_sensor_s5k3e2fx_data, | |
| + }, | |
| +}; | |
| +#endif | |
| + | |
| +#ifdef CONFIG_MT9P012 | |
| +#if 0 | |
| +static struct msm_camera_sensor_info msm_camera_sensor_mt9p012_data = { | |
| + .sensor_name = "mt9p012", | |
| + .sensor_reset = 17, | |
| + .sensor_pwd = 85, | |
| + .vcm_pwd = 88, | |
| + .pdata = &msm_camera_device_data, | |
| + .flash_type = MSM_CAMERA_FLASH_LED, | |
| + .resource = msm_camera_resources, | |
| + .num_resources = ARRAY_SIZE(msm_camera_resources) | |
| +}; | |
| + | |
| +static struct platform_device msm_camera_sensor_mt9p012 = { | |
| + .name = "msm_camera_mt9p012", | |
| + .dev = { | |
| + .platform_data = &msm_camera_sensor_mt9p012_data, | |
| + }, | |
| +}; | |
| +#endif | |
| +#endif | |
| + | |
| +#ifdef CONFIG_MT9T013 | |
| +#if 0 | |
| +static struct msm_camera_sensor_info msm_camera_sensor_mt9t013_data = { | |
| + .sensor_name = "mt9t013", | |
| + .sensor_reset = 17, | |
| + .sensor_pwd = 85, | |
| + .vcm_pwd = 0, | |
| + .pdata = &msm_camera_device_data, | |
| + .flash_type = MSM_CAMERA_FLASH_LED, | |
| + .resource = msm_camera_resources, | |
| + .num_resources = ARRAY_SIZE(msm_camera_resources) | |
| +}; | |
| + | |
| +static struct platform_device msm_camera_sensor_mt9t013 = { | |
| + .name = "msm_camera_mt9t013", | |
| + .dev = { | |
| + .platform_data = &msm_camera_sensor_mt9t013_data, | |
| + }, | |
| +}; | |
| +#endif | |
| +#endif | |
| +#endif /*CONFIG_MSM_CAMERA*/ | |
| + | |
| +static u32 msm_calculate_batt_capacity(u32 current_voltage); | |
| + | |
| +static struct msm_psy_batt_pdata msm_psy_batt_data = { | |
| + .voltage_min_design = 3200, | |
| + .voltage_max_design = 4200, | |
| + .avail_chg_sources = AC_CHG | USB_CHG , | |
| + .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION, | |
| + .calculate_capacity = &msm_calculate_batt_capacity, | |
| +}; | |
| + | |
| +static u32 msm_calculate_batt_capacity(u32 current_voltage) | |
| +{ | |
| + u32 low_voltage = msm_psy_batt_data.voltage_min_design; | |
| + u32 high_voltage = msm_psy_batt_data.voltage_max_design; | |
| + | |
| + return (current_voltage - low_voltage) * 100 | |
| + / (high_voltage - low_voltage); | |
| +} | |
| + | |
| +static struct platform_device msm_batt_device = { | |
| + .name = "msm-battery", | |
| + .id = -1, | |
| + .dev.platform_data = &msm_psy_batt_data, | |
| +}; | |
| + | |
| + | |
| +static struct platform_device *devices[] __initdata = { | |
| + &msm_fb_device, | |
| + &mddi_toshiba_device, | |
| + &smc91x_device, | |
| + &s1r72v05_device, | |
| + &msm_device_smd, | |
| + &msm_device_dmov, | |
| + &android_pmem_kernel_ebi1_device, | |
| + &android_pmem_device, | |
| + &android_pmem_adsp_device, | |
| + &android_pmem_gpu0_device, | |
| + &android_pmem_gpu1_device, | |
| + &msm_device_nand, | |
| + &msm_device_i2c, | |
| + &qsd_device_spi, | |
| + &msm_device_hsusb_peripheral, | |
| + &mass_storage_device, | |
| + &msm_device_tssc, | |
| + &msm_audio_device, | |
| + &msm_device_uart_dm1, | |
| + &msm_bluesleep_device, | |
| +#if 0 | |
| +#ifdef CONFIG_BT | |
| +/* &msm_bt_power_device,*/ | |
| + &bc7_power_device, | |
| +#endif | |
| +#endif | |
| +#if !defined(CONFIG_MSM_SERIAL_DEBUGGER) | |
| + &msm_device_uart3, | |
| +#endif | |
| + &msm_device_pmic_leds, | |
| + &msm_device_kgsl, | |
| + &hs_device, | |
| + | |
| + &sh_pm_device, | |
| + &sh_hs_device, | |
| + | |
| +#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) | |
| + &msm_device_tsif, | |
| +#endif | |
| +#ifdef CONFIG_MT9T013 | |
| + //&msm_camera_sensor_mt9t013, | |
| +#endif | |
| +#ifdef CONFIG_MT9D112 | |
| + &msm_camera_sensor_mt9d112, | |
| +#endif | |
| +#ifdef CONFIG_S5K3E2FX | |
| + &msm_camera_sensor_s5k3e2fx, | |
| +#endif | |
| +#ifdef CONFIG_MT9P012 | |
| + //&msm_camera_sensor_mt9p012, | |
| +#endif | |
| + | |
| + &msm_batt_device, | |
| +#if 1 | |
| + &msm_device_sh_battery, | |
| +#endif | |
| + | |
| +}; | |
| + | |
| +static void __init qsd8x50_init_irq(void) | |
| +{ | |
| + msm_init_irq(); | |
| + msm_init_sirc(); | |
| +} | |
| + | |
| +static void kgsl_phys_memory_init(void) | |
| +{ | |
| + request_mem_region(kgsl_resources[1].start, | |
| + resource_size(&kgsl_resources[1]), "kgsl"); | |
| +} | |
| + | |
| +static void __init qsd8x50_init_host(void) | |
| +{ | |
| + if (machine_is_qsd8x50_ffa()) | |
| + return; | |
| + | |
| + vreg_usb = vreg_get(NULL, "boost"); | |
| + | |
| + if (IS_ERR(vreg_usb)) { | |
| + printk(KERN_ERR "%s: vreg get failed (%ld)\n", | |
| + __func__, PTR_ERR(vreg_usb)); | |
| + return; | |
| + } | |
| + | |
| + platform_device_register(&msm_device_hsusb_otg); | |
| + msm_add_host(0, &msm_usb_host_pdata); | |
| +#ifdef CONFIG_USB_FS_HOST | |
| + if (fsusb_gpio_init()) | |
| + return; | |
| + msm_add_host(1, &msm_usb_host2_pdata); | |
| +#endif | |
| +} | |
| +static void sdcc_gpio_init(void) | |
| +{ | |
| + /* SDC1 GPIOs */ | |
| +#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT | |
| + if (gpio_request(51, "sdc1_data_3")) | |
| + pr_err("failed to request gpio sdc1_data_3\n"); | |
| + if (gpio_request(52, "sdc1_data_2")) | |
| + pr_err("failed to request gpio sdc1_data_2\n"); | |
| + if (gpio_request(53, "sdc1_data_1")) | |
| + pr_err("failed to request gpio sdc1_data_1\n"); | |
| + if (gpio_request(54, "sdc1_data_0")) | |
| + pr_err("failed to request gpio sdc1_data_0\n"); | |
| + if (gpio_request(55, "sdc1_cmd")) | |
| + pr_err("failed to request gpio sdc1_cmd\n"); | |
| + if (gpio_request(56, "sdc1_clk")) | |
| + pr_err("failed to request gpio sdc1_clk\n"); | |
| +#endif | |
| + | |
| + if (machine_is_qsd8x50_ffa()) | |
| + return; | |
| + | |
| + /* SDC2 GPIOs */ | |
| +#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT | |
| + if (gpio_request(62, "sdc2_clk")) | |
| + pr_err("failed to request gpio sdc2_clk\n"); | |
| + if (gpio_request(63, "sdc2_cmd")) | |
| + pr_err("failed to request gpio sdc2_cmd\n"); | |
| + if (gpio_request(64, "sdc2_data_3")) | |
| + pr_err("failed to request gpio sdc2_data_3\n"); | |
| + if (gpio_request(65, "sdc2_data_2")) | |
| + pr_err("failed to request gpio sdc2_data_2\n"); | |
| + if (gpio_request(66, "sdc2_data_1")) | |
| + pr_err("failed to request gpio sdc2_data_1\n"); | |
| + if (gpio_request(67, "sdc2_data_0")) | |
| + pr_err("failed to request gpio sdc2_data_0\n"); | |
| +#endif | |
| + | |
| + /* SDC3 GPIOs */ | |
| +#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT | |
| + if (gpio_request(88, "sdc3_clk")) | |
| + pr_err("failed to request gpio sdc3_clk\n"); | |
| + if (gpio_request(89, "sdc3_cmd")) | |
| + pr_err("failed to request gpio sdc3_cmd\n"); | |
| + if (gpio_request(90, "sdc3_data_3")) | |
| + pr_err("failed to request gpio sdc3_data_3\n"); | |
| + if (gpio_request(91, "sdc3_data_2")) | |
| + pr_err("failed to request gpio sdc3_data_2\n"); | |
| + if (gpio_request(92, "sdc3_data_1")) | |
| + pr_err("failed to request gpio sdc3_data_1\n"); | |
| + if (gpio_request(93, "sdc3_data_0")) | |
| + pr_err("failed to request gpio sdc3_data_0\n"); | |
| +#endif | |
| + | |
| + /* SDC4 GPIOs */ | |
| +#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT | |
| + if (gpio_request(142, "sdc4_clk")) | |
| + pr_err("failed to request gpio sdc4_clk\n"); | |
| + if (gpio_request(143, "sdc4_cmd")) | |
| + pr_err("failed to request gpio sdc4_cmd\n"); | |
| + if (gpio_request(144, "sdc4_data_0")) | |
| + pr_err("failed to request gpio sdc4_data_0\n"); | |
| + if (gpio_request(145, "sdc4_data_1")) | |
| + pr_err("failed to request gpio sdc4_data_1\n"); | |
| + if (gpio_request(146, "sdc4_data_2")) | |
| + pr_err("failed to request gpio sdc4_data_2\n"); | |
| + if (gpio_request(147, "sdc4_data_3")) | |
| + pr_err("failed to request gpio sdc4_data_3\n"); | |
| +#endif | |
| +} | |
| + | |
| +static unsigned sdcc_cfg_data[][6] = { | |
| + /* SDC1 configs */ | |
| + { | |
| + GPIO_CFG(51, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(52, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(53, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(54, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(55, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(56, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), | |
| + }, | |
| + /* SDC2 configs */ | |
| + { | |
| + GPIO_CFG(62, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), | |
| + GPIO_CFG(63, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(64, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(65, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(66, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(67, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + }, | |
| + /* SDC3 configs */ | |
| + { | |
| + GPIO_CFG(88, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), | |
| + GPIO_CFG(89, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(90, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(91, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(92, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(93, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + }, | |
| + /* SDC4 configs */ | |
| + { | |
| + GPIO_CFG(142, 3, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), | |
| + GPIO_CFG(143, 3, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(144, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(145, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(146, 3, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + GPIO_CFG(147, 3, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| + } | |
| +}; | |
| + | |
| +static unsigned long vreg_sts, gpio_sts; | |
| +static struct vreg *vreg_mmc; | |
| + | |
| +static void msm_sdcc_setup_gpio(int dev_id, unsigned int enable) | |
| +{ | |
| + int i, rc; | |
| + | |
| + if (!(test_bit(dev_id, &gpio_sts)^enable)) | |
| + return; | |
| + | |
| + if (enable) | |
| + set_bit(dev_id, &gpio_sts); | |
| + else | |
| + clear_bit(dev_id, &gpio_sts); | |
| + | |
| + for (i = 0; i < ARRAY_SIZE(sdcc_cfg_data[dev_id - 1]); i++) { | |
| + rc = gpio_tlmm_config(sdcc_cfg_data[dev_id - 1][i], | |
| + enable ? GPIO_ENABLE : GPIO_DISABLE); | |
| + if (rc) | |
| + printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=%d\n", | |
| + __func__, sdcc_cfg_data[dev_id - 1][i], rc); | |
| + } | |
| +} | |
| + | |
| +static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd) | |
| +{ | |
| + int rc = 0; | |
| + struct platform_device *pdev; | |
| + | |
| + pdev = container_of(dv, struct platform_device, dev); | |
| + msm_sdcc_setup_gpio(pdev->id, !!vdd); | |
| + | |
| + | |
| + | |
| + if( pdev->id == 1 ) | |
| + return 0; | |
| + | |
| + | |
| + | |
| + if (vdd == 0) { | |
| + if (!vreg_sts) | |
| + return 0; | |
| + | |
| + clear_bit(pdev->id, &vreg_sts); | |
| + | |
| + if (!vreg_sts) { | |
| + rc = vreg_disable(vreg_mmc); | |
| + | |
| + shterm_k_set_info(SHTERM_INFO_GBNAND, 0); | |
| + | |
| + if (rc) | |
| + printk(KERN_ERR "%s: return val: %d \n", | |
| + __func__, rc); | |
| + } | |
| + return 0; | |
| + } | |
| + | |
| + if (!vreg_sts) { | |
| + rc = vreg_set_level(vreg_mmc, PMIC_VREG_GP6_LEVEL); | |
| + if (!rc) | |
| + rc = vreg_enable(vreg_mmc); | |
| + | |
| + shterm_k_set_info(SHTERM_INFO_GBNAND, 1); | |
| + | |
| + if (rc) | |
| + printk(KERN_ERR "%s: return val: %d \n", | |
| + __func__, rc); | |
| + } | |
| + set_bit(pdev->id, &vreg_sts); | |
| + return 0; | |
| +} | |
| + | |
| +#if 0 | |
| +static struct mmc_platform_data qsd8x50_sdcc_data = { | |
| + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, | |
| + .translate_vdd = msm_sdcc_setup_power, | |
| +}; | |
| +#else | |
| +#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT | |
| +static struct mmc_platform_data qsd8x50_sdc1_data = { | |
| + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, | |
| + .translate_vdd = msm_sdcc_setup_power, | |
| + .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
| +#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT | |
| + .sdiowakeup_irq = MSM_GPIO_TO_INT(53), | |
| +#endif | |
| +}; | |
| +#endif | |
| + | |
| +#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT | |
| +static struct mmc_platform_data qsd8x50_sdc2_data = { | |
| + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, | |
| + .translate_vdd = msm_sdcc_setup_power, | |
| + .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
| +}; | |
| +#endif | |
| + | |
| +#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT | |
| +static struct mmc_platform_data qsd8x50_sdc3_data = { | |
| + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, | |
| + .translate_vdd = msm_sdcc_setup_power, | |
| + .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
| +}; | |
| +#endif | |
| + | |
| +#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT | |
| +static struct mmc_platform_data qsd8x50_sdc4_data = { | |
| + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, | |
| + .translate_vdd = msm_sdcc_setup_power, | |
| + .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
| +}; | |
| +#endif | |
| +#endif | |
| + | |
| +static void __init qsd8x50_init_mmc(void) | |
| +{ | |
| + if (machine_is_qsd8x50_ffa()) | |
| + vreg_mmc = vreg_get(NULL, "gp6"); | |
| + else | |
| + vreg_mmc = vreg_get(NULL, "gp5"); | |
| + | |
| + if (IS_ERR(vreg_mmc)) { | |
| + printk(KERN_ERR "%s: vreg get failed (%ld)\n", | |
| + __func__, PTR_ERR(vreg_mmc)); | |
| + return; | |
| + } | |
| + | |
| + sdcc_gpio_init(); | |
| +#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT | |
| + | |
| +#if 0 | |
| + msm_add_sdcc(1, &qsd8x50_sdcc_data); | |
| +#else | |
| + | |
| +#if 0 | |
| + msm_add_sdcc(1, &qsd8x50_sdcc_data, 0, 0); | |
| +#else | |
| + //msm_add_sdcc(2, &qsd8x50_sdcc_data, 0, 0); | |
| + msm_add_sdcc(2, &qsd8x50_sdc2_data, 0, 0); | |
| +#endif | |
| + | |
| +#endif | |
| + | |
| +#endif | |
| + | |
| + | |
| +#if 0 | |
| + if (machine_is_qsd8x50_surf()) { | |
| +#else | |
| + if (1){ | |
| +#endif | |
| + | |
| + | |
| +#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT | |
| + | |
| +#if 0 | |
| + msm_add_sdcc(2, &qsd8x50_sdcc_data); | |
| +#else | |
| + | |
| +#if 0 | |
| + msm_add_sdcc(2, &qsd8x50_sdcc_data, 0, 0); | |
| +#else | |
| +// msm_add_sdcc(1, &qsd8x50_sdcc_data, 0, 0); | |
| + msm_add_sdcc(1, &qsd8x50_sdc1_data, 0, 0); | |
| +#endif | |
| + | |
| +#endif | |
| + | |
| +#endif | |
| +#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT | |
| + | |
| +#if 0 | |
| + msm_add_sdcc(3, &qsd8x50_sdcc_data); | |
| +#else | |
| +// msm_add_sdcc(3, &qsd8x50_sdcc_data, 0, 0); | |
| + msm_add_sdcc(3, &qsd8x50_sdc3_data, 0, 0); | |
| +#endif | |
| + | |
| +#endif | |
| +#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT | |
| + | |
| +#if 0 | |
| + msm_add_sdcc(4, &qsd8x50_sdcc_data); | |
| +#else | |
| +// msm_add_sdcc(4, &qsd8x50_sdcc_data, 0, 0); | |
| + msm_add_sdcc(4, &qsd8x50_sdc4_data, 0, 0); | |
| +#endif | |
| + | |
| +#endif | |
| + } | |
| + | |
| +} | |
| + | |
| +static void __init qsd8x50_cfg_smc91x(void) | |
| +{ | |
| + int rc = 0; | |
| + | |
| + if (machine_is_qsd8x50_surf()) { | |
| + smc91x_resources[0].start = 0x70000300; | |
| + smc91x_resources[0].end = 0x700003ff; | |
| + smc91x_resources[1].start = MSM_GPIO_TO_INT(156); | |
| + smc91x_resources[1].end = MSM_GPIO_TO_INT(156); | |
| + } else if (machine_is_qsd8x50_ffa()) { | |
| + smc91x_resources[0].start = 0x84000300; | |
| + smc91x_resources[0].end = 0x840003ff; | |
| + smc91x_resources[1].start = MSM_GPIO_TO_INT(87); | |
| + smc91x_resources[1].end = MSM_GPIO_TO_INT(87); | |
| + | |
| + rc = gpio_tlmm_config(GPIO_CFG(87, 0, GPIO_INPUT, | |
| + GPIO_PULL_DOWN, GPIO_2MA), | |
| + GPIO_ENABLE); | |
| + if (rc) { | |
| + printk(KERN_ERR "%s: gpio_tlmm_config=%d\n", | |
| + __func__, rc); | |
| + } | |
| + } else | |
| + printk(KERN_ERR "%s: invalid machine type\n", __func__); | |
| +} | |
| + | |
| +static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR] = { | |
| + [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].supported = 1, | |
| + [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].suspend_enabled = 1, | |
| + [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].idle_enabled = 1, | |
| + [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].latency = 8594, | |
| + [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].residency = 23740, | |
| + | |
| + [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].supported = 1, | |
| + [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].suspend_enabled = 1, | |
| + [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].idle_enabled = 1, | |
| + [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].latency = 4594, | |
| + [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].residency = 23740, | |
| + | |
| + [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].supported = 1, | |
| + [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].suspend_enabled | |
| + = 1, | |
| + [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].idle_enabled = 0, | |
| + [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency = 443, | |
| + [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].residency = 1098, | |
| + | |
| + [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].supported = 1, | |
| + [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].suspend_enabled = 1, | |
| + [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].idle_enabled = 1, | |
| + [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].latency = 2, | |
| + [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].residency = 0, | |
| +}; | |
| + | |
| +static void | |
| +msm_i2c_gpio_config(int iface, int config_type) | |
| +{ | |
| + int gpio_scl; | |
| + int gpio_sda; | |
| + if (iface) { | |
| + gpio_scl = 60; | |
| + gpio_sda = 61; | |
| + } else { | |
| + gpio_scl = 95; | |
| + gpio_sda = 96; | |
| + } | |
| + if (config_type) { | |
| +#if 1 | |
| + gpio_tlmm_config(GPIO_CFG(gpio_scl, 1, GPIO_INPUT, | |
| + GPIO_NO_PULL, GPIO_2MA), GPIO_ENABLE); | |
| + gpio_tlmm_config(GPIO_CFG(gpio_sda, 1, GPIO_INPUT, | |
| + GPIO_NO_PULL, GPIO_2MA), GPIO_ENABLE); | |
| +#else | |
| + gpio_tlmm_config(GPIO_CFG(gpio_scl, 1, GPIO_INPUT, | |
| + GPIO_NO_PULL, GPIO_16MA), GPIO_ENABLE); | |
| + gpio_tlmm_config(GPIO_CFG(gpio_sda, 1, GPIO_INPUT, | |
| + GPIO_NO_PULL, GPIO_16MA), GPIO_ENABLE); | |
| +#endif | |
| + } else { | |
| +#if 1 | |
| + gpio_tlmm_config(GPIO_CFG(gpio_scl, 0, GPIO_OUTPUT, | |
| + GPIO_NO_PULL, GPIO_2MA), GPIO_ENABLE); | |
| + gpio_tlmm_config(GPIO_CFG(gpio_sda, 0, GPIO_OUTPUT, | |
| + GPIO_NO_PULL, GPIO_2MA), GPIO_ENABLE); | |
| +#else | |
| + gpio_tlmm_config(GPIO_CFG(gpio_scl, 0, GPIO_OUTPUT, | |
| + GPIO_NO_PULL, GPIO_16MA), GPIO_ENABLE); | |
| + gpio_tlmm_config(GPIO_CFG(gpio_sda, 0, GPIO_OUTPUT, | |
| + GPIO_NO_PULL, GPIO_16MA), GPIO_ENABLE); | |
| +#endif | |
| + } | |
| +} | |
| + | |
| +static struct msm_i2c_platform_data msm_i2c_pdata = { | |
| +#if 1 | |
| + .clk_freq = 360000, | |
| +#else | |
| + .clk_freq = 100000, | |
| +#endif | |
| + .rsl_id = SMEM_SPINLOCK_I2C, | |
| + .pri_clk = 95, | |
| + .pri_dat = 96, | |
| + .aux_clk = 60, | |
| + .aux_dat = 61, | |
| + .msm_i2c_config_gpio = msm_i2c_gpio_config, | |
| +}; | |
| + | |
| +static void __init msm_device_i2c_init(void) | |
| +{ | |
| + if (gpio_request(95, "i2c_pri_clk")) | |
| + pr_err("failed to request gpio i2c_pri_clk\n"); | |
| + if (gpio_request(96, "i2c_pri_dat")) | |
| + pr_err("failed to request gpio i2c_pri_dat\n"); | |
| + if (gpio_request(60, "i2c_sec_clk")) | |
| + pr_err("failed to request gpio i2c_sec_clk\n"); | |
| + if (gpio_request(61, "i2c_sec_dat")) | |
| + pr_err("failed to request gpio i2c_sec_dat\n"); | |
| + | |
| + msm_i2c_pdata.rmutex = (uint32_t *)smem_alloc(SMEM_I2C_MUTEX, 8); | |
| + msm_i2c_pdata.pm_lat = | |
| + msm_pm_data[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] | |
| + .latency; | |
| + msm_device_i2c.dev.platform_data = &msm_i2c_pdata; | |
| +} | |
| + | |
| +static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE; | |
| +static void __init pmem_kernel_ebi1_size_setup(char **p) | |
| +{ | |
| + pmem_kernel_ebi1_size = memparse(*p, p); | |
| +} | |
| +__early_param("pmem_kernel_ebi1_size=", pmem_kernel_ebi1_size_setup); | |
| + | |
| +static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE; | |
| +static void __init pmem_mdp_size_setup(char **p) | |
| +{ | |
| + pmem_mdp_size = memparse(*p, p); | |
| +} | |
| +__early_param("pmem_mdp_size=", pmem_mdp_size_setup); | |
| + | |
| +static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE; | |
| +static void __init pmem_adsp_size_setup(char **p) | |
| +{ | |
| + pmem_adsp_size = memparse(*p, p); | |
| +} | |
| +__early_param("pmem_adsp_size=", pmem_adsp_size_setup); | |
| + | |
| +static unsigned pmem_gpu1_size = MSM_PMEM_GPU1_SIZE; | |
| +static void __init pmem_gpu1_size_setup(char **p) | |
| +{ | |
| + pmem_gpu1_size = memparse(*p, p); | |
| +} | |
| +__early_param("pmem_gpu1_size=", pmem_gpu1_size_setup); | |
| + | |
| +static unsigned audio_size = MSM_AUDIO_SIZE; | |
| +static void __init audio_size_setup(char **p) | |
| +{ | |
| + audio_size = memparse(*p, p); | |
| +} | |
| +__early_param("audio_size=", audio_size_setup); | |
| + | |
| +static void __init qsd8x50_init(void) | |
| +{ | |
| + if (socinfo_init() < 0) | |
| + printk(KERN_ERR "%s: socinfo_init() failed!\n", | |
| + __func__); | |
| + qsd8x50_cfg_smc91x(); | |
| + msm_acpu_clock_init(&qsd8x50_clock_data); | |
| + | |
| + msm_hsusb_pdata.swfi_latency = | |
| + msm_pm_data | |
| + [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency; | |
| + msm_device_hsusb_peripheral.dev.platform_data = &msm_hsusb_pdata; | |
| +#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) | |
| + msm_device_tsif.dev.platform_data = &tsif_platform_data; | |
| +#endif | |
| + platform_add_devices(devices, ARRAY_SIZE(devices)); | |
| + msm_fb_add_devices(); | |
| +#ifdef CONFIG_MSM_CAMERA | |
| + config_camera_off_gpios(); /* might not be necessary */ | |
| +#endif | |
| + qsd8x50_init_host(); | |
| + qsd8x50_init_mmc(); | |
| +#ifdef CONFIG_BT | |
| +/* bt_power_init();*/ | |
| + #if 0 | |
| + bc7_power_init(); | |
| + #endif | |
| +#endif | |
| + audio_gpio_init(); | |
| + msm_device_i2c_init(); | |
| + msm_qsd_spi_init(); | |
| + i2c_register_board_info(0, msm_i2c_board_info, | |
| + ARRAY_SIZE(msm_i2c_board_info)); | |
| + spi_register_board_info(msm_spi_board_info, | |
| + ARRAY_SIZE(msm_spi_board_info)); | |
| + msm_pm_set_platform_data(msm_pm_data); | |
| + kgsl_phys_memory_init(); | |
| + | |
| +#ifdef CONFIG_SURF_FFA_GPIO_KEYPAD | |
| + if (machine_is_qsd8x50_ffa()) | |
| + platform_device_register(&keypad_device_8k_ffa); | |
| + else | |
| + platform_device_register(&keypad_device_surf); | |
| +#endif | |
| + | |
| +#if 1 | |
| + msm_init_pmic_vibrator(); | |
| +#endif | |
| + | |
| +} | |
| + | |
| +static void __init qsd8x50_allocate_memory_regions(void) | |
| +{ | |
| + void *addr; | |
| + unsigned long size; | |
| + | |
| + size = pmem_kernel_ebi1_size; | |
| + if (size) { | |
| + addr = alloc_bootmem_aligned(size, 0x100000); | |
| + android_pmem_kernel_ebi1_pdata.start = __pa(addr); | |
| + android_pmem_kernel_ebi1_pdata.size = size; | |
| + pr_info("allocating %lu bytes at %p (%lx physical) for kernel" | |
| + " ebi1 pmem arena\n", size, addr, __pa(addr)); | |
| + } | |
| + | |
| + size = pmem_mdp_size; | |
| + if (size) { | |
| + addr = alloc_bootmem(size); | |
| + android_pmem_pdata.start = __pa(addr); | |
| + android_pmem_pdata.size = size; | |
| + pr_info("allocating %lu bytes at %p (%lx physical) for mdp " | |
| + "pmem arena\n", size, addr, __pa(addr)); | |
| + } | |
| + | |
| + size = pmem_adsp_size; | |
| + if (size) { | |
| + addr = alloc_bootmem(size); | |
| + android_pmem_adsp_pdata.start = __pa(addr); | |
| + android_pmem_adsp_pdata.size = size; | |
| + pr_info("allocating %lu bytes at %p (%lx physical) for adsp " | |
| + "pmem arena\n", size, addr, __pa(addr)); | |
| + } | |
| + | |
| + size = pmem_gpu1_size; | |
| + if (size) { | |
| + addr = alloc_bootmem_aligned(size, 0x100000); | |
| + android_pmem_gpu1_pdata.start = __pa(addr); | |
| + android_pmem_gpu1_pdata.size = size; | |
| + pr_info("allocating %lu bytes at %p (%lx physical) for gpu1 " | |
| + "pmem arena\n", size, addr, __pa(addr)); | |
| + } | |
| + | |
| + size = MSM_FB_SIZE; | |
| + addr = (void *)MSM_FB_BASE; | |
| + msm_fb_resources[0].start = (unsigned long)addr; | |
| + msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1; | |
| + pr_info("using %lu bytes of SMI at %lx physical for fb\n", | |
| + size, (unsigned long)addr); | |
| + | |
| + size = audio_size ? : MSM_AUDIO_SIZE; | |
| + addr = alloc_bootmem(size); | |
| + msm_audio_resources[0].start = __pa(addr); | |
| + msm_audio_resources[0].end = msm_audio_resources[0].start + size - 1; | |
| + pr_info("allocating %lu bytes at %p (%lx physical) for audio\n", | |
| + size, addr, __pa(addr)); | |
| +} | |
| + | |
| +static void __init qsd8x50_map_io(void) | |
| +{ | |
| + msm_map_qsd8x50_io(); | |
| + qsd8x50_allocate_memory_regions(); | |
| + msm_clock_init(msm_clocks_8x50, msm_num_clocks_8x50); | |
| +} | |
| + | |
| +MACHINE_START(DECKARD, "SHARP DECKARD") | |
| +#ifdef CONFIG_MSM_DEBUG_UART | |
| + .phys_io = MSM_DEBUG_UART_PHYS, | |
| + .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, | |
| +#endif | |
| + .boot_params = 0x20000100, | |
| + .map_io = qsd8x50_map_io, | |
| + .init_irq = qsd8x50_init_irq, | |
| + .init_machine = qsd8x50_init, | |
| + .timer = &msm_timer, | |
| +MACHINE_END | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-halibut-panel.c kernel/arch/arm/mach-msm/board-halibut-panel.c | |
| --- kernel-msm/arch/arm/mach-msm/board-halibut-panel.c 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-halibut-panel.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -0,0 +1,79 @@ | |
| +/* linux/arch/arm/mach-msm/board-halibut-mddi.c | |
| +** Author: Brian Swetland <swetland@google.com> | |
| +*/ | |
| + | |
| +#include <linux/kernel.h> | |
| +#include <linux/init.h> | |
| +#include <linux/platform_device.h> | |
| +#include <linux/delay.h> | |
| +#include <linux/leds.h> | |
| +#include <linux/clk.h> | |
| +#include <linux/err.h> | |
| +#include <linux/bootmem.h> | |
| + | |
| +#include <asm/io.h> | |
| +#include <asm/gpio.h> | |
| +#include <asm/mach-types.h> | |
| + | |
| +#include <mach/msm_fb.h> | |
| +#include <mach/vreg.h> | |
| + | |
| +#include "proc_comm.h" | |
| +#include "devices.h" | |
| +#include "board-halibut.h" | |
| + | |
| +#if 0 | |
| +static void halibut_mddi_power_client(struct msm_mddi_client_data *mddi, | |
| + int on) | |
| +{ | |
| +} | |
| + | |
| +static struct resource resources_msm_fb = { | |
| + .start = MSM_FB_BASE, | |
| + .end = MSM_FB_BASE + MSM_FB_SIZE - 1, | |
| + .flags = IORESOURCE_MEM, | |
| +}; | |
| + | |
| +static struct msm_fb_data fb_data = { | |
| + .xres = 800, | |
| + .yres = 480, | |
| + .output_format = 0, | |
| +}; | |
| + | |
| +static struct msm_mddi_platform_data mddi_pdata = { | |
| + .clk_rate = 122880000, | |
| + .power_client = halibut_mddi_power_client, | |
| + .fb_resource = &resources_msm_fb, | |
| + .num_clients = 1, | |
| + .client_platform_data = { | |
| + { | |
| + .product_id = (0x4474 << 16 | 0xc065), | |
| + .name = "mddi_c_dummy", | |
| + .id = 0, | |
| + .client_data = &fb_data, | |
| + .clk_rate = 0, | |
| + }, | |
| + }, | |
| +}; | |
| +#endif | |
| + | |
| +int __init halibut_init_panel(void) | |
| +{ | |
| +#if 0 | |
| + int rc; | |
| + | |
| + if (!machine_is_halibut()) | |
| + return 0; | |
| + | |
| + rc = platform_device_register(&msm_device_mdp); | |
| + if (rc) | |
| + return rc; | |
| + | |
| + msm_device_mddi0.dev.platform_data = &mddi_pdata; | |
| + return platform_device_register(&msm_device_mddi0); | |
| +#endif | |
| + panic("no msm_device_mdp in build"); | |
| + return 0; | |
| +} | |
| + | |
| +device_initcall(halibut_init_panel); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-halibut.c kernel/arch/arm/mach-msm/board-halibut.c | |
| --- kernel-msm/arch/arm/mach-msm/board-halibut.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-halibut.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1196,25 +1196,29 @@ | |
| printk(KERN_ERR "%s: vreg get failed (%ld)\n", | |
| __func__, PTR_ERR(vreg_mmc)); | |
| return; | |
| } | |
| } | |
| sdcc_gpio_init(); | |
| #ifdef CONFIG_MMC_MSM_SDC1_SUPPORT | |
| - msm_add_sdcc(1, &halibut_sdcc_data); | |
| + msm_add_sdcc(1, &halibut_sdcc_data, 0, 0); | |
| +#endif | |
| +#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION | |
| + msm_add_sdcc(1, &halibut_sdcc_data, MSM_GPIO_TO_INT(49), | |
| + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING); | |
| #endif | |
| if (machine_is_msm7201a_surf()) { | |
| #ifdef CONFIG_MMC_MSM_SDC2_SUPPORT | |
| - msm_add_sdcc(2, &halibut_sdcc_data); | |
| + msm_add_sdcc(2, &halibut_sdcc_data, 0, 0); | |
| #endif | |
| #ifdef CONFIG_MMC_MSM_SDC4_SUPPORT | |
| - msm_add_sdcc(4, &halibut_sdcc_data); | |
| + msm_add_sdcc(4, &halibut_sdcc_data, 0, 0); | |
| #endif | |
| } | |
| } | |
| static struct msm_panel_common_pdata mdp_pdata = { | |
| .gpio = 97, | |
| }; | |
| @@ -1304,16 +1308,17 @@ | |
| halibut_clock_data.max_axi_khz = 160000; | |
| msm_acpu_clock_init(&halibut_clock_data); | |
| #if defined(CONFIG_MSM_SERIAL_DEBUGGER) | |
| msm_serial_debug_init(MSM_UART3_PHYS, INT_UART3, | |
| &msm_device_uart3.dev, 1); | |
| #endif | |
| + msm_hsusb_pdata.max_axi_khz = clk_get_max_axi_khz(); | |
| msm_hsusb_pdata.soc_version = socinfo_get_version(); | |
| #ifdef CONFIG_MSM_CAMERA | |
| config_camera_off_gpios(); /* might not be necessary */ | |
| #endif | |
| i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices)); | |
| msm_device_hsusb_peripheral.dev.platform_data = &msm_hsusb_pdata, | |
| msm_device_hsusb_host.dev.platform_data = &msm_hsusb_pdata, | |
| platform_add_devices(devices, ARRAY_SIZE(devices)); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-halibut.h kernel/arch/arm/mach-msm/board-halibut.h | |
| --- kernel-msm/arch/arm/mach-msm/board-halibut.h 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-halibut.h 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -0,0 +1,20 @@ | |
| +/* linux/arch/arm/mach-msm/board-trout.h | |
| + * ** Author: Brian Swetland <swetland@google.com> | |
| + * */ | |
| +#ifndef __ARCH_ARM_MACH_MSM_BOARD_HALIBUT_H | |
| +#define __ARCH_ARM_MACH_MSM_BOARD_HALIBUT_H | |
| + | |
| +#define MSM_PMEM_GPU0_BASE (0x10000000 + 64*SZ_1M) | |
| +#define MSM_PMEM_GPU0_SIZE 0x800000 | |
| +#define MSM_PMEM_MDP_BASE (MSM_PMEM_GPU0_BASE + MSM_PMEM_GPU0_SIZE) | |
| +#define MSM_PMEM_MDP_SIZE 0x800000 | |
| +#define MSM_PMEM_ADSP_BASE (MSM_PMEM_MDP_BASE + MSM_PMEM_MDP_SIZE) | |
| +#define MSM_PMEM_ADSP_SIZE 0x800000 | |
| +#define MSM_PMEM_GPU1_BASE (MSM_PMEM_ADSP_BASE + MSM_PMEM_ADSP_SIZE) | |
| +#define MSM_PMEM_GPU1_SIZE 0x800000 | |
| +#define MSM_FB_BASE (MSM_PMEM_GPU1_BASE + MSM_PMEM_GPU1_SIZE) | |
| +#define MSM_FB_SIZE 0x200000 | |
| +#define MSM_PMEM_CAMERA_BASE (MSM_FB_BASE + MSM_FB_SIZE) | |
| +#define MSM_PMEM_CAMERA_SIZE 0xA00000 | |
| + | |
| +#endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-msm7x27.c kernel/arch/arm/mach-msm/board-msm7x27.c | |
| --- kernel-msm/arch/arm/mach-msm/board-msm7x27.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-msm7x27.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -64,31 +64,32 @@ | |
| #endif | |
| #include "pm.h" | |
| #ifdef CONFIG_ARCH_MSM7X27 | |
| #include <linux/msm_kgsl.h> | |
| #endif | |
| #ifdef CONFIG_ARCH_MSM7X25 | |
| -#define MSM_PMEM_MDP_SIZE 0x800000 | |
| -#define MSM_PMEM_ADSP_SIZE 0x800000 | |
| -#define MSM_PMEM_GPU1_SIZE 0x800000 | |
| +#define MSM_PMEM_MDP_SIZE 0xb21000 | |
| +#define MSM_PMEM_ADSP_SIZE 0x97b000 | |
| #define MSM_FB_SIZE 0x200000 | |
| +#define PMEM_KERNEL_EBI1_SIZE 0x80000 | |
| #endif | |
| #ifdef CONFIG_ARCH_MSM7X27 | |
| -#define MSM_PMEM_MDP_SIZE 0x1600000 | |
| -#define MSM_PMEM_ADSP_SIZE 0xC1B000 | |
| -#define MSM_PMEM_GPU1_SIZE 0x1C00000 | |
| +#define MSM_PMEM_MDP_SIZE 0x1591000 | |
| +#define MSM_PMEM_ADSP_SIZE 0x99A000 | |
| +#define MSM_PMEM_GPU1_SIZE 0x1600000 | |
| #define MSM_FB_SIZE 0x200000 | |
| #define MSM_GPU_PHYS_SIZE SZ_2M | |
| #define PMEM_KERNEL_EBI1_SIZE 0x200000 | |
| #endif | |
| + | |
| static struct resource smc91x_resources[] = { | |
| [0] = { | |
| .start = 0x9C004300, | |
| .end = 0x9C0043ff, | |
| .flags = IORESOURCE_MEM, | |
| }, | |
| [1] = { | |
| .start = MSM_GPIO_TO_INT(132), | |
| @@ -198,16 +199,17 @@ | |
| #ifdef CONFIG_USB_FUNCTION | |
| static struct usb_function_map usb_functions_map[] = { | |
| {"diag", 0}, | |
| {"adb", 1}, | |
| {"modem", 2}, | |
| {"nmea", 3}, | |
| {"mass_storage", 4}, | |
| {"ethernet", 5}, | |
| + {"rmnet", 6}, | |
| }; | |
| /* dynamic composition */ | |
| static struct usb_composition usb_func_composition[] = { | |
| { | |
| .product_id = 0x9012, | |
| .functions = 0x5, /* 0101 */ | |
| }, | |
| @@ -241,16 +243,28 @@ | |
| .product_id = 0xF009, | |
| .functions = 0x20, /* 100000 */ | |
| }, | |
| { | |
| .product_id = 0x9018, | |
| .functions = 0x1F, /* 011111 */ | |
| }, | |
| +#ifdef CONFIG_USB_FUNCTION_RMNET | |
| + { | |
| + .product_id = 0x9021, | |
| + /* DIAG + RMNET */ | |
| + .functions = 0x41, | |
| + }, | |
| + { | |
| + .product_id = 0x9022, | |
| + /* DIAG + ADB + RMNET */ | |
| + .functions = 0x43, | |
| + }, | |
| +#endif | |
| }; | |
| #endif | |
| static struct msm_hsusb_platform_data msm_hsusb_pdata = { | |
| #ifdef CONFIG_USB_FUNCTION | |
| .version = 0x0100, | |
| .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_65NM), | |
| @@ -306,24 +320,19 @@ | |
| case CHG_TYPE_INVALID: | |
| pr_debug("Charger Type: DISCONNECTED\n"); | |
| msm_chg_usb_i_is_not_available(); | |
| msm_chg_usb_charger_disconnected(); | |
| break; | |
| } | |
| } | |
| -static int msm_hsusb_rpc_phy_reset(void __iomem *addr) | |
| -{ | |
| - return msm_hsusb_phy_reset(); | |
| -} | |
| - | |
| static struct msm_otg_platform_data msm_otg_pdata = { | |
| .rpc_connect = hsusb_rpc_connect, | |
| - .phy_reset = msm_hsusb_rpc_phy_reset, | |
| + .phy_reset = msm_hsusb_phy_reset, | |
| }; | |
| static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = { | |
| /* charging apis */ | |
| .chg_init = hsusb_chg_init, | |
| .chg_connected = hsusb_chg_connected, | |
| .chg_vbus_draw = hsusb_chg_vbus_draw, | |
| }; | |
| @@ -364,19 +373,25 @@ | |
| (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \ | |
| (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP)) | |
| #define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_WAV)|(1<<MSM_ADSP_CODEC_ADPCM)| \ | |
| (1<<MSM_ADSP_CODEC_YADPCM)|(1<<MSM_ADSP_CODEC_QCELP)| \ | |
| (1<<MSM_ADSP_CODEC_MP3)) | |
| #define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_WAV)|(1<<MSM_ADSP_CODEC_ADPCM)| \ | |
| (1<<MSM_ADSP_CODEC_YADPCM)|(1<<MSM_ADSP_CODEC_QCELP)| \ | |
| (1<<MSM_ADSP_CODEC_MP3)) | |
| + | |
| +#ifdef CONFIG_ARCH_MSM7X25 | |
| +#define DEC3_FORMAT 0 | |
| +#define DEC4_FORMAT 0 | |
| +#else | |
| #define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_WAV)|(1<<MSM_ADSP_CODEC_ADPCM)| \ | |
| (1<<MSM_ADSP_CODEC_YADPCM)|(1<<MSM_ADSP_CODEC_QCELP)) | |
| #define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI) | |
| +#endif | |
| static unsigned int dec_concurrency_table[] = { | |
| /* Audio LP */ | |
| (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0, | |
| 0, 0, 0, | |
| /* Concurrency 1 */ | |
| (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), | |
| @@ -424,18 +439,23 @@ | |
| #define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \ | |
| .module_queueid = queueid, .module_decid = decid, \ | |
| .nr_codec_support = nr_codec} | |
| static struct msm_adspdec_info dec_info_list[] = { | |
| DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */ | |
| DEC_INFO("AUDPLAY1TASK", 14, 1, 5), /* AudPlay1BitStreamCtrlQueue */ | |
| DEC_INFO("AUDPLAY2TASK", 15, 2, 5), /* AudPlay2BitStreamCtrlQueue */ | |
| +#ifdef CONFIG_ARCH_MSM7X25 | |
| + DEC_INFO("AUDPLAY3TASK", 16, 3, 0), /* AudPlay3BitStreamCtrlQueue */ | |
| + DEC_INFO("AUDPLAY4TASK", 17, 4, 0), /* AudPlay4BitStreamCtrlQueue */ | |
| +#else | |
| DEC_INFO("AUDPLAY3TASK", 16, 3, 4), /* AudPlay3BitStreamCtrlQueue */ | |
| DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */ | |
| +#endif | |
| }; | |
| static struct msm_adspdec_database msm_device_adspdec_database = { | |
| .num_dec = ARRAY_SIZE(dec_info_list), | |
| .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \ | |
| ARRAY_SIZE(dec_info_list)), | |
| .dec_concurrency_table = dec_concurrency_table, | |
| .dec_info_list = dec_info_list, | |
| @@ -444,89 +464,128 @@ | |
| static struct platform_device msm_device_adspdec = { | |
| .name = "msm_adspdec", | |
| .id = -1, | |
| .dev = { | |
| .platform_data = &msm_device_adspdec_database | |
| }, | |
| }; | |
| -#ifdef CONFIG_ARCH_MSM7X27 | |
| static struct android_pmem_platform_data android_pmem_kernel_ebi1_pdata = { | |
| .name = PMEM_KERNEL_EBI1_DATA_NAME, | |
| /* if no allocator_type, defaults to PMEM_ALLOCATORTYPE_BITMAP, | |
| * the only valid choice at this time. The board structure is | |
| * set to all zeros by the C runtime initialization and that is now | |
| * the enum value of PMEM_ALLOCATORTYPE_BITMAP, now forced to 0 in | |
| * include/linux/android_pmem.h. | |
| */ | |
| .cached = 0, | |
| }; | |
| -#endif | |
| static struct android_pmem_platform_data android_pmem_pdata = { | |
| .name = "pmem", | |
| .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, | |
| .cached = 1, | |
| }; | |
| static struct android_pmem_platform_data android_pmem_adsp_pdata = { | |
| .name = "pmem_adsp", | |
| .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, | |
| .cached = 0, | |
| }; | |
| +#ifdef CONFIG_ARCH_MSM7X27 | |
| static struct android_pmem_platform_data android_pmem_gpu1_pdata = { | |
| .name = "pmem_gpu1", | |
| .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, | |
| .cached = 0, | |
| }; | |
| +#endif | |
| static struct platform_device android_pmem_device = { | |
| .name = "android_pmem", | |
| .id = 0, | |
| .dev = { .platform_data = &android_pmem_pdata }, | |
| }; | |
| static struct platform_device android_pmem_adsp_device = { | |
| .name = "android_pmem", | |
| .id = 1, | |
| .dev = { .platform_data = &android_pmem_adsp_pdata }, | |
| }; | |
| -static struct platform_device android_pmem_gpu1_device = { | |
| +static struct platform_device android_pmem_kernel_ebi1_device = { | |
| .name = "android_pmem", | |
| - .id = 3, | |
| - .dev = { .platform_data = &android_pmem_gpu1_pdata }, | |
| + .id = 4, | |
| + .dev = { .platform_data = &android_pmem_kernel_ebi1_pdata }, | |
| }; | |
| #ifdef CONFIG_ARCH_MSM7X27 | |
| -static struct platform_device android_pmem_kernel_ebi1_device = { | |
| +static struct platform_device android_pmem_gpu1_device = { | |
| .name = "android_pmem", | |
| - .id = 4, | |
| - .dev = { .platform_data = &android_pmem_kernel_ebi1_pdata }, | |
| + .id = 3, | |
| + .dev = { .platform_data = &android_pmem_gpu1_pdata }, | |
| }; | |
| + | |
| #endif | |
| static struct platform_device hs_device = { | |
| .name = "msm-handset", | |
| .id = -1, | |
| .dev = { | |
| .platform_data = "7k_handset", | |
| }, | |
| }; | |
| + | |
| +#define LCDC_CONFIG_PROC 21 | |
| +#define LCDC_UN_CONFIG_PROC 22 | |
| +#define LCDC_API_PROG 0x30000066 | |
| +#define LCDC_API_VERS 0x00010001 | |
| + | |
| #define GPIO_OUT_132 132 | |
| #define GPIO_OUT_131 131 | |
| #define GPIO_OUT_103 103 | |
| #define GPIO_OUT_102 102 | |
| #define GPIO_OUT_88 88 | |
| +static struct msm_rpc_endpoint *lcdc_ep; | |
| + | |
| +static int msm_fb_lcdc_config(int on) | |
| +{ | |
| + int rc = 0; | |
| + struct rpc_request_hdr hdr; | |
| + | |
| + if (on) | |
| + pr_info("lcdc config\n"); | |
| + else | |
| + pr_info("lcdc un-config\n"); | |
| + | |
| + lcdc_ep = msm_rpc_connect_compatible(LCDC_API_PROG, LCDC_API_VERS, 0); | |
| + if (IS_ERR(lcdc_ep)) { | |
| + printk(KERN_ERR "%s: msm_rpc_connect failed! rc = %ld\n", | |
| + __func__, PTR_ERR(lcdc_ep)); | |
| + return -EINVAL; | |
| + } | |
| + | |
| + rc = msm_rpc_call(lcdc_ep, | |
| + (on) ? LCDC_CONFIG_PROC : LCDC_UN_CONFIG_PROC, | |
| + &hdr, sizeof(hdr), | |
| + 5 * HZ); | |
| + if (rc) | |
| + printk(KERN_ERR | |
| + "%s: msm_rpc_call failed! rc = %d\n", __func__, rc); | |
| + | |
| + msm_rpc_close(lcdc_ep); | |
| + return rc; | |
| +} | |
| + | |
| + | |
| static int gpio_array_num[] = { | |
| GPIO_OUT_132, /* spi_clk */ | |
| GPIO_OUT_131, /* spi_cs */ | |
| GPIO_OUT_103, /* spi_sdi */ | |
| GPIO_OUT_102, /* spi_sdoi */ | |
| GPIO_OUT_88 | |
| }; | |
| @@ -600,16 +659,17 @@ | |
| gpio_set_value(88, 0); | |
| mdelay(15); | |
| gpio_set_value(88, 1); | |
| mdelay(15); | |
| } | |
| } | |
| } | |
| static struct lcdc_platform_data lcdc_pdata = { | |
| + .lcdc_gpio_config = msm_fb_lcdc_config, | |
| .lcdc_power_save = msm_fb_lcdc_power_save, | |
| }; | |
| static struct msm_panel_common_pdata lcdc_gordon_panel_data = { | |
| .panel_config_gpio = lcdc_gordon_config_gpios, | |
| .gpio_num = gpio_array_num, | |
| }; | |
| @@ -1029,18 +1089,18 @@ | |
| }, | |
| }; | |
| #endif | |
| #endif | |
| static u32 msm_calculate_batt_capacity(u32 current_voltage); | |
| static struct msm_psy_batt_pdata msm_psy_batt_data = { | |
| - .voltage_min_design = 3200, | |
| - .voltage_max_design = 4200, | |
| + .voltage_min_design = 2800, | |
| + .voltage_max_design = 4300, | |
| .avail_chg_sources = AC_CHG | USB_CHG , | |
| .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION, | |
| .calculate_capacity = &msm_calculate_batt_capacity, | |
| }; | |
| static u32 msm_calculate_batt_capacity(u32 current_voltage) | |
| { | |
| u32 low_voltage = msm_psy_batt_data.voltage_min_design; | |
| @@ -1074,22 +1134,22 @@ | |
| &mass_storage_device, | |
| #endif | |
| #ifdef CONFIG_USB_ANDROID | |
| &android_usb_device, | |
| #endif | |
| &msm_device_i2c, | |
| &smc91x_device, | |
| &msm_device_tssc, | |
| -#ifdef CONFIG_ARCH_MSM7X27 | |
| &android_pmem_kernel_ebi1_device, | |
| -#endif | |
| &android_pmem_device, | |
| &android_pmem_adsp_device, | |
| +#ifdef CONFIG_ARCH_MSM7X27 | |
| &android_pmem_gpu1_device, | |
| +#endif | |
| &msm_fb_device, | |
| &lcdc_gordon_panel_device, | |
| &msm_device_uart_dm1, | |
| #ifdef CONFIG_BT | |
| &msm_bt_power_device, | |
| #endif | |
| &msm_device_pmic_leds, | |
| &msm_device_snd, | |
| @@ -1136,17 +1196,17 @@ | |
| } | |
| static struct msm_acpu_clock_platform_data msm7x2x_clock_data = { | |
| .acpu_switch_time_us = 50, | |
| .max_speed_delta_khz = 256000, | |
| .vdd_switch_time_us = 62, | |
| .power_collapse_khz = 19200000, | |
| .wait_for_irq_khz = 128000000, | |
| - .max_axi_khz = 128000, | |
| + .max_axi_khz = 160000, | |
| }; | |
| void msm_serial_debug_init(unsigned int base, int irq, | |
| struct device *clk_device, int signal_irq); | |
| #ifdef CONFIG_MMC | |
| static void sdcc_gpio_init(void) | |
| { | |
| @@ -1327,16 +1387,17 @@ | |
| } | |
| set_bit(pdev->id, &vreg_sts); | |
| return 0; | |
| } | |
| static struct mmc_platform_data msm7x2x_sdcc_data = { | |
| .ocr_mask = MMC_VDD_28_29, | |
| .translate_vdd = msm_sdcc_setup_power, | |
| + .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
| }; | |
| static void __init msm7x2x_init_mmc(void) | |
| { | |
| if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) { | |
| mpp_mmc = mpp_get(NULL, "mpp3"); | |
| if (!mpp_mmc) { | |
| printk(KERN_ERR "%s: mpp get failed (%ld)\n", | |
| @@ -1349,28 +1410,28 @@ | |
| printk(KERN_ERR "%s: vreg get failed (%ld)\n", | |
| __func__, PTR_ERR(vreg_mmc)); | |
| return; | |
| } | |
| } | |
| sdcc_gpio_init(); | |
| #ifdef CONFIG_MMC_MSM_SDC1_SUPPORT | |
| - msm_add_sdcc(1, &msm7x2x_sdcc_data); | |
| + msm_add_sdcc(1, &msm7x2x_sdcc_data, 0, 0); | |
| #endif | |
| if (machine_is_msm7x25_surf() || machine_is_msm7x27_surf()) { | |
| #ifdef CONFIG_MMC_MSM_SDC2_SUPPORT | |
| - msm_add_sdcc(2, &msm7x2x_sdcc_data); | |
| + msm_add_sdcc(2, &msm7x2x_sdcc_data, 0, 0); | |
| #endif | |
| #ifdef CONFIG_MMC_MSM_SDC3_SUPPORT | |
| - msm_add_sdcc(3, &msm7x2x_sdcc_data); | |
| + msm_add_sdcc(3, &msm7x2x_sdcc_data, 0, 0); | |
| #endif | |
| #ifdef CONFIG_MMC_MSM_SDC4_SUPPORT | |
| - msm_add_sdcc(4, &msm7x2x_sdcc_data); | |
| + msm_add_sdcc(4, &msm7x2x_sdcc_data, 0, 0); | |
| #endif | |
| } | |
| } | |
| #else | |
| #define msm7x2x_init_mmc() do {} while (0) | |
| #endif | |
| @@ -1479,18 +1540,16 @@ | |
| GPIO_INPUT, | |
| GPIO_PULL_DOWN, | |
| GPIO_2MA), | |
| GPIO_ENABLE)) { | |
| printk(KERN_ERR | |
| "%s: Err: Config GPIO-85 INT\n", | |
| __func__); | |
| } | |
| - | |
| - msm7x2x_clock_data.max_axi_khz = 160000; | |
| } | |
| if (cpu_is_msm7x27()) | |
| msm7x2x_clock_data.max_axi_khz = 200000; | |
| msm_acpu_clock_init(&msm7x2x_clock_data); | |
| #ifdef CONFIG_ARCH_MSM7X27 | |
| @@ -1528,46 +1587,45 @@ | |
| bt_power_init(); | |
| if (cpu_is_msm7x27()) | |
| msm_pm_set_platform_data(msm7x27_pm_data); | |
| else | |
| msm_pm_set_platform_data(msm7x25_pm_data); | |
| } | |
| -#ifdef CONFIG_ARCH_MSM7X27 | |
| static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE; | |
| static void __init pmem_kernel_ebi1_size_setup(char **p) | |
| { | |
| pmem_kernel_ebi1_size = memparse(*p, p); | |
| } | |
| __early_param("pmem_kernel_ebi1_size=", pmem_kernel_ebi1_size_setup); | |
| -#endif | |
| static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE; | |
| static void __init pmem_mdp_size_setup(char **p) | |
| { | |
| pmem_mdp_size = memparse(*p, p); | |
| } | |
| __early_param("pmem_mdp_size=", pmem_mdp_size_setup); | |
| static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE; | |
| static void __init pmem_adsp_size_setup(char **p) | |
| { | |
| pmem_adsp_size = memparse(*p, p); | |
| } | |
| __early_param("pmem_adsp_size=", pmem_adsp_size_setup); | |
| +#ifdef CONFIG_ARCH_MSM7X27 | |
| static unsigned pmem_gpu1_size = MSM_PMEM_GPU1_SIZE; | |
| static void __init pmem_gpu1_size_setup(char **p) | |
| { | |
| pmem_gpu1_size = memparse(*p, p); | |
| } | |
| __early_param("pmem_gpu1_size=", pmem_gpu1_size_setup); | |
| - | |
| +#endif | |
| static unsigned fb_size = MSM_FB_SIZE; | |
| static void __init fb_size_setup(char **p) | |
| { | |
| fb_size = memparse(*p, p); | |
| } | |
| __early_param("fb_size=", fb_size_setup); | |
| #ifdef CONFIG_ARCH_MSM7X27 | |
| @@ -1597,48 +1655,46 @@ | |
| if (size) { | |
| addr = alloc_bootmem(size); | |
| android_pmem_adsp_pdata.start = __pa(addr); | |
| android_pmem_adsp_pdata.size = size; | |
| pr_info("allocating %lu bytes at %p (%lx physical) for adsp " | |
| "pmem arena\n", size, addr, __pa(addr)); | |
| } | |
| - size = pmem_gpu1_size; | |
| - if (size) { | |
| - addr = alloc_bootmem(size); | |
| - android_pmem_gpu1_pdata.start = __pa(addr); | |
| - android_pmem_gpu1_pdata.size = size; | |
| - pr_info("allocating %lu bytes at %p (%lx physical) for gpu1 " | |
| - "pmem arena\n", size, addr, __pa(addr)); | |
| - } | |
| - | |
| size = fb_size ? : MSM_FB_SIZE; | |
| addr = alloc_bootmem(size); | |
| msm_fb_resources[0].start = __pa(addr); | |
| msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1; | |
| pr_info("allocating %lu bytes at %p (%lx physical) for fb\n", | |
| size, addr, __pa(addr)); | |
| + size = pmem_kernel_ebi1_size; | |
| + if (size) { | |
| + addr = alloc_bootmem_aligned(size, 0x100000); | |
| + android_pmem_kernel_ebi1_pdata.start = __pa(addr); | |
| + android_pmem_kernel_ebi1_pdata.size = size; | |
| + pr_info("allocating %lu bytes at %p (%lx physical) for kernel" | |
| + " ebi1 pmem arena\n", size, addr, __pa(addr)); | |
| + } | |
| #ifdef CONFIG_ARCH_MSM7X27 | |
| - | |
| size = gpu_phys_size ? : MSM_GPU_PHYS_SIZE; | |
| addr = alloc_bootmem(size); | |
| kgsl_resources[1].start = __pa(addr); | |
| kgsl_resources[1].end = kgsl_resources[1].start + size - 1; | |
| pr_info("allocating %lu bytes at %p (%lx physical) for KGSL\n", | |
| size, addr, __pa(addr)); | |
| - size = pmem_kernel_ebi1_size; | |
| + size = pmem_gpu1_size; | |
| if (size) { | |
| - addr = alloc_bootmem_aligned(size, 0x100000); | |
| - android_pmem_kernel_ebi1_pdata.start = __pa(addr); | |
| - android_pmem_kernel_ebi1_pdata.size = size; | |
| - pr_info("allocating %lu bytes at %p (%lx physical) for kernel" | |
| - " ebi1 pmem arena\n", size, addr, __pa(addr)); | |
| + addr = alloc_bootmem(size); | |
| + android_pmem_gpu1_pdata.start = __pa(addr); | |
| + android_pmem_gpu1_pdata.size = size; | |
| + pr_info("allocating %lu bytes at %p (%lx physical) for gpu1 " | |
| + "pmem arena\n", size, addr, __pa(addr)); | |
| } | |
| #endif | |
| } | |
| static void __init msm7x2x_map_io(void) | |
| { | |
| msm_map_common_io(); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-msm7x30.c kernel/arch/arm/mach-msm/board-msm7x30.c | |
| --- kernel-msm/arch/arm/mach-msm/board-msm7x30.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-msm7x30.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -74,40 +74,35 @@ | |
| #include <asm/mach/arch.h> | |
| #include <asm/setup.h> | |
| #include <mach/gpio.h> | |
| #include <mach/board.h> | |
| #include <mach/memory.h> | |
| #include <mach/msm_iomap.h> | |
| #include <mach/msm_hsusb.h> | |
| -#include <mach/rpc_hsusb.h> | |
| #include <mach/msm_spi.h> | |
| #include <linux/android_pmem.h> | |
| #include <mach/pmic8058-keypad.h> | |
| #include <mach/qdsp5v2/snddev_icodec.h> | |
| -#include <mach/msm_ts.h> | |
| #include <asm/mach/mmc.h> | |
| #include <mach/vreg.h> | |
| #include "devices.h" | |
| #include "timer.h" | |
| #include "socinfo.h" | |
| -#ifdef CONFIG_USB_ANDROID | |
| -#include <linux/usb/android.h> | |
| -#endif | |
| #include "pm.h" | |
| #include <linux/msm_kgsl.h> | |
| #define MSM_PMEM_SF_SIZE 0x1000000 | |
| #define MSM_FB_SIZE 0x200000 | |
| #define MSM_PMEM_GPU1_SIZE 0x1000000 | |
| #define MSM_GPU_PHYS_SIZE SZ_2M | |
| #define MSM_PMEM_ADSP_SIZE 0x2000000 | |
| -#define PMEM_KERNEL_EBI1_SIZE 0x200000 | |
| +#define PMEM_KERNEL_EBI1_SIZE 0x2000000 | |
| #define PMIC_GPIO_INT 27 | |
| #define PMIC_VREG_WLAN_LEVEL 2900 | |
| static const unsigned int surf_keymap[] = { | |
| KEY(0, 0, KEY_7), | |
| @@ -677,116 +672,39 @@ | |
| static struct platform_device smc91x_device = { | |
| .name = "smc91x", | |
| .id = 0, | |
| .num_resources = ARRAY_SIZE(smc91x_resources), | |
| .resource = smc91x_resources, | |
| }; | |
| -#ifdef CONFIG_USB_FUNCTION | |
| static struct usb_mass_storage_platform_data usb_mass_storage_pdata = { | |
| .nluns = 0x02, | |
| .buf_size = 16384, | |
| .vendor = "GOOGLE", | |
| .product = "Mass storage", | |
| .release = 0xffff, | |
| }; | |
| static struct platform_device mass_storage_device = { | |
| .name = "usb_mass_storage", | |
| .id = -1, | |
| .dev = { | |
| .platform_data = &usb_mass_storage_pdata, | |
| }, | |
| }; | |
| -#endif | |
| -#ifdef CONFIG_USB_ANDROID | |
| -/* dynamic composition */ | |
| -static struct usb_composition usb_func_composition[] = { | |
| - { | |
| - .product_id = 0x9015, | |
| - /* MSC + ADB */ | |
| - .functions = 0x12 /* 10010 */ | |
| - }, | |
| - { | |
| - .product_id = 0xF000, | |
| - /* MSC */ | |
| - .functions = 0x02, /* 0010 */ | |
| - }, | |
| - { | |
| - .product_id = 0xF005, | |
| - /* MODEM ONLY */ | |
| - .functions = 0x03, | |
| - }, | |
| - | |
| - { | |
| - .product_id = 0x8080, | |
| - /* DIAG + MODEM */ | |
| - .functions = 0x34, | |
| - }, | |
| - { | |
| - .product_id = 0x8082, | |
| - /* DIAG + ADB + MODEM */ | |
| - .functions = 0x0314, | |
| - }, | |
| - { | |
| - .product_id = 0x8085, | |
| - /* DIAG + ADB + MODEM + NMEA + MSC*/ | |
| - .functions = 0x25314, | |
| - }, | |
| - { | |
| - .product_id = 0x9016, | |
| - /* DIAG + GENERIC MODEM + GENERIC NMEA*/ | |
| - .functions = 0x764, | |
| - }, | |
| - { | |
| - .product_id = 0x9017, | |
| - /* DIAG + GENERIC MODEM + GENERIC NMEA + MSC*/ | |
| - .functions = 0x2764, | |
| - }, | |
| - { | |
| - .product_id = 0x9018, | |
| - /* DIAG + ADB + GENERIC MODEM + GENERIC NMEA + MSC*/ | |
| - .functions = 0x27614, | |
| - }, | |
| - { | |
| - .product_id = 0xF009, | |
| - /* CDC-ECM*/ | |
| - .functions = 0x08, | |
| - } | |
| -}; | |
| -static struct android_usb_platform_data android_usb_pdata = { | |
| - .vendor_id = 0x05C6, | |
| - .product_id = 0x9018, | |
| - .functions = 0x27614, | |
| - .version = 0x0100, | |
| - .compositions = usb_func_composition, | |
| - .num_compositions = ARRAY_SIZE(usb_func_composition), | |
| - .product_name = "Qualcomm HSUSB Device", | |
| - .manufacturer_name = "Qualcomm Incorporated", | |
| - .nluns = 1, | |
| -}; | |
| -static struct platform_device android_usb_device = { | |
| - .name = "android_usb", | |
| - .id = -1, | |
| - .dev = { | |
| - .platform_data = &android_usb_pdata, | |
| - }, | |
| -}; | |
| -#endif | |
| static struct i2c_board_info msm_marimba_board_info[] = { | |
| { | |
| I2C_BOARD_INFO("marimba", 0xc), | |
| .platform_data = &marimba_pdata, | |
| } | |
| }; | |
| -#ifdef CONFIG_USB_FUNCTION | |
| static struct usb_function_map usb_functions_map[] = { | |
| {"diag", 0}, | |
| {"adb", 1}, | |
| {"modem", 2}, | |
| {"nmea", 3}, | |
| {"mass_storage", 4}, | |
| {"ethernet", 5}, | |
| }; | |
| @@ -843,17 +761,16 @@ | |
| = "Qualcomm Incorporated", | |
| .compositions = usb_func_composition, | |
| .num_compositions | |
| = ARRAY_SIZE(usb_func_composition), | |
| .function_map = usb_functions_map, | |
| .num_functions = ARRAY_SIZE(usb_functions_map), | |
| .core_clk = 1, | |
| }; | |
| -#endif | |
| static struct msm_gpio bma_spi_gpio_config_data[] = { | |
| { GPIO_CFG(51, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), "bma_irq" }, | |
| }; | |
| static struct platform_device hs_device = { | |
| .name = "msm-handset", | |
| .id = -1, | |
| @@ -953,74 +870,17 @@ | |
| .gpio_config = msm_qsd_spi_gpio_config, | |
| .gpio_release = msm_qsd_spi_gpio_release | |
| }; | |
| static void __init msm_qsd_spi_init(void) | |
| { | |
| qsd_device_spi.dev.platform_data = &qsd_spi_pdata; | |
| } | |
| -#ifdef CONFIG_USB_ANDROID | |
| -static int hsusb_rpc_connect(int connect) | |
| -{ | |
| - if (connect) | |
| - return msm_hsusb_rpc_connect(); | |
| - else | |
| - return msm_hsusb_rpc_close(); | |
| -} | |
| - | |
| -static int hsusb_chg_init(int connect) | |
| -{ | |
| - if (connect) | |
| - return msm_chg_rpc_connect(); | |
| - else | |
| - return msm_chg_rpc_close(); | |
| -} | |
| - | |
| -void hsusb_chg_vbus_draw(unsigned mA) | |
| -{ | |
| - if (mA) | |
| - msm_chg_usb_i_is_available(mA); | |
| - else | |
| - msm_chg_usb_i_is_not_available(); | |
| -} | |
| -void hsusb_chg_connected(enum chg_type chgtype) | |
| -{ | |
| - switch (chgtype) { | |
| - case CHG_TYPE_HOSTPC: | |
| - pr_debug("Charger Type: HOST PC\n"); | |
| - msm_chg_usb_charger_connected(0); | |
| - msm_chg_usb_i_is_available(100); | |
| - break; | |
| - case CHG_TYPE_WALL_CHARGER: | |
| - pr_debug("Charger Type: WALL CHARGER\n"); | |
| - msm_chg_usb_charger_connected(2); | |
| - msm_chg_usb_i_is_available(1500); | |
| - break; | |
| - case CHG_TYPE_INVALID: | |
| - pr_debug("Charger Type: DISCONNECTED\n"); | |
| - msm_chg_usb_i_is_not_available(); | |
| - msm_chg_usb_charger_disconnected(); | |
| - break; | |
| - } | |
| -} | |
| -static struct msm_otg_platform_data msm_otg_pdata = { | |
| - .rpc_connect = hsusb_rpc_connect, | |
| - .phy_reset = msm_hsusb_phy_reset, | |
| - .core_clk = 1, | |
| -}; | |
| - | |
| -static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = { | |
| - /* charging apis */ | |
| - .chg_init = hsusb_chg_init, | |
| - .chg_connected = hsusb_chg_connected, | |
| - .chg_vbus_draw = hsusb_chg_vbus_draw, | |
| -}; | |
| -#endif | |
| static struct android_pmem_platform_data android_pmem_pdata = { | |
| .name = "pmem", | |
| .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, | |
| .cached = 1, | |
| }; | |
| static struct platform_device android_pmem_device = { | |
| .name = "android_pmem", | |
| @@ -1529,48 +1389,29 @@ | |
| #define bt_power_init(x) do {} while (0) | |
| #endif | |
| static struct platform_device msm_device_pmic_leds = { | |
| .name = "pmic-leds", | |
| .id = -1, | |
| }; | |
| -static struct msm_ts_platform_data msm_ts_data = { | |
| - .min_x = 296, | |
| - .max_x = 3800, | |
| - .min_y = 296, | |
| - .max_y = 3800, | |
| - .min_press = 0, | |
| - .max_press = 256, | |
| - .inv_x = 4096, | |
| - .inv_y = 4096, | |
| -}; | |
| - | |
| static struct platform_device *devices[] __initdata = { | |
| &msm_device_smd, | |
| &msm_device_dmov, | |
| &smc91x_device, | |
| &msm_device_nand, | |
| -#ifdef CONFIG_USB_FUNCTION | |
| &msm_device_hsusb_peripheral, | |
| &mass_storage_device, | |
| -#endif | |
| -#ifdef CONFIG_USB_ANDROID | |
| - &msm_device_otg, | |
| - &msm_device_gadget_peripheral, | |
| - &android_usb_device, | |
| -#endif | |
| &qsd_device_spi, | |
| #ifdef CONFIG_I2C_SSBI | |
| &msm_device_ssbi6, | |
| &msm_device_ssbi7, | |
| #endif | |
| &android_pmem_device, | |
| - &rmt_storage_device, | |
| &msm_fb_device, | |
| &lcdc_toshiba_panel_device, | |
| &android_pmem_kernel_ebi1_device, | |
| &android_pmem_adsp_device, | |
| &msm_device_i2c, | |
| &msm_device_i2c_2, | |
| &msm_device_uart_dm1, | |
| &hs_device, | |
| @@ -1585,17 +1426,16 @@ | |
| &msm_bt_power_device, | |
| #endif | |
| &android_pmem_gpu1_device, | |
| &msm_device_kgsl, | |
| #ifdef CONFIG_SERIAL_MSM_CONSOLE | |
| &msm_device_uart2, | |
| #endif | |
| &msm_device_pmic_leds, | |
| - &msm_device_tssc, | |
| }; | |
| static struct msm_gpio msm_i2c_gpios_hw[] = { | |
| { GPIO_CFG(70, 1, GPIO_INPUT, GPIO_NO_PULL, GPIO_16MA), "i2c_scl" }, | |
| { GPIO_CFG(71, 1, GPIO_INPUT, GPIO_NO_PULL, GPIO_16MA), "i2c_sda" }, | |
| }; | |
| static struct msm_gpio msm_i2c_gpios_io[] = { | |
| @@ -1607,46 +1447,28 @@ | |
| { GPIO_CFG(16, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_16MA), "qup_scl" }, | |
| { GPIO_CFG(17, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_16MA), "qup_sda" }, | |
| }; | |
| static struct msm_gpio qup_i2c_gpios_hw[] = { | |
| { GPIO_CFG(16, 2, GPIO_INPUT, GPIO_NO_PULL, GPIO_16MA), "qup_scl" }, | |
| { GPIO_CFG(17, 2, GPIO_INPUT, GPIO_NO_PULL, GPIO_16MA), "qup_sda" }, | |
| }; | |
| -/* 1.8V -- L8 */ | |
| -static struct vreg *msm_i2c_vreg_gp7; | |
| - | |
| static void | |
| msm_i2c_gpio_config(int adap_id, int config_type) | |
| { | |
| struct msm_gpio *msm_i2c_table; | |
| - | |
| /* Each adapter gets 2 lines from the table */ | |
| if (adap_id > 0) | |
| return; | |
| if (config_type) | |
| msm_i2c_table = &msm_i2c_gpios_hw[adap_id*2]; | |
| else | |
| msm_i2c_table = &msm_i2c_gpios_io[adap_id*2]; | |
| msm_gpios_enable(msm_i2c_table, 2); | |
| - | |
| - if (msm_i2c_vreg_gp7) { | |
| - int rc = vreg_set_level(msm_i2c_vreg_gp7, 1800); | |
| - if (rc) { | |
| - pr_err("%s: vreg L8 set level failed (%d)\n", | |
| - __func__, rc); | |
| - } | |
| - | |
| - rc = vreg_enable(msm_i2c_vreg_gp7); | |
| - if (rc) { | |
| - pr_err("%s: vreg_enable() = %d \n", | |
| - __func__, rc); | |
| - } | |
| - } | |
| } | |
| static struct vreg *qup_vreg; | |
| static void | |
| qup_i2c_gpio_config(int adap_id, int config_type) | |
| { | |
| int rc = 0; | |
| struct msm_gpio *qup_i2c_table; | |
| @@ -1681,23 +1503,16 @@ | |
| .msm_i2c_config_gpio = msm_i2c_gpio_config, | |
| }; | |
| static void __init msm_device_i2c_init(void) | |
| { | |
| if (msm_gpios_request(msm_i2c_gpios_hw, ARRAY_SIZE(msm_i2c_gpios_hw))) | |
| pr_err("failed to request I2C gpios\n"); | |
| - msm_i2c_vreg_gp7 = vreg_get(NULL, "gp7"); | |
| - if (IS_ERR(msm_i2c_vreg_gp7)) { | |
| - printk(KERN_ERR "%s: vreg get failed (%ld)\n", | |
| - __func__, PTR_ERR(msm_i2c_vreg_gp7)); | |
| - msm_i2c_vreg_gp7 = 0; | |
| - } | |
| - | |
| msm_device_i2c.dev.platform_data = &msm_i2c_pdata; | |
| } | |
| static struct msm_i2c_platform_data msm_i2c_2_pdata = { | |
| .clk_freq = 100000, | |
| .msm_i2c_config_gpio = msm_i2c_gpio_config, | |
| }; | |
| @@ -1753,16 +1568,23 @@ | |
| static struct msm_gpio sdc2_cfg_data[] = { | |
| {GPIO_CFG(64, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_16MA), "sdc2_clk"}, | |
| {GPIO_CFG(65, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc2_cmd"}, | |
| {GPIO_CFG(66, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc2_dat_3"}, | |
| {GPIO_CFG(67, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc2_dat_2"}, | |
| {GPIO_CFG(68, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc2_dat_1"}, | |
| {GPIO_CFG(69, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc2_dat_0"}, | |
| + | |
| +#ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT | |
| + {GPIO_CFG(115, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc2_dat_4"}, | |
| + {GPIO_CFG(114, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc2_dat_5"}, | |
| + {GPIO_CFG(113, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc2_dat_6"}, | |
| + {GPIO_CFG(112, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc2_dat_7"}, | |
| +#endif | |
| }; | |
| static struct msm_gpio sdc3_cfg_data[] = { | |
| {GPIO_CFG(110, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_16MA), "sdc3_clk"}, | |
| {GPIO_CFG(111, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc3_cmd"}, | |
| {GPIO_CFG(116, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc3_dat_3"}, | |
| {GPIO_CFG(117, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc3_dat_2"}, | |
| {GPIO_CFG(118, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc3_dat_1"}, | |
| @@ -1884,37 +1706,45 @@ | |
| return rc; | |
| } | |
| #endif | |
| #ifdef CONFIG_MMC_MSM_SDC1_SUPPORT | |
| static struct mmc_platform_data msm7x30_sdc1_data = { | |
| .ocr_mask = MMC_VDD_165_195, | |
| .translate_vdd = msm_sdcc_setup_power, | |
| + .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
| }; | |
| #endif | |
| #ifdef CONFIG_MMC_MSM_SDC2_SUPPORT | |
| static struct mmc_platform_data msm7x30_sdc2_data = { | |
| .ocr_mask = MMC_VDD_165_195, | |
| .translate_vdd = msm_sdcc_setup_power, | |
| +#ifdef CONFIG_MSM_SDC2_8_BIT_SUPPORT | |
| + .mmc_bus_width = MMC_CAP_8_BIT_DATA, | |
| +#else | |
| + .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
| +#endif | |
| }; | |
| #endif | |
| #ifdef CONFIG_MMC_MSM_SDC3_SUPPORT | |
| static struct mmc_platform_data msm7x30_sdc3_data = { | |
| .ocr_mask = MMC_VDD_165_195, | |
| .translate_vdd = msm_sdcc_setup_power, | |
| + .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
| }; | |
| #endif | |
| #ifdef CONFIG_MMC_MSM_SDC4_SUPPORT | |
| static struct mmc_platform_data msm7x30_sdc4_data = { | |
| .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, | |
| .translate_vdd = msm_sdcc_setup_power, | |
| + .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
| }; | |
| #endif | |
| static void __init msm7x30_init_mmc(void) | |
| { | |
| vreg_s3 = vreg_get(NULL, "s3"); | |
| if (IS_ERR(vreg_s3)) { | |
| printk(KERN_ERR "%s: vreg get failed (%ld)\n", | |
| @@ -1927,32 +1757,32 @@ | |
| printk(KERN_ERR "%s: vreg get failed (%ld)\n", | |
| __func__, PTR_ERR(vreg_mmc)); | |
| return; | |
| } | |
| #ifdef CONFIG_MMC_MSM_SDC1_SUPPORT | |
| sdcc_vreg_data[0].vreg_data = vreg_s3; | |
| sdcc_vreg_data[0].level = 1800; | |
| - msm_add_sdcc(1, &msm7x30_sdc1_data); | |
| + msm_add_sdcc(1, &msm7x30_sdc1_data, 0, 0); | |
| #endif | |
| #ifdef CONFIG_MMC_MSM_SDC2_SUPPORT | |
| sdcc_vreg_data[1].vreg_data = vreg_s3; | |
| sdcc_vreg_data[1].level = 1800; | |
| - msm_add_sdcc(2, &msm7x30_sdc2_data); | |
| + msm_add_sdcc(2, &msm7x30_sdc2_data, 0, 0); | |
| #endif | |
| #ifdef CONFIG_MMC_MSM_SDC3_SUPPORT | |
| sdcc_vreg_data[2].vreg_data = vreg_s3; | |
| sdcc_vreg_data[2].level = 1800; | |
| - msm_add_sdcc(3, &msm7x30_sdc3_data); | |
| + msm_add_sdcc(3, &msm7x30_sdc3_data, 0, 0); | |
| #endif | |
| #ifdef CONFIG_MMC_MSM_SDC4_SUPPORT | |
| sdcc_vreg_data[3].vreg_data = vreg_mmc; | |
| sdcc_vreg_data[3].level = 2850; | |
| - msm_add_sdcc(4, &msm7x30_sdc4_data); | |
| + msm_add_sdcc(4, &msm7x30_sdc4_data, 0, 0); | |
| #endif | |
| } | |
| static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR] = { | |
| [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].supported = 0, | |
| [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].suspend_enabled = 0, | |
| [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].idle_enabled = 1, | |
| @@ -2001,20 +1831,16 @@ | |
| printk(KERN_ERR "%s: socinfo_init() failed!\n", | |
| __func__); | |
| #ifdef CONFIG_USB_FUNCTION | |
| msm_hsusb_pdata.swfi_latency = | |
| msm_pm_data | |
| [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency; | |
| msm_device_hsusb_peripheral.dev.platform_data = &msm_hsusb_pdata; | |
| #endif | |
| -#ifdef CONFIG_USB_ANDROID | |
| - msm_device_otg.dev.platform_data = &msm_otg_pdata; | |
| - msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata; | |
| -#endif | |
| platform_add_devices(devices, ARRAY_SIZE(devices)); | |
| msm7x30_init_mmc(); | |
| msm_qsd_spi_init(); | |
| spi_register_board_info(msm_spi_board_info, | |
| ARRAY_SIZE(msm_spi_board_info)); | |
| msm_fb_add_devices(); | |
| msm_pm_set_platform_data(msm_pm_data); | |
| msm_device_i2c_init(); | |
| @@ -2025,17 +1851,16 @@ | |
| i2c_register_board_info(2, msm_marimba_board_info, | |
| ARRAY_SIZE(msm_marimba_board_info)); | |
| platform_device_register(&surf_keypad_device); | |
| bt_power_init(); | |
| #ifdef CONFIG_SERIAL_MSM_CONSOLE | |
| msm7x30_init_uart2(); | |
| #endif | |
| - msm_device_tssc.dev.platform_data = &msm_ts_data; | |
| } | |
| static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE; | |
| static void __init pmem_sf_size_setup(char **p) | |
| { | |
| pmem_sf_size = memparse(*p, p); | |
| } | |
| __early_param("pmem_sf_size=", pmem_sf_size_setup); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-qsd8x50.c kernel/arch/arm/mach-msm/board-qsd8x50.c | |
| --- kernel-msm/arch/arm/mach-msm/board-qsd8x50.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-qsd8x50.c 2010-08-27 11:17:41.000000000 +0900 | |
| @@ -81,59 +81,68 @@ | |
| #include <mach/board.h> | |
| #include <mach/sirc.h> | |
| #include <mach/rpc_hsusb.h> | |
| #include <mach/msm_hsusb.h> | |
| #include <mach/msm_hsusb_hw.h> | |
| #include <mach/msm_serial_hs.h> | |
| #include <mach/msm_touchpad.h> | |
| #include <mach/msm_i2ckbd.h> | |
| +#if 1 | |
| +#include <mach/msm_i2ctps.h> | |
| +#endif | |
| #include <mach/pmic.h> | |
| #include <mach/camera.h> | |
| #include <mach/memory.h> | |
| #include <mach/msm_spi.h> | |
| #include <mach/s1r72v05.h> | |
| #include <mach/msm_tsif.h> | |
| #include <mach/msm_battery.h> | |
| +#if 1 | |
| +#include <linux/i2c/smb380.h> | |
| +#include <linux/i2c/akm8973.h> | |
| +#endif | |
| #include "devices.h" | |
| #include "timer.h" | |
| #include "socinfo.h" | |
| #include "msm-keypad-devices.h" | |
| #include "pm.h" | |
| #include "smd_private.h" | |
| #include "proc_comm.h" | |
| #include <linux/msm_kgsl.h> | |
| #define TOUCHPAD_SUSPEND 34 | |
| #define TOUCHPAD_IRQ 38 | |
| -#define MSM_PMEM_MDP_SIZE 0x1600000 | |
| +#define MSM_PMEM_MDP_SIZE 0x1591000 | |
| #define SMEM_SPINLOCK_I2C 6 | |
| -#define MSM_PMEM_ADSP_SIZE 0x2900000 | |
| +#define MSM_PMEM_ADSP_SIZE 0x1C00000 | |
| #define MSM_PMEM_GPU1_SIZE 0x800000 | |
| #define MSM_FB_SIZE 0x500000 | |
| #define MSM_AUDIO_SIZE 0x80000 | |
| #define MSM_GPU_PHYS_SIZE SZ_2M | |
| #define MSM_SMI_BASE 0x2b00000 | |
| #define MSM_SMI_SIZE 0x1500000 | |
| #define MSM_FB_BASE MSM_SMI_BASE | |
| #define MSM_GPU_PHYS_BASE (MSM_FB_BASE + MSM_FB_SIZE) | |
| #define MSM_PMEM_GPU0_BASE (MSM_GPU_PHYS_BASE + MSM_GPU_PHYS_SIZE) | |
| #define MSM_PMEM_GPU0_SIZE (MSM_SMI_SIZE - MSM_FB_SIZE - MSM_GPU_PHYS_SIZE) | |
| -#define PMEM_KERNEL_EBI1_SIZE 0x200000 | |
| +#define PMEM_KERNEL_EBI1_SIZE 0 | |
| #define PMIC_VREG_WLAN_LEVEL 2600 | |
| #define PMIC_VREG_GP6_LEVEL 2900 | |
| +#define FPGA_SDCC_STATUS 0x70000280 | |
| + | |
| static struct resource smc91x_resources[] = { | |
| [0] = { | |
| .flags = IORESOURCE_MEM, | |
| }, | |
| [1] = { | |
| .flags = IORESOURCE_IRQ, | |
| }, | |
| }; | |
| @@ -159,16 +168,20 @@ | |
| .id = 0, | |
| .num_resources = ARRAY_SIZE(smc91x_resources), | |
| .resource = smc91x_resources, | |
| }; | |
| #define S1R72V05_CS_GPIO 152 | |
| #define S1R72V05_IRQ_GPIO 148 | |
| +#if 1 | |
| +extern void msm_init_pmic_vibrator( void ); | |
| +#endif | |
| + | |
| static int qsd8x50_init_s1r72v05(void) | |
| { | |
| int rc; | |
| u8 cs_gpio = S1R72V05_CS_GPIO; | |
| u8 irq_gpio = S1R72V05_IRQ_GPIO; | |
| rc = gpio_request(cs_gpio, "ide_s1r72v05_cs"); | |
| if (rc) { | |
| @@ -894,17 +907,21 @@ | |
| } | |
| static struct mddi_platform_data mddi_pdata = { | |
| .mddi_power_save = msm_fb_mddi_power_save, | |
| .mddi_sel_clk = msm_fb_mddi_sel_clk, | |
| }; | |
| static struct msm_panel_common_pdata mdp_pdata = { | |
| +#ifdef CONFIG_SHLCDC_BOARD | |
| + .gpio = 114, | |
| +#else | |
| .gpio = 98, | |
| +#endif | |
| }; | |
| static void __init msm_fb_add_devices(void) | |
| { | |
| msm_fb_register_device("mdp", &mdp_pdata); | |
| msm_fb_register_device("pmdh", &mddi_pdata); | |
| msm_fb_register_device("emdh", &mddi_pdata); | |
| msm_fb_register_device("tvenc", 0); | |
| @@ -1053,61 +1070,95 @@ | |
| BT_VDD_IO, | |
| BT_RFR, | |
| BT_CTS, | |
| BT_RX, | |
| BT_TX, | |
| BT_VDD_FREG | |
| }; | |
| -static unsigned bt_config_power_on[] = { | |
| - GPIO_CFG(18, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* SYSRST */ | |
| - GPIO_CFG(19, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* WAKE */ | |
| - GPIO_CFG(21, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), /* HOST_WAKE */ | |
| - GPIO_CFG(22, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* VDD_IO */ | |
| - GPIO_CFG(43, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* RFR */ | |
| - GPIO_CFG(44, 2, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), /* CTS */ | |
| - GPIO_CFG(45, 2, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), /* Rx */ | |
| - GPIO_CFG(46, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* Tx */ | |
| - | |
| - GPIO_CFG(62, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), | |
| - GPIO_CFG(63, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), | |
| - GPIO_CFG(64, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), | |
| - GPIO_CFG(65, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), | |
| - GPIO_CFG(66, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), | |
| - GPIO_CFG(67, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), | |
| - | |
| - GPIO_CFG(113, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), /* WLAN */ | |
| - GPIO_CFG(138, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), | |
| - | |
| -}; | |
| -static unsigned bt_config_power_off[] = { | |
| - GPIO_CFG(18, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* SYSRST */ | |
| - GPIO_CFG(19, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* WAKE */ | |
| - GPIO_CFG(21, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* HOST_WAKE */ | |
| - GPIO_CFG(22, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* VDD_IO */ | |
| - GPIO_CFG(43, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* RFR */ | |
| - GPIO_CFG(44, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* CTS */ | |
| - GPIO_CFG(45, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* Rx */ | |
| - GPIO_CFG(46, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* Tx */ | |
| - | |
| - GPIO_CFG(62, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| - GPIO_CFG(63, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| - GPIO_CFG(64, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| - GPIO_CFG(65, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| - GPIO_CFG(66, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| - GPIO_CFG(67, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| - | |
| - GPIO_CFG(113, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* WLAN */ | |
| - GPIO_CFG(138, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| +static struct msm_gpio bt_config_power_off[] = { | |
| + { GPIO_CFG(18, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| + "BT SYSRST" }, | |
| + { GPIO_CFG(19, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| + "BT WAKE" }, | |
| + { GPIO_CFG(21, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| + "HOST WAKE" }, | |
| + { GPIO_CFG(22, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| + "BT VDD_IO" }, | |
| + { GPIO_CFG(43, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| + "UART1DM_RFR" }, | |
| + { GPIO_CFG(44, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| + "UART1DM_CTS" }, | |
| + { GPIO_CFG(45, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| + "UART1DM_RX" }, | |
| + { GPIO_CFG(46, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| + "UART1DM_TX" } | |
| +}; | |
| + | |
| +static struct msm_gpio bt_config_power_on[] = { | |
| + { GPIO_CFG(18, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + "BT SYSRST" }, | |
| + { GPIO_CFG(19, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + "BT WAKE" }, | |
| + { GPIO_CFG(21, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + "HOST WAKE" }, | |
| + { GPIO_CFG(22, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + "BT VDD_IO" }, | |
| + { GPIO_CFG(43, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + "UART1DM_RFR" }, | |
| + { GPIO_CFG(44, 2, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + "UART1DM_CTS" }, | |
| + { GPIO_CFG(45, 2, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + "UART1DM_RX" }, | |
| + { GPIO_CFG(46, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + "UART1DM_TX" } | |
| +}; | |
| + | |
| +static struct msm_gpio wlan_config_power_off[] = { | |
| + { GPIO_CFG(62, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| + "SDC2_CLK" }, | |
| + { GPIO_CFG(63, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| + "SDC2_CMD" }, | |
| + { GPIO_CFG(64, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| + "SDC2_D3" }, | |
| + { GPIO_CFG(65, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| + "SDC2_D2" }, | |
| + { GPIO_CFG(66, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| + "SDC2_D1" }, | |
| + { GPIO_CFG(67, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| + "SDC2_D0" }, | |
| + { GPIO_CFG(113, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| + "VDD_WLAN" }, | |
| + { GPIO_CFG(138, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), | |
| + "WLAN_PWD" } | |
| +}; | |
| + | |
| +static struct msm_gpio wlan_config_power_on[] = { | |
| + { GPIO_CFG(62, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + "SDC2_CLK" }, | |
| + { GPIO_CFG(63, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + "SDC2_CMD" }, | |
| + { GPIO_CFG(64, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + "SDC2_D3" }, | |
| + { GPIO_CFG(65, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + "SDC2_D2" }, | |
| + { GPIO_CFG(66, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + "SDC2_D1" }, | |
| + { GPIO_CFG(67, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + "SDC2_D0" }, | |
| + { GPIO_CFG(113, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + "VDD_WLAN" }, | |
| + { GPIO_CFG(138, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), | |
| + "WLAN_PWD" } | |
| }; | |
| static int bluetooth_power(int on) | |
| { | |
| - int pin, rc; | |
| + int rc; | |
| struct vreg *vreg_wlan; | |
| vreg_wlan = vreg_get(NULL, "wlan"); | |
| if (IS_ERR(vreg_wlan)) { | |
| printk(KERN_ERR "%s: vreg get failed (%ld)\n", | |
| __func__, PTR_ERR(vreg_wlan)); | |
| return PTR_ERR(vreg_wlan); | |
| @@ -1123,70 +1174,98 @@ | |
| } | |
| rc = vreg_enable(vreg_wlan); | |
| if (rc) { | |
| printk(KERN_ERR "%s: vreg wlan enable failed (%d)\n", | |
| __func__, rc); | |
| return -EIO; | |
| } | |
| - for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on); pin++) { | |
| - rc = gpio_tlmm_config(bt_config_power_on[pin], | |
| - GPIO_ENABLE); | |
| - if (rc) { | |
| - printk(KERN_ERR | |
| - "%s: gpio_tlmm_config(%#x)=%d\n", | |
| - __func__, bt_config_power_on[pin], rc); | |
| - return -EIO; | |
| + rc = msm_gpios_enable(bt_config_power_on, | |
| + ARRAY_SIZE(bt_config_power_on)); | |
| + if (rc < 0) { | |
| + printk(KERN_ERR | |
| + "%s: bt power on gpio config failed: %d\n", | |
| + __func__, rc); | |
| + return rc; | |
| + } | |
| + | |
| + if (machine_is_qsd8x50_ffa()) { | |
| + rc = msm_gpios_enable | |
| + (wlan_config_power_on, | |
| + ARRAY_SIZE(wlan_config_power_on)); | |
| + if (rc < 0) { | |
| + printk | |
| + (KERN_ERR | |
| + "%s: wlan power on gpio config failed: %d\n", | |
| + __func__, rc); | |
| + return rc; | |
| } | |
| } | |
| gpio_set_value(22, on); /* VDD_IO */ | |
| gpio_set_value(18, on); /* SYSRST */ | |
| - gpio_set_value(138, 0); /* WLAN: CHIP_PWD */ | |
| - gpio_set_value(113, on); /* WLAN */ | |
| + if (machine_is_qsd8x50_ffa()) { | |
| + gpio_set_value(138, 0); /* WLAN: CHIP_PWD */ | |
| + gpio_set_value(113, on); /* WLAN */ | |
| + } | |
| } else { | |
| - gpio_set_value(138, on); /* WLAN: CHIP_PWD */ | |
| - gpio_set_value(113, on); /* WLAN */ | |
| + if (machine_is_qsd8x50_ffa()) { | |
| + gpio_set_value(138, on); /* WLAN: CHIP_PWD */ | |
| + gpio_set_value(113, on); /* WLAN */ | |
| + } | |
| gpio_set_value(18, on); /* SYSRST */ | |
| gpio_set_value(22, on); /* VDD_IO */ | |
| rc = vreg_disable(vreg_wlan); | |
| if (rc) { | |
| printk(KERN_ERR "%s: vreg wlan disable failed (%d)\n", | |
| __func__, rc); | |
| return -EIO; | |
| } | |
| - for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off); pin++) { | |
| - rc = gpio_tlmm_config(bt_config_power_off[pin], | |
| - GPIO_ENABLE); | |
| - if (rc) { | |
| - printk(KERN_ERR | |
| - "%s: gpio_tlmm_config(%#x)=%d\n", | |
| - __func__, bt_config_power_off[pin], rc); | |
| - return -EIO; | |
| + rc = msm_gpios_enable(bt_config_power_off, | |
| + ARRAY_SIZE(bt_config_power_off)); | |
| + if (rc < 0) { | |
| + printk(KERN_ERR | |
| + "%s: bt power off gpio config failed: %d\n", | |
| + __func__, rc); | |
| + return rc; | |
| + } | |
| + | |
| + if (machine_is_qsd8x50_ffa()) { | |
| + rc = msm_gpios_enable | |
| + (wlan_config_power_off, | |
| + ARRAY_SIZE(wlan_config_power_off)); | |
| + if (rc < 0) { | |
| + printk | |
| + (KERN_ERR | |
| + "%s: wlan power off gpio config failed: %d\n", | |
| + __func__, rc); | |
| + return rc; | |
| } | |
| } | |
| } | |
| printk(KERN_DEBUG "Bluetooth power switch: %d\n", on); | |
| return 0; | |
| } | |
| static void __init bt_power_init(void) | |
| { | |
| struct vreg *vreg_bt; | |
| int rc; | |
| - gpio_set_value(138, 0); /* WLAN: CHIP_PWD */ | |
| - gpio_set_value(113, 0); /* WLAN */ | |
| + if (machine_is_qsd8x50_ffa()) { | |
| + gpio_set_value(138, 0); /* WLAN: CHIP_PWD */ | |
| + gpio_set_value(113, 0); /* WLAN */ | |
| + } | |
| gpio_set_value(18, 0); /* SYSRST */ | |
| gpio_set_value(22, 0); /* VDD_IO */ | |
| /* do not have vreg bt defined, gp6 is the same */ | |
| /* vreg_get parameter 1 (struct device *) is ignored */ | |
| vreg_bt = vreg_get(NULL, "gp6"); | |
| @@ -1257,16 +1336,23 @@ | |
| }, | |
| }; | |
| static struct platform_device msm_device_pmic_leds = { | |
| .name = "pmic-leds", | |
| .id = -1, | |
| }; | |
| +#if 1 | |
| +static struct platform_device msm_device_sh_battery = { | |
| + .name = "sh_battery", | |
| + .id = 0, | |
| +}; | |
| +#endif | |
| + | |
| /* TSIF begin */ | |
| #if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) | |
| #define TSIF_A_SYNC GPIO_CFG(106, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA) | |
| #define TSIF_A_DATA GPIO_CFG(107, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA) | |
| #define TSIF_A_EN GPIO_CFG(108, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA) | |
| #define TSIF_A_CLK GPIO_CFG(109, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA) | |
| @@ -1321,17 +1407,17 @@ | |
| .max_speed_delta_khz = 256000, | |
| .vdd_switch_time_us = 62, | |
| .power_collapse_khz = 128000000, | |
| .wait_for_irq_khz = 128000000, | |
| .max_vdd = TPS65023_MAX_DCDC1, | |
| .acpu_set_vdd = qsd8x50_tps65023_set_dcdc1, | |
| }; | |
| - | |
| +#if 0 | |
| static void touchpad_gpio_release(void) | |
| { | |
| gpio_free(TOUCHPAD_IRQ); | |
| gpio_free(TOUCHPAD_SUSPEND); | |
| } | |
| static int touchpad_gpio_setup(void) | |
| { | |
| @@ -1374,95 +1460,362 @@ | |
| return rc; | |
| } | |
| static struct msm_touchpad_platform_data msm_touchpad_data = { | |
| .gpioirq = TOUCHPAD_IRQ, | |
| .gpiosuspend = TOUCHPAD_SUSPEND, | |
| .gpio_setup = touchpad_gpio_setup, | |
| .gpio_shutdown = touchpad_gpio_release | |
| -}; | |
| +} | |
| +; | |
| +#endif | |
| +#if 0 | |
| #define KBD_RST 35 | |
| #define KBD_IRQ 36 | |
| +#else | |
| +static const struct | |
| +{ | |
| + int pinno; | |
| + unsigned cfg; | |
| + char *msg; | |
| +} msm_i2ckbd[] = | |
| + { | |
| + { SH_KBD_IRQ, GPIO_CFG(SH_KBD_IRQ, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA), "gpio_keybd_irq" }, | |
| + { SH_JOG_U_IRQ, GPIO_CFG(SH_JOG_U_IRQ, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA), "gpio_jog_u_irq" }, | |
| + { SH_JOG_D_IRQ, GPIO_CFG(SH_JOG_D_IRQ, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA), "gpio_jog_d_irq" }, | |
| + { SH_JOG_L_IRQ, GPIO_CFG(SH_JOG_L_IRQ, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA), "gpio_jog_l_irq" }, | |
| + { SH_JOG_R_IRQ, GPIO_CFG(SH_JOG_R_IRQ, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA), "gpio_jog_r_irq" }, | |
| + }; | |
| +#endif | |
| static void kbd_gpio_release(void) | |
| { | |
| +#if 0 | |
| gpio_free(KBD_IRQ); | |
| gpio_free(KBD_RST); | |
| +#else | |
| + int i; | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2ckbd); i++) | |
| + { | |
| + gpio_free(msm_i2ckbd[i].pinno); | |
| + } | |
| +#endif | |
| } | |
| static int kbd_gpio_setup(void) | |
| { | |
| +#if 0 | |
| int rc; | |
| int respin = KBD_RST; | |
| int irqpin = KBD_IRQ; | |
| unsigned rescfg = | |
| GPIO_CFG(respin, 0, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA); | |
| unsigned irqcfg = | |
| GPIO_CFG(irqpin, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA); | |
| rc = gpio_request(irqpin, "gpio_keybd_irq"); | |
| if (rc) { | |
| pr_err("gpio_request failed on pin %d (rc=%d)\n", | |
| - irqpin, rc); | |
| + irqpin, rc); | |
| goto err_gpioconfig; | |
| } | |
| rc = gpio_request(respin, "gpio_keybd_reset"); | |
| if (rc) { | |
| pr_err("gpio_request failed on pin %d (rc=%d)\n", | |
| - respin, rc); | |
| + respin, rc); | |
| goto err_gpioconfig; | |
| } | |
| rc = gpio_tlmm_config(rescfg, GPIO_ENABLE); | |
| if (rc) { | |
| pr_err("gpio_tlmm_config failed on pin %d (rc=%d)\n", | |
| - respin, rc); | |
| + respin, rc); | |
| goto err_gpioconfig; | |
| } | |
| rc = gpio_tlmm_config(irqcfg, GPIO_ENABLE); | |
| if (rc) { | |
| pr_err("gpio_tlmm_config failed on pin %d (rc=%d)\n", | |
| - irqpin, rc); | |
| + irqpin, rc); | |
| goto err_gpioconfig; | |
| } | |
| +#else | |
| + int rc; | |
| + int i; | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2ckbd); i++) | |
| + { | |
| + rc = gpio_request(msm_i2ckbd[i].pinno, msm_i2ckbd[i].msg); | |
| + if (rc) { | |
| + pr_err("[OctKey]gpio_request failed on pin %d (rc=%d)\n", msm_i2ckbd[i].pinno, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + } | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2ckbd); i++) | |
| + { | |
| + rc = gpio_tlmm_config(msm_i2ckbd[i].cfg, GPIO_ENABLE); | |
| + if (rc) { | |
| + pr_err("[OctKey]gpio_tlmm_config failed on pin %d (rc=%d)\n", msm_i2ckbd[i].pinno, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + } | |
| +#endif | |
| return rc; | |
| err_gpioconfig: | |
| kbd_gpio_release(); | |
| return rc; | |
| } | |
| +#if 0 | |
| /* use gpio output pin to toggle keyboard external reset pin */ | |
| static void kbd_hwreset(int kbd_mclrpin) | |
| { | |
| gpio_direction_output(kbd_mclrpin, 0); | |
| gpio_direction_output(kbd_mclrpin, 1); | |
| } | |
| static struct msm_i2ckbd_platform_data msm_kybd_data = { | |
| .hwrepeat = 0, | |
| .scanset1 = 1, | |
| .gpioreset = KBD_RST, | |
| .gpioirq = KBD_IRQ, | |
| .gpio_setup = kbd_gpio_setup, | |
| .gpio_shutdown = kbd_gpio_release, | |
| .hw_reset = kbd_hwreset, | |
| }; | |
| +#else | |
| +static struct msm_sh_i2ckbd_platform_data msm_kybd_data = { | |
| + .gpio_kbdirq = SH_KBD_IRQ, | |
| + .gpio_jogirq[0] = SH_JOG_U_IRQ, | |
| + .gpio_jogirq[1] = SH_JOG_D_IRQ, | |
| + .gpio_jogirq[2] = SH_JOG_L_IRQ, | |
| + .gpio_jogirq[3] = SH_JOG_R_IRQ, | |
| + .gpio_setup = kbd_gpio_setup, | |
| + .gpio_shutdown = kbd_gpio_release, | |
| +}; | |
| +#endif | |
| + | |
| +#if 1 | |
| +static const struct | |
| +{ | |
| + int pinno; | |
| + unsigned cfg; | |
| + char *msg; | |
| +} msm_i2ctps[] = | |
| + { | |
| + { SH_TOUCH_IRQ, GPIO_CFG(SH_TOUCH_IRQ, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA), "gpio_touch_irq" }, | |
| + { SH_TOUCH_HSSP_CLK, GPIO_CFG(SH_TOUCH_HSSP_CLK, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), "gpio_touch_hssp_clk" }, | |
| + { SH_TOUCH_HSSP_DATA, GPIO_CFG(SH_TOUCH_HSSP_DATA, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), "gpio_touch_hssp_data" }, | |
| + }; | |
| + | |
| +static void tps_gpio_release(void) | |
| +{ | |
| + int i; | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2ctps); i++) | |
| + { | |
| + gpio_free(msm_i2ctps[i].pinno); | |
| + } | |
| +} | |
| + | |
| +static int tps_gpio_setup(void) | |
| +{ | |
| + int rc; | |
| + int i; | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2ctps); i++) | |
| + { | |
| +printk(KERN_DEBUG "TOUCH Request GPIO %d\n", msm_i2ctps[i].pinno); | |
| + rc = gpio_request(msm_i2ctps[i].pinno, msm_i2ctps[i].msg); | |
| + if (rc) { | |
| + pr_err("[OctTps]gpio_request failed on pin %d (rc=%d)\n", msm_i2ctps[i].pinno, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + } | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2ctps); i++) | |
| + { | |
| + rc = gpio_tlmm_config(msm_i2ctps[i].cfg, GPIO_ENABLE); | |
| + if (rc) { | |
| + pr_err("[OctTps]gpio_tlmm_config failed on pin %d (rc=%d)\n", msm_i2ctps[i].pinno, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + } | |
| + return rc; | |
| + | |
| +err_gpioconfig: | |
| + tps_gpio_release(); | |
| + return rc; | |
| +} | |
| + | |
| +static struct msm_sh_i2ctps_platform_data msm_touch_data = { | |
| + .gpio_irq = SH_TOUCH_IRQ, | |
| + .gpio_hssp_clk = SH_TOUCH_HSSP_CLK, | |
| + .gpio_hssp_data = SH_TOUCH_HSSP_DATA, | |
| + .gpio_setup = tps_gpio_setup, | |
| + .gpio_shutdown = tps_gpio_release, | |
| +}; | |
| +#endif | |
| + | |
| +#if 1 | |
| +static const struct | |
| +{ | |
| + int pinno; | |
| + unsigned cfg; | |
| + char *msg; | |
| +} msm_i2c_accel[] = | |
| + { | |
| + { SH_ACCEL_IRQ, GPIO_CFG(SH_ACCEL_IRQ, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA), "gpio_accel_irq" }, | |
| + }; | |
| + | |
| +static void accel_gpio_release(void) | |
| +{ | |
| + int i; | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2c_accel); i++) | |
| + { | |
| + gpio_free(msm_i2c_accel[i].pinno); | |
| + } | |
| +} | |
| + | |
| +static int accel_gpio_setup(void) | |
| +{ | |
| + int rc; | |
| + int i; | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2c_accel); i++) | |
| + { | |
| + rc = gpio_request(msm_i2c_accel[i].pinno, msm_i2c_accel[i].msg); | |
| + if (rc) { | |
| + pr_err("[ACCEL]gpio_request failed on pin %d (rc=%d)\n", msm_i2c_accel[i].pinno, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + } | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2c_accel); i++) | |
| + { | |
| + rc = gpio_tlmm_config(msm_i2c_accel[i].cfg, GPIO_ENABLE); | |
| + if (rc) { | |
| + pr_err("[ACCEL]gpio_tlmm_config failed on pin %d (rc=%d)\n", msm_i2c_accel[i].pinno, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + } | |
| + return rc; | |
| + | |
| +err_gpioconfig: | |
| + accel_gpio_release(); | |
| + return rc; | |
| +} | |
| + | |
| +static struct sh_i2c_accel_platform_data msm_accel_data = { | |
| + .gpio_irq = SH_ACCEL_IRQ, | |
| + .gpio_setup = accel_gpio_setup, | |
| + .gpio_shutdown = accel_gpio_release, | |
| +}; | |
| + | |
| + | |
| +static const struct | |
| +{ | |
| + int pinno; | |
| + unsigned cfg; | |
| + char *msg; | |
| +} msm_i2c_comps[] = | |
| + { | |
| + { SH_COMPS_IRQ, GPIO_CFG(SH_COMPS_IRQ, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA), "gpio_comps_irq" }, | |
| + { SH_COMPS_RST, GPIO_CFG(SH_COMPS_RST, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), "gpio_comps_rst" }, | |
| + }; | |
| + | |
| +static void comps_gpio_release(void) | |
| +{ | |
| + int i; | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2c_comps); i++) | |
| + { | |
| + gpio_free(msm_i2c_comps[i].pinno); | |
| + } | |
| +} | |
| + | |
| +static int comps_gpio_setup(void) | |
| +{ | |
| + int rc; | |
| + int i; | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2c_comps); i++) | |
| + { | |
| + rc = gpio_request(msm_i2c_comps[i].pinno, msm_i2c_comps[i].msg); | |
| + if (rc) { | |
| + pr_err("[COMPASS]gpio_request failed on pin %d (rc=%d)\n", msm_i2c_comps[i].pinno, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + } | |
| + for(i = 0; i < ARRAY_SIZE(msm_i2c_comps); i++) | |
| + { | |
| + rc = gpio_tlmm_config(msm_i2c_comps[i].cfg, GPIO_ENABLE); | |
| + if (rc) { | |
| + pr_err("[COMPASS]gpio_tlmm_config failed on pin %d (rc=%d)\n", msm_i2c_comps[i].pinno, rc); | |
| + goto err_gpioconfig; | |
| + } | |
| + } | |
| + return rc; | |
| + | |
| +err_gpioconfig: | |
| + comps_gpio_release(); | |
| + return rc; | |
| +} | |
| + | |
| +static struct sh_i2c_compass_platform_data msm_comps_data = { | |
| + .gpio_irq = SH_COMPS_IRQ, | |
| + .gpio_rst = SH_COMPS_RST, | |
| + .gpio_setup = comps_gpio_setup, | |
| + .gpio_shutdown = comps_gpio_release, | |
| +}; | |
| +#endif | |
| static struct i2c_board_info msm_i2c_board_info[] __initdata = { | |
| +#if 1 | |
| + { | |
| + I2C_BOARD_INFO(SH_TOUCH_I2C_DEVNAME, SH_TOUCH_I2C_SLAVE), | |
| + .type = SH_TOUCH_I2C_DEVNAME, | |
| + .irq = MSM_GPIO_TO_INT(SH_TOUCH_IRQ), | |
| + .platform_data = &msm_touch_data | |
| + }, | |
| + { | |
| + I2C_BOARD_INFO(SH_KBD_I2C_DEVNAME, SH_KBD_I2C_SLAVE), | |
| + .type = SH_KBD_I2C_DEVNAME, | |
| + .irq = MSM_GPIO_TO_INT(SH_KBD_IRQ), | |
| + .platform_data = &msm_kybd_data | |
| + }, | |
| + { | |
| + I2C_BOARD_INFO(SH_ACCEL_I2C_DEVNAME, SH_ACCEL_I2C_SLAVE), | |
| + .type = SH_ACCEL_I2C_DEVNAME, | |
| + .irq = MSM_GPIO_TO_INT(SH_ACCEL_IRQ), | |
| + .platform_data = &msm_accel_data | |
| + }, | |
| + { | |
| + I2C_BOARD_INFO(SH_COMPS_I2C_DEVNAME, SH_COMPS_I2C_SLAVE), | |
| + .type = SH_COMPS_I2C_DEVNAME, | |
| + .irq = MSM_GPIO_TO_INT(SH_COMPS_IRQ), | |
| + .platform_data = &msm_comps_data | |
| + }, | |
| +#else | |
| { | |
| I2C_BOARD_INFO("glidesensor", 0x2A), | |
| .irq = MSM_GPIO_TO_INT(TOUCHPAD_IRQ), | |
| .platform_data = &msm_touchpad_data | |
| }, | |
| { | |
| +#if 0 | |
| I2C_BOARD_INFO("msm-i2ckbd", 0x3A), | |
| .type = "msm-i2ckbd", | |
| .irq = MSM_GPIO_TO_INT(KBD_IRQ), | |
| +#else | |
| + I2C_BOARD_INFO(SH_KBD_I2C_DEVNAME, SH_KBD_I2C_SLAVE), | |
| + .type = SH_KBD_I2C_DEVNAME, | |
| + .irq = MSM_GPIO_TO_INT(KBD_IRQ), | |
| +#endif | |
| .platform_data = &msm_kybd_data | |
| }, | |
| #ifdef CONFIG_MT9D112 | |
| { | |
| I2C_BOARD_INFO("mt9d112", 0x78 >> 1), | |
| }, | |
| #endif | |
| #ifdef CONFIG_S5K3E2FX | |
| @@ -1478,16 +1831,17 @@ | |
| #if defined(CONFIG_MT9T013) || defined(CONFIG_SENSORS_MT9T013) | |
| { | |
| I2C_BOARD_INFO("mt9t013", 0x6C), | |
| }, | |
| #endif | |
| { | |
| I2C_BOARD_INFO("tps65023", 0x48), | |
| }, | |
| +#endif | |
| }; | |
| #ifdef CONFIG_MSM_CAMERA | |
| static uint32_t camera_off_gpio_table[] = { | |
| /* parallel CAMERA interfaces */ | |
| GPIO_CFG(0, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT0 */ | |
| GPIO_CFG(1, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT1 */ | |
| GPIO_CFG(2, 0, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), /* DAT2 */ | |
| @@ -1793,17 +2147,22 @@ | |
| &msm_camera_sensor_mt9d112, | |
| #endif | |
| #ifdef CONFIG_S5K3E2FX | |
| &msm_camera_sensor_s5k3e2fx, | |
| #endif | |
| #ifdef CONFIG_MT9P012 | |
| &msm_camera_sensor_mt9p012, | |
| #endif | |
| + | |
| &msm_batt_device, | |
| +#if 1 | |
| + &msm_device_sh_battery, | |
| +#endif | |
| + | |
| }; | |
| static void __init qsd8x50_init_irq(void) | |
| { | |
| msm_init_irq(); | |
| msm_init_sirc(); | |
| } | |
| @@ -1829,146 +2188,105 @@ | |
| platform_device_register(&msm_device_hsusb_otg); | |
| msm_add_host(0, &msm_usb_host_pdata); | |
| #ifdef CONFIG_USB_FS_HOST | |
| if (fsusb_gpio_init()) | |
| return; | |
| msm_add_host(1, &msm_usb_host2_pdata); | |
| #endif | |
| } | |
| -static void sdcc_gpio_init(void) | |
| -{ | |
| - /* SDC1 GPIOs */ | |
| -#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT | |
| - if (gpio_request(51, "sdc1_data_3")) | |
| - pr_err("failed to request gpio sdc1_data_3\n"); | |
| - if (gpio_request(52, "sdc1_data_2")) | |
| - pr_err("failed to request gpio sdc1_data_2\n"); | |
| - if (gpio_request(53, "sdc1_data_1")) | |
| - pr_err("failed to request gpio sdc1_data_1\n"); | |
| - if (gpio_request(54, "sdc1_data_0")) | |
| - pr_err("failed to request gpio sdc1_data_0\n"); | |
| - if (gpio_request(55, "sdc1_cmd")) | |
| - pr_err("failed to request gpio sdc1_cmd\n"); | |
| - if (gpio_request(56, "sdc1_clk")) | |
| - pr_err("failed to request gpio sdc1_clk\n"); | |
| -#endif | |
| - if (machine_is_qsd8x50_ffa()) | |
| - return; | |
| +struct sdcc_gpio { | |
| + struct msm_gpio *cfg_data; | |
| + uint32_t size; | |
| +}; | |
| - /* SDC2 GPIOs */ | |
| -#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT | |
| - if (gpio_request(62, "sdc2_clk")) | |
| - pr_err("failed to request gpio sdc2_clk\n"); | |
| - if (gpio_request(63, "sdc2_cmd")) | |
| - pr_err("failed to request gpio sdc2_cmd\n"); | |
| - if (gpio_request(64, "sdc2_data_3")) | |
| - pr_err("failed to request gpio sdc2_data_3\n"); | |
| - if (gpio_request(65, "sdc2_data_2")) | |
| - pr_err("failed to request gpio sdc2_data_2\n"); | |
| - if (gpio_request(66, "sdc2_data_1")) | |
| - pr_err("failed to request gpio sdc2_data_1\n"); | |
| - if (gpio_request(67, "sdc2_data_0")) | |
| - pr_err("failed to request gpio sdc2_data_0\n"); | |
| -#endif | |
| +static struct msm_gpio sdc1_cfg_data[] = { | |
| + {GPIO_CFG(51, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc1_dat_3"}, | |
| + {GPIO_CFG(52, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc1_dat_2"}, | |
| + {GPIO_CFG(53, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc1_dat_1"}, | |
| + {GPIO_CFG(54, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc1_dat_0"}, | |
| + {GPIO_CFG(55, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc1_cmd"}, | |
| + {GPIO_CFG(56, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), "sdc1_clk"}, | |
| +}; | |
| - /* SDC3 GPIOs */ | |
| -#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT | |
| - if (gpio_request(88, "sdc3_clk")) | |
| - pr_err("failed to request gpio sdc3_clk\n"); | |
| - if (gpio_request(89, "sdc3_cmd")) | |
| - pr_err("failed to request gpio sdc3_cmd\n"); | |
| - if (gpio_request(90, "sdc3_data_3")) | |
| - pr_err("failed to request gpio sdc3_data_3\n"); | |
| - if (gpio_request(91, "sdc3_data_2")) | |
| - pr_err("failed to request gpio sdc3_data_2\n"); | |
| - if (gpio_request(92, "sdc3_data_1")) | |
| - pr_err("failed to request gpio sdc3_data_1\n"); | |
| - if (gpio_request(93, "sdc3_data_0")) | |
| - pr_err("failed to request gpio sdc3_data_0\n"); | |
| -#endif | |
| +static struct msm_gpio sdc2_cfg_data[] = { | |
| + {GPIO_CFG(62, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), "sdc2_clk"}, | |
| + {GPIO_CFG(63, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc2_cmd"}, | |
| + {GPIO_CFG(64, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc2_dat_3"}, | |
| + {GPIO_CFG(65, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc2_dat_2"}, | |
| + {GPIO_CFG(66, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc2_dat_1"}, | |
| + {GPIO_CFG(67, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc2_dat_0"}, | |
| +}; | |
| - /* SDC4 GPIOs */ | |
| -#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT | |
| - if (gpio_request(142, "sdc4_clk")) | |
| - pr_err("failed to request gpio sdc4_clk\n"); | |
| - if (gpio_request(143, "sdc4_cmd")) | |
| - pr_err("failed to request gpio sdc4_cmd\n"); | |
| - if (gpio_request(144, "sdc4_data_0")) | |
| - pr_err("failed to request gpio sdc4_data_0\n"); | |
| - if (gpio_request(145, "sdc4_data_1")) | |
| - pr_err("failed to request gpio sdc4_data_1\n"); | |
| - if (gpio_request(146, "sdc4_data_2")) | |
| - pr_err("failed to request gpio sdc4_data_2\n"); | |
| - if (gpio_request(147, "sdc4_data_3")) | |
| - pr_err("failed to request gpio sdc4_data_3\n"); | |
| +static struct msm_gpio sdc3_cfg_data[] = { | |
| + {GPIO_CFG(88, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), "sdc3_clk"}, | |
| + {GPIO_CFG(89, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc3_cmd"}, | |
| + {GPIO_CFG(90, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc3_dat_3"}, | |
| + {GPIO_CFG(91, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc3_dat_2"}, | |
| + {GPIO_CFG(92, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc3_dat_1"}, | |
| + {GPIO_CFG(93, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc3_dat_0"}, | |
| + | |
| +#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT | |
| + {GPIO_CFG(158, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc3_dat_4"}, | |
| + {GPIO_CFG(159, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc3_dat_5"}, | |
| + {GPIO_CFG(160, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc3_dat_6"}, | |
| + {GPIO_CFG(161, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc3_dat_7"}, | |
| #endif | |
| -} | |
| +}; | |
| -static unsigned sdcc_cfg_data[][6] = { | |
| - /* SDC1 configs */ | |
| - { | |
| - GPIO_CFG(51, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(52, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(53, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(54, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(55, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(56, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), | |
| - }, | |
| - /* SDC2 configs */ | |
| - { | |
| - GPIO_CFG(62, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), | |
| - GPIO_CFG(63, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(64, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(65, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(66, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(67, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - }, | |
| - /* SDC3 configs */ | |
| - { | |
| - GPIO_CFG(88, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), | |
| - GPIO_CFG(89, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(90, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(91, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(92, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(93, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - }, | |
| - /* SDC4 configs */ | |
| - { | |
| - GPIO_CFG(142, 3, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), | |
| - GPIO_CFG(143, 3, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(144, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(145, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(146, 3, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - GPIO_CFG(147, 3, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), | |
| - } | |
| +static struct msm_gpio sdc4_cfg_data[] = { | |
| + {GPIO_CFG(142, 3, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), "sdc4_clk"}, | |
| + {GPIO_CFG(143, 3, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc4_cmd"}, | |
| + {GPIO_CFG(144, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc4_dat_0"}, | |
| + {GPIO_CFG(145, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc4_dat_1"}, | |
| + {GPIO_CFG(146, 3, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc4_dat_2"}, | |
| + {GPIO_CFG(147, 3, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), "sdc4_dat_3"}, | |
| +}; | |
| + | |
| +static struct sdcc_gpio sdcc_cfg_data[] = { | |
| + { | |
| + .cfg_data = sdc1_cfg_data, | |
| + .size = ARRAY_SIZE(sdc1_cfg_data), | |
| + }, | |
| + { | |
| + .cfg_data = sdc2_cfg_data, | |
| + .size = ARRAY_SIZE(sdc2_cfg_data), | |
| + }, | |
| + { | |
| + .cfg_data = sdc3_cfg_data, | |
| + .size = ARRAY_SIZE(sdc3_cfg_data), | |
| + }, | |
| + { | |
| + .cfg_data = sdc4_cfg_data, | |
| + .size = ARRAY_SIZE(sdc4_cfg_data), | |
| + }, | |
| }; | |
| static unsigned long vreg_sts, gpio_sts; | |
| static struct vreg *vreg_mmc; | |
| static void msm_sdcc_setup_gpio(int dev_id, unsigned int enable) | |
| { | |
| - int i, rc; | |
| + int rc = 0; | |
| + struct sdcc_gpio *curr; | |
| + curr = &sdcc_cfg_data[dev_id - 1]; | |
| if (!(test_bit(dev_id, &gpio_sts)^enable)) | |
| return; | |
| - if (enable) | |
| + if (enable) { | |
| set_bit(dev_id, &gpio_sts); | |
| - else | |
| - clear_bit(dev_id, &gpio_sts); | |
| - | |
| - for (i = 0; i < ARRAY_SIZE(sdcc_cfg_data[dev_id - 1]); i++) { | |
| - rc = gpio_tlmm_config(sdcc_cfg_data[dev_id - 1][i], | |
| - enable ? GPIO_ENABLE : GPIO_DISABLE); | |
| + rc = msm_gpios_request_enable(curr->cfg_data, curr->size); | |
| if (rc) | |
| - printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=%d\n", | |
| - __func__, sdcc_cfg_data[dev_id - 1][i], rc); | |
| + printk(KERN_ERR "%s: Failed to turn on GPIOs for slot %d\n", | |
| + __func__, dev_id); | |
| + } else { | |
| + clear_bit(dev_id, &gpio_sts); | |
| + msm_gpios_disable_free(curr->cfg_data, curr->size); | |
| } | |
| } | |
| static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd) | |
| { | |
| int rc = 0; | |
| struct platform_device *pdev; | |
| @@ -1997,48 +2315,107 @@ | |
| if (rc) | |
| printk(KERN_ERR "%s: return val: %d \n", | |
| __func__, rc); | |
| } | |
| set_bit(pdev->id, &vreg_sts); | |
| return 0; | |
| } | |
| -static struct mmc_platform_data qsd8x50_sdcc_data = { | |
| + | |
| +static int msm_sdcc_get_wpswitch(struct device *dv) | |
| +{ | |
| + void __iomem *wp_addr = 0; | |
| + uint32_t ret = 0; | |
| + struct platform_device *pdev; | |
| + | |
| + if (machine_is_qsd8x50_ffa()) | |
| + return -1; | |
| + | |
| + pdev = container_of(dv, struct platform_device, dev); | |
| + | |
| + wp_addr = ioremap(FPGA_SDCC_STATUS, 4); | |
| + if (!wp_addr) { | |
| + pr_err("%s: Could not remap %x\n", __func__, FPGA_SDCC_STATUS); | |
| + return -ENOMEM; | |
| + } | |
| + | |
| + ret = (readl(wp_addr) >> ((pdev->id - 1) << 1)) & (0x03); | |
| + pr_info("%s: WP/CD Status for Slot %d = 0x%x \n", __func__, | |
| + pdev->id, ret); | |
| + iounmap(wp_addr); | |
| + return ((ret == 0x02) ? 1 : 0); | |
| + | |
| +} | |
| + | |
| +#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT | |
| +static struct mmc_platform_data qsd8x50_sdc1_data = { | |
| .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, | |
| .translate_vdd = msm_sdcc_setup_power, | |
| + .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
| + .wpswitch = msm_sdcc_get_wpswitch, | |
| }; | |
| +#endif | |
| + | |
| +#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT | |
| +static struct mmc_platform_data qsd8x50_sdc2_data = { | |
| + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, | |
| + .translate_vdd = msm_sdcc_setup_power, | |
| + .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
| + .wpswitch = msm_sdcc_get_wpswitch, | |
| +}; | |
| +#endif | |
| + | |
| +#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT | |
| +static struct mmc_platform_data qsd8x50_sdc3_data = { | |
| + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, | |
| + .translate_vdd = msm_sdcc_setup_power, | |
| +#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT | |
| + .mmc_bus_width = MMC_CAP_8_BIT_DATA, | |
| +#else | |
| + .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
| +#endif | |
| +}; | |
| +#endif | |
| + | |
| +#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT | |
| +static struct mmc_platform_data qsd8x50_sdc4_data = { | |
| + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, | |
| + .translate_vdd = msm_sdcc_setup_power, | |
| + .mmc_bus_width = MMC_CAP_4_BIT_DATA, | |
| + .wpswitch = msm_sdcc_get_wpswitch, | |
| +}; | |
| +#endif | |
| static void __init qsd8x50_init_mmc(void) | |
| { | |
| if (machine_is_qsd8x50_ffa()) | |
| vreg_mmc = vreg_get(NULL, "gp6"); | |
| else | |
| vreg_mmc = vreg_get(NULL, "gp5"); | |
| if (IS_ERR(vreg_mmc)) { | |
| printk(KERN_ERR "%s: vreg get failed (%ld)\n", | |
| __func__, PTR_ERR(vreg_mmc)); | |
| return; | |
| } | |
| - sdcc_gpio_init(); | |
| #ifdef CONFIG_MMC_MSM_SDC1_SUPPORT | |
| - msm_add_sdcc(1, &qsd8x50_sdcc_data); | |
| + msm_add_sdcc(1, &qsd8x50_sdc1_data, 0, 0); | |
| #endif | |
| if (machine_is_qsd8x50_surf()) { | |
| #ifdef CONFIG_MMC_MSM_SDC2_SUPPORT | |
| - msm_add_sdcc(2, &qsd8x50_sdcc_data); | |
| + msm_add_sdcc(2, &qsd8x50_sdc2_data, 0, 0); | |
| #endif | |
| #ifdef CONFIG_MMC_MSM_SDC3_SUPPORT | |
| - msm_add_sdcc(3, &qsd8x50_sdcc_data); | |
| + msm_add_sdcc(3, &qsd8x50_sdc3_data, 0, 0); | |
| #endif | |
| #ifdef CONFIG_MMC_MSM_SDC4_SUPPORT | |
| - msm_add_sdcc(4, &qsd8x50_sdcc_data); | |
| + msm_add_sdcc(4, &qsd8x50_sdc4_data, 0, 0); | |
| #endif | |
| } | |
| } | |
| static void __init qsd8x50_cfg_smc91x(void) | |
| { | |
| int rc = 0; | |
| @@ -2060,16 +2437,19 @@ | |
| if (rc) { | |
| printk(KERN_ERR "%s: gpio_tlmm_config=%d\n", | |
| __func__, rc); | |
| } | |
| } else | |
| printk(KERN_ERR "%s: invalid machine type\n", __func__); | |
| } | |
| +#if 1 | |
| +static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR]; | |
| +#else | |
| static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR] = { | |
| [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].supported = 1, | |
| [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].suspend_enabled = 1, | |
| [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].idle_enabled = 1, | |
| [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].latency = 8594, | |
| [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].residency = 23740, | |
| [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].supported = 1, | |
| @@ -2086,16 +2466,17 @@ | |
| [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].residency = 1098, | |
| [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].supported = 1, | |
| [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].suspend_enabled = 1, | |
| [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].idle_enabled = 1, | |
| [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].latency = 2, | |
| [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].residency = 0, | |
| }; | |
| +#endif | |
| static void | |
| msm_i2c_gpio_config(int iface, int config_type) | |
| { | |
| int gpio_scl; | |
| int gpio_sda; | |
| if (iface) { | |
| gpio_scl = 60; | |
| @@ -2215,16 +2596,21 @@ | |
| kgsl_phys_memory_init(); | |
| #ifdef CONFIG_SURF_FFA_GPIO_KEYPAD | |
| if (machine_is_qsd8x50_ffa()) | |
| platform_device_register(&keypad_device_8k_ffa); | |
| else | |
| platform_device_register(&keypad_device_surf); | |
| #endif | |
| + | |
| +#if 1 | |
| + msm_init_pmic_vibrator(); | |
| +#endif | |
| + | |
| } | |
| static void __init qsd8x50_allocate_memory_regions(void) | |
| { | |
| void *addr; | |
| unsigned long size; | |
| size = pmem_kernel_ebi1_size; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-sapphire-gpio.c kernel/arch/arm/mach-msm/board-sapphire-gpio.c | |
| --- kernel-msm/arch/arm/mach-msm/board-sapphire-gpio.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-sapphire-gpio.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -318,9 +318,9 @@ | |
| { | |
| int i; | |
| for (i = 0; i < ARRAY_SIZE(sapphire_cpld_initdata); i++) | |
| writeb(sapphire_cpld_initdata[i], SAPPHIRE_CPLD_BASE + i * 2); | |
| return 0; | |
| } | |
| -arch_initcall(sapphire_init_gpio); | |
| +postcore_initcall(sapphire_init_gpio); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-sapphire-keypad.c kernel/arch/arm/mach-msm/board-sapphire-keypad.c | |
| --- kernel-msm/arch/arm/mach-msm/board-sapphire-keypad.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-sapphire-keypad.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -28,16 +28,25 @@ | |
| static unsigned int sapphire_col_gpios[] = { 35, 34 }; | |
| /* KP_MKIN2 (GPIO40) is not used? */ | |
| static unsigned int sapphire_row_gpios[] = { 42, 41 }; | |
| #define KEYMAP_INDEX(col, row) ((col)*ARRAY_SIZE(sapphire_row_gpios) + (row)) | |
| /*scan matrix key*/ | |
| +/* HOME(up) MENU (up) Back Search */ | |
| +static const unsigned short sapphire_keymap2[ARRAY_SIZE(sapphire_col_gpios) * ARRAY_SIZE(sapphire_row_gpios)] = { | |
| + [KEYMAP_INDEX(0, 0)] = KEY_COMPOSE, | |
| + [KEYMAP_INDEX(0, 1)] = KEY_BACK, | |
| + | |
| + [KEYMAP_INDEX(1, 0)] = KEY_MENU, | |
| + [KEYMAP_INDEX(1, 1)] = KEY_SEND, | |
| +}; | |
| + | |
| /* HOME(up) + MENU (down)*/ | |
| static const unsigned short sapphire_keymap1[ARRAY_SIZE(sapphire_col_gpios) * | |
| ARRAY_SIZE(sapphire_row_gpios)] = { | |
| [KEYMAP_INDEX(0, 0)] = KEY_BACK, | |
| [KEYMAP_INDEX(0, 1)] = KEY_MENU, | |
| [KEYMAP_INDEX(1, 0)] = KEY_HOME, | |
| [KEYMAP_INDEX(1, 1)] = KEY_SEND, | |
| @@ -50,17 +59,17 @@ | |
| [KEYMAP_INDEX(0, 1)] = KEY_HOME, | |
| [KEYMAP_INDEX(1, 0)] = KEY_MENU, | |
| [KEYMAP_INDEX(1, 1)] = KEY_SEND, | |
| }; | |
| static struct gpio_event_matrix_info sapphire_keypad_matrix_info = { | |
| .info.func = gpio_event_matrix_func, | |
| - .keymap = sapphire_keymap1, | |
| + .keymap = sapphire_keymap2, | |
| .output_gpios = sapphire_col_gpios, | |
| .input_gpios = sapphire_row_gpios, | |
| .noutputs = ARRAY_SIZE(sapphire_col_gpios), | |
| .ninputs = ARRAY_SIZE(sapphire_row_gpios), | |
| .settle_time.tv.nsec = 40 * NSEC_PER_USEC, | |
| .poll_time.tv.nsec = 20 * NSEC_PER_MSEC, | |
| .debounce_delay.tv.nsec = 50 * NSEC_PER_MSEC, | |
| .flags = GPIOKPF_LEVEL_TRIGGERED_IRQ | | |
| @@ -107,16 +116,17 @@ | |
| if (!machine_is_sapphire()) | |
| return 0; | |
| switch (sapphire_get_hwid()) { | |
| case 0: | |
| sapphire_keypad_matrix_info.keymap = sapphire_keymap0; | |
| break; | |
| default: | |
| - sapphire_keypad_matrix_info.keymap = sapphire_keymap1; | |
| + if(system_rev != 0x80) | |
| + sapphire_keypad_matrix_info.keymap = sapphire_keymap1; | |
| break; | |
| } | |
| return platform_device_register(&sapphire_keypad_device); | |
| } | |
| device_initcall(sapphire_init_keypad); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-sapphire-mmc.c kernel/arch/arm/mach-msm/board-sapphire-mmc.c | |
| --- kernel-msm/arch/arm/mach-msm/board-sapphire-mmc.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-sapphire-mmc.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -30,20 +30,20 @@ | |
| #include <asm/mach/mmc.h> | |
| #include "devices.h" | |
| #include "gpio_chip.h" | |
| #include "board-sapphire.h" | |
| #include "proc_comm.h" | |
| -#define DEBUG_SDSLOT_VDD 1 | |
| +#define DEBUG_SDSLOT_VDD 0 | |
| -extern int msm_add_sdcc(unsigned int controller, | |
| - struct mmc_platform_data *plat); | |
| +extern int msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat, | |
| + unsigned int stat_irq, unsigned long stat_irq_flags); | |
| /* ---- COMMON ---- */ | |
| static void config_gpio_table(uint32_t *table, int len) | |
| { | |
| int n; | |
| unsigned id; | |
| for (n = 0; n < len; n++) { | |
| id = table[n]; | |
| @@ -171,17 +171,16 @@ | |
| #define SAPPHIRE_MMC_VDD (MMC_VDD_165_195 | MMC_VDD_20_21 | MMC_VDD_21_22 \ | |
| | MMC_VDD_22_23 | MMC_VDD_23_24 | MMC_VDD_24_25 \ | |
| | MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 \ | |
| | MMC_VDD_28_29 | MMC_VDD_29_30) | |
| static struct mmc_platform_data sapphire_sdslot_data = { | |
| .ocr_mask = SAPPHIRE_MMC_VDD, | |
| - .status_irq = SAPPHIRE_GPIO_TO_INT(SAPPHIRE_GPIO_SDMC_CD_N), | |
| .status = sapphire_sdslot_status, | |
| .translate_vdd = sapphire_sdslot_switchvdd, | |
| }; | |
| /* ---- WIFI ---- */ | |
| static uint32_t wifi_on_gpio_table[] = { | |
| PCOM_GPIO_CFG(51, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_4MA), /* DAT3 */ | |
| @@ -257,18 +256,18 @@ | |
| else | |
| printk(KERN_WARNING "%s: Nobody to notify\n", __func__); | |
| return 0; | |
| } | |
| #ifndef CONFIG_WIFI_CONTROL_FUNC | |
| EXPORT_SYMBOL(sapphire_wifi_set_carddetect); | |
| #endif | |
| -static int sapphire_wifi_power_state; | |
| -static int sapphire_bt_power_state; | |
| +int sapphire_wifi_power_state=0; | |
| +int sapphire_bt_power_state=0; | |
| int sapphire_wifi_power(int on) | |
| { | |
| int rc; | |
| printk(KERN_DEBUG "%s: %d\n", __func__, on); | |
| if (on) { | |
| @@ -282,18 +281,25 @@ | |
| config_gpio_table(wifi_off_gpio_table, | |
| ARRAY_SIZE(wifi_off_gpio_table)); | |
| htc_pwrsink_set(PWRSINK_WIFI, 0); | |
| } | |
| gpio_set_value(SAPPHIRE_GPIO_MAC_32K_EN, on); | |
| mdelay(100); | |
| gpio_set_value(SAPPHIRE_GPIO_WIFI_EN, on); | |
| mdelay(100); | |
| - if (!on) | |
| + if (!on) { | |
| + if(!sapphire_bt_power_state) | |
| + { | |
| vreg_disable(vreg_wifi_osc); | |
| + printk("WiFi disable vreg_wifi_osc.\n"); | |
| + } | |
| + else | |
| + printk("WiFi shouldn't disable vreg_wifi_osc. BT is using it!!\n"); | |
| + } | |
| sapphire_wifi_power_state = on; | |
| return 0; | |
| } | |
| #ifndef CONFIG_WIFI_CONTROL_FUNC | |
| EXPORT_SYMBOL(sapphire_wifi_power); | |
| #endif | |
| /* Eenable VREG_MMC pin to turn on fastclock oscillator : colin */ | |
| @@ -353,20 +359,21 @@ | |
| if (IS_ERR(vreg_sdslot)) | |
| return PTR_ERR(vreg_sdslot); | |
| vreg_wifi_osc = vreg_get(0, "mmc"); | |
| if (IS_ERR(vreg_wifi_osc)) | |
| return PTR_ERR(vreg_wifi_osc); | |
| set_irq_wake(SAPPHIRE_GPIO_TO_INT(SAPPHIRE_GPIO_SDMC_CD_N), 1); | |
| - msm_add_sdcc(1, &sapphire_wifi_data); | |
| + msm_add_sdcc(1, &sapphire_wifi_data, 0, 0); | |
| if (!opt_disable_sdcard) | |
| - msm_add_sdcc(2, &sapphire_sdslot_data); | |
| + msm_add_sdcc(2, &sapphire_sdslot_data, | |
| + SAPPHIRE_GPIO_TO_INT(SAPPHIRE_GPIO_SDMC_CD_N), 0); | |
| else | |
| printk(KERN_INFO "sapphire: SD-Card interface disabled\n"); | |
| return 0; | |
| } | |
| #if defined(CONFIG_DEBUG_FS) | |
| static int sapphiremmc_dbg_wifi_reset_set(void *data, u64 val) | |
| { | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-sapphire-panel.c kernel/arch/arm/mach-msm/board-sapphire-panel.c | |
| --- kernel-msm/arch/arm/mach-msm/board-sapphire-panel.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-sapphire-panel.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -28,24 +28,31 @@ | |
| #include <mach/vreg.h> | |
| #include <mach/htc_pwrsink.h> | |
| #include "gpio_chip.h" | |
| #include "board-sapphire.h" | |
| #include "proc_comm.h" | |
| #include "devices.h" | |
| +#define DEBUG_SAPPHIRE_PANEL 0 | |
| +#define userid 0xD10 | |
| + | |
| enum sapphire_panel_type { | |
| SAPPHIRE_PANEL_SHARP = 0, | |
| SAPPHIRE_PANEL_TOPPOLY, | |
| NUM_OF_SAPPHIRE_PANELS, | |
| }; | |
| static int g_panel_id = -1 ; | |
| +static int g_panel_inited = 0 ; | |
| -#define SAPPHIRE_DEFAULT_BACKLIGHT_BRIGHTNESS 132 | |
| +#define SAPPHIRE_DEFAULT_BACKLIGHT_BRIGHTNESS 132 | |
| +#define GOOGLE_DEFAULT_BACKLIGHT_BRIGHTNESS 102 | |
| +#define SDBB SAPPHIRE_DEFAULT_BACKLIGHT_BRIGHTNESS | |
| +#define GDBB GOOGLE_DEFAULT_BACKLIGHT_BRIGHTNESS | |
| static int sapphire_backlight_off; | |
| static int sapphire_backlight_brightness = | |
| SAPPHIRE_DEFAULT_BACKLIGHT_BRIGHTNESS; | |
| static uint8_t sapphire_backlight_last_level = 33; | |
| static DEFINE_MUTEX(sapphire_backlight_lock); | |
| @@ -56,25 +63,34 @@ | |
| {0, 1, 2, 4, 7, 10, 13, 15, 18, 21, 24, 27}, /* Toppolly */ | |
| }; | |
| static unsigned pwrsink_percents[] = {0, 6, 8, 15, 26, 34, 46, 54, 65, 77, 87, | |
| 100}; | |
| static void sapphire_set_backlight_level(uint8_t level) | |
| { | |
| unsigned dimming_factor = 255/DIMMING_STEPS + 1; | |
| - int index = (level + dimming_factor - 1) / dimming_factor; | |
| + int index, new_level ; | |
| unsigned percent; | |
| unsigned long flags; | |
| int i = 0; | |
| - printk(KERN_INFO "level=%d, new level=dimming_levels[%d]=%d\n", | |
| - level, index, dimming_levels[g_panel_id][index]); | |
| - percent = pwrsink_percents[index]; | |
| - level = dimming_levels[g_panel_id][index]; | |
| + /* Non-linear transform for the difference between two | |
| + * kind of default backlight settings. | |
| + */ | |
| + new_level = level<=GDBB ? | |
| + level*SDBB/GDBB : (SDBB + (level-GDBB)*(255-SDBB) / (255-GDBB)) ; | |
| + index = new_level/dimming_factor ; | |
| + | |
| +#if DEBUG_SAPPHIRE_PANEL | |
| + printk(KERN_INFO "level=%d, new level=%d, dimming_levels[%d]=%d\n", | |
| + level, new_level, index, dimming_levels[g_panel_id][index]); | |
| +#endif | |
| + percent = pwrsink_percents[index]; | |
| + level = dimming_levels[g_panel_id][index]; | |
| if (sapphire_backlight_last_level == level) | |
| return; | |
| if (level == 0) { | |
| gpio_set_value(27, 0); | |
| msleep(2); | |
| } else { | |
| @@ -365,17 +381,18 @@ | |
| }; | |
| #define GPIOSEL_VWAKEINT (1U << 0) | |
| #define INTMASK_VWAKEOUT (1U << 0) | |
| static void sapphire_process_mddi_table( | |
| struct msm_mddi_client_data *client_data, | |
| - struct mddi_table *table, size_t count) | |
| + const struct mddi_table *table, | |
| + size_t count) | |
| { | |
| int i; | |
| for (i = 0; i < count; i++) { | |
| uint32_t reg = table[i].reg; | |
| uint32_t value = table[i].value; | |
| if (reg == 0) | |
| udelay(value); | |
| @@ -387,17 +404,19 @@ | |
| } | |
| static struct vreg *vreg_lcm_2v85; | |
| static void sapphire_mddi_power_client(struct msm_mddi_client_data *client_data, | |
| int on) | |
| { | |
| unsigned id, on_off; | |
| +#if DEBUG_SAPPHIRE_PANEL | |
| printk(KERN_INFO "sapphire_mddi_client_power:%d\r\n", on); | |
| +#endif | |
| if (on) { | |
| on_off = 0; | |
| id = PM_VREG_PDOWN_MDDI_ID; | |
| msm_proc_comm(PCOM_VREG_PULLDOWN, &on_off, &id); | |
| gpio_set_value(SAPPHIRE_MDDI_1V5_EN, 1); | |
| mdelay(5); /* delay time >5ms and <10ms */ | |
| @@ -407,18 +426,16 @@ | |
| gpio_set_value(V_VDDE2E_VDD2_GPIO, 1); | |
| gpio_set_value(SAPPHIRE_GPIO_MDDI_32K_EN, 1); | |
| msleep(3); | |
| id = PM_VREG_PDOWN_AUX_ID; | |
| msm_proc_comm(PCOM_VREG_PULLDOWN, &on_off, &id); | |
| vreg_enable(vreg_lcm_2v85); | |
| msleep(3); | |
| - gpio_set_value(MDDI_RST_N, 1); | |
| - msleep(10); | |
| } else { | |
| gpio_set_value(SAPPHIRE_GPIO_MDDI_32K_EN, 0); | |
| gpio_set_value(MDDI_RST_N, 0); | |
| msleep(10); | |
| vreg_disable(vreg_lcm_2v85); | |
| on_off = 1; | |
| id = PM_VREG_PDOWN_AUX_ID; | |
| msm_proc_comm(PCOM_VREG_PULLDOWN, &on_off, &id); | |
| @@ -436,61 +453,77 @@ | |
| } | |
| static int sapphire_mddi_toshiba_client_init( | |
| struct msm_mddi_bridge_platform_data *bridge_data, | |
| struct msm_mddi_client_data *client_data) | |
| { | |
| int panel_id; | |
| + /* Set the MDDI_RST_N accroding to MDDI client repectively( | |
| + * been set in sapphire_mddi_power_client() originally) | |
| + */ | |
| + gpio_set_value(MDDI_RST_N, 1); | |
| + msleep(10); | |
| + | |
| client_data->auto_hibernate(client_data, 0); | |
| sapphire_process_mddi_table(client_data, mddi_toshiba_init_table, | |
| ARRAY_SIZE(mddi_toshiba_init_table)); | |
| client_data->auto_hibernate(client_data, 1); | |
| g_panel_id = panel_id = | |
| (client_data->remote_read(client_data, GPIODATA) >> 4) & 3; | |
| if (panel_id > 1) { | |
| +#if DEBUG_SAPPHIRE_PANEL | |
| printk(KERN_ERR "unknown panel id at mddi_enable\n"); | |
| +#endif | |
| return -1; | |
| } | |
| return 0; | |
| } | |
| static int sapphire_mddi_toshiba_client_uninit( | |
| struct msm_mddi_bridge_platform_data *bridge_data, | |
| struct msm_mddi_client_data *client_data) | |
| { | |
| + gpio_set_value(MDDI_RST_N, 0); | |
| + msleep(10); | |
| + | |
| return 0; | |
| } | |
| static int sapphire_mddi_panel_unblank( | |
| struct msm_mddi_bridge_platform_data *bridge_data, | |
| struct msm_mddi_client_data *client_data) | |
| { | |
| int panel_id, ret = 0; | |
| sapphire_set_backlight_level(0); | |
| client_data->auto_hibernate(client_data, 0); | |
| sapphire_process_mddi_table(client_data, mddi_toshiba_panel_init_table, | |
| ARRAY_SIZE(mddi_toshiba_panel_init_table)); | |
| panel_id = (client_data->remote_read(client_data, GPIODATA) >> 4) & 3; | |
| switch (panel_id) { | |
| case 0: | |
| +#if DEBUG_SAPPHIRE_PANEL | |
| printk(KERN_DEBUG "init sharp panel\n"); | |
| +#endif | |
| sapphire_process_mddi_table(client_data, | |
| mddi_sharp_init_table, | |
| ARRAY_SIZE(mddi_sharp_init_table)); | |
| break; | |
| case 1: | |
| +#if DEBUG_SAPPHIRE_PANEL | |
| printk(KERN_DEBUG "init tpo panel\n"); | |
| +#endif | |
| sapphire_process_mddi_table(client_data, | |
| mddi_tpo_init_table, | |
| ARRAY_SIZE(mddi_tpo_init_table)); | |
| break; | |
| default: | |
| + | |
| printk(KERN_DEBUG "unknown panel_id: %d\n", panel_id); | |
| ret = -1; | |
| }; | |
| mutex_lock(&sapphire_backlight_lock); | |
| sapphire_set_backlight_level(sapphire_backlight_brightness); | |
| sapphire_backlight_off = 0; | |
| mutex_unlock(&sapphire_backlight_lock); | |
| client_data->auto_hibernate(client_data, 1); | |
| @@ -534,16 +567,558 @@ | |
| sapphire_backlight_off = 1; | |
| mutex_unlock(&sapphire_backlight_lock); | |
| client_data->remote_write(client_data, 0, SYSCLKENA); | |
| client_data->remote_write(client_data, 1, DPSUS); | |
| return ret; | |
| } | |
| + | |
| +/* Initial sequence of sharp panel with Novatek NT35399 MDDI client */ | |
| +static const struct mddi_table sharp2_init_table[] = { | |
| + { 0x02A0, 0x00 }, | |
| + { 0x02A1, 0x00 }, | |
| + { 0x02A2, 0x3F }, | |
| + { 0x02A3, 0x01 }, | |
| + { 0x02B0, 0x00 }, | |
| + { 0x02B1, 0x00 }, | |
| + { 0x02B2, 0xDF }, | |
| + { 0x02B3, 0x01 }, | |
| + { 0x02D0, 0x00 }, | |
| + { 0x02D1, 0x00 }, | |
| + { 0x02D2, 0x00 }, | |
| + { 0x02D3, 0x00 }, | |
| + { 0x0350, 0x80 }, /* Set frame tearing effect(FTE) position */ | |
| + { 0x0351, 0x00 }, | |
| + { 0x0360, 0x30 }, | |
| + { 0x0361, 0xC1 }, | |
| + { 0x0362, 0x00 }, | |
| + { 0x0370, 0x00 }, | |
| + { 0x0371, 0xEF }, | |
| + { 0x0372, 0x01 }, | |
| + | |
| + { 0x0B00, 0x10 }, | |
| + | |
| + { 0x0B10, 0x00 }, | |
| + { 0x0B20, 0x22 }, | |
| + { 0x0B30, 0x46 }, | |
| + { 0x0B40, 0x07 }, | |
| + { 0x0B41, 0x1C }, | |
| + { 0x0B50, 0x0F }, | |
| + { 0x0B51, 0x7A }, | |
| + { 0x0B60, 0x16 }, | |
| + { 0x0B70, 0x0D }, | |
| + { 0x0B80, 0x04 }, | |
| + { 0x0B90, 0x07 }, | |
| + { 0x0BA0, 0x04 }, | |
| + { 0x0BA1, 0x86 }, | |
| + { 0x0BB0, 0xFF }, | |
| + { 0x0BB1, 0x01 }, | |
| + { 0x0BB2, 0xF7 }, | |
| + { 0x0BB3, 0x01 }, | |
| + { 0x0BC0, 0x00 }, | |
| + { 0x0BC1, 0x00 }, | |
| + { 0x0BC2, 0x00 }, | |
| + { 0x0BC3, 0x00 }, | |
| + { 0x0BE0, 0x01 }, | |
| + { 0x0BE1, 0x3F }, | |
| + | |
| + { 0x0BF0, 0x03 }, | |
| + | |
| + { 0x0C10, 0x02 }, | |
| + | |
| + { 0x0C30, 0x22 }, | |
| + { 0x0C31, 0x20 }, | |
| + { 0x0C40, 0x48 }, | |
| + { 0x0C41, 0x06 }, | |
| + | |
| + { 0xE00, 0x0028}, | |
| + { 0xE01, 0x002F}, | |
| + { 0xE02, 0x0032}, | |
| + { 0xE03, 0x000A}, | |
| + { 0xE04, 0x0023}, | |
| + { 0xE05, 0x0024}, | |
| + { 0xE06, 0x0022}, | |
| + { 0xE07, 0x0012}, | |
| + { 0xE08, 0x000D}, | |
| + { 0xE09, 0x0035}, | |
| + { 0xE0A, 0x000E}, | |
| + { 0xE0B, 0x001A}, | |
| + { 0xE0C, 0x003C}, | |
| + { 0xE0D, 0x003A}, | |
| + { 0xE0E, 0x0050}, | |
| + { 0xE0F, 0x0069}, | |
| + { 0xE10, 0x0006}, | |
| + { 0xE11, 0x001F}, | |
| + { 0xE12, 0x0035}, | |
| + { 0xE13, 0x0020}, | |
| + { 0xE14, 0x0043}, | |
| + { 0xE15, 0x0030}, | |
| + { 0xE16, 0x003C}, | |
| + { 0xE17, 0x0010}, | |
| + { 0xE18, 0x0009}, | |
| + { 0xE19, 0x0051}, | |
| + { 0xE1A, 0x001D}, | |
| + { 0xE1B, 0x003C}, | |
| + { 0xE1C, 0x0053}, | |
| + { 0xE1D, 0x0041}, | |
| + { 0xE1E, 0x0045}, | |
| + { 0xE1F, 0x004B}, | |
| + { 0xE20, 0x000A}, | |
| + { 0xE21, 0x0014}, | |
| + { 0xE22, 0x001C}, | |
| + { 0xE23, 0x0013}, | |
| + { 0xE24, 0x002E}, | |
| + { 0xE25, 0x0029}, | |
| + { 0xE26, 0x001B}, | |
| + { 0xE27, 0x0014}, | |
| + { 0xE28, 0x000E}, | |
| + { 0xE29, 0x0032}, | |
| + { 0xE2A, 0x000D}, | |
| + { 0xE2B, 0x001B}, | |
| + { 0xE2C, 0x0033}, | |
| + { 0xE2D, 0x0033}, | |
| + { 0xE2E, 0x005B}, | |
| + { 0xE2F, 0x0069}, | |
| + { 0xE30, 0x0006}, | |
| + { 0xE31, 0x0014}, | |
| + { 0xE32, 0x003D}, | |
| + { 0xE33, 0x0029}, | |
| + { 0xE34, 0x0042}, | |
| + { 0xE35, 0x0032}, | |
| + { 0xE36, 0x003F}, | |
| + { 0xE37, 0x000E}, | |
| + { 0xE38, 0x0008}, | |
| + { 0xE39, 0x0059}, | |
| + { 0xE3A, 0x0015}, | |
| + { 0xE3B, 0x002E}, | |
| + { 0xE3C, 0x0049}, | |
| + { 0xE3D, 0x0058}, | |
| + { 0xE3E, 0x0061}, | |
| + { 0xE3F, 0x006B}, | |
| + { 0xE40, 0x000A}, | |
| + { 0xE41, 0x001A}, | |
| + { 0xE42, 0x0022}, | |
| + { 0xE43, 0x0014}, | |
| + { 0xE44, 0x002F}, | |
| + { 0xE45, 0x002A}, | |
| + { 0xE46, 0x001A}, | |
| + { 0xE47, 0x0014}, | |
| + { 0xE48, 0x000E}, | |
| + { 0xE49, 0x002F}, | |
| + { 0xE4A, 0x000F}, | |
| + { 0xE4B, 0x001B}, | |
| + { 0xE4C, 0x0030}, | |
| + { 0xE4D, 0x002C}, | |
| + { 0xE4E, 0x0051}, | |
| + { 0xE4F, 0x0069}, | |
| + { 0xE50, 0x0006}, | |
| + { 0xE51, 0x001E}, | |
| + { 0xE52, 0x0043}, | |
| + { 0xE53, 0x002F}, | |
| + { 0xE54, 0x0043}, | |
| + { 0xE55, 0x0032}, | |
| + { 0xE56, 0x0043}, | |
| + { 0xE57, 0x000D}, | |
| + { 0xE58, 0x0008}, | |
| + { 0xE59, 0x0059}, | |
| + { 0xE5A, 0x0016}, | |
| + { 0xE5B, 0x0030}, | |
| + { 0xE5C, 0x004B}, | |
| + { 0xE5D, 0x0051}, | |
| + { 0xE5E, 0x005A}, | |
| + { 0xE5F, 0x006B}, | |
| + | |
| + { 0x0290, 0x01 }, | |
| +}; | |
| + | |
| +#undef TPO2_ONE_GAMMA | |
| +/* Initial sequence of TPO panel with Novatek NT35399 MDDI client */ | |
| + | |
| +static const struct mddi_table tpo2_init_table[] = { | |
| + /* Panel interface control */ | |
| + { 0xB30, 0x44 }, | |
| + { 0xB40, 0x00 }, | |
| + { 0xB41, 0x87 }, | |
| + { 0xB50, 0x06 }, | |
| + { 0xB51, 0x7B }, | |
| + { 0xB60, 0x0E }, | |
| + { 0xB70, 0x0F }, | |
| + { 0xB80, 0x03 }, | |
| + { 0xB90, 0x00 }, | |
| + { 0x350, 0x70 }, /* FTE is at line 0x70 */ | |
| + | |
| + /* Entry Mode */ | |
| + { 0x360, 0x30 }, | |
| + { 0x361, 0xC1 }, | |
| + { 0x362, 0x04 }, | |
| + | |
| +/* 0x2 for gray scale gamma correction, 0x12 for RGB gamma correction */ | |
| +#ifdef TPO2_ONE_GAMMA | |
| + { 0xB00, 0x02 }, | |
| +#else | |
| + { 0xB00, 0x12 }, | |
| +#endif | |
| + /* Driver output control */ | |
| + { 0x371, 0xEF }, | |
| + { 0x372, 0x03 }, | |
| + | |
| + /* DCDC on glass control */ | |
| + { 0xC31, 0x10 }, | |
| + { 0xBA0, 0x00 }, | |
| + { 0xBA1, 0x86 }, | |
| + | |
| + /* VCOMH voltage control */ | |
| + { 0xC50, 0x3b }, | |
| + | |
| + /* Special function control */ | |
| + { 0xC10, 0x82 }, | |
| + | |
| + /* Power control */ | |
| + { 0xC40, 0x44 }, | |
| + { 0xC41, 0x02 }, | |
| + | |
| + /* Source output control */ | |
| + { 0xBE0, 0x01 }, | |
| + { 0xBE1, 0x00 }, | |
| + | |
| + /* Windows address setting */ | |
| + { 0x2A0, 0x00 }, | |
| + { 0x2A1, 0x00 }, | |
| + { 0x2A2, 0x3F }, | |
| + { 0x2A3, 0x01 }, | |
| + { 0x2B0, 0x00 }, | |
| + { 0x2B1, 0x00 }, | |
| + { 0x2B2, 0xDF }, | |
| + { 0x2B3, 0x01 }, | |
| + | |
| + /* RAM address setting */ | |
| + { 0x2D0, 0x00 }, | |
| + { 0x2D1, 0x00 }, | |
| + { 0x2D2, 0x00 }, | |
| + { 0x2D3, 0x00 }, | |
| + | |
| + { 0xF20, 0x55 }, | |
| + { 0xF21, 0xAA }, | |
| + { 0xF22, 0x66 }, | |
| + { 0xF57, 0x45 }, | |
| + | |
| +/* | |
| + * The NT35399 provides gray or RGB gamma correction table, | |
| + * which determinated by register-0xb00, and following table | |
| + */ | |
| +#ifdef TPO2_ONE_GAMMA | |
| + /* Positive Gamma setting */ | |
| + { 0xE00, 0x04 }, | |
| + { 0xE01, 0x12 }, | |
| + { 0xE02, 0x18 }, | |
| + { 0xE03, 0x10 }, | |
| + { 0xE04, 0x29 }, | |
| + { 0xE05, 0x26 }, | |
| + { 0xE06, 0x1f }, | |
| + { 0xE07, 0x11 }, | |
| + { 0xE08, 0x0c }, | |
| + { 0xE09, 0x3a }, | |
| + { 0xE0A, 0x0d }, | |
| + { 0xE0B, 0x28 }, | |
| + { 0xE0C, 0x40 }, | |
| + { 0xE0D, 0x4e }, | |
| + { 0xE0E, 0x6f }, | |
| + { 0xE0F, 0x5E }, | |
| + | |
| + /* Negative Gamma setting */ | |
| + { 0xE10, 0x0B }, | |
| + { 0xE11, 0x00 }, | |
| + { 0xE12, 0x00 }, | |
| + { 0xE13, 0x1F }, | |
| + { 0xE14, 0x4b }, | |
| + { 0xE15, 0x33 }, | |
| + { 0xE16, 0x13 }, | |
| + { 0xE17, 0x12 }, | |
| + { 0xE18, 0x0d }, | |
| + { 0xE19, 0x2f }, | |
| + { 0xE1A, 0x16 }, | |
| + { 0xE1B, 0x2e }, | |
| + { 0xE1C, 0x49 }, | |
| + { 0xE1D, 0x41 }, | |
| + { 0xE1E, 0x46 }, | |
| + { 0xE1F, 0x55 }, | |
| +#else | |
| + /* Red Positive Gamma */ | |
| + { 0xE00, 0x0f }, | |
| + { 0xE01, 0x19 }, | |
| + { 0xE02, 0x22 }, | |
| + { 0xE03, 0x0b }, | |
| + { 0xE04, 0x23 }, | |
| + { 0xE05, 0x23 }, | |
| + { 0xE06, 0x14 }, | |
| + { 0xE07, 0x13 }, | |
| + { 0xE08, 0x0f }, | |
| + { 0xE09, 0x2a }, | |
| + { 0xE0A, 0x0d }, | |
| + { 0xE0B, 0x26 }, | |
| + { 0xE0C, 0x43 }, | |
| + { 0xE0D, 0x20 }, | |
| + { 0xE0E, 0x2a }, | |
| + { 0xE0F, 0x5c }, | |
| + | |
| + /* Red Negative Gamma */ | |
| + { 0xE10, 0x0d }, | |
| + { 0xE11, 0x45 }, | |
| + { 0xE12, 0x4c }, | |
| + { 0xE13, 0x1c }, | |
| + { 0xE14, 0x4d }, | |
| + { 0xE15, 0x33 }, | |
| + { 0xE16, 0x23 }, | |
| + { 0xE17, 0x0f }, | |
| + { 0xE18, 0x0b }, | |
| + { 0xE19, 0x3a }, | |
| + { 0xE1A, 0x19 }, | |
| + { 0xE1B, 0x32 }, | |
| + { 0xE1C, 0x4e }, | |
| + { 0xE1D, 0x37 }, | |
| + { 0xE1E, 0x38 }, | |
| + { 0xE1F, 0x3b }, | |
| + | |
| + /* Green Positive Gamma */ | |
| + { 0xE20, 0x00 }, | |
| + { 0xE21, 0x09 }, | |
| + { 0xE22, 0x10 }, | |
| + { 0xE23, 0x0f }, | |
| + { 0xE24, 0x29 }, | |
| + { 0xE25, 0x23 }, | |
| + { 0xE26, 0x0b }, | |
| + { 0xE27, 0x14 }, | |
| + { 0xE28, 0x12 }, | |
| + { 0xE29, 0x25 }, | |
| + { 0xE2A, 0x12 }, | |
| + { 0xE2B, 0x2f }, | |
| + { 0xE2C, 0x43 }, | |
| + { 0xE2D, 0x2d }, | |
| + { 0xE2E, 0x52 }, | |
| + { 0xE2F, 0x61 }, | |
| + | |
| + /* Green Negative Gamma */ | |
| + { 0xE30, 0x08 }, | |
| + { 0xE31, 0x1d }, | |
| + { 0xE32, 0x3f }, | |
| + { 0xE33, 0x1c }, | |
| + { 0xE34, 0x44 }, | |
| + { 0xE35, 0x2e }, | |
| + { 0xE36, 0x28 }, | |
| + { 0xE37, 0x0c }, | |
| + { 0xE38, 0x0a }, | |
| + { 0xE39, 0x42 }, | |
| + { 0xE3A, 0x17 }, | |
| + { 0xE3B, 0x30 }, | |
| + { 0xE3C, 0x4b }, | |
| + { 0xE3D, 0x3f }, | |
| + { 0xE3E, 0x43 }, | |
| + { 0xE3F, 0x45 }, | |
| + | |
| + /* Blue Positive Gamma */ | |
| + { 0xE40, 0x32 }, | |
| + { 0xE41, 0x32 }, | |
| + { 0xE42, 0x31 }, | |
| + { 0xE43, 0x06 }, | |
| + { 0xE44, 0x08 }, | |
| + { 0xE45, 0x0d }, | |
| + { 0xE46, 0x04 }, | |
| + { 0xE47, 0x14 }, | |
| + { 0xE48, 0x0f }, | |
| + { 0xE49, 0x1d }, | |
| + { 0xE4A, 0x1a }, | |
| + { 0xE4B, 0x39 }, | |
| + { 0xE4C, 0x4c }, | |
| + { 0xE4D, 0x1e }, | |
| + { 0xE4E, 0x43 }, | |
| + { 0xE4F, 0x61 }, | |
| + | |
| + /* Blue Negative Gamma */ | |
| + { 0xE50, 0x08 }, | |
| + { 0xE51, 0x2c }, | |
| + { 0xE52, 0x4e }, | |
| + { 0xE53, 0x13 }, | |
| + { 0xE54, 0x3a }, | |
| + { 0xE55, 0x26 }, | |
| + { 0xE56, 0x30 }, | |
| + { 0xE57, 0x0f }, | |
| + { 0xE58, 0x0a }, | |
| + { 0xE59, 0x49 }, | |
| + { 0xE5A, 0x34 }, | |
| + { 0xE5B, 0x4a }, | |
| + { 0xE5C, 0x53 }, | |
| + { 0xE5D, 0x28 }, | |
| + { 0xE5E, 0x26 }, | |
| + { 0xE5F, 0x27 }, | |
| + | |
| +#endif | |
| + /* Sleep in mode */ | |
| + { 0x110, 0x00 }, | |
| + { 0x1, 0x23 }, | |
| + /* Display on mode */ | |
| + { 0x290, 0x00 }, | |
| + { 0x1, 0x27 }, | |
| + /* Driver output control */ | |
| + { 0x372, 0x01 }, | |
| + { 0x1, 0x40 }, | |
| + /* Display on mode */ | |
| + { 0x290, 0x01 }, | |
| +}; | |
| + | |
| +static const struct mddi_table tpo2_display_on[] = { | |
| + { 0x290, 0x01 }, | |
| +}; | |
| + | |
| +static const struct mddi_table tpo2_display_off[] = { | |
| + { 0x110, 0x01 }, | |
| + { 0x290, 0x00 }, | |
| + { 0x1, 100 }, | |
| +}; | |
| + | |
| +static const struct mddi_table tpo2_power_off[] = { | |
| + { 0x0110, 0x01 }, | |
| +}; | |
| + | |
| +static int nt35399_detect_panel(struct msm_mddi_client_data *client_data) | |
| +{ | |
| + int id = -1, i ; | |
| + | |
| + /* If the MDDI client is failed to report the panel ID, | |
| + * perform retrial 5 times. | |
| + */ | |
| + for( i=0; i < 5; i++ ) { | |
| + client_data->remote_write(client_data, 0, 0x110); | |
| + msleep(5); | |
| + id = client_data->remote_read(client_data, userid) ; | |
| + if( id == 0 || id == 1 ) { | |
| + if(i==0) { | |
| + printk(KERN_ERR "%s: got valid panel ID=%d, " | |
| + "without retry\n", | |
| + __FUNCTION__, id); | |
| + } | |
| + else { | |
| + printk(KERN_ERR "%s: got valid panel ID=%d, " | |
| + "after %d retry\n", | |
| + __FUNCTION__, id, i+1); | |
| + } | |
| + break ; | |
| + } | |
| + printk(KERN_ERR "%s: got invalid panel ID:%d, trial #%d\n", | |
| + __FUNCTION__, id, i+1); | |
| + | |
| + gpio_set_value(MDDI_RST_N, 0); | |
| + msleep(5); | |
| + | |
| + gpio_set_value(MDDI_RST_N, 1); | |
| + msleep(10); | |
| + gpio_set_value(MDDI_RST_N, 0); | |
| + udelay(100); | |
| + gpio_set_value(MDDI_RST_N, 1); | |
| + mdelay(10); | |
| + } | |
| + printk(KERN_INFO "%s: final panel id=%d\n", __FUNCTION__, id); | |
| + | |
| + switch(id) { | |
| + case 0: | |
| + return SAPPHIRE_PANEL_TOPPOLY; | |
| + case 1: | |
| + return SAPPHIRE_PANEL_SHARP; | |
| + default : | |
| + printk(KERN_ERR "%s(): Invalid panel ID: %d, " | |
| + "treat as sharp panel.", __FUNCTION__, id); | |
| + return SAPPHIRE_PANEL_SHARP; | |
| + } | |
| +} | |
| + | |
| +static int nt35399_client_init( | |
| + struct msm_mddi_bridge_platform_data *bridge_data, | |
| + struct msm_mddi_client_data *client_data) | |
| +{ | |
| + int panel_id; | |
| + | |
| + if (g_panel_inited == 0) { | |
| + g_panel_id = panel_id = nt35399_detect_panel(client_data); | |
| + g_panel_inited = 1 ; | |
| + } else { | |
| + gpio_set_value(MDDI_RST_N, 1); | |
| + msleep(10); | |
| + gpio_set_value(MDDI_RST_N, 0); | |
| + udelay(100); | |
| + gpio_set_value(MDDI_RST_N, 1); | |
| + mdelay(10); | |
| + | |
| + g_panel_id = panel_id = nt35399_detect_panel(client_data); | |
| + if (panel_id == -1) { | |
| + printk("Invalid panel id\n"); | |
| + return -1; | |
| + } | |
| + | |
| + client_data->auto_hibernate(client_data, 0); | |
| + if (panel_id == SAPPHIRE_PANEL_TOPPOLY) { | |
| + sapphire_process_mddi_table(client_data, tpo2_init_table, | |
| + ARRAY_SIZE(tpo2_init_table)); | |
| + } else if(panel_id == SAPPHIRE_PANEL_SHARP) { | |
| + sapphire_process_mddi_table(client_data, sharp2_init_table, | |
| + ARRAY_SIZE(sharp2_init_table)); | |
| + } | |
| + | |
| + client_data->auto_hibernate(client_data, 1); | |
| + } | |
| + | |
| + return 0; | |
| +} | |
| + | |
| +static int nt35399_client_uninit( | |
| + struct msm_mddi_bridge_platform_data *bridge_data, | |
| + struct msm_mddi_client_data *cdata) | |
| +{ | |
| + return 0; | |
| +} | |
| + | |
| +static int nt35399_panel_unblank( | |
| + struct msm_mddi_bridge_platform_data *bridge_data, | |
| + struct msm_mddi_client_data *client_data) | |
| +{ | |
| + int ret = 0; | |
| + | |
| + mdelay(20); | |
| + sapphire_set_backlight_level(0); | |
| + client_data->auto_hibernate(client_data, 0); | |
| + | |
| + mutex_lock(&sapphire_backlight_lock); | |
| + sapphire_set_backlight_level(sapphire_backlight_brightness); | |
| + sapphire_backlight_off = 0; | |
| + mutex_unlock(&sapphire_backlight_lock); | |
| + | |
| + client_data->auto_hibernate(client_data, 1); | |
| + | |
| + return ret; | |
| +} | |
| + | |
| +static int nt35399_panel_blank( | |
| + struct msm_mddi_bridge_platform_data *bridge_data, | |
| + struct msm_mddi_client_data *client_data) | |
| +{ | |
| + int ret = 0; | |
| + | |
| + client_data->auto_hibernate(client_data, 0); | |
| + sapphire_process_mddi_table(client_data, tpo2_display_off, | |
| + ARRAY_SIZE(tpo2_display_off)); | |
| + client_data->auto_hibernate(client_data, 1); | |
| + | |
| + mutex_lock(&sapphire_backlight_lock); | |
| + sapphire_set_backlight_level(0); | |
| + sapphire_backlight_off = 1; | |
| + mutex_unlock(&sapphire_backlight_lock); | |
| + | |
| + return ret; | |
| +} | |
| + | |
| static void sapphire_brightness_set(struct led_classdev *led_cdev, enum led_brightness value) | |
| { | |
| mutex_lock(&sapphire_backlight_lock); | |
| sapphire_backlight_brightness = value; | |
| if (!sapphire_backlight_off) | |
| sapphire_set_backlight_level(sapphire_backlight_brightness); | |
| mutex_unlock(&sapphire_backlight_lock); | |
| } | |
| @@ -592,29 +1167,61 @@ | |
| .xres = 320, | |
| .yres = 480, | |
| .width = 45, | |
| .height = 67, | |
| .output_format = 0, | |
| }, | |
| }; | |
| +#define NT35399_MFR_NAME 0x0bda | |
| +#define NT35399_PRODUCT_CODE 0x8a47 | |
| + | |
| +static void nt35399_fixup(uint16_t * mfr_name, uint16_t * product_code) | |
| +{ | |
| + printk(KERN_DEBUG "%s: enter.\n", __func__); | |
| + *mfr_name = NT35399_MFR_NAME ; | |
| + *product_code= NT35399_PRODUCT_CODE ; | |
| +} | |
| + | |
| +static struct msm_mddi_bridge_platform_data nt35399_client_data = { | |
| + | |
| + .init = nt35399_client_init, | |
| + .uninit = nt35399_client_uninit, | |
| + .blank = nt35399_panel_blank, | |
| + .unblank = nt35399_panel_unblank, | |
| + .fb_data = { | |
| + .xres = 320, | |
| + .yres = 480, | |
| + .output_format = 0, | |
| + }, | |
| +}; | |
| + | |
| static struct msm_mddi_platform_data mddi_pdata = { | |
| .clk_rate = 122880000, | |
| .power_client = sapphire_mddi_power_client, | |
| + .fixup = nt35399_fixup, | |
| .fb_resource = resources_msm_fb, | |
| - .num_clients = 1, | |
| + .num_clients = 2, | |
| .client_platform_data = { | |
| { | |
| .product_id = (0xd263 << 16 | 0), | |
| .name = "mddi_c_d263_0000", | |
| .id = 0, | |
| .client_data = &toshiba_client_data, | |
| .clk_rate = 0, | |
| }, | |
| + { | |
| + .product_id = | |
| + (NT35399_MFR_NAME << 16 | NT35399_PRODUCT_CODE), | |
| + .name = "mddi_c_0bda_8a47" , | |
| + .id = 0, | |
| + .client_data = &nt35399_client_data, | |
| + .clk_rate = 0, | |
| + }, | |
| }, | |
| }; | |
| static struct platform_device sapphire_backlight = { | |
| .name = "sapphire-backlight", | |
| }; | |
| int __init sapphire_init_panel(void) | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-sapphire-rfkill.c kernel/arch/arm/mach-msm/board-sapphire-rfkill.c | |
| --- kernel-msm/arch/arm/mach-msm/board-sapphire-rfkill.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-sapphire-rfkill.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -19,18 +19,16 @@ | |
| #include <linux/device.h> | |
| #include <linux/rfkill.h> | |
| #include <linux/delay.h> | |
| #include <linux/gpio.h> | |
| #include <asm/mach-types.h> | |
| #include "gpio_chip.h" | |
| #include "board-sapphire.h" | |
| -void rfkill_switch_all(enum rfkill_type type, enum rfkill_state state); | |
| - | |
| static struct rfkill *bt_rfk; | |
| static const char bt_name[] = "brf6300"; | |
| extern int sapphire_bt_fastclock_power(int on); | |
| static int bluetooth_set_power(void *data, enum rfkill_state state) | |
| { | |
| switch (state) { | |
| @@ -46,54 +44,67 @@ | |
| sapphire_bt_fastclock_power(0); | |
| break; | |
| default: | |
| printk(KERN_ERR "bad bluetooth rfkill state %d\n", state); | |
| } | |
| return 0; | |
| } | |
| -static int __init sapphire_rfkill_probe(struct platform_device *pdev) | |
| +static int sapphire_rfkill_probe(struct platform_device *pdev) | |
| { | |
| int rc = 0; | |
| + enum rfkill_state default_state = RFKILL_STATE_SOFT_BLOCKED; /* off */ | |
| - /* default to bluetooth off */ | |
| - rfkill_switch_all(RFKILL_TYPE_BLUETOOTH, RFKILL_STATE_SOFT_BLOCKED); | |
| - bluetooth_set_power(NULL, RFKILL_STATE_SOFT_BLOCKED); | |
| + rfkill_set_default(RFKILL_TYPE_BLUETOOTH, default_state); | |
| + bluetooth_set_power(NULL, default_state); | |
| bt_rfk = rfkill_allocate(&pdev->dev, RFKILL_TYPE_BLUETOOTH); | |
| if (!bt_rfk) | |
| return -ENOMEM; | |
| bt_rfk->name = bt_name; | |
| - bt_rfk->state = RFKILL_STATE_SOFT_BLOCKED; | |
| + bt_rfk->state = default_state; | |
| /* userspace cannot take exclusive control */ | |
| bt_rfk->user_claim_unsupported = 1; | |
| bt_rfk->user_claim = 0; | |
| bt_rfk->data = NULL; /* user data */ | |
| bt_rfk->toggle_radio = bluetooth_set_power; | |
| rc = rfkill_register(bt_rfk); | |
| if (rc) | |
| rfkill_free(bt_rfk); | |
| return rc; | |
| } | |
| +static int sapphire_rfkill_remove(struct platform_device *dev) | |
| +{ | |
| + rfkill_unregister(bt_rfk); | |
| + rfkill_free(bt_rfk); | |
| + | |
| + return 0; | |
| +} | |
| + | |
| static struct platform_driver sapphire_rfkill_driver = { | |
| .probe = sapphire_rfkill_probe, | |
| + .remove = sapphire_rfkill_remove, | |
| .driver = { | |
| .name = "sapphire_rfkill", | |
| .owner = THIS_MODULE, | |
| }, | |
| }; | |
| static int __init sapphire_rfkill_init(void) | |
| { | |
| - if (!machine_is_sapphire()) | |
| - return 0; | |
| return platform_driver_register(&sapphire_rfkill_driver); | |
| } | |
| +static void __exit sapphire_rfkill_exit(void) | |
| +{ | |
| + platform_driver_unregister(&sapphire_rfkill_driver); | |
| +} | |
| + | |
| module_init(sapphire_rfkill_init); | |
| +module_exit(sapphire_rfkill_exit); | |
| MODULE_DESCRIPTION("sapphire rfkill"); | |
| MODULE_AUTHOR("Nick Pelly <npelly@google.com>"); | |
| MODULE_LICENSE("GPL"); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-trout-mmc.c kernel/arch/arm/mach-msm/board-trout-mmc.c | |
| --- kernel-msm/arch/arm/mach-msm/board-trout-mmc.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-trout-mmc.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -22,17 +22,18 @@ | |
| #include "devices.h" | |
| #include "board-trout.h" | |
| #include "proc_comm.h" | |
| #define DEBUG_SDSLOT_VDD 1 | |
| -extern int msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat); | |
| +extern int msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat, | |
| + unsigned int stat_irq, unsigned long stat_irq_flags); | |
| /* ---- COMMON ---- */ | |
| static void config_gpio_table(uint32_t *table, int len) | |
| { | |
| int n; | |
| unsigned id; | |
| for(n = 0; n < len; n++) { | |
| id = table[n]; | |
| @@ -160,17 +161,16 @@ | |
| #define TROUT_MMC_VDD MMC_VDD_165_195 | MMC_VDD_20_21 | MMC_VDD_21_22 \ | |
| | MMC_VDD_22_23 | MMC_VDD_23_24 | MMC_VDD_24_25 \ | |
| | MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 \ | |
| | MMC_VDD_28_29 | MMC_VDD_29_30 | |
| static struct mmc_platform_data trout_sdslot_data = { | |
| .ocr_mask = TROUT_MMC_VDD, | |
| - .status_irq = TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), | |
| .status = trout_sdslot_status, | |
| .translate_vdd = trout_sdslot_switchvdd, | |
| }; | |
| /* ---- WIFI ---- */ | |
| static uint32_t wifi_on_gpio_table[] = { | |
| PCOM_GPIO_CFG(51, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_4MA), /* DAT3 */ | |
| @@ -314,20 +314,21 @@ | |
| if (IS_ERR(vreg_sdslot)) | |
| return PTR_ERR(vreg_sdslot); | |
| vreg_wifi_osc = vreg_get(0, "mmc"); | |
| if (IS_ERR(vreg_wifi_osc)) | |
| return PTR_ERR(vreg_wifi_osc); | |
| set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1); | |
| - msm_add_sdcc(1, &trout_wifi_data); | |
| + msm_add_sdcc(1, &trout_wifi_data, 0, 0); | |
| if (!opt_disable_sdcard) | |
| - msm_add_sdcc(2, &trout_sdslot_data); | |
| + msm_add_sdcc(2, &trout_sdslot_data, | |
| + TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 0); | |
| else | |
| printk(KERN_INFO "trout: SD-Card interface disabled\n"); | |
| return 0; | |
| } | |
| #if defined(CONFIG_DEBUG_FS) | |
| static int troutmmc_dbg_wifi_reset_set(void *data, u64 val) | |
| { | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-trout-panel.c kernel/arch/arm/mach-msm/board-trout-panel.c | |
| --- kernel-msm/arch/arm/mach-msm/board-trout-panel.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-trout-panel.c 2010-08-27 11:17:41.000000000 +0900 | |
| @@ -565,17 +565,17 @@ | |
| .xres = 320, | |
| .yres = 480, | |
| .width = 45, | |
| .height = 67, | |
| .output_format = 0, | |
| }, | |
| }; | |
| -struct msm_mddi_platform_data mddi_pdata = { | |
| +static struct msm_mddi_platform_data mddi_pdata = { | |
| .clk_rate = 122880000, | |
| .power_client = trout_mddi_power_client, | |
| .fb_resource = resources_msm_fb, | |
| .num_clients = 1, | |
| .client_platform_data = { | |
| { | |
| .product_id = (0xd263 << 16 | 0), | |
| .name = "mddi_c_d263_0000", | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-trout-rfkill.c kernel/arch/arm/mach-msm/board-trout-rfkill.c | |
| --- kernel-msm/arch/arm/mach-msm/board-trout-rfkill.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-trout-rfkill.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -19,18 +19,16 @@ | |
| #include <linux/module.h> | |
| #include <linux/device.h> | |
| #include <linux/rfkill.h> | |
| #include <linux/delay.h> | |
| #include <asm/gpio.h> | |
| #include "board-trout.h" | |
| -void rfkill_switch_all(enum rfkill_type type, enum rfkill_state state); | |
| - | |
| static struct rfkill *bt_rfk; | |
| static const char bt_name[] = "brf6300"; | |
| static int bluetooth_set_power(void *data, enum rfkill_state state) | |
| { | |
| switch (state) { | |
| case RFKILL_STATE_UNBLOCKED: | |
| gpio_set_value(TROUT_GPIO_BT_32K_EN, 1); | |
| @@ -42,52 +40,67 @@ | |
| gpio_set_value(TROUT_GPIO_BT_32K_EN, 0); | |
| break; | |
| default: | |
| printk(KERN_ERR "bad bluetooth rfkill state %d\n", state); | |
| } | |
| return 0; | |
| } | |
| -static int __init trout_rfkill_probe(struct platform_device *pdev) | |
| +static int trout_rfkill_probe(struct platform_device *pdev) | |
| { | |
| int rc = 0; | |
| + enum rfkill_state default_state = RFKILL_STATE_SOFT_BLOCKED; /* off */ | |
| - /* default to bluetooth off */ | |
| - rfkill_switch_all(RFKILL_TYPE_BLUETOOTH, RFKILL_STATE_SOFT_BLOCKED); | |
| - bluetooth_set_power(NULL, RFKILL_STATE_SOFT_BLOCKED); | |
| + rfkill_set_default(RFKILL_TYPE_BLUETOOTH, default_state); | |
| + bluetooth_set_power(NULL, default_state); | |
| bt_rfk = rfkill_allocate(&pdev->dev, RFKILL_TYPE_BLUETOOTH); | |
| if (!bt_rfk) | |
| return -ENOMEM; | |
| bt_rfk->name = bt_name; | |
| - bt_rfk->state = RFKILL_STATE_SOFT_BLOCKED; | |
| + bt_rfk->state = default_state; | |
| /* userspace cannot take exclusive control */ | |
| bt_rfk->user_claim_unsupported = 1; | |
| bt_rfk->user_claim = 0; | |
| bt_rfk->data = NULL; // user data | |
| bt_rfk->toggle_radio = bluetooth_set_power; | |
| rc = rfkill_register(bt_rfk); | |
| if (rc) | |
| rfkill_free(bt_rfk); | |
| return rc; | |
| } | |
| +static int trout_rfkill_remove(struct platform_device *dev) | |
| +{ | |
| + rfkill_unregister(bt_rfk); | |
| + rfkill_free(bt_rfk); | |
| + | |
| + return 0; | |
| +} | |
| + | |
| static struct platform_driver trout_rfkill_driver = { | |
| .probe = trout_rfkill_probe, | |
| + .remove = trout_rfkill_remove, | |
| .driver = { | |
| .name = "trout_rfkill", | |
| .owner = THIS_MODULE, | |
| }, | |
| }; | |
| static int __init trout_rfkill_init(void) | |
| { | |
| return platform_driver_register(&trout_rfkill_driver); | |
| } | |
| +static void __exit trout_rfkill_exit(void) | |
| +{ | |
| + platform_driver_unregister(&trout_rfkill_driver); | |
| +} | |
| + | |
| module_init(trout_rfkill_init); | |
| +module_exit(trout_rfkill_exit); | |
| MODULE_DESCRIPTION("trout rfkill"); | |
| MODULE_AUTHOR("Nick Pelly <npelly@google.com>"); | |
| MODULE_LICENSE("GPL"); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/board-trout.c kernel/arch/arm/mach-msm/board-trout.c | |
| --- kernel-msm/arch/arm/mach-msm/board-trout.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/board-trout.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -485,37 +485,37 @@ | |
| }, | |
| { | |
| .id = PWRSINK_GP_CLK, | |
| .ua_max = 30000, | |
| }, | |
| { | |
| .id = PWRSINK_BLUETOOTH, | |
| .ua_max = 15000, | |
| - }, | |
| + }, | |
| { | |
| .id = PWRSINK_CAMERA, | |
| .ua_max = 0, | |
| }, | |
| { | |
| .id = PWRSINK_SDCARD, | |
| .ua_max = 0, | |
| - }, | |
| + }, | |
| { | |
| .id = PWRSINK_VIDEO, | |
| .ua_max = 0, | |
| }, | |
| { | |
| .id = PWRSINK_WIFI, | |
| .ua_max = 200000, | |
| }, | |
| { | |
| .id = PWRSINK_SYSTEM_LOAD, | |
| - .ua_max = 63000, | |
| - .percent_util = 100, | |
| + .ua_max = 100000, | |
| + .percent_util = 38, | |
| }, | |
| }; | |
| static struct pwr_sink_platform_data trout_pwrsink_data = { | |
| .num_sinks = ARRAY_SIZE(trout_pwrsink_table), | |
| .sinks = trout_pwrsink_table, | |
| .suspend_late = NULL, | |
| .resume_early = NULL, | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/clock-7x30.c kernel/arch/arm/mach-msm/clock-7x30.c | |
| --- kernel-msm/arch/arm/mach-msm/clock-7x30.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/clock-7x30.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -58,16 +58,17 @@ | |
| #include <linux/kernel.h> | |
| #include <linux/init.h> | |
| #include <linux/err.h> | |
| #include <linux/ctype.h> | |
| #include <linux/bitops.h> | |
| #include <linux/io.h> | |
| #include <linux/spinlock.h> | |
| #include <mach/msm_iomap.h> | |
| +#include <mach/clk.h> | |
| #include "clock.h" | |
| #include "clock-7x30.h" | |
| struct clk_freq_tbl { | |
| uint32_t freq_hz; | |
| uint32_t src; | |
| uint32_t md_val; | |
| @@ -690,16 +691,21 @@ | |
| spin_lock_irqsave(&clock_reg_lock, flags); | |
| soc_clk_disable_nolock(id); | |
| spin_unlock_irqrestore(&clock_reg_lock, flags); | |
| return; | |
| } | |
| +static int soc_clk_reset(unsigned id, enum clk_reset_action action) | |
| +{ | |
| + return -EPERM; | |
| +} | |
| + | |
| static int soc_clk_set_rate(unsigned id, unsigned rate) | |
| { | |
| struct clk_local *t = &clk_local_tbl[id]; | |
| struct clk_freq_tbl *cf = t->current_freq; | |
| struct clk_freq_tbl *nf; | |
| uint32_t *chld = t->children; | |
| void *ns_reg = REG(t->ns_reg); | |
| void *md_reg = REG(t->md_reg); | |
| @@ -852,16 +858,17 @@ | |
| return f->freq_hz; | |
| return -EPERM; | |
| } | |
| struct clk_ops clk_ops_7x30 = { | |
| .enable = soc_clk_enable, | |
| .disable = soc_clk_disable, | |
| + .reset = soc_clk_reset, | |
| .set_rate = soc_clk_set_rate, | |
| .set_min_rate = soc_clk_set_min_rate, | |
| .set_max_rate = soc_clk_set_max_rate, | |
| .set_flags = soc_clk_set_flags, | |
| .get_rate = soc_clk_get_rate, | |
| .is_enabled = soc_clk_is_enabled, | |
| .round_rate = soc_clk_round_rate, | |
| }; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/clock-pcom.c kernel/arch/arm/mach-msm/clock-pcom.c | |
| --- kernel-msm/arch/arm/mach-msm/clock-pcom.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/clock-pcom.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -11,16 +11,17 @@ | |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| * GNU General Public License for more details. | |
| * | |
| */ | |
| #include <linux/err.h> | |
| #include <linux/ctype.h> | |
| #include <linux/stddef.h> | |
| +#include <mach/clk.h> | |
| #include "proc_comm.h" | |
| #include "clock.h" | |
| /* | |
| * glue for the proc_comm interface | |
| */ | |
| int pc_clk_enable(unsigned id) | |
| @@ -32,16 +33,31 @@ | |
| return (int)id < 0 ? -EINVAL : 0; | |
| } | |
| void pc_clk_disable(unsigned id) | |
| { | |
| msm_proc_comm(PCOM_CLKCTL_RPC_DISABLE, &id, NULL); | |
| } | |
| +int pc_clk_reset(unsigned id, enum clk_reset_action action) | |
| +{ | |
| + int rc; | |
| + | |
| + if (action == CLK_RESET_ASSERT) | |
| + rc = msm_proc_comm(PCOM_CLKCTL_RPC_RESET_ASSERT, &id, NULL); | |
| + else | |
| + rc = msm_proc_comm(PCOM_CLKCTL_RPC_RESET_DEASSERT, &id, NULL); | |
| + | |
| + if (rc < 0) | |
| + return rc; | |
| + else | |
| + return (int)id < 0 ? -EINVAL : 0; | |
| +} | |
| + | |
| int pc_clk_set_rate(unsigned id, unsigned rate) | |
| { | |
| /* The rate _might_ be rounded off to the nearest KHz value by the | |
| * remote function. So a return value of 0 doesn't necessarily mean | |
| * that the exact rate was set successfully. | |
| */ | |
| int rc = msm_proc_comm(PCOM_CLKCTL_RPC_SET_RATE, &id, &rate); | |
| if (rc < 0) | |
| @@ -98,16 +114,17 @@ | |
| /* Not supported. */ | |
| return -EPERM; | |
| } | |
| struct clk_ops clk_ops_pcom = { | |
| .enable = pc_clk_enable, | |
| .disable = pc_clk_disable, | |
| + .reset = pc_clk_reset, | |
| .set_rate = pc_clk_set_rate, | |
| .set_min_rate = pc_clk_set_min_rate, | |
| .set_max_rate = pc_clk_set_max_rate, | |
| .set_flags = pc_clk_set_flags, | |
| .get_rate = pc_clk_get_rate, | |
| .is_enabled = pc_clk_is_enabled, | |
| .round_rate = pc_clk_round_rate, | |
| }; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/clock.c kernel/arch/arm/mach-msm/clock.c | |
| --- kernel-msm/arch/arm/mach-msm/clock.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/clock.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -21,16 +21,17 @@ | |
| #include <linux/list.h> | |
| #include <linux/err.h> | |
| #include <linux/clk.h> | |
| #include <linux/spinlock.h> | |
| #include <linux/debugfs.h> | |
| #include <linux/ctype.h> | |
| #include <linux/pm_qos_params.h> | |
| #include <mach/clk.h> | |
| +#include <sharp/sh_sleepcheck.h> | |
| #include "clock.h" | |
| #include "proc_comm.h" | |
| static DEFINE_MUTEX(clocks_mutex); | |
| static DEFINE_SPINLOCK(clocks_lock); | |
| static DEFINE_SPINLOCK(ebi1_vote_lock); | |
| static LIST_HEAD(clocks); | |
| @@ -76,16 +77,17 @@ | |
| int clk_enable(struct clk *clk) | |
| { | |
| unsigned long flags; | |
| spin_lock_irqsave(&clocks_lock, flags); | |
| clk->count++; | |
| if (clk->count == 1) { | |
| clk->ops->enable(clk->id); | |
| + sh_sleepcheck_clock_enable(clk->dbg_name); | |
| spin_lock(&clock_map_lock); | |
| clock_map_enabled[BIT_WORD(clk->id)] |= BIT_MASK(clk->id); | |
| spin_unlock(&clock_map_lock); | |
| } | |
| spin_unlock_irqrestore(&clocks_lock, flags); | |
| return 0; | |
| } | |
| EXPORT_SYMBOL(clk_enable); | |
| @@ -93,24 +95,31 @@ | |
| void clk_disable(struct clk *clk) | |
| { | |
| unsigned long flags; | |
| spin_lock_irqsave(&clocks_lock, flags); | |
| BUG_ON(clk->count == 0); | |
| clk->count--; | |
| if (clk->count == 0) { | |
| clk->ops->disable(clk->id); | |
| + sh_sleepcheck_clock_disable(clk->dbg_name); | |
| spin_lock(&clock_map_lock); | |
| clock_map_enabled[BIT_WORD(clk->id)] &= ~BIT_MASK(clk->id); | |
| spin_unlock(&clock_map_lock); | |
| } | |
| spin_unlock_irqrestore(&clocks_lock, flags); | |
| } | |
| EXPORT_SYMBOL(clk_disable); | |
| +int clk_reset(struct clk *clk, enum clk_reset_action action) | |
| +{ | |
| + return clk->ops->reset(clk->id, action); | |
| +} | |
| +EXPORT_SYMBOL(clk_reset); | |
| + | |
| unsigned long clk_get_rate(struct clk *clk) | |
| { | |
| return clk->ops->get_rate(clk->id); | |
| } | |
| EXPORT_SYMBOL(clk_get_rate); | |
| int clk_set_rate(struct clk *clk, unsigned long rate) | |
| { | |
| @@ -267,18 +276,20 @@ | |
| void __init msm_clock_init(struct clk *clock_tbl, unsigned num_clocks) | |
| { | |
| unsigned n; | |
| spin_lock_init(&clocks_lock); | |
| mutex_lock(&clocks_mutex); | |
| msm_clocks = clock_tbl; | |
| msm_num_clocks = num_clocks; | |
| - for (n = 0; n < msm_num_clocks; n++) | |
| + for (n = 0; n < msm_num_clocks; n++) { | |
| list_add_tail(&msm_clocks[n].list, &clocks); | |
| + sh_sleepcheck_clock_name_init(msm_clocks[n].dbg_name, n); | |
| + } | |
| mutex_unlock(&clocks_mutex); | |
| ebi1_clk = clk_get(NULL, "ebi1_clk"); | |
| BUG_ON(ebi1_clk == NULL); | |
| axi_freq_notifier_block.notifier_call = axi_freq_notifier_handler; | |
| pm_qos_add_notifier(PM_QOS_SYSTEM_BUS_FREQ, &axi_freq_notifier_block); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/clock.h kernel/arch/arm/mach-msm/clock.h | |
| --- kernel-msm/arch/arm/mach-msm/clock.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/clock.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -13,16 +13,17 @@ | |
| * GNU General Public License for more details. | |
| * | |
| */ | |
| #ifndef __ARCH_ARM_MACH_MSM_CLOCK_H | |
| #define __ARCH_ARM_MACH_MSM_CLOCK_H | |
| #include <linux/list.h> | |
| +#include <mach/clk.h> | |
| #include "clock-pcom.h" | |
| #include "clock-7x30.h" | |
| #define CLKFLAG_INVERT 0x00000001 | |
| #define CLKFLAG_NOINVERT 0x00000002 | |
| #define CLKFLAG_NONEST 0x00000004 | |
| #define CLKFLAG_NORESET 0x00000008 | |
| @@ -30,16 +31,17 @@ | |
| #define CLK_FIRST_AVAILABLE_FLAG 0x00000100 | |
| #define CLKFLAG_AUTO_OFF 0x00000200 | |
| #define CLKFLAG_MIN 0x00000400 | |
| #define CLKFLAG_MAX 0x00000800 | |
| struct clk_ops { | |
| int (*enable)(unsigned id); | |
| void (*disable)(unsigned id); | |
| + int (*reset)(unsigned id, enum clk_reset_action action); | |
| int (*set_rate)(unsigned id, unsigned rate); | |
| int (*set_min_rate)(unsigned id, unsigned rate); | |
| int (*set_max_rate)(unsigned id, unsigned rate); | |
| int (*set_flags)(unsigned id, unsigned flags); | |
| unsigned (*get_rate)(unsigned id); | |
| unsigned (*is_enabled)(unsigned id); | |
| long (*round_rate)(unsigned id, unsigned rate); | |
| }; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/devices.c kernel/arch/arm/mach-msm/devices.c | |
| --- kernel-msm/arch/arm/mach-msm/devices.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/devices.c 2010-08-27 11:17:41.000000000 +0900 | |
| @@ -488,18 +488,18 @@ | |
| .start = MSM_NAND_PHYS, | |
| .end = MSM_NAND_PHYS + 0x7FF, | |
| .flags = IORESOURCE_MEM, | |
| }, | |
| }; | |
| static struct resource resources_otg[] = { | |
| { | |
| - .start = MSM_HSUSB_PHYS, | |
| - .end = MSM_HSUSB_PHYS + SZ_1K - 1, | |
| + .start = 0xA0800000, | |
| + .end = 0xA0800000 + SZ_1K - 1, | |
| .flags = IORESOURCE_MEM, | |
| }, | |
| { | |
| .start = INT_USB_HS, | |
| .end = INT_USB_HS, | |
| .flags = IORESOURCE_IRQ, | |
| }, | |
| }; | |
| @@ -559,72 +559,116 @@ | |
| static struct resource resources_sdc1[] = { | |
| { | |
| .start = MSM_SDC1_BASE, | |
| .end = MSM_SDC1_BASE + SZ_4K - 1, | |
| .flags = IORESOURCE_MEM, | |
| }, | |
| { | |
| .start = INT_SDC1_0, | |
| + .end = INT_SDC1_0, | |
| + .flags = IORESOURCE_IRQ, | |
| + .name = "cmd_irq", | |
| + }, | |
| + { | |
| + .start = INT_SDC1_1, | |
| .end = INT_SDC1_1, | |
| .flags = IORESOURCE_IRQ, | |
| + .name = "pio_irq", | |
| + }, | |
| + { | |
| + .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, | |
| + .name = "status_irq" | |
| }, | |
| { | |
| .start = 8, | |
| .end = 8, | |
| .flags = IORESOURCE_DMA, | |
| }, | |
| }; | |
| static struct resource resources_sdc2[] = { | |
| { | |
| .start = MSM_SDC2_BASE, | |
| .end = MSM_SDC2_BASE + SZ_4K - 1, | |
| .flags = IORESOURCE_MEM, | |
| }, | |
| { | |
| .start = INT_SDC2_0, | |
| + .end = INT_SDC2_0, | |
| + .flags = IORESOURCE_IRQ, | |
| + .name = "cmd_irq", | |
| + }, | |
| + { | |
| + .start = INT_SDC2_1, | |
| .end = INT_SDC2_1, | |
| .flags = IORESOURCE_IRQ, | |
| + .name = "pio_irq", | |
| + }, | |
| + { | |
| + .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, | |
| + .name = "status_irq" | |
| }, | |
| { | |
| .start = 8, | |
| .end = 8, | |
| .flags = IORESOURCE_DMA, | |
| }, | |
| }; | |
| static struct resource resources_sdc3[] = { | |
| { | |
| .start = MSM_SDC3_BASE, | |
| .end = MSM_SDC3_BASE + SZ_4K - 1, | |
| .flags = IORESOURCE_MEM, | |
| }, | |
| { | |
| .start = INT_SDC3_0, | |
| + .end = INT_SDC3_0, | |
| + .flags = IORESOURCE_IRQ, | |
| + .name = "cmd_irq", | |
| + }, | |
| + { | |
| + .start = INT_SDC3_1, | |
| .end = INT_SDC3_1, | |
| .flags = IORESOURCE_IRQ, | |
| + .name = "pio_irq", | |
| + }, | |
| + { | |
| + .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, | |
| + .name = "status_irq" | |
| }, | |
| { | |
| .start = 8, | |
| .end = 8, | |
| .flags = IORESOURCE_DMA, | |
| }, | |
| }; | |
| static struct resource resources_sdc4[] = { | |
| { | |
| .start = MSM_SDC4_BASE, | |
| .end = MSM_SDC4_BASE + SZ_4K - 1, | |
| .flags = IORESOURCE_MEM, | |
| }, | |
| { | |
| .start = INT_SDC4_0, | |
| + .end = INT_SDC4_0, | |
| + .flags = IORESOURCE_IRQ, | |
| + .name = "cmd_irq", | |
| + }, | |
| + { | |
| + .start = INT_SDC4_1, | |
| .end = INT_SDC4_1, | |
| .flags = IORESOURCE_IRQ, | |
| + .name = "pio_irq", | |
| + }, | |
| + { | |
| + .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, | |
| + .name = "status_irq" | |
| }, | |
| { | |
| .start = 8, | |
| .end = 8, | |
| .flags = IORESOURCE_DMA, | |
| }, | |
| }; | |
| @@ -670,42 +714,39 @@ | |
| static struct platform_device *msm_sdcc_devices[] __initdata = { | |
| &msm_device_sdc1, | |
| &msm_device_sdc2, | |
| &msm_device_sdc3, | |
| &msm_device_sdc4, | |
| }; | |
| -int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat) | |
| +int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat, | |
| + unsigned int stat_irq, unsigned long stat_irq_flags) | |
| { | |
| struct platform_device *pdev; | |
| + struct resource *res; | |
| if (controller < 1 || controller > 4) | |
| return -EINVAL; | |
| pdev = msm_sdcc_devices[controller-1]; | |
| pdev->dev.platform_data = plat; | |
| - return platform_device_register(pdev); | |
| -} | |
| -static struct resource rmt_storage_resources[] = { | |
| - { | |
| - .start = 0x0CB00000, | |
| - .end = 0x0CB00000 + SZ_4M - 1, | |
| - .flags = IORESOURCE_MEM, | |
| - }, | |
| -}; | |
| + res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq"); | |
| + if (!res) | |
| + return -EINVAL; | |
| + else if (stat_irq) { | |
| + res->start = res->end = stat_irq; | |
| + res->flags &= ~IORESOURCE_DISABLED; | |
| + res->flags |= stat_irq_flags; | |
| + } | |
| -struct platform_device rmt_storage_device = { | |
| - .name = "rmt_storage", | |
| - .id = 0, | |
| - .num_resources = ARRAY_SIZE(rmt_storage_resources), | |
| - .resource = rmt_storage_resources, | |
| -}; | |
| + return platform_device_register(pdev); | |
| +} | |
| #if defined(CONFIG_FB_MSM_MDP40) | |
| #define MDP_BASE 0xA3F00000 | |
| #define PMDH_BASE 0xAD600000 | |
| #define EMDH_BASE 0xAD700000 | |
| #define TVENC_BASE 0xAD400000 | |
| #else | |
| #define MDP_BASE 0xAA200000 | |
| @@ -1078,30 +1119,27 @@ | |
| CLK_PCOM("camif_pad_pclk", CAMIF_PAD_PCLK, NULL, OFF), | |
| CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN), | |
| CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0), | |
| CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0), | |
| CLK_PCOM("gp_clk", GP_CLK, NULL, 0), | |
| CLK_PCOM("grp_clk", GRP_CLK, NULL, 0), | |
| CLK_PCOM("i2c_clk", I2C_CLK, &msm_device_i2c.dev, 0), | |
| CLK_PCOM("i2c_clk", I2C_2_CLK, &msm_device_i2c_2.dev, 0), | |
| - CLK_PCOM("qup_clk", QUP_I2C_CLK, &qup_device_i2c.dev, 0), | |
| CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF), | |
| CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0), | |
| CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF), | |
| CLK_PCOM("mdp_pclk", MDP_PCLK, NULL, 0), | |
| CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0), | |
| CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0), | |
| CLK_PCOM("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, 0), | |
| CLK_PCOM("pbus_clk", PBUS_CLK, NULL, CLK_MIN), | |
| CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0), | |
| CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX), | |
| CLK_PCOM("mddi_pclk", PMDH_PCLK, NULL, 0), | |
| - CLK_PCOM("rotator_imem_clk", ROTATOR_IMEM_CLK, NULL, 0), | |
| - CLK_PCOM("rotator_pclk", ROTATOR_PCLK, NULL, 0), | |
| CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF), | |
| CLK_PCOM("sdc_clk", SDC1_CLK, &msm_device_sdc1.dev, OFF), | |
| CLK_PCOM("sdc_pclk", SDC1_PCLK, &msm_device_sdc1.dev, OFF), | |
| CLK_PCOM("sdc_clk", SDC2_CLK, &msm_device_sdc2.dev, OFF), | |
| CLK_PCOM("sdc_pclk", SDC2_PCLK, &msm_device_sdc2.dev, OFF), | |
| CLK_PCOM("sdc_clk", SDC3_CLK, &msm_device_sdc3.dev, OFF), | |
| CLK_PCOM("sdc_pclk", SDC3_PCLK, &msm_device_sdc3.dev, OFF), | |
| CLK_PCOM("sdc_clk", SDC4_CLK, &msm_device_sdc4.dev, OFF), | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/devices.h kernel/arch/arm/mach-msm/devices.h | |
| --- kernel-msm/arch/arm/mach-msm/devices.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/devices.h 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -26,18 +26,16 @@ | |
| extern struct platform_device msm_device_uart_dm1; | |
| extern struct platform_device msm_device_uart_dm2; | |
| extern struct platform_device msm_device_sdc1; | |
| extern struct platform_device msm_device_sdc2; | |
| extern struct platform_device msm_device_sdc3; | |
| extern struct platform_device msm_device_sdc4; | |
| -extern struct platform_device rmt_storage_device; | |
| - | |
| extern struct platform_device msm_device_hsusb_otg; | |
| extern struct platform_device msm_device_hsusb_peripheral; | |
| extern struct platform_device msm_device_gadget_peripheral; | |
| extern struct platform_device msm_device_hsusb_host; | |
| extern struct platform_device msm_device_hsusb_host2; | |
| extern struct platform_device msm_device_otg; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/devices_htc.c kernel/arch/arm/mach-msm/devices_htc.c | |
| --- kernel-msm/arch/arm/mach-msm/devices_htc.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/devices_htc.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -50,17 +50,18 @@ | |
| void __init msm_add_devices(void) | |
| { | |
| platform_add_devices(devices, ARRAY_SIZE(devices)); | |
| } | |
| #endif | |
| #define HSUSB_API_INIT_PHY_PROC 2 | |
| #define HSUSB_API_PROG 0x30000064 | |
| -#define HSUSB_API_VERS 0x10001 | |
| +#define HSUSB_API_VERS MSM_RPC_VERS(1,1) | |
| + | |
| static void internal_phy_reset(void) | |
| { | |
| struct msm_rpc_endpoint *usb_ep; | |
| int rc; | |
| struct hsusb_phy_start_req { | |
| struct rpc_request_hdr hdr; | |
| } req; | |
| @@ -92,28 +93,29 @@ | |
| #ifdef CONFIG_USB_FUNCTION_ADB | |
| "adb", | |
| #endif | |
| }; | |
| static struct msm_hsusb_product usb_products[] = { | |
| { | |
| .product_id = 0x0c01, | |
| - .functions = 0x00000041, /* usb_mass_storage */ | |
| + .functions = 0x00000001, /* usb_mass_storage */ | |
| }, | |
| { | |
| .product_id = 0x0c02, | |
| - .functions = 0x00000043, /* usb_mass_storage + adb */ | |
| + .functions = 0x00000003, /* usb_mass_storage + adb */ | |
| }, | |
| }; | |
| #endif | |
| struct msm_hsusb_platform_data msm_hsusb_pdata = { | |
| .phy_reset = internal_phy_reset, | |
| .phy_init_seq = hsusb_phy_init_seq, | |
| + .usb_connected = notify_usb_connected, | |
| #ifdef CONFIG_USB_FUNCTION | |
| .vendor_id = 0x0bb4, | |
| .product_id = 0x0c02, | |
| .version = 0x0100, | |
| .product_name = "Android Phone", | |
| .manufacturer_name = "HTC", | |
| .functions = usb_functions, | |
| @@ -429,17 +431,18 @@ | |
| { | |
| return mfg_mode; | |
| } | |
| static int __init board_serialno_setup(char *serialno) | |
| { | |
| char *str; | |
| - if (board_mfg_mode() || !strlen(serialno)) | |
| + /* use default serial number when mode is factory2 */ | |
| + if (mfg_mode == 1 || !strlen(serialno)) | |
| str = df_serialno; | |
| else | |
| str = serialno; | |
| #ifdef CONFIG_USB_FUNCTION | |
| msm_hsusb_pdata.serial_number = str; | |
| #endif | |
| #ifdef CONFIG_USB_ANDROID | |
| android_usb_pdata.serial_number = str; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/fish_battery.c kernel/arch/arm/mach-msm/fish_battery.c | |
| --- kernel-msm/arch/arm/mach-msm/fish_battery.c 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/fish_battery.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -0,0 +1,145 @@ | |
| +/* arch/arm/mach-msm/fish_battery.c | |
| + * | |
| + * Copyright (C) 2008 Google, Inc. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + * based on: arch/arm/mach-msm/htc_battery.c | |
| + */ | |
| + | |
| +#include <linux/init.h> | |
| +#include <linux/module.h> | |
| +#include <linux/kernel.h> | |
| +#include <linux/err.h> | |
| +#include <linux/power_supply.h> | |
| +#include <linux/platform_device.h> | |
| + | |
| +static enum power_supply_property fish_battery_properties[] = { | |
| + POWER_SUPPLY_PROP_STATUS, | |
| + POWER_SUPPLY_PROP_HEALTH, | |
| + POWER_SUPPLY_PROP_PRESENT, | |
| + POWER_SUPPLY_PROP_TECHNOLOGY, | |
| + POWER_SUPPLY_PROP_CAPACITY, | |
| +}; | |
| + | |
| +static enum power_supply_property fish_power_properties[] = { | |
| + POWER_SUPPLY_PROP_ONLINE, | |
| +}; | |
| + | |
| +static char *supply_list[] = { | |
| + "battery", | |
| +}; | |
| + | |
| +static int fish_power_get_property(struct power_supply *psy, | |
| + enum power_supply_property psp, | |
| + union power_supply_propval *val); | |
| + | |
| +static int fish_battery_get_property(struct power_supply *psy, | |
| + enum power_supply_property psp, | |
| + union power_supply_propval *val); | |
| + | |
| +static struct power_supply fish_power_supplies[] = { | |
| + { | |
| + .name = "battery", | |
| + .type = POWER_SUPPLY_TYPE_BATTERY, | |
| + .properties = fish_battery_properties, | |
| + .num_properties = ARRAY_SIZE(fish_battery_properties), | |
| + .get_property = fish_battery_get_property, | |
| + }, | |
| + { | |
| + .name = "ac", | |
| + .type = POWER_SUPPLY_TYPE_MAINS, | |
| + .supplied_to = supply_list, | |
| + .num_supplicants = ARRAY_SIZE(supply_list), | |
| + .properties = fish_power_properties, | |
| + .num_properties = ARRAY_SIZE(fish_power_properties), | |
| + .get_property = fish_power_get_property, | |
| + }, | |
| +}; | |
| + | |
| +static int fish_power_get_property(struct power_supply *psy, | |
| + enum power_supply_property psp, | |
| + union power_supply_propval *val) | |
| +{ | |
| + switch (psp) { | |
| + case POWER_SUPPLY_PROP_ONLINE: | |
| + if (psy->type == POWER_SUPPLY_TYPE_MAINS) | |
| + val->intval = 1; | |
| + else | |
| + val->intval = 0; | |
| + break; | |
| + default: | |
| + return -EINVAL; | |
| + } | |
| + | |
| + return 0; | |
| +} | |
| + | |
| +static int fish_battery_get_property(struct power_supply *psy, | |
| + enum power_supply_property psp, | |
| + union power_supply_propval *val) | |
| +{ | |
| + switch (psp) { | |
| + case POWER_SUPPLY_PROP_STATUS: | |
| + val->intval = POWER_SUPPLY_STATUS_FULL; | |
| + break; | |
| + case POWER_SUPPLY_PROP_HEALTH: | |
| + val->intval = POWER_SUPPLY_HEALTH_GOOD; | |
| + break; | |
| + case POWER_SUPPLY_PROP_PRESENT: | |
| + val->intval = 1; | |
| + break; | |
| + case POWER_SUPPLY_PROP_TECHNOLOGY: | |
| + val->intval = POWER_SUPPLY_TECHNOLOGY_UNKNOWN; | |
| + break; | |
| + case POWER_SUPPLY_PROP_CAPACITY: | |
| + val->intval = 100; | |
| + break; | |
| + default: | |
| + return -EINVAL; | |
| + } | |
| + | |
| + return 0; | |
| +} | |
| + | |
| +static int fish_battery_probe(struct platform_device *pdev) | |
| +{ | |
| + int i; | |
| + int rc; | |
| + | |
| + /* init power supplier framework */ | |
| + for (i = 0; i < ARRAY_SIZE(fish_power_supplies); i++) { | |
| + rc = power_supply_register(&pdev->dev, &fish_power_supplies[i]); | |
| + if (rc) | |
| + pr_err("%s: Failed to register power supply (%d)\n", | |
| + __func__, rc); | |
| + } | |
| + | |
| + return 0; | |
| +} | |
| + | |
| +static struct platform_driver fish_battery_driver = { | |
| + .probe = fish_battery_probe, | |
| + .driver = { | |
| + .name = "fish_battery", | |
| + .owner = THIS_MODULE, | |
| + }, | |
| +}; | |
| + | |
| +static int __init fish_battery_init(void) | |
| +{ | |
| + platform_driver_register(&fish_battery_driver); | |
| + return 0; | |
| +} | |
| + | |
| +module_init(fish_battery_init); | |
| +MODULE_DESCRIPTION("Qualcomm fish battery driver"); | |
| +MODULE_LICENSE("GPL"); | |
| + | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/htc_acoustic.c kernel/arch/arm/mach-msm/htc_acoustic.c | |
| --- kernel-msm/arch/arm/mach-msm/htc_acoustic.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/htc_acoustic.c 2010-08-27 11:17:41.000000000 +0900 | |
| @@ -30,17 +30,17 @@ | |
| #include <mach/msm_iomap.h> | |
| #include "smd_private.h" | |
| #define ACOUSTIC_IOCTL_MAGIC 'p' | |
| #define ACOUSTIC_ARM11_DONE _IOW(ACOUSTIC_IOCTL_MAGIC, 22, unsigned int) | |
| #define HTCRPOG 0x30100002 | |
| -#define HTCVERS 0 | |
| +#define HTCVERS MSM_RPC_VERS(0,0) | |
| #define ONCRPC_SET_MIC_BIAS_PROC (1) | |
| #define ONCRPC_ACOUSTIC_INIT_PROC (5) | |
| #define ONCRPC_ALLOC_ACOUSTIC_MEM_PROC (6) | |
| #define HTC_ACOUSTIC_TABLE_SIZE (0x10000) | |
| #define D(fmt, args...) printk(KERN_INFO "htc-acoustic: "fmt, ##args) | |
| #define E(fmt, args...) printk(KERN_ERR "htc-acoustic: "fmt, ##args) | |
| @@ -62,16 +62,49 @@ | |
| struct set_acoustic_rep { | |
| struct rpc_reply_hdr hdr; | |
| int n; | |
| }; | |
| static uint32_t htc_acoustic_vir_addr; | |
| static struct msm_rpc_endpoint *endpoint; | |
| static struct mutex api_lock; | |
| +static struct mutex rpc_connect_mutex; | |
| + | |
| +static int is_rpc_connect(void) | |
| +{ | |
| + mutex_lock(&rpc_connect_mutex); | |
| + if (endpoint == NULL) { | |
| + endpoint = msm_rpc_connect(HTCRPOG, HTCVERS, 0); | |
| + if (IS_ERR(endpoint)) { | |
| + pr_err("%s: init rpc failed! rc = %ld\n", | |
| + __func__, PTR_ERR(endpoint)); | |
| + mutex_unlock(&rpc_connect_mutex); | |
| + return 0; | |
| + } | |
| + } | |
| + mutex_unlock(&rpc_connect_mutex); | |
| + return 1; | |
| +} | |
| + | |
| +int turn_mic_bias_on(int on) | |
| +{ | |
| + struct mic_bias_req { | |
| + struct rpc_request_hdr hdr; | |
| + uint32_t on; | |
| + } req; | |
| + | |
| + if (!is_rpc_connect()) | |
| + return -1; | |
| + | |
| + req.on = cpu_to_be32(on); | |
| + return msm_rpc_call(endpoint, ONCRPC_SET_MIC_BIAS_PROC, | |
| + &req, sizeof(req), 5 * HZ); | |
| +} | |
| +EXPORT_SYMBOL(turn_mic_bias_on); | |
| static int acoustic_mmap(struct file *file, struct vm_area_struct *vma) | |
| { | |
| unsigned long pgoff, delta; | |
| int rc = -EINVAL; | |
| size_t size; | |
| D("mmap\n"); | |
| @@ -119,25 +152,18 @@ | |
| struct set_smem_req req_smem; | |
| struct set_smem_rep rep_smem; | |
| D("open\n"); | |
| mutex_lock(&api_lock); | |
| if (!htc_acoustic_vir_addr) { | |
| - if (endpoint == NULL) { | |
| - endpoint = msm_rpc_connect(HTCRPOG, HTCVERS, 0); | |
| - if (IS_ERR(endpoint)) { | |
| - E("init rpc failed! rc = %ld\n", | |
| - PTR_ERR(endpoint)); | |
| - endpoint = NULL; | |
| - goto done; | |
| - } | |
| - } | |
| + if (!is_rpc_connect()) | |
| + goto done; | |
| req_smem.size = cpu_to_be32(HTC_ACOUSTIC_TABLE_SIZE); | |
| rc = msm_rpc_call_reply(endpoint, | |
| ONCRPC_ALLOC_ACOUSTIC_MEM_PROC, | |
| &req_smem, sizeof(req_smem), | |
| &rep_smem, sizeof(rep_smem), | |
| 5 * HZ); | |
| @@ -218,16 +244,17 @@ | |
| .minor = MISC_DYNAMIC_MINOR, | |
| .name = "htc-acoustic", | |
| .fops = &acoustic_fops, | |
| }; | |
| static int __init acoustic_init(void) | |
| { | |
| mutex_init(&api_lock); | |
| + mutex_init(&rpc_connect_mutex); | |
| return misc_register(&acoustic_misc); | |
| } | |
| static void __exit acoustic_exit(void) | |
| { | |
| misc_deregister(&acoustic_misc); | |
| } | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/htc_battery.c kernel/arch/arm/mach-msm/htc_battery.c | |
| --- kernel-msm/arch/arm/mach-msm/htc_battery.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/htc_battery.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -20,43 +20,61 @@ | |
| #include <linux/err.h> | |
| #include <linux/power_supply.h> | |
| #include <linux/platform_device.h> | |
| #include <linux/debugfs.h> | |
| #include <linux/wakelock.h> | |
| #include <asm/gpio.h> | |
| #include <mach/msm_rpcrouter.h> | |
| #include <mach/board.h> | |
| +#include <asm/mach-types.h> | |
| +#include <mach/board_htc.h> | |
| static struct wake_lock vbus_wake_lock; | |
| #define TRACE_BATT 0 | |
| #if TRACE_BATT | |
| -#define BATT(x...) printk(KERN_INFO "[BATT] " x) | |
| +#include <linux/rtc.h> | |
| + | |
| +#define BATT(x...) do { \ | |
| +struct timespec ts; \ | |
| +struct rtc_time tm; \ | |
| +getnstimeofday(&ts); \ | |
| +rtc_time_to_tm(ts.tv_sec, &tm); \ | |
| +printk(KERN_INFO "[BATT] " x); \ | |
| +printk(" at %lld (%d-%02d-%02d %02d:%02d:%02d.%09lu UTC)\n", \ | |
| +ktime_to_ns(ktime_get()), tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday, \ | |
| +tm.tm_hour, tm.tm_min, tm.tm_sec, ts.tv_nsec); \ | |
| +} while (0) | |
| #else | |
| #define BATT(x...) do {} while (0) | |
| #endif | |
| /* rpc related */ | |
| #define APP_BATT_PDEV_NAME "rs30100001:00000000" | |
| #define APP_BATT_PROG 0x30100001 | |
| -#define APP_BATT_VER 0 | |
| +#define APP_BATT_VER MSM_RPC_VERS(0,0) | |
| #define HTC_PROCEDURE_BATTERY_NULL 0 | |
| #define HTC_PROCEDURE_GET_BATT_LEVEL 1 | |
| #define HTC_PROCEDURE_GET_BATT_INFO 2 | |
| #define HTC_PROCEDURE_GET_CABLE_STATUS 3 | |
| #define HTC_PROCEDURE_SET_BATT_DELTA 4 | |
| /* module debugger */ | |
| #define HTC_BATTERY_DEBUG 1 | |
| #define BATTERY_PREVENTION 1 | |
| /* Enable this will shut down if no battery */ | |
| #define ENABLE_BATTERY_DETECTION 0 | |
| +/* Sapphire pin changes: | |
| + * USB_ID (GPIO 90) is renamed to AC_IN (GPIO 30) | |
| + * CHARGER_EN (CPLD MISC2 bit[0]) is move to PMIC (MPP_14). | |
| + * ISET (CPLD MISC2 bit[1]) is move to PMIC (MPP_13). */ | |
| +#define GPIO_SAPPHIRE_USB_ID 30 | |
| #define GPIO_BATTERY_DETECTION 21 | |
| #define GPIO_BATTERY_CHARGER_EN 128 | |
| /* Charge current selection */ | |
| #define GPIO_BATTERY_CHARGER_CURRENT 129 | |
| typedef enum { | |
| @@ -69,16 +87,18 @@ | |
| * And it's also the same as htc_cable_status_update() | |
| */ | |
| typedef enum { | |
| CHARGER_BATTERY = 0, | |
| CHARGER_USB, | |
| CHARGER_AC | |
| } charger_type_t; | |
| +const char *charger_tags[] = {"none", "USB", "AC"}; | |
| + | |
| struct battery_info_reply { | |
| u32 batt_id; /* Battery ID from ADC */ | |
| u32 batt_vol; /* Battery voltage from ADC */ | |
| u32 batt_temp; /* Battery Temperature (C) from formula and ADC */ | |
| u32 batt_current; /* Battery current from ADC */ | |
| u32 level; /* formula */ | |
| u32 charging_source; /* 0: no cable, 1:usb, 2:AC */ | |
| u32 charging_enabled; /* 0: Disable, 1: Enable */ | |
| @@ -157,16 +177,17 @@ | |
| .supplied_to = supply_list, | |
| .num_supplicants = ARRAY_SIZE(supply_list), | |
| .properties = htc_power_properties, | |
| .num_properties = ARRAY_SIZE(htc_power_properties), | |
| .get_property = htc_power_get_property, | |
| }, | |
| }; | |
| +static int g_usb_online; | |
| /* -------------------------------------------------------------------------- */ | |
| #if defined(CONFIG_DEBUG_FS) | |
| int htc_battery_set_charging(batt_ctl_t ctl); | |
| static int batt_debug_set(void *data, u64 val) | |
| { | |
| return htc_battery_set_charging((batt_ctl_t) val); | |
| @@ -191,16 +212,19 @@ | |
| return 0; | |
| } | |
| device_initcall(batt_debug_init); | |
| #endif | |
| static int init_batt_gpio(void) | |
| { | |
| + if (!machine_is_trout()) | |
| + return 0; | |
| + | |
| if (gpio_request(GPIO_BATTERY_DETECTION, "batt_detect") < 0) | |
| goto gpio_failed; | |
| if (gpio_request(GPIO_BATTERY_CHARGER_EN, "charger_en") < 0) | |
| goto gpio_failed; | |
| if (gpio_request(GPIO_BATTERY_CHARGER_CURRENT, "charge_current") < 0) | |
| goto gpio_failed; | |
| return 0; | |
| @@ -214,29 +238,33 @@ | |
| * battery_charging_ctrl - battery charing control. | |
| * @ctl: battery control command | |
| * | |
| */ | |
| static int battery_charging_ctrl(batt_ctl_t ctl) | |
| { | |
| int result = 0; | |
| + /* The charing operations are move to A9 in Sapphire. */ | |
| + if (!machine_is_trout()) | |
| + return result; | |
| + | |
| switch (ctl) { | |
| case DISABLE: | |
| - BATT("charger OFF\n"); | |
| + BATT("charger OFF"); | |
| /* 0 for enable; 1 disable */ | |
| result = gpio_direction_output(GPIO_BATTERY_CHARGER_EN, 1); | |
| break; | |
| case ENABLE_SLOW_CHG: | |
| - BATT("charger ON (SLOW)\n"); | |
| + BATT("charger ON (SLOW)"); | |
| result = gpio_direction_output(GPIO_BATTERY_CHARGER_CURRENT, 0); | |
| result = gpio_direction_output(GPIO_BATTERY_CHARGER_EN, 0); | |
| break; | |
| case ENABLE_FAST_CHG: | |
| - BATT("charger ON (FAST)\n"); | |
| + BATT("charger ON (FAST)"); | |
| result = gpio_direction_output(GPIO_BATTERY_CHARGER_CURRENT, 1); | |
| result = gpio_direction_output(GPIO_BATTERY_CHARGER_EN, 0); | |
| break; | |
| default: | |
| printk(KERN_ERR "Not supported battery ctr called.!\n"); | |
| result = -EINVAL; | |
| break; | |
| } | |
| @@ -276,61 +304,86 @@ | |
| if (notify) | |
| power_supply_changed(&htc_power_supplies[CHARGER_BATTERY]); | |
| return 0; | |
| } | |
| int htc_cable_status_update(int status) | |
| { | |
| int rc = 0; | |
| - unsigned source; | |
| + unsigned last_source; | |
| if (!htc_battery_initial) | |
| return 0; | |
| + if (status < CHARGER_BATTERY || status > CHARGER_AC) { | |
| + BATT("%s: Not supported cable status received!", __func__); | |
| + return -EINVAL; | |
| + } | |
| mutex_lock(&htc_batt_info.lock); | |
| - switch(status) { | |
| - case CHARGER_BATTERY: | |
| - BATT("cable NOT PRESENT\n"); | |
| - htc_batt_info.rep.charging_source = CHARGER_BATTERY; | |
| - break; | |
| - case CHARGER_USB: | |
| - BATT("cable USB\n"); | |
| - htc_batt_info.rep.charging_source = CHARGER_USB; | |
| - break; | |
| - case CHARGER_AC: | |
| - BATT("cable AC\n"); | |
| + /* A9 reports USB charging when helf AC cable in and China AC charger. */ | |
| + /* Work arround: notify userspace AC charging first, | |
| + and notify USB charging again when receiving usb connected notificaiton from usb driver. */ | |
| + last_source = htc_batt_info.rep.charging_source; | |
| + if (status == CHARGER_USB && g_usb_online == 0) | |
| htc_batt_info.rep.charging_source = CHARGER_AC; | |
| - break; | |
| - default: | |
| - printk(KERN_ERR "%s: Not supported cable status received!\n", | |
| - __FUNCTION__); | |
| - rc = -EINVAL; | |
| + else { | |
| + htc_batt_info.rep.charging_source = status; | |
| + /* usb driver will not notify usb offline. */ | |
| + if (status == CHARGER_BATTERY && g_usb_online == 1) | |
| + g_usb_online = 0; | |
| } | |
| - source = htc_batt_info.rep.charging_source; | |
| - mutex_unlock(&htc_batt_info.lock); | |
| - msm_hsusb_set_vbus_state(source == CHARGER_USB); | |
| - if (source == CHARGER_USB) { | |
| + /* TODO: Don't call usb driver again with the same cable status. */ | |
| + msm_hsusb_set_vbus_state(status == CHARGER_USB); | |
| + | |
| + if (htc_batt_info.rep.charging_source != last_source) { | |
| + if (htc_batt_info.rep.charging_source == CHARGER_USB || | |
| + htc_batt_info.rep.charging_source == CHARGER_AC) { | |
| wake_lock(&vbus_wake_lock); | |
| } else { | |
| /* give userspace some time to see the uevent and update | |
| * LED state or whatnot... | |
| */ | |
| wake_lock_timeout(&vbus_wake_lock, HZ / 2); | |
| } | |
| - | |
| - /* if the power source changes, all power supplies may change state */ | |
| + if (htc_batt_info.rep.charging_source == CHARGER_BATTERY || last_source == CHARGER_BATTERY) | |
| power_supply_changed(&htc_power_supplies[CHARGER_BATTERY]); | |
| + if (htc_batt_info.rep.charging_source == CHARGER_USB || last_source == CHARGER_USB) | |
| power_supply_changed(&htc_power_supplies[CHARGER_USB]); | |
| + if (htc_batt_info.rep.charging_source == CHARGER_AC || last_source == CHARGER_AC) | |
| power_supply_changed(&htc_power_supplies[CHARGER_AC]); | |
| + } | |
| + mutex_unlock(&htc_batt_info.lock); | |
| return rc; | |
| } | |
| +/* A9 reports USB charging when helf AC cable in and China AC charger. */ | |
| +/* Work arround: notify userspace AC charging first, | |
| +and notify USB charging again when receiving usb connected notification from usb driver. */ | |
| +void notify_usb_connected(int online) | |
| +{ | |
| + mutex_lock(&htc_batt_info.lock); | |
| + | |
| + BATT("%s: online=%d, g_usb_online=%d", __func__, online, g_usb_online); | |
| + | |
| + if (g_usb_online != online) { | |
| + g_usb_online = online; | |
| + if (online && htc_batt_info.rep.charging_source == CHARGER_AC) { | |
| + mutex_unlock(&htc_batt_info.lock); | |
| + htc_cable_status_update(CHARGER_USB); | |
| + mutex_lock(&htc_batt_info.lock); | |
| + } else if (online) { | |
| + BATT("warning: usb connected but charging source=%d", htc_batt_info.rep.charging_source); | |
| + } | |
| + } | |
| + mutex_unlock(&htc_batt_info.lock); | |
| +} | |
| + | |
| static int htc_get_batt_info(struct battery_info_reply *buffer) | |
| { | |
| struct rpc_request_hdr req; | |
| struct htc_get_batt_info_rep { | |
| struct rpc_reply_hdr hdr; | |
| struct battery_info_reply info; | |
| } rep; | |
| @@ -348,48 +401,25 @@ | |
| return rc; | |
| mutex_lock(&htc_batt_info.lock); | |
| buffer->batt_id = be32_to_cpu(rep.info.batt_id); | |
| buffer->batt_vol = be32_to_cpu(rep.info.batt_vol); | |
| buffer->batt_temp = be32_to_cpu(rep.info.batt_temp); | |
| buffer->batt_current = be32_to_cpu(rep.info.batt_current); | |
| buffer->level = be32_to_cpu(rep.info.level); | |
| - buffer->charging_source = be32_to_cpu(rep.info.charging_source); | |
| + /* Move the rules of charging_source to cable_status_update. */ | |
| + /* buffer->charging_source = be32_to_cpu(rep.info.charging_source); */ | |
| buffer->charging_enabled = be32_to_cpu(rep.info.charging_enabled); | |
| buffer->full_bat = be32_to_cpu(rep.info.full_bat); | |
| mutex_unlock(&htc_batt_info.lock); | |
| return 0; | |
| } | |
| -#if 0 | |
| -static int htc_get_cable_status(void) | |
| -{ | |
| - | |
| - struct rpc_request_hdr req; | |
| - | |
| - struct htc_get_cable_status_rep { | |
| - struct rpc_reply_hdr hdr; | |
| - int status; | |
| - } rep; | |
| - | |
| - int rc; | |
| - | |
| - rc = msm_rpc_call_reply(endpoint, HTC_PROCEDURE_GET_CABLE_STATUS, | |
| - &req, sizeof(req), | |
| - &rep, sizeof(rep), | |
| - 5 * HZ); | |
| - if (rc < 0) | |
| - return rc; | |
| - | |
| - return be32_to_cpu(rep.status); | |
| -} | |
| -#endif | |
| - | |
| /* -------------------------------------------------------------------------- */ | |
| static int htc_power_get_property(struct power_supply *psy, | |
| enum power_supply_property psp, | |
| union power_supply_propval *val) | |
| { | |
| charger_type_t charger; | |
| mutex_lock(&htc_batt_info.lock); | |
| @@ -632,18 +662,21 @@ | |
| /* init battery gpio */ | |
| if ((rc = init_batt_gpio()) < 0) { | |
| printk(KERN_ERR "%s: init battery gpio failed!\n", __FUNCTION__); | |
| return rc; | |
| } | |
| /* init structure data member */ | |
| htc_batt_info.update_time = jiffies; | |
| - htc_batt_info.present = gpio_get_value(GPIO_BATTERY_DETECTION); | |
| - | |
| + /* A9 will shutdown the phone if battery is pluged out, so this value is always 1. | |
| + htc_batt_info.present = gpio_get_value(GPIO_TROUT_MBAT_IN); | |
| + */ | |
| + htc_batt_info.present = 1; | |
| + | |
| /* init rpc */ | |
| endpoint = msm_rpc_connect(APP_BATT_PROG, APP_BATT_VER, 0); | |
| if (IS_ERR(endpoint)) { | |
| printk(KERN_ERR "%s: init rpc failed! rc = %ld\n", | |
| __FUNCTION__, PTR_ERR(endpoint)); | |
| return rc; | |
| } | |
| @@ -658,31 +691,25 @@ | |
| htc_battery_create_attrs(htc_power_supplies[CHARGER_BATTERY].dev); | |
| /* After battery driver gets initialized, send rpc request to inquiry | |
| * the battery status in case of we lost some info | |
| */ | |
| htc_battery_initial = 1; | |
| mutex_lock(&htc_batt_info.rpc_lock); | |
| + htc_batt_info.rep.charging_source = CHARGER_BATTERY; | |
| if (htc_get_batt_info(&htc_batt_info.rep) < 0) | |
| printk(KERN_ERR "%s: get info failed\n", __FUNCTION__); | |
| - htc_cable_status_update(htc_batt_info.rep.charging_source); | |
| - battery_charging_ctrl(htc_batt_info.rep.charging_enabled ? | |
| - ENABLE_SLOW_CHG : DISABLE); | |
| - | |
| if (htc_rpc_set_delta(1) < 0) | |
| printk(KERN_ERR "%s: set delta failed\n", __FUNCTION__); | |
| htc_batt_info.update_time = jiffies; | |
| mutex_unlock(&htc_batt_info.rpc_lock); | |
| - if (htc_batt_info.rep.charging_enabled == 0) | |
| - battery_charging_ctrl(DISABLE); | |
| - | |
| return 0; | |
| } | |
| static struct platform_driver htc_battery_driver = { | |
| .probe = htc_battery_probe, | |
| .driver = { | |
| .name = APP_BATT_PDEV_NAME, | |
| .owner = THIS_MODULE, | |
| @@ -715,33 +742,33 @@ | |
| switch (req->procedure) { | |
| case RPC_BATT_MTOA_NULL: | |
| return 0; | |
| case RPC_BATT_MTOA_SET_CHARGING_PROC: { | |
| struct rpc_batt_mtoa_set_charging_args *args; | |
| args = (struct rpc_batt_mtoa_set_charging_args *)(req + 1); | |
| args->enable = be32_to_cpu(args->enable); | |
| - BATT("set_charging: enable=%d\n",args->enable); | |
| + BATT("set_charging: enable=%d",args->enable); | |
| htc_battery_set_charging(args->enable); | |
| return 0; | |
| } | |
| case RPC_BATT_MTOA_CABLE_STATUS_UPDATE_PROC: { | |
| struct rpc_batt_mtoa_cable_status_update_args *args; | |
| args = (struct rpc_batt_mtoa_cable_status_update_args *)(req + 1); | |
| args->status = be32_to_cpu(args->status); | |
| - BATT("cable_status_update: status=%d\n",args->status); | |
| + BATT("cable_status_update: status=%d",args->status); | |
| htc_cable_status_update(args->status); | |
| return 0; | |
| } | |
| case RPC_BATT_MTOA_LEVEL_UPDATE_PROC: { | |
| struct rpc_dem_battery_update_args *args; | |
| args = (struct rpc_dem_battery_update_args *)(req + 1); | |
| args->level = be32_to_cpu(args->level); | |
| - BATT("dem_battery_update: level=%d\n",args->level); | |
| + BATT("dem_battery_update: level=%d",args->level); | |
| htc_battery_status_update(args->level); | |
| return 0; | |
| } | |
| default: | |
| printk(KERN_ERR "%s: program 0x%08x:%d: unknown procedure %d\n", | |
| __FUNCTION__, req->prog, req->vers, req->procedure); | |
| return -ENODEV; | |
| } | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/htc_headset.c kernel/arch/arm/mach-msm/htc_headset.c | |
| --- kernel-msm/arch/arm/mach-msm/htc_headset.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/htc_headset.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -96,41 +96,47 @@ | |
| struct input_dev *input; | |
| struct mutex mutex_lock; | |
| atomic_t btn_state; | |
| int ignore_btn; | |
| unsigned int irq; | |
| unsigned int irq_btn; | |
| + unsigned int irq_btn_35mm; | |
| int cable_in1; | |
| int cable_in2; | |
| int h2w_clk; | |
| int h2w_data; | |
| int debug_uart; | |
| + int headset_mic_35mm; | |
| void (*config_cpld) (int); | |
| void (*init_cpld) (void); | |
| /* for h2w */ | |
| void (*set_dat)(int); | |
| void (*set_clk)(int); | |
| void (*set_dat_dir)(int); | |
| void (*set_clk_dir)(int); | |
| int (*get_dat)(void); | |
| int (*get_clk)(void); | |
| int htc_headset_flag; | |
| + int btn_11pin_35mm_flag; | |
| struct hrtimer timer; | |
| ktime_t debounce_time; | |
| struct hrtimer btn_timer; | |
| ktime_t btn_debounce_time; | |
| + struct hrtimer btn35mm_timer; | |
| + ktime_t btn35mm_debounce_time; | |
| + | |
| H2W_INFO h2w_info; | |
| H2W_SPEED speed; | |
| struct vreg *vreg_h2w; | |
| }; | |
| static struct h2w_info *hi; | |
| static ssize_t h2w_print_name(struct switch_dev *sdev, char *buf) | |
| { | |
| @@ -140,25 +146,25 @@ | |
| case H2W_HTC_HEADSET: | |
| return sprintf(buf, "Headset\n"); | |
| } | |
| return -EINVAL; | |
| } | |
| static void button_pressed(void) | |
| { | |
| - H2W_DBG("button_pressed \n"); | |
| + printk(KERN_INFO "[H2W] button_pressed\n"); | |
| atomic_set(&hi->btn_state, 1); | |
| input_report_key(hi->input, KEY_MEDIA, 1); | |
| input_sync(hi->input); | |
| } | |
| static void button_released(void) | |
| { | |
| - H2W_DBG("button_released \n"); | |
| + printk(KERN_INFO "[H2W] button_released\n"); | |
| atomic_set(&hi->btn_state, 0); | |
| input_report_key(hi->input, KEY_MEDIA, 0); | |
| input_sync(hi->input); | |
| } | |
| /***************** | |
| * H2W proctocol * | |
| *****************/ | |
| @@ -180,72 +186,44 @@ | |
| hi->set_clk_dir(0); | |
| /* Enable H2W interrupt */ | |
| enable_irq(hi->irq); | |
| enable_irq(hi->irq_btn); | |
| set_irq_type(hi->irq_btn, IRQF_TRIGGER_RISING); | |
| } | |
| -/* | |
| - * One bit write data | |
| - * ________ | |
| - * SCLK O ______| |______O(L) | |
| - * | |
| - * | |
| - * SDAT I <XXXXXXXXXXXXXXXXXXXX> | |
| - */ | |
| static inline void one_clock_write(unsigned short flag) | |
| { | |
| if (flag) | |
| hi->set_dat(1); | |
| else | |
| hi->set_dat(0); | |
| udelay(hi->speed); | |
| hi->set_clk(1); | |
| udelay(hi->speed); | |
| hi->set_clk(0); | |
| } | |
| -/* | |
| - * One bit write data R/W bit | |
| - * ________ | |
| - * SCLK ______| |______O(L) | |
| - * 1----> 1-----> | |
| - * 2-------> ______ | |
| - * SDAT <XXXXXXXXXXXXXX> I | |
| - * O(H/L) | |
| - */ | |
| static inline void one_clock_write_RWbit(unsigned short flag) | |
| { | |
| if (flag) | |
| hi->set_dat(1); | |
| else | |
| hi->set_dat(0); | |
| udelay(hi->speed); | |
| hi->set_clk(1); | |
| udelay(hi->speed); | |
| hi->set_clk(0); | |
| hi->set_dat_dir(0); | |
| udelay(hi->speed); | |
| } | |
| -/* | |
| - * H2W Reset | |
| - * ___________ | |
| - * SCLK O(L)______| |___O(L) | |
| - * 1----> | |
| - * 4-->1-->1-->1us--> | |
| - * ____ | |
| - * SDAT O(L)________ | |_______O(L) | |
| - * | |
| - * H2w reset command needs to be issued before every access | |
| - */ | |
| static inline void h2w_reset(void) | |
| { | |
| /* Set H2W_DAT as output low */ | |
| hi->set_dat(0); | |
| hi->set_dat_dir(1); | |
| udelay(hi->speed); | |
| hi->set_clk(1); | |
| @@ -253,43 +231,25 @@ | |
| hi->set_dat(1); | |
| udelay(hi->speed); | |
| hi->set_dat(0); | |
| udelay(hi->speed); | |
| hi->set_clk(0); | |
| udelay(hi->speed); | |
| } | |
| -/* | |
| - * H2W Start | |
| - * ___________ | |
| - * SCLK O(L)______| |___O(L) | |
| - * 1----> | |
| - * 2----------->1--> | |
| - * | |
| - * SDAT O(L)______________________O(L) | |
| - */ | |
| static inline void h2w_start(void) | |
| { | |
| udelay(hi->speed); | |
| hi->set_clk(1); | |
| udelay(2 * hi->speed); | |
| hi->set_clk(0); | |
| udelay(hi->speed); | |
| } | |
| -/* | |
| - * H2W Ack | |
| - * __________ | |
| - * SCLK _____| |_______O(L) | |
| - * 1----> 1------> | |
| - * 2---------> | |
| - * ________________________ | |
| - * SDAT become Input mode here I | |
| - */ | |
| static inline int h2w_ack(void) | |
| { | |
| int retry_times = 0; | |
| ack_resend: | |
| if (retry_times == MAX_ACK_RESEND_TIMES) | |
| return -1; | |
| @@ -304,24 +264,16 @@ | |
| goto ack_resend; | |
| } | |
| hi->set_clk(0); | |
| udelay(hi->speed); | |
| return 0; | |
| } | |
| -/* | |
| - * One bit read data | |
| - * ________ | |
| - * SCLK ______| |______O(L) | |
| - * 2----> 2-----> | |
| - * 2-------> | |
| - * SDAT <XXXXXXXXXXXXXXXXXXXX>I | |
| - */ | |
| static unsigned char h2w_readc(void) | |
| { | |
| unsigned char h2w_read_data = 0x0; | |
| int index; | |
| for (index = 0; index < 8; index++) { | |
| hi->set_clk(0); | |
| udelay(hi->speed); | |
| @@ -664,25 +616,37 @@ | |
| switch (hi->htc_headset_flag) { | |
| case H2W_HTC_HEADSET: | |
| local_irq_save(irq_flags); | |
| disable_irq(hi->irq_btn); | |
| local_irq_restore(irq_flags); | |
| if (atomic_read(&hi->btn_state)) | |
| button_released(); | |
| + printk(KERN_INFO "remove htc headset\n"); | |
| + break; | |
| + case NORMAL_HEARPHONE: | |
| + if (hi->btn_11pin_35mm_flag) { | |
| + disable_irq(hi->irq_btn_35mm); | |
| + turn_mic_bias_on(0); | |
| + hi->btn_11pin_35mm_flag = 0; | |
| + if (atomic_read(&hi->btn_state)) | |
| + button_released(); | |
| + } | |
| + printk(KERN_INFO "remove 11pin 3.5mm headset\n"); | |
| break; | |
| case H2W_DEVICE: | |
| h2w_dev_power_on(0); | |
| set_irq_type(hi->irq_btn, IRQF_TRIGGER_LOW); | |
| disable_irq(hi->irq_btn); | |
| /* 10ms (5-15 with 10ms tick) */ | |
| hi->btn_debounce_time = ktime_set(0, 10000000); | |
| hi->set_clk_dir(0); | |
| hi->set_dat_dir(0); | |
| + printk(KERN_INFO "remove h2w device\n"); | |
| break; | |
| } | |
| hi->htc_headset_flag = 0; | |
| hi->debounce_time = ktime_set(0, 100000000); /* 100 ms */ | |
| } | |
| @@ -708,36 +672,74 @@ | |
| state |= BIT_HEADSET; | |
| hi->ignore_btn = !gpio_get_value(hi->cable_in2); | |
| /* Enable button irq */ | |
| local_irq_save(irq_flags); | |
| enable_irq(hi->irq_btn); | |
| local_irq_restore(irq_flags); | |
| hi->debounce_time = ktime_set(0, 200000000); /* 20 ms */ | |
| break; | |
| + case NORMAL_HEARPHONE: | |
| + if (hi->headset_mic_35mm) { | |
| + /* support 3.5mm earphone with mic */ | |
| + printk(KERN_INFO "11pin_3.5mm_headset plug in\n"); | |
| + /* Turn On Mic Bias */ | |
| + turn_mic_bias_on(1); | |
| + /* Wait pin be stable */ | |
| + msleep(200); | |
| + /* Detect headset with or without microphone */ | |
| + if (gpio_get_value(hi->headset_mic_35mm)) { | |
| + /* without microphone */ | |
| + turn_mic_bias_on(0); | |
| + state |= BIT_HEADSET_NO_MIC; | |
| + printk(KERN_INFO | |
| + "11pin_3.5mm without microphone\n"); | |
| + } else { /* with microphone */ | |
| + state |= BIT_HEADSET; | |
| + /* Enable button irq */ | |
| + if (!hi->btn_11pin_35mm_flag) { | |
| + set_irq_type(hi->irq_btn_35mm, | |
| + IRQF_TRIGGER_HIGH); | |
| + enable_irq(hi->irq_btn_35mm); | |
| + hi->btn_11pin_35mm_flag = 1; | |
| + } | |
| + printk(KERN_INFO | |
| + "11pin_3.5mm with microphone\n"); | |
| + } | |
| + } else /* not support 3.5mm earphone with mic */ | |
| + state |= BIT_HEADSET_NO_MIC; | |
| + hi->debounce_time = ktime_set(0, 500000000); /* 500 ms */ | |
| + break; | |
| case H2W_DEVICE: | |
| + printk(KERN_INFO "insert_headset H2W_DEVICE\n"); | |
| + if (!hi->set_dat) { | |
| + printk(KERN_INFO "Don't support H2W_DEVICE\n"); | |
| + hi->htc_headset_flag = 0; | |
| + return; | |
| + } | |
| if (h2w_dev_detect() < 0) { | |
| printk(KERN_INFO "H2W_DEVICE -- Non detect\n"); | |
| remove_headset(); | |
| } else { | |
| printk(KERN_INFO "H2W_DEVICE -- detect\n"); | |
| hi->btn_debounce_time = ktime_set(0, 0); | |
| local_irq_save(irq_flags); | |
| enable_irq(hi->irq_btn); | |
| set_irq_type(hi->irq_btn, IRQF_TRIGGER_RISING); | |
| local_irq_restore(irq_flags); | |
| state |= BIT_HEADSET; | |
| } | |
| break; | |
| case H2W_USB_CRADLE: | |
| + printk(KERN_INFO "insert_headset USB_CRADLE\n"); | |
| state |= BIT_HEADSET_NO_MIC; | |
| break; | |
| case H2W_UART_DEBUG: | |
| - hi->config_cpld(hi->debug_uart); | |
| printk(KERN_INFO "switch to H2W_UART_DEBUG\n"); | |
| + hi->config_cpld(hi->debug_uart); | |
| default: | |
| return; | |
| } | |
| mutex_lock(&hi->mutex_lock); | |
| switch_set_state(&hi->sdev, state); | |
| mutex_unlock(&hi->mutex_lock); | |
| #ifdef CONFIG_MSM_SERIAL_DEBUGGER | |
| @@ -801,17 +803,17 @@ | |
| /* Step 5: save H2W_CLK and H2W_DAT */ | |
| clk3 = gpio_get_value(hi->h2w_clk); | |
| dat3 = gpio_get_value(hi->h2w_data); | |
| /* Step 6: set both GPIO_CABLE_IN1 and GPIO_CABLE_IN2 as input */ | |
| gpio_direction_input(hi->cable_in1); | |
| gpio_direction_input(hi->cable_in2); | |
| - H2W_DBG("(%d,%d) (%d,%d) (%d,%d)\n", | |
| + H2WI("(%d,%d) (%d,%d) (%d,%d)", | |
| clk1, dat1, clk2, dat2, clk3, dat3); | |
| if ((clk1 == 0) && (dat1 == 1) && | |
| (clk2 == 0) && (dat2 == 1) && | |
| (clk3 == 0) && (dat3 == 1)) | |
| type = H2W_HTC_HEADSET; | |
| else if ((clk1 == 0) && (dat1 == 0) && | |
| (clk2 == 0) && (dat2 == 0) && | |
| @@ -866,35 +868,57 @@ | |
| /* Restore IRQs */ | |
| local_irq_save(irq_flags); | |
| enable_irq(hi->irq); | |
| local_irq_restore(irq_flags); | |
| insert_headset(type); | |
| } | |
| +void headset_button_event(int is_press) | |
| +{ | |
| + if (!is_press) { | |
| + if (hi->ignore_btn) | |
| + hi->ignore_btn = 0; | |
| + else if (atomic_read(&hi->btn_state)) | |
| + button_released(); | |
| + } else { | |
| + if (!hi->ignore_btn && !atomic_read(&hi->btn_state)) | |
| + button_pressed(); | |
| + } | |
| +} | |
| + | |
| +static enum hrtimer_restart button_35mm_event_timer_func(struct hrtimer *data) | |
| +{ | |
| + if (gpio_get_value(hi->headset_mic_35mm)) { | |
| + headset_button_event(1); | |
| + /* 10 ms */ | |
| + hi->btn35mm_debounce_time = ktime_set(0, 10000000); | |
| + } else { | |
| + headset_button_event(0); | |
| + /* 100 ms */ | |
| + hi->btn35mm_debounce_time = ktime_set(0, 100000000); | |
| + } | |
| + | |
| + return HRTIMER_NORESTART; | |
| +} | |
| + | |
| static enum hrtimer_restart button_event_timer_func(struct hrtimer *data) | |
| { | |
| int key, press, keyname, h2w_key = 1; | |
| H2W_DBG(""); | |
| - if (switch_get_state(&hi->sdev) == H2W_HTC_HEADSET) { | |
| + if (switch_get_state(&hi->sdev) & BIT_HEADSET) { | |
| switch (hi->htc_headset_flag) { | |
| case H2W_HTC_HEADSET: | |
| - if (gpio_get_value(hi->cable_in2)) { | |
| - if (hi->ignore_btn) | |
| - hi->ignore_btn = 0; | |
| - else if (atomic_read(&hi->btn_state)) | |
| - button_released(); | |
| - } else { | |
| - if (!hi->ignore_btn && | |
| - !atomic_read(&hi->btn_state)) | |
| - button_pressed(); | |
| - } | |
| + if (!gpio_get_value(hi->cable_in2)) | |
| + headset_button_event(1); /* press */ | |
| + else | |
| + headset_button_event(0); | |
| break; | |
| case H2W_DEVICE: | |
| if ((hi->get_dat() == 1) && (hi->get_clk() == 1)) { | |
| /* Don't do anything because H2W pull out. */ | |
| H2WE("Remote Control pull out.\n"); | |
| } else { | |
| key = h2w_get_fnkey(); | |
| press = (key > 0x7F) ? 0 : 1; | |
| @@ -978,17 +1002,17 @@ | |
| IRQF_TRIGGER_LOW : IRQF_TRIGGER_HIGH); | |
| value2 = gpio_get_value(hi->cable_in1); | |
| } while (value1 != value2 && retry_limit-- > 0); | |
| H2W_DBG("value2 = %d (%d retries), device=%d", | |
| value2, (10-retry_limit), switch_get_state(&hi->sdev)); | |
| if ((switch_get_state(&hi->sdev) == H2W_NO_DEVICE) ^ value2) { | |
| - if (switch_get_state(&hi->sdev) == H2W_HTC_HEADSET) | |
| + if (switch_get_state(&hi->sdev) & BIT_HEADSET) | |
| hi->ignore_btn = 1; | |
| /* Do the rest of the work in timer context */ | |
| hrtimer_start(&hi->timer, hi->debounce_time, HRTIMER_MODE_REL); | |
| } | |
| return IRQ_HANDLED; | |
| } | |
| @@ -1008,16 +1032,39 @@ | |
| H2W_DBG("value2 = %d (%d retries)", value2, (10-retry_limit)); | |
| hrtimer_start(&hi->btn_timer, hi->btn_debounce_time, HRTIMER_MODE_REL); | |
| return IRQ_HANDLED; | |
| } | |
| +static irqreturn_t button_35mm_irq_handler(int irq, void *dev_id) | |
| +{ | |
| + int value1, value2; | |
| + int retry_limit = 10; | |
| + | |
| + H2W_DBG(""); | |
| + do { | |
| + value1 = gpio_get_value(hi->headset_mic_35mm); | |
| + set_irq_type(hi->irq_btn_35mm, value1 ? | |
| + IRQF_TRIGGER_LOW : IRQF_TRIGGER_HIGH); | |
| + value2 = gpio_get_value(hi->headset_mic_35mm); | |
| + } while (value1 != value2 && retry_limit-- > 0); | |
| + | |
| + H2W_DBG("value2 = %d (%d retries)", value2, (10-retry_limit)); | |
| + | |
| + hrtimer_start(&hi->btn35mm_timer, | |
| + hi->btn35mm_debounce_time, | |
| + HRTIMER_MODE_REL); | |
| + | |
| + return IRQ_HANDLED; | |
| + | |
| +} | |
| + | |
| #if defined(CONFIG_DEBUG_FS) | |
| static int h2w_debug_set(void *data, u64 val) | |
| { | |
| mutex_lock(&hi->mutex_lock); | |
| switch_set_state(&hi->sdev, (int)val); | |
| mutex_unlock(&hi->mutex_lock); | |
| return 0; | |
| } | |
| @@ -1054,23 +1101,26 @@ | |
| if (!hi) | |
| return -ENOMEM; | |
| atomic_set(&hi->btn_state, 0); | |
| hi->ignore_btn = 0; | |
| hi->debounce_time = ktime_set(0, 100000000); /* 100 ms */ | |
| hi->btn_debounce_time = ktime_set(0, 10000000); /* 10 ms */ | |
| + hi->btn35mm_debounce_time = ktime_set(0, 50000000); /* 50 ms */ | |
| hi->htc_headset_flag = 0; | |
| + hi->btn_11pin_35mm_flag = 0; | |
| hi->cable_in1 = pdata->cable_in1; | |
| hi->cable_in2 = pdata->cable_in2; | |
| hi->h2w_clk = pdata->h2w_clk; | |
| hi->h2w_data = pdata->h2w_data; | |
| hi->debug_uart = pdata->debug_uart; | |
| + hi->headset_mic_35mm = pdata->headset_mic_35mm; | |
| hi->config_cpld = pdata->config_cpld; | |
| hi->init_cpld = pdata->init_cpld; | |
| hi->set_dat = pdata->set_dat; | |
| hi->set_clk = pdata->set_clk; | |
| hi->set_dat_dir = pdata->set_dat_dir; | |
| hi->set_clk_dir = pdata->set_clk_dir; | |
| hi->get_dat = pdata->get_dat; | |
| hi->get_clk = pdata->get_clk; | |
| @@ -1089,16 +1139,38 @@ | |
| goto err_switch_dev_register; | |
| g_detection_work_queue = create_workqueue("detection"); | |
| if (g_detection_work_queue == NULL) { | |
| ret = -ENOMEM; | |
| goto err_create_work_queue; | |
| } | |
| + if (hi->headset_mic_35mm) { | |
| + ret = gpio_request(hi->headset_mic_35mm, "3.5mm_mic_detect"); | |
| + if (ret < 0) | |
| + goto err_request_35mm_mic_detect_gpio; | |
| + | |
| + ret = gpio_direction_input(hi->headset_mic_35mm); | |
| + if (ret < 0) | |
| + goto err_set_35mm_mic_detect_gpio; | |
| + | |
| + hi->irq_btn_35mm = gpio_to_irq(hi->headset_mic_35mm); | |
| + if (hi->irq_btn_35mm < 0) { | |
| + ret = hi->irq_btn_35mm; | |
| + goto err_request_btn_35mm_irq; | |
| + } | |
| + set_irq_flags(hi->irq_btn_35mm, IRQF_VALID | IRQF_NOAUTOEN); | |
| + ret = request_irq(hi->irq_btn_35mm, | |
| + button_35mm_irq_handler, | |
| + IRQF_TRIGGER_HIGH, "35mm_button", NULL); | |
| + if (ret < 0) | |
| + goto err_request_btn_35mm_irq; | |
| + } | |
| + | |
| ret = gpio_request(hi->cable_in1, "h2w_detect"); | |
| if (ret < 0) | |
| goto err_request_detect_gpio; | |
| ret = gpio_request(hi->cable_in2, "h2w_button"); | |
| if (ret < 0) | |
| goto err_request_button_gpio; | |
| @@ -1124,16 +1196,18 @@ | |
| /* Set CPLD MUX to H2W <-> CPLD GPIO */ | |
| hi->init_cpld(); | |
| hrtimer_init(&hi->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); | |
| hi->timer.function = detect_event_timer_func; | |
| hrtimer_init(&hi->btn_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); | |
| hi->btn_timer.function = button_event_timer_func; | |
| + hrtimer_init(&hi->btn35mm_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); | |
| + hi->btn35mm_timer.function = button_35mm_event_timer_func; | |
| ret = request_irq(hi->irq, detect_irq_handler, | |
| IRQF_TRIGGER_LOW, "h2w_detect", NULL); | |
| if (ret < 0) | |
| goto err_request_detect_irq; | |
| /* Disable button until plugged in */ | |
| set_irq_flags(hi->irq_btn, IRQF_VALID | IRQF_NOAUTOEN); | |
| @@ -1187,16 +1261,23 @@ | |
| err_get_button_irq_num_failed: | |
| err_get_h2w_detect_irq_num_failed: | |
| err_set_button_gpio: | |
| err_set_detect_gpio: | |
| gpio_free(hi->cable_in2); | |
| err_request_button_gpio: | |
| gpio_free(hi->cable_in1); | |
| err_request_detect_gpio: | |
| + if (hi->headset_mic_35mm) | |
| + free_irq(hi->irq_btn_35mm, 0); | |
| +err_request_btn_35mm_irq: | |
| +err_set_35mm_mic_detect_gpio: | |
| + if (hi->headset_mic_35mm) | |
| + gpio_free(hi->headset_mic_35mm); | |
| +err_request_35mm_mic_detect_gpio: | |
| destroy_workqueue(g_detection_work_queue); | |
| err_create_work_queue: | |
| switch_dev_unregister(&hi->sdev); | |
| err_switch_dev_register: | |
| printk(KERN_ERR "H2W: Failed to register driver\n"); | |
| return ret; | |
| } | |
| @@ -1206,16 +1287,20 @@ | |
| H2W_DBG(""); | |
| if (switch_get_state(&hi->sdev)) | |
| remove_headset(); | |
| input_unregister_device(hi->input); | |
| gpio_free(hi->cable_in2); | |
| gpio_free(hi->cable_in1); | |
| free_irq(hi->irq_btn, 0); | |
| free_irq(hi->irq, 0); | |
| + if (hi->headset_mic_35mm) { | |
| + gpio_free(hi->headset_mic_35mm); | |
| + free_irq(hi->irq_btn_35mm, 0); | |
| + } | |
| destroy_workqueue(g_detection_work_queue); | |
| switch_dev_unregister(&hi->sdev); | |
| return 0; | |
| } | |
| static struct platform_driver h2w_driver = { | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/htc_pwrsink.c kernel/arch/arm/mach-msm/htc_pwrsink.c | |
| --- kernel-msm/arch/arm/mach-msm/htc_pwrsink.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/htc_pwrsink.c 2010-08-27 11:17:41.000000000 +0900 | |
| @@ -194,51 +194,53 @@ | |
| spin_unlock_irqrestore(&audio_sink_lock, flags); | |
| compute_audio_current(); | |
| return 0; | |
| } | |
| EXPORT_SYMBOL(htc_pwrsink_audio_path_set); | |
| void htc_pwrsink_suspend_early(struct early_suspend *h) | |
| { | |
| - htc_pwrsink_set(PWRSINK_SYSTEM_LOAD, 70); | |
| + htc_pwrsink_set(PWRSINK_SYSTEM_LOAD, 7); | |
| } | |
| int htc_pwrsink_suspend_late(struct platform_device *pdev, pm_message_t state) | |
| { | |
| struct pwr_sink_platform_data *pdata = pdev->dev.platform_data; | |
| if (pdata && pdata->suspend_late) | |
| pdata->suspend_late(pdev, state); | |
| else | |
| - htc_pwrsink_set(PWRSINK_SYSTEM_LOAD, 13); | |
| + htc_pwrsink_set(PWRSINK_SYSTEM_LOAD, 1); | |
| return 0; | |
| } | |
| int htc_pwrsink_resume_early(struct platform_device *pdev) | |
| { | |
| struct pwr_sink_platform_data *pdata = pdev->dev.platform_data; | |
| if (pdata && pdata->resume_early) | |
| pdata->resume_early(pdev); | |
| else | |
| - htc_pwrsink_set(PWRSINK_SYSTEM_LOAD, 70); | |
| + htc_pwrsink_set(PWRSINK_SYSTEM_LOAD, 7); | |
| return 0; | |
| } | |
| void htc_pwrsink_resume_late(struct early_suspend *h) | |
| { | |
| - htc_pwrsink_set(PWRSINK_SYSTEM_LOAD, 100); | |
| + htc_pwrsink_set(PWRSINK_SYSTEM_LOAD, 38); | |
| } | |
| +#ifdef CONFIG_WAKELOCK | |
| struct early_suspend htc_pwrsink_early_suspend = { | |
| .level = EARLY_SUSPEND_LEVEL_DISABLE_FB + 1, | |
| .suspend = htc_pwrsink_suspend_early, | |
| .resume = htc_pwrsink_resume_late, | |
| }; | |
| +#endif | |
| static int __init htc_pwrsink_probe(struct platform_device *pdev) | |
| { | |
| struct pwr_sink_platform_data *pdata = pdev->dev.platform_data; | |
| int i; | |
| if (!pdata) | |
| return -EINVAL; | |
| @@ -247,20 +249,22 @@ | |
| for (i = 0; i < pdata->num_sinks; i++) { | |
| sink_array[pdata->sinks[i].id] = &pdata->sinks[i]; | |
| total_sink += (pdata->sinks[i].ua_max * | |
| pdata->sinks[i].percent_util / 100); | |
| } | |
| initialized = 1; | |
| +#ifdef CONFIG_WAKELOCK | |
| if (pdata->suspend_early) | |
| htc_pwrsink_early_suspend.suspend = pdata->suspend_early; | |
| if (pdata->resume_late) | |
| htc_pwrsink_early_suspend.resume = pdata->resume_late; | |
| +#endif | |
| register_early_suspend(&htc_pwrsink_early_suspend); | |
| return 0; | |
| } | |
| static struct platform_driver htc_pwrsink_driver = { | |
| .probe = htc_pwrsink_probe, | |
| .suspend_late = htc_pwrsink_suspend_late, | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/idle-v6.S kernel/arch/arm/mach-msm/idle-v6.S | |
| --- kernel-msm/arch/arm/mach-msm/idle-v6.S 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/idle-v6.S 2010-08-27 11:17:41.000000000 +0900 | |
| @@ -17,27 +17,33 @@ | |
| */ | |
| #include <linux/linkage.h> | |
| #include <asm/assembler.h> | |
| ENTRY(msm_arch_idle) | |
| mov r0, #0 | |
| mcr p15, 0, r0, c7, c10, 0 /* flush entire data cache */ | |
| + | |
| +#if defined(CONFIG_ARCH_MSM7X27) | |
| + mcr p15, 0, r0, c7, c10, 4 /* dsb */ | |
| + mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ | |
| +#else | |
| mrc p15, 0, r1, c1, c0, 0 /* read current CR */ | |
| bic r0, r1, #(1 << 2) /* clear dcache bit */ | |
| bic r0, r0, #(1 << 12) /* clear icache bit */ | |
| mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ | |
| mov r0, #0 | |
| mcr p15, 0, r0, c7, c10, 4 /* dsb */ | |
| mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ | |
| mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ | |
| mcr p15, 0, r0, c7, c5, 4 /* isb */ | |
| +#endif | |
| mov pc, lr | |
| ENTRY(msm_pm_collapse) | |
| ldr r0, =saved_state | |
| stmia r0!, {r4-r14} | |
| #if defined(CONFIG_MSM_FIQ_SUPPORT) | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/board.h kernel/arch/arm/mach-msm/include/mach/board.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/board.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/board.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -172,18 +172,21 @@ | |
| void __init msm_map_qsd8x50_io(void); | |
| void __init msm_map_msm7x30_io(void); | |
| void __init msm_map_comet_io(void); | |
| void __init msm_init_irq(void); | |
| void __init msm_clock_init(struct clk *clock_tbl, unsigned num_clocks); | |
| void __init msm_acpu_clock_init(struct msm_acpu_clock_platform_data *); | |
| struct mmc_platform_data; | |
| + | |
| int __init msm_add_sdcc(unsigned int controller, | |
| - struct mmc_platform_data *plat); | |
| + struct mmc_platform_data *plat, | |
| + unsigned int stat_irq, | |
| + unsigned long stat_irq_flags); | |
| struct msm_usb_host_platform_data; | |
| int __init msm_add_host(unsigned int host, | |
| struct msm_usb_host_platform_data *plat); | |
| #if defined(CONFIG_USB_FUNCTION_MSM_HSUSB) || defined(CONFIG_USB_MSM_72K) | |
| void msm_hsusb_set_vbus_state(int online); | |
| #else | |
| static inline void msm_hsusb_set_vbus_state(int online) {} | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/board_htc.h kernel/arch/arm/mach-msm/include/mach/board_htc.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/board_htc.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/board_htc.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -50,29 +50,19 @@ | |
| void __init msm_add_usb_devices(void (*phy_reset) (void)); | |
| void __init msm_add_mem_devices(struct msm_pmem_setting *setting); | |
| void __init msm_init_pmic_vibrator(void); | |
| struct mmc_platform_data; | |
| int __init msm_add_sdcc_devices(unsigned int controller, struct mmc_platform_data *plat); | |
| int __init msm_add_serial_devices(unsigned uart); | |
| -#if defined(CONFIG_USB_FUNCTION_MSM_HSUSB) | |
| -/* START: add USB connected notify function */ | |
| -struct t_usb_status_notifier{ | |
| - struct list_head notifier_link; | |
| - const char *name; | |
| - void (*func)(int online); | |
| -}; | |
| - int usb_register_notifier(struct t_usb_status_notifier *); | |
| - static LIST_HEAD(g_lh_usb_notifier_list); | |
| -/* END: add USB connected notify function */ | |
| -#endif | |
| - | |
| int __init board_mfg_mode(void); | |
| int __init parse_tag_smi(const struct tag *tags); | |
| int __init parse_tag_hwid(const struct tag * tags); | |
| int __init parse_tag_skuid(const struct tag * tags); | |
| int parse_tag_engineerid(const struct tag * tags); | |
| +void notify_usb_connected(int online); | |
| + | |
| char *board_serialno(void); | |
| #endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/camera.h kernel/arch/arm/mach-msm/include/mach/camera.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/camera.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/camera.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -289,9 +289,12 @@ | |
| void msm_camio_camif_pad_reg_reset_2(void); | |
| void msm_camio_vfe_blk_reset(void); | |
| void msm_camio_clk_sel(enum msm_camio_clk_src_type); | |
| void msm_camio_disable(struct platform_device *); | |
| int msm_camio_probe_on(struct platform_device *); | |
| int msm_camio_probe_off(struct platform_device *); | |
| + | |
| +int request_axi_qos(void); | |
| +void release_axi_qos(void); | |
| #endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/clk.h kernel/arch/arm/mach-msm/include/mach/clk.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/clk.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/clk.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -29,17 +29,25 @@ | |
| #define __MACH_CLK_H | |
| /* Magic rate value for use with PM QOS to request the board's maximum | |
| * supported AXI rate. PM QOS will only pass positive s32 rate values | |
| * through to the clock driver, so INT_MAX is used. | |
| */ | |
| #define MSM_AXI_MAX_FREQ LONG_MAX | |
| +enum clk_reset_action { | |
| + CLK_RESET_DEASSERT = 0, | |
| + CLK_RESET_ASSERT = 1 | |
| +}; | |
| + | |
| struct clk; | |
| /* Rate is minimum clock rate in Hz */ | |
| int clk_set_min_rate(struct clk *clk, unsigned long rate); | |
| /* Rate is maximum clock rate in Hz */ | |
| int clk_set_max_rate(struct clk *clk, unsigned long rate); | |
| +/* Assert/Deassert reset to a hardware block associated with a clock */ | |
| +int clk_reset(struct clk *clk, enum clk_reset_action action); | |
| + | |
| #endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/htc_headset.h kernel/arch/arm/mach-msm/include/mach/htc_headset.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/htc_headset.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/htc_headset.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -18,16 +18,17 @@ | |
| struct h2w_platform_data { | |
| char *power_name; | |
| int cable_in1; | |
| int cable_in2; | |
| int h2w_clk; | |
| int h2w_data; | |
| int debug_uart; | |
| + int headset_mic_35mm; | |
| void (*config_cpld)(int); | |
| void (*init_cpld)(void); | |
| void (*set_dat)(int); | |
| void (*set_clk)(int); | |
| void (*set_dat_dir)(int); | |
| void (*set_clk_dir)(int); | |
| int (*get_dat)(void); | |
| int (*get_clk)(void); | |
| @@ -37,19 +38,18 @@ | |
| #define BIT_HEADSET_NO_MIC (1 << 1) | |
| #define BIT_TTY (1 << 2) | |
| #define BIT_FM_HEADSET (1 << 3) | |
| #define BIT_FM_SPEAKER (1 << 4) | |
| enum { | |
| H2W_NO_DEVICE = 0, | |
| H2W_HTC_HEADSET = 1, | |
| -/* H2W_TTY_DEVICE = 2,*/ | |
| NORMAL_HEARPHONE= 2, | |
| - H2W_DEVICE = 3, | |
| + H2W_DEVICE = 3, | |
| H2W_USB_CRADLE = 4, | |
| H2W_UART_DEBUG = 5, | |
| }; | |
| enum { | |
| H2W_GPIO = 0, | |
| H2W_UART1 = 1, | |
| H2W_UART3 = 2, | |
| @@ -165,9 +165,12 @@ | |
| H2W_KEY_VOLUP = 3, | |
| H2W_KEY_VOLDOWN = 4, | |
| H2W_KEY_PICKUP = 5, | |
| H2W_KEY_HANGUP = 6, | |
| H2W_KEY_MUTE = 7, | |
| H2W_KEY_HOLD = 8, | |
| H2W_NUM_KEYFUNC = 9, | |
| } KEYFUNC; | |
| + | |
| +extern int turn_mic_bias_on(int on); | |
| + | |
| #endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/irqs-7x30.h kernel/arch/arm/mach-msm/include/mach/irqs-7x30.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/irqs-7x30.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/irqs-7x30.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -138,18 +138,18 @@ | |
| #define INT_PWB_QUP_OUT (96 + 7) | |
| #define INT_PWB_QUP_ERR (96 + 8) | |
| /* SCSS_VICFIQSTS3[6:31] are RESERVED */ | |
| /* Retrofit universal macro names */ | |
| #define INT_ADM_AARM INT_ADM_SC2 | |
| #define INT_USB_HS INT_USB_OTG_HS | |
| #define INT_USB_OTG INT_USB_OTG_HS | |
| -#define INT_TCHSCRN1 INT_TSSC_SAMPLE | |
| -#define INT_TCHSCRN2 INT_TSSC_PENUP | |
| +#define INT_TCHSCRN1 INT_TSSC_PENUP | |
| +#define INT_TCHSCRN2 INT_TSSC_SAMPLE | |
| #define INT_GP_TIMER_EXP INT_GPT0_TIMER_EXP | |
| #define INT_ADSP_A11 INT_AD5A_MPROC_APPS_0 | |
| #define INT_ADSP_A9_A11 INT_AD5A_MPROC_APPS_1 | |
| #define INT_MDDI_EXT INT_EMDH | |
| #define INT_MDDI_PRI INT_PMDH | |
| #define INT_MDDI_CLIENT INT_MDC | |
| #define INT_NAND_WR_ER_DONE INT_EBI2_WR_ER_DONE | |
| #define INT_NAND_OP_DONE INT_EBI2_OP_DONE | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/memory.h kernel/arch/arm/mach-msm/include/mach/memory.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/memory.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/memory.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -8,16 +8,17 @@ | |
| * may be copied, distributed, and modified under those terms. | |
| * | |
| * This program is distributed in the hope that it will be useful, | |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| * GNU General Public License for more details. | |
| * | |
| */ | |
| + | |
| #ifndef __ASM_ARCH_MEMORY_H | |
| #define __ASM_ARCH_MEMORY_H | |
| /* physical offset of RAM */ | |
| #ifdef CONFIG_MSM_STACKED_MEMORY | |
| #ifdef CONFIG_ARCH_MSM_SCORPION | |
| #define PHYS_OFFSET UL(0x20000000) | |
| @@ -28,31 +29,39 @@ | |
| #else /* !CONFIG_MSM_STACKED_MEMORY */ | |
| #define PHYS_OFFSET UL(0x00200000) | |
| #endif | |
| #define HAS_ARCH_IO_REMAP_PFN_RANGE | |
| +#define CONSISTENT_DMA_SIZE (4*SZ_1M) | |
| + | |
| #ifndef __ASSEMBLY__ | |
| void *alloc_bootmem_aligned(unsigned long size, unsigned long alignment); | |
| void clean_and_invalidate_caches(unsigned long, unsigned long, unsigned long); | |
| void clean_caches(unsigned long, unsigned long, unsigned long); | |
| void invalidate_caches(unsigned long, unsigned long, unsigned long); | |
| #ifdef CONFIG_ARCH_MSM_ARM11 | |
| void write_to_strongly_ordered_memory(void); | |
| #include <asm/mach-types.h> | |
| #define arch_barrier_extra() do \ | |
| { if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa()) \ | |
| write_to_strongly_ordered_memory(); \ | |
| } while (0) | |
| #endif | |
| + | |
| +#ifdef CONFIG_CACHE_L2X0 | |
| +extern void l2x0_cache_sync(void); | |
| +#define finish_arch_switch(prev) do { l2x0_cache_sync(); } while (0) | |
| +#endif | |
| + | |
| #endif | |
| #ifdef CONFIG_ARCH_MSM_SCORPION | |
| #define arch_has_speculative_dfetch() 1 | |
| #endif | |
| #endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/msm72k_otg.h kernel/arch/arm/mach-msm/include/mach/msm72k_otg.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/msm72k_otg.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/msm72k_otg.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -50,21 +50,18 @@ | |
| #define is_phy_clk_disabled() (readl(USB_PORTSC) & PORTSC_PHCD) | |
| #define is_usb_active() (!(readl(USB_PORTSC) & PORTSC_SUSP)) | |
| struct msm_otg { | |
| struct otg_transceiver otg; | |
| struct clk *clk; | |
| struct clk *pclk; | |
| - struct clk *cclk; | |
| int irq; | |
| void __iomem *regs; | |
| u8 in_lpm; | |
| struct wake_lock wlock; | |
| - unsigned int core_clk; | |
| int (*rpc_connect)(int); | |
| - int (*phy_reset)(void __iomem *); | |
| - void (*start_host) (struct usb_bus *bus, int suspend); | |
| + int (*phy_reset)(void); | |
| }; | |
| #endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/msm_audio_aac.h kernel/arch/arm/mach-msm/include/mach/msm_audio_aac.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/msm_audio_aac.h 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/msm_audio_aac.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -0,0 +1,75 @@ | |
| +/* arch/arm/mach-msm/include/mach/msm_audio_aac.h | |
| + * | |
| + * Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | |
| + * | |
| + * See the GNU General Public License for more details. | |
| + * You should have received a copy of the GNU General Public License | |
| + * along with this program; if not, you can find it at http://www.fsf.org. | |
| + * | |
| + */ | |
| + | |
| +#ifndef __MSM_AUDIO_AAC_H | |
| +#define __MSM_AUDIO_AAC_H | |
| + | |
| +#include <linux/msm_audio.h> | |
| + | |
| +#define AUDIO_SET_AAC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \ | |
| + (AUDIO_MAX_COMMON_IOCTL_NUM+0), unsigned) | |
| +#define AUDIO_GET_AAC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \ | |
| + (AUDIO_MAX_COMMON_IOCTL_NUM+1), unsigned) | |
| + | |
| +#define AUDIO_AAC_FORMAT_ADTS -1 | |
| +#define AUDIO_AAC_FORMAT_RAW 0x0000 | |
| +#define AUDIO_AAC_FORMAT_PSUEDO_RAW 0x0001 | |
| +#define AUDIO_AAC_FORMAT_LOAS 0x0002 | |
| + | |
| +#define AUDIO_AAC_OBJECT_LC 0x0002 | |
| +#define AUDIO_AAC_OBJECT_LTP 0x0004 | |
| +#define AUDIO_AAC_OBJECT_ERLC 0x0011 | |
| + | |
| +#define AUDIO_AAC_SEC_DATA_RES_ON 0x0001 | |
| +#define AUDIO_AAC_SEC_DATA_RES_OFF 0x0000 | |
| + | |
| +#define AUDIO_AAC_SCA_DATA_RES_ON 0x0001 | |
| +#define AUDIO_AAC_SCA_DATA_RES_OFF 0x0000 | |
| + | |
| +#define AUDIO_AAC_SPEC_DATA_RES_ON 0x0001 | |
| +#define AUDIO_AAC_SPEC_DATA_RES_OFF 0x0000 | |
| + | |
| +#define AUDIO_AAC_SBR_ON_FLAG_ON 0x0001 | |
| +#define AUDIO_AAC_SBR_ON_FLAG_OFF 0x0000 | |
| + | |
| +#define AUDIO_AAC_SBR_PS_ON_FLAG_ON 0x0001 | |
| +#define AUDIO_AAC_SBR_PS_ON_FLAG_OFF 0x0000 | |
| + | |
| +/* Primary channel on both left and right channels */ | |
| +#define AUDIO_AAC_DUAL_MONO_PL_PR 0 | |
| +/* Secondary channel on both left and right channels */ | |
| +#define AUDIO_AAC_DUAL_MONO_SL_SR 1 | |
| +/* Primary channel on right channel and 2nd on left channel */ | |
| +#define AUDIO_AAC_DUAL_MONO_SL_PR 2 | |
| +/* 2nd channel on right channel and primary on left channel */ | |
| +#define AUDIO_AAC_DUAL_MONO_PL_SR 3 | |
| + | |
| +struct msm_audio_aac_config { | |
| + signed short format; | |
| + unsigned short audio_object; | |
| + unsigned short ep_config; /* 0 ~ 3 useful only obj = ERLC */ | |
| + unsigned short aac_section_data_resilience_flag; | |
| + unsigned short aac_scalefactor_data_resilience_flag; | |
| + unsigned short aac_spectral_data_resilience_flag; | |
| + unsigned short sbr_on_flag; | |
| + unsigned short sbr_ps_on_flag; | |
| + unsigned short dual_mono_mode; | |
| + unsigned short channel_configuration; | |
| +}; | |
| + | |
| +#endif /* __MSM_AUDIO_AAC_H */ | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/msm_fb.h kernel/arch/arm/mach-msm/include/mach/msm_fb.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/msm_fb.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/msm_fb.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -76,16 +76,20 @@ | |
| struct resource *fb_resource; | |
| /* from the list above */ | |
| unsigned interface_type; | |
| }; | |
| struct msm_mddi_platform_data { | |
| unsigned int clk_rate; | |
| void (*power_client)(struct msm_mddi_client_data *, int on); | |
| + | |
| + /* fixup the mfr name, product id */ | |
| + void (*fixup)(uint16_t *mfr_name, uint16_t *product_id); | |
| + | |
| struct resource *fb_resource; /*optional*/ | |
| /* number of clients in the list that follows */ | |
| int num_clients; | |
| /* array of client information of clients */ | |
| struct { | |
| unsigned product_id; /* mfr id in top 16 bits, product id | |
| * in lower 16 bits | |
| */ | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/msm_hsusb.h kernel/arch/arm/mach-msm/include/mach/msm_hsusb.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/msm_hsusb.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/msm_hsusb.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -59,16 +59,19 @@ | |
| enum chg_type { | |
| CHG_TYPE_HOSTPC, | |
| CHG_TYPE_WALL_CHARGER, | |
| CHG_TYPE_INVALID | |
| }; | |
| struct msm_hsusb_gadget_platform_data { | |
| + /* for notification when USB is connected or disconnected */ | |
| + void (*usb_connected)(int); | |
| + | |
| int *phy_init_seq; | |
| void (*phy_reset)(void); | |
| /*charging apis*/ | |
| int (*chg_init)(int); | |
| void (*chg_connected)(enum chg_type); | |
| void (*chg_vbus_draw)(unsigned); | |
| }; | |
| @@ -89,27 +92,27 @@ | |
| unsigned ulpi_data_3_pin; | |
| /* gpio mux function used for LPM */ | |
| int (*config_gpio)(int config); | |
| /* ROC info for AHB Mode */ | |
| unsigned int soc_version; | |
| int (*phy_reset)(void __iomem *addr); | |
| + unsigned int max_axi_khz; | |
| unsigned int core_clk; | |
| int vreg5v_required; | |
| u32 swfi_latency; | |
| }; | |
| struct msm_otg_platform_data { | |
| int (*rpc_connect)(int); | |
| - int (*phy_reset)(void __iomem *); | |
| - unsigned int core_clk; | |
| + int (*phy_reset)(void); | |
| }; | |
| struct msm_usb_host_platform_data { | |
| unsigned phy_info; | |
| unsigned int max_axi_khz; | |
| int (*phy_reset)(void __iomem *addr); | |
| void (*config_gpio)(unsigned int config); | |
| void (*vbus_power) (unsigned phy_info, int on); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/msm_hsusb_desc.h kernel/arch/arm/mach-msm/include/mach/msm_hsusb_desc.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/msm_hsusb_desc.h 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/msm_hsusb_desc.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -0,0 +1,33 @@ | |
| +/* linux/include/mach/msm_hsusb_desc.h | |
| + * | |
| + * Copyright (c) 2010 Sharp Corporation. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + */ | |
| + | |
| +#ifndef __ASM_ARCH_MSM_HSUSB_DESC_H | |
| +#define __ASM_ARCH_MSM_HSUSB_DESC_H | |
| + | |
| + | |
| +#define USB_PRODUCT_NAME "IS01" | |
| + | |
| +#define USB_OBEX_STRING_DESC_WORD "IS01 USB OBEX Port" | |
| +#define USB_MDLM_STRING_DESC_WORD "-IS01 USB High Speed Serial Port" | |
| +#define USB_GS_STRING_DESC_WORD "IS01 USB" | |
| +#define USB_MSC_STRING_DESC_WORD "IS01 USB SD Storage" | |
| +#define USB_MTP_STRING_DESC_WORD "IS01 USB MTP Port" | |
| + | |
| +#define USB_PID_MODE1 0x9339 | |
| +#define USB_PID_MODE2 0x9338 | |
| +#define USB_PID_MODE3 0x9337 | |
| +#define USB_PID_MODE4 0x933A | |
| + | |
| +#endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/msm_hsusb_hw.h kernel/arch/arm/mach-msm/include/mach/msm_hsusb_hw.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/msm_hsusb_hw.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/msm_hsusb_hw.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -176,17 +176,17 @@ | |
| #define CTRL_RXT_MASK (3 << 2) | |
| #define CTRL_RXT_CTRL (0 << 2) | |
| #define CTRL_RXT_ISOCH (1 << 2) | |
| #define CTRL_RXT_BULK (2 << 2) | |
| #define CTRL_RXT_INT (3 << 2) | |
| #define CTRL_RXT_EP_TYPE_SHIFT 2 | |
| #define ULPI_CONFIG_REG 0x31 | |
| -#define ULPI_AMPLITUDE 0x0C | |
| +#define ULPI_AMPLITUDE_MAX 0x0C | |
| #define ULPI_OTG_CTRL 0x0B | |
| #define ULPI_OTG_CTRL_CLR 0x0C | |
| #define ULPI_INT_RISE_CLR 0x0F | |
| #define ULPI_INT_FALL_CLR 0x12 | |
| #define ULPI_IDPU (1 << 0) | |
| #define ULPI_HOST_DISCONNECT (1 << 0) | |
| #define ULPI_VBUS_VALID (1 << 1) | |
| #define ULPI_SESS_END (1 << 3) | |
| @@ -224,16 +224,17 @@ | |
| OTGSC_IDIE) | |
| #define OTGSC_INTR_STS_MASK (0x7f << 16) | |
| #define CURRENT_CONNECT_STATUS (1 << 0) | |
| #define PORTSC_FPR (1 << 6) /* R/W - State normal => suspend */ | |
| #define PORTSC_SUSP (1 << 7) /* Read - Port in suspend state */ | |
| #define PORTSC_LS (3 << 10) /* Read - Port's Line status */ | |
| #define PORTSC_PHCD (1 << 23) /* phy suspend mode */ | |
| +#define PORTSC_PFSC (1 << 24) /* Port force full speed connect */ | |
| #define PORTSC_CCS (1 << 0) /* current connect status */ | |
| #define PORTSC_PORT_RESET 0x00000100 | |
| #define PORTSC_PTS (3 << 30) | |
| #define PORTSC_PTS_ULPI (2 << 30) | |
| #define PORTSC_PTS_SERIAL (3 << 30) | |
| #define PORTSC_PORT_SPEED_FULL 0x00000000 | |
| #define PORTSC_PORT_SPEED_LOW 0x04000000 | |
| @@ -248,16 +249,18 @@ | |
| #define ULPI_USBINTR_ENABLE_FALLING_S 0x11 | |
| #define ULPI_SESSION_END_RAISE (1 << 3) | |
| #define ULPI_SESSION_END_FALL (1 << 3) | |
| #define ULPI_SESSION_VALID_RAISE (1 << 2) | |
| #define ULPI_SESSION_VALID_FALL (1 << 2) | |
| #define ULPI_VBUS_VALID_RAISE (1 << 1) | |
| #define ULPI_VBUS_VALID_FALL (1 << 1) | |
| +#define ULPI_FUNCTION_CONTROL_REG 0x04 | |
| + | |
| #define ULPI_CHG_DETECT_REG 0x34 | |
| /* control charger detection by ULPI or externally */ | |
| #define ULPI_EXTCHGCTRL_65NM (1 << 2) | |
| #define ULPI_EXTCHGCTRL_180NM (1 << 3) | |
| /* charger detection power on control */ | |
| #define ULPI_CHGDETON (1 << 1) | |
| /* enable charger detection */ | |
| #define ULPI_CHGDETEN (1 << 0) | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/msm_i2ckbd.h kernel/arch/arm/mach-msm/include/mach/msm_i2ckbd.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/msm_i2ckbd.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/msm_i2ckbd.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,8 +1,24 @@ | |
| +/* | |
| + * Copyright (C) 2009 SHARP CORPORATION All rights reserved. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + * This code is based on msm_i2ckbd.h. | |
| + * The original copyright and notice are described below. | |
| + */ | |
| + | |
| /* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| @@ -34,9 +50,44 @@ | |
| uint8_t scanset1; | |
| int gpioreset; | |
| int gpioirq; | |
| int (*gpio_setup) (void); | |
| void (*gpio_shutdown)(void); | |
| void (*hw_reset) (int); | |
| }; | |
| +#if 1 | |
| +struct msm_sh_i2ckbd_platform_data { | |
| + int gpio_kbdirq; | |
| + int gpio_jogirq[4]; | |
| + int gpio_jogpower; | |
| + int (*gpio_setup) (void); | |
| + void (*gpio_shutdown)(void); | |
| +}; | |
| + | |
| +#define SH_KBD_IRQ 42 | |
| +#define SH_JOG_U_IRQ 38 | |
| +#define SH_JOG_D_IRQ 39 | |
| +#define SH_JOG_L_IRQ 41 | |
| +#define SH_JOG_R_IRQ 40 | |
| +#define SH_JOG_POWER 48 | |
| + | |
| +#define SH_KBD_I2C_DEVNAME "SH_qwerty_key" | |
| +#define SH_KBD_I2C_SLAVE 0x44 | |
| + | |
| +#define KBDIF_DEV_NAME "kbdif" | |
| +#define KBDIF_DEV_FULLNAME "/dev/kbdif" | |
| + | |
| +enum | |
| +{ | |
| + KBDDEV_SLEEP_ON = 0, | |
| + KBDDEV_SLEEP_OFF, | |
| + KBDDEV_ENABLE, | |
| + KBDDEV_DISABLE, | |
| +}; | |
| + | |
| +void msm_i2ckbd_flipchange(int nFlipState); | |
| +void msm_i2ckbd_setsleep(int nIsSleep); | |
| + | |
| +#endif | |
| + | |
| #endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/msm_i2ctps.h kernel/arch/arm/mach-msm/include/mach/msm_i2ctps.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/msm_i2ctps.h 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/msm_i2ctps.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -0,0 +1,66 @@ | |
| +/* | |
| + * Copyright (C) 2009 SHARP CORPORATION All rights reserved. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + */ | |
| + | |
| +#ifndef _MSM_I2CTPS_H_ | |
| +#define _MSM_I2CTPS_H_ | |
| + | |
| +struct msm_sh_i2ctps_platform_data { | |
| + int gpio_irq; | |
| + int gpio_hssp_clk; | |
| + int gpio_hssp_data; | |
| + int (*gpio_setup) (void); | |
| + void (*gpio_shutdown)(void); | |
| +}; | |
| +#define SH_TOUCH_I2C_DEVNAME "SH_touchpanel" | |
| +#define SH_TOUCH_I2C_SLAVE 0x15 | |
| +#define SH_TOUCH_IRQ 92 | |
| +#define SH_TOUCH_HSSP_CLK 88 | |
| +#define SH_TOUCH_HSSP_DATA 89 | |
| +#define SH_TOUCH_MAX_X 479 | |
| +#define SH_TOUCH_MAX_Y 959 | |
| +#define SH_TOUCH_MAX_DISTANCE 1073 | |
| + | |
| +#define FIRMDATA_SIZE 16384 | |
| + | |
| +#define TPSIF_DEV_NAME "tpsif" | |
| +#define TPSIF_DEV_FULLNAME "/dev/tpsif" | |
| + | |
| +enum | |
| +{ | |
| + TPSDEV_ENABLE = 0, | |
| + TPSDEV_DISABLE, | |
| + TPSDEV_FW_VERSION, | |
| + TPSDEV_FW_DOWNLOAD, | |
| + TPSDEV_FW_UPDATE, | |
| + TPSDEV_START_TESTMODE, | |
| + TPSDEV_STOP_TESTMODE, | |
| + TPSDEV_GET_SENSOR, | |
| + TPSDEV_SET_FIRMPARAM, | |
| + TPSDEV_CALIBRATION_PARAM, | |
| + TPSDEV_SLEEP_ON, | |
| + TPSDEV_SLEEP_OFF, | |
| + TPSDEV_START_TESTMODE2, | |
| +}; | |
| + | |
| +typedef struct | |
| +{ | |
| + uint8_t bVerNo; /* Version number */ | |
| + uint8_t bData[FIRMDATA_SIZE]; /* Firm data */ | |
| +} TpsFwData; | |
| + | |
| +void msm_i2ctps_flipchange(int nFlipState); | |
| +void msm_i2ctps_setsleep(int nIsSleep); | |
| +void msm_i2ctps_shutdown(void); | |
| + | |
| +#endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/msm_i2ctps_fw.h kernel/arch/arm/mach-msm/include/mach/msm_i2ctps_fw.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/msm_i2ctps_fw.h 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/msm_i2ctps_fw.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -0,0 +1,1057 @@ | |
| +/* | |
| + * Copyright (C) 2009 SHARP CORPORATION All rights reserved. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + */ | |
| + | |
| +#include <mach/msm_i2ctps.h> | |
| + | |
| +/*+-----------------------------------------------------------------------------+*/ | |
| +/*| Define |*/ | |
| +/*+-----------------------------------------------------------------------------+*/ | |
| +#define FIRMDATA_COUNT 1 | |
| + | |
| +/*+-----------------------------------------------------------------------------+*/ | |
| +/*| Firmware data |*/ | |
| +/*+-----------------------------------------------------------------------------+*/ | |
| +static const TpsFwData gFirmData[FIRMDATA_COUNT] = | |
| +{ | |
| + // V39 | |
| + { | |
| + 0x39, | |
| + { | |
| + 0x40,0x7d,0x00,0x68,0x30,0x30,0x30,0x30,0x7e,0x30,0x30,0x30,0x7e,0x30,0x30,0x30, | |
| + 0x7d,0x06,0x88,0x7e,0x7e,0x30,0x30,0x30,0x7e,0x30,0x30,0x30,0x7d,0x0a,0x7b,0x7e, | |
| + 0x7d,0x0a,0x1e,0x7e,0x7d,0x03,0x01,0x7e,0x7e,0x30,0x30,0x30,0x7e,0x30,0x30,0x30, | |
| + 0x7e,0x30,0x30,0x30,0x7e,0x30,0x30,0x30,0x7e,0x30,0x30,0x30,0x7e,0x30,0x30,0x30, | |
| + 0x7e,0x30,0x30,0x30,0x7e,0x30,0x30,0x30,0x7e,0x30,0x30,0x30,0x7e,0x30,0x30,0x30, | |
| + 0x7e,0x30,0x30,0x30,0x7e,0x30,0x30,0x30,0x7e,0x30,0x30,0x30,0x7e,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x40,0x71,0x10,0x62,0xe3,0x06,0x70,0xef, | |
| + 0x50,0x80,0x4e,0x5d,0xd5,0x08,0x62,0xd5,0x00,0x55,0xfa,0x01,0x40,0x4f,0x5b,0x01, | |
| + 0x03,0x53,0xf9,0x55,0xf8,0x3a,0x50,0x06,0x00,0x40,0x40,0x71,0x10,0x51,0xfa,0x60, | |
| + 0xe8,0x70,0xef,0x18,0x60,0xd5,0x55,0xf8,0x00,0x55,0xf9,0x00,0x71,0x10,0x41,0xe1, | |
| + 0xfe,0x70,0xef,0x62,0xe3,0x38,0x62,0xd1,0x07,0x50,0x00,0x4e,0x62,0xd3,0x07,0x62, | |
| + 0xd0,0x00,0x62,0xd5,0x00,0x62,0xd4,0x00,0x71,0xc0,0x7c,0x02,0x4f,0x62,0xd0,0x00, | |
| + 0x50,0x02,0x57,0x4d,0x08,0x28,0x53,0xf8,0x18,0x75,0x09,0x00,0x28,0x4b,0x51,0xf8, | |
| + 0x80,0x04,0x75,0x09,0x00,0x62,0xe3,0x00,0x08,0x28,0x60,0xd5,0x74,0xa0,0x4b,0x18, | |
| + 0x75,0x09,0x00,0x08,0x28,0x53,0xf8,0x18,0x75,0x09,0x00,0x08,0x28,0xa0,0x1c,0x53, | |
| + 0xf7,0x18,0x75,0x09,0x00,0x08,0x28,0x3f,0xf8,0x47,0xf8,0xff,0xb0,0x06,0x5d,0xd5, | |
| + 0x74,0x60,0xd5,0x18,0x7a,0xf7,0xbf,0xeb,0x8f,0xc9,0x18,0x75,0x09,0x00,0x08,0x28, | |
| + 0x53,0xf7,0x50,0x00,0x3f,0xf8,0x47,0xf8,0xff,0xb0,0x08,0x5d,0xd5,0x74,0x60,0xd5, | |
| + 0x50,0x00,0x7a,0xf7,0xbf,0xef,0x18,0x8f,0xaa,0x18,0x71,0x10,0x43,0xe3,0x00,0x70, | |
| + 0xef,0x62,0xe0,0x00,0x41,0xfe,0xe7,0x43,0xfe,0x10,0x71,0x10,0x62,0xe0,0x12,0x70, | |
| + 0xef,0x62,0xe2,0x00,0x7c,0x10,0xcb,0x8f,0xff,0x7f,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x61,0x00,0xfd,0x00,0xcd,0x00,0xce,0x00,0xa5,0x00,0xa4,0x00,0xa0,0x00,0xa1,0x80, | |
| + 0xa2,0x84,0xa3,0x0c,0xa8,0x00,0xa6,0x00,0xa7,0x00,0x7c,0x33,0x7a,0x00,0x7b,0x04, | |
| + 0x79,0x02,0x36,0x00,0x37,0x00,0x38,0x00,0x39,0x00,0x3a,0x00,0x3b,0x00,0x3c,0x00, | |
| + 0x3d,0x00,0x3e,0x00,0x3f,0x00,0x40,0x00,0x41,0x00,0x42,0x00,0x43,0x00,0x44,0x00, | |
| + 0x45,0x00,0x46,0x00,0x47,0x00,0x48,0x00,0x49,0x00,0x4a,0x00,0x4b,0x00,0x4c,0x00, | |
| + 0x4d,0x00,0x4e,0x00,0x4f,0x00,0xd6,0x04,0xcf,0x00,0xca,0x00,0xcb,0x00,0xc8,0x00, | |
| + 0xcc,0x00,0xc9,0x00,0xd7,0x00,0x2b,0x00,0xb0,0x00,0xb3,0x02,0xb6,0x00,0xb2,0x20, | |
| + 0xb5,0x00,0xb8,0x00,0xb1,0x00,0xb4,0x00,0xb7,0x00,0x33,0x00,0x34,0x00,0x35,0x00, | |
| + 0xff,0x54,0x00,0x55,0x00,0x56,0x00,0x57,0x00,0x58,0x00,0x59,0x00,0x5a,0x00,0x5b, | |
| + 0x00,0xdc,0x01,0xe2,0x00,0xdd,0x00,0xd8,0x08,0xd9,0x00,0xda,0x00,0xdb,0x00,0xdf, | |
| + 0x00,0x29,0x00,0x30,0x00,0xbd,0x00,0xff,0x70,0xef,0x62,0x00,0x00,0x71,0x10,0x62, | |
| + 0x00,0x00,0x62,0x01,0xff,0x70,0xef,0x62,0x04,0xb8,0x71,0x10,0x62,0x05,0xf7,0x62, | |
| + 0x04,0xb8,0x70,0xef,0x62,0x08,0x00,0x71,0x10,0x62,0x08,0x00,0x62,0x09,0xff,0x70, | |
| + 0xef,0x62,0x0c,0x00,0x71,0x10,0x62,0x0c,0x00,0x62,0x0d,0xff,0x70,0xef,0x62,0x10, | |
| + 0x00,0x71,0x10,0x62,0x10,0x00,0x62,0x11,0x0f,0x70,0xef,0x62,0x01,0x00,0x62,0x05, | |
| + 0x00,0x62,0x09,0x00,0x62,0x0d,0x00,0x62,0x11,0x00,0x70,0xef,0x7f,0x3c,0x28,0x55, | |
| + 0x77,0x00,0x55,0x78,0xa0,0x55,0x79,0x00,0x55,0x7a,0x00,0x55,0x7b,0x00,0x7c,0x02, | |
| + 0x65,0x7c,0x01,0xf8,0x7f,0x10,0x70,0xef,0x50,0x00,0x67,0x50,0x01,0x57,0x50,0x7c, | |
| + 0x02,0x80,0x50,0x01,0x67,0x50,0x01,0x57,0xd1,0x7c,0x02,0x80,0x70,0xef,0x20,0x7f, | |
| + 0x38,0x02,0x10,0x08,0x4f,0x56,0xfc,0x00,0xd0,0x04,0x56,0xfc,0x01,0x18,0x20,0x70, | |
| + 0xef,0x62,0xe3,0x00,0x10,0x08,0x28,0x39,0xff,0xa0,0x1f,0x4f,0x48,0xfc,0x01,0xa0, | |
| + 0x03,0x71,0x10,0x54,0xfd,0x18,0x20,0x75,0x09,0x00,0x10,0x08,0x28,0x4f,0x59,0xfd, | |
| + 0x61,0x00,0x18,0x20,0x75,0x09,0x00,0x8f,0xd7,0x38,0xfc,0x70,0x3f,0x71,0xc0,0x7f, | |
| + 0x02,0x20,0x02,0x80,0x00,0x02,0x00,0x20,0x00,0x80,0x00,0x40,0x00,0x10,0x00,0x04, | |
| + 0x00,0x01,0x03,0x02,0x03,0x08,0x03,0x20,0x03,0x80,0x04,0x02,0x04,0x08,0x02,0x02, | |
| + 0x02,0x08,0x01,0x40,0x03,0x01,0x03,0x04,0x03,0x10,0x03,0x40,0x04,0x01,0x04,0x04, | |
| + 0x02,0x01,0x02,0x04,0x02,0x10,0x02,0x40,0x00,0x01,0x03,0x07,0x0f,0x1f,0x3f,0x7f, | |
| + 0xff,0x08,0x10,0x5d,0xa4,0x04,0x3b,0x5d,0xa5,0x0c,0x3a,0x41,0xa0,0xfe,0x43,0xa0, | |
| + 0x01,0x62,0xa5,0x00,0x62,0xa4,0x00,0x7a,0x39,0xd3,0x68,0x50,0xff,0x4c,0x3b,0x14, | |
| + 0x3b,0x51,0x66,0x11,0x08,0xff,0xd1,0x4c,0x3a,0x1c,0x3a,0xd0,0x07,0x55,0x3a,0x00, | |
| + 0x55,0x3b,0x00,0x71,0x10,0x51,0x38,0x64,0xe0,0x01,0x80,0x47,0x80,0x5f,0x80,0x77, | |
| + 0x80,0x8f,0x80,0xa7,0x80,0xbf,0x80,0xd7,0x80,0xef,0x81,0x07,0x81,0x1f,0x81,0x37, | |
| + 0x81,0x4f,0x81,0x67,0x81,0x7f,0x81,0x97,0x81,0xaf,0x81,0xc7,0x81,0xdf,0x81,0xf7, | |
| + 0x82,0x0f,0x82,0x27,0x82,0x3f,0x82,0x57,0x82,0x6f,0x82,0x87,0x82,0x9f,0x82,0xb7, | |
| + 0x82,0xcf,0x82,0xf0,0x82,0xee,0x82,0xec,0x82,0xea,0x82,0xe8,0x82,0xe6,0x82,0xe4, | |
| + 0x82,0xe2,0x5f,0x01,0x3b,0x5f,0x00,0x3a,0x43,0x09,0x80,0x41,0x08,0x7f,0x43,0xda, | |
| + 0x80,0x41,0xda,0xdf,0x43,0x08,0x20,0x41,0x09,0xdf,0x82,0xc8,0x5f,0x03,0x3b,0x5f, | |
| + 0x02,0x3a,0x43,0x01,0x02,0x41,0x00,0xfd,0x43,0xd8,0x02,0x41,0xda,0x7f,0x43,0x08, | |
| + 0x80,0x41,0x09,0x7f,0x82,0xae,0x5f,0x05,0x3b,0x5f,0x04,0x3a,0x43,0x01,0x20,0x41, | |
| + 0x00,0xdf,0x43,0xd8,0x20,0x41,0xd8,0xfd,0x43,0x00,0x02,0x41,0x01,0xfd,0x82,0x94, | |
| + 0x5f,0x07,0x3b,0x5f,0x06,0x3a,0x43,0x01,0x80,0x41,0x00,0x7f,0x43,0xd8,0x80,0x41, | |
| + 0xd8,0xdf,0x43,0x00,0x20,0x41,0x01,0xdf,0x82,0x7a,0x5f,0x09,0x3b,0x5f,0x08,0x3a, | |
| + 0x43,0x01,0x40,0x41,0x00,0xbf,0x43,0xd8,0x40,0x41,0xd8,0x7f,0x43,0x00,0x80,0x41, | |
| + 0x01,0x7f,0x82,0x60,0x5f,0x0b,0x3b,0x5f,0x0a,0x3a,0x43,0x01,0x10,0x41,0x00,0xef, | |
| + 0x43,0xd8,0x10,0x41,0xd8,0xbf,0x43,0x00,0x40,0x41,0x01,0xbf,0x82,0x46,0x5f,0x0d, | |
| + 0x3b,0x5f,0x0c,0x3a,0x43,0x01,0x04,0x41,0x00,0xfb,0x43,0xd8,0x04,0x41,0xd8,0xef, | |
| + 0x43,0x00,0x10,0x41,0x01,0xef,0x82,0x2c,0x5f,0x0f,0x3b,0x5f,0x0e,0x3a,0x43,0x01, | |
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| + 0x7f,0x62,0xd0,0x02,0x51,0x73,0x08,0x51,0x72,0x62,0xd0,0x02,0x53,0x8a,0x18,0x53, | |
| + 0x8b,0x7f,0x62,0xd0,0x00,0x51,0xf8,0x62,0xd0,0x02,0x7f,0x53,0xf5,0x51,0xf8,0x09, | |
| + 0x01,0x7f,0x62,0xd0,0x02,0x55,0xc9,0x01,0x7f,0x06,0xf7,0x98,0x0e,0xf8,0x02,0x7f, | |
| + 0x50,0x00,0x3f,0xf7,0x77,0x00,0x7f,0x02,0xf7,0x53,0xf7,0x51,0xf4,0x0a,0xf8,0x53, | |
| + 0xf8,0x7f,0x12,0xf7,0x50,0x00,0x1a,0xf8,0x7f,0x51,0xf7,0x01,0xfa,0x53,0xf3,0x51, | |
| + 0xf8,0x09,0x00,0x60,0xd4,0x3e,0xf3,0x7f,0x65,0xf7,0x6b,0xf8,0x51,0xf7,0x01,0x9a, | |
| + 0x53,0xf5,0x51,0xf8,0x09,0x00,0x7f,0x62,0xd0,0x00,0x53,0xf8,0x51,0xf7,0x54,0x03, | |
| + 0x51,0xf8,0x54,0x02,0x7f,0x62,0xd0,0x02,0x55,0xcd,0x00,0x7f,0x62,0xd0,0x02,0x55, | |
| + 0xd1,0x01,0x7f,0x62,0xd0,0x02,0x55,0xc5,0x01,0x7f,0x56,0x00,0x01,0x62,0xd0,0x02, | |
| + 0x7f,0x62,0xd0,0x00,0x55,0x46,0x14,0x62,0xd0,0x00,0x55,0x47,0x0f,0x7f,0x53,0xf5, | |
| + 0x51,0xf8,0x09,0x00,0x7f,0x53,0xf4,0x3e,0xf5,0x16,0xf5,0x02,0x7f,0x62,0xd0,0x02, | |
| + 0x50,0x14,0x12,0xb5,0x62,0xd0,0x00,0x7f,0x62,0xd0,0x02,0x50,0x0f,0x12,0xb6,0x62, | |
| + 0xd0,0x00,0x7f,0x62,0xd0,0x02,0x51,0x71,0x62,0xd0,0x02,0x12,0x89,0x7f,0x62,0xd0, | |
| + 0x02,0x51,0x70,0x62,0xd0,0x02,0x1a,0x88,0x7f,0x62,0xd0,0x02,0x51,0x73,0x62,0xd0, | |
| + 0x02,0x12,0x8b,0x7f,0x62,0xd0,0x02,0x51,0x72,0x62,0xd0,0x02,0x1a,0x8a,0x7f,0x62, | |
| + 0xd0,0x00,0x70,0xfb,0x6e,0x60,0x6e,0x61,0x7f,0x62,0xd0,0x06,0x55,0xc8,0x00,0x7f, | |
| + 0x53,0xf8,0x52,0x04,0x3a,0xf8,0x7f,0x62,0xd0,0x02,0x55,0xda,0x00,0x7f,0x51,0xf7, | |
| + 0x54,0x01,0x51,0xf8,0x54,0x00,0x7f,0x53,0xf7,0x55,0xf8,0x00,0x51,0xf3,0x7f,0x53, | |
| + 0xa6,0x62,0xd0,0x02,0x51,0x8b,0x7f,0x62,0xd0,0x02,0x51,0x8f,0x12,0x8b,0x7f,0x62, | |
| + 0xd0,0x02,0x51,0x8d,0x12,0x89,0x7f,0x51,0xf8,0x71,0x10,0x60,0xe0,0x7f,0x51,0xf7, | |
| + 0x3f,0xf5,0x77,0x00,0x7f,0x62,0xd0,0x02,0x3c,0xda,0x00,0x7f,0x62,0xd0,0x02,0x3c, | |
| + 0xa0,0x00,0x7f,0x62,0xd0,0x02,0x3c,0xcd,0x00,0x7f,0x62,0xd0,0x02,0x55,0xd2,0x00, | |
| + 0x7f,0x62,0xd0,0x02,0x55,0xd0,0x00,0x7f,0x00,0xf9,0x06,0xff,0xff,0xff,0xff,0xff, | |
| + 0xff,0x00,0xff,0x00,0x39,0x01,0xa8,0x00,0xac,0x02,0x70,0x00,0x5e,0x02,0xce,0x01, | |
| + 0x14,0x02,0xcf,0x00,0x04,0x02,0xd3,0x08,0x14,0x00,0x0a,0x00,0x00,0x0a,0x00,0x00, | |
| + 0xff,0x00,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30, | |
| + }, | |
| + }, | |
| +}; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/msm_iomap.h kernel/arch/arm/mach-msm/include/mach/msm_iomap.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/msm_iomap.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/msm_iomap.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -57,19 +57,19 @@ | |
| #define MSM_CSR_BASE IOMEM(0xE0001000) | |
| #if defined(CONFIG_ARCH_QSD8X50) | |
| #define MSM_CSR_PHYS 0xAC100000 | |
| #else | |
| #define MSM_CSR_PHYS 0xC0100000 | |
| #endif | |
| #define MSM_CSR_SIZE SZ_4K | |
| -#define MSM_TMR_PHYS MSM_CSR_PHYS | |
| -#define MSM_TMR_BASE MSM_CSR_BASE | |
| -#define MSM_TMR_SIZE SZ_4K | |
| +#define MSM_GPT_PHYS MSM_CSR_PHYS | |
| +#define MSM_GPT_BASE MSM_CSR_BASE | |
| +#define MSM_GPT_SIZE SZ_4K | |
| #define MSM_DMOV_BASE IOMEM(0xE0002000) | |
| #if defined(CONFIG_ARCH_MSM7X30) | |
| #define MSM_DMOV_PHYS 0xAC400000 | |
| #else | |
| #define MSM_DMOV_PHYS 0xA9700000 | |
| #endif | |
| #define MSM_DMOV_SIZE SZ_4K | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/msm_otg.h kernel/arch/arm/mach-msm/include/mach/msm_otg.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/msm_otg.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/msm_otg.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -41,18 +41,17 @@ | |
| /* bind/unbind the host controller */ | |
| int (*set_host)(struct msm_otg_transceiver *otg, | |
| struct msm_otg_ops *hcd_ops); | |
| /* bind/unbind the peripheral controller */ | |
| int (*set_peripheral)(struct msm_otg_transceiver *otg, | |
| struct msm_otg_ops *dcd_ops); | |
| - int (*set_suspend)(struct msm_otg_transceiver *otg, | |
| - int suspend); | |
| + void (*set_suspend) (int on); | |
| }; | |
| struct msm_otg_ops { | |
| void (*request)(void *, int); | |
| void *handle; | |
| }; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/msm_rpcrouter.h kernel/arch/arm/mach-msm/include/mach/msm_rpcrouter.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/msm_rpcrouter.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/msm_rpcrouter.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -150,54 +150,96 @@ | |
| int msm_rpc_call_reply(struct msm_rpc_endpoint *ept, uint32_t proc, | |
| void *request, int request_size, | |
| void *reply, int reply_max_size, | |
| long timeout); | |
| int msm_rpc_call(struct msm_rpc_endpoint *ept, uint32_t proc, | |
| void *request, int request_size, | |
| long timeout); | |
| +struct msm_rpc_xdr { | |
| + void *in_buf; | |
| + uint32_t in_size; | |
| + uint32_t in_index; | |
| + struct mutex in_lock; | |
| + | |
| + void *out_buf; | |
| + uint32_t out_size; | |
| + uint32_t out_index; | |
| + struct mutex out_lock; | |
| + | |
| + struct msm_rpc_endpoint *ept; | |
| +}; | |
| + | |
| +int xdr_send_int8(struct msm_rpc_xdr *xdr, const int8_t *value); | |
| +int xdr_send_uint8(struct msm_rpc_xdr *xdr, const uint8_t *value); | |
| +int xdr_send_int16(struct msm_rpc_xdr *xdr, const int16_t *value); | |
| +int xdr_send_uint16(struct msm_rpc_xdr *xdr, const uint16_t *value); | |
| +int xdr_send_int32(struct msm_rpc_xdr *xdr, const int32_t *value); | |
| +int xdr_send_uint32(struct msm_rpc_xdr *xdr, const uint32_t *value); | |
| +int xdr_send_bytes(struct msm_rpc_xdr *xdr, const void **data, uint32_t *size); | |
| + | |
| +int xdr_recv_int8(struct msm_rpc_xdr *xdr, int8_t *value); | |
| +int xdr_recv_uint8(struct msm_rpc_xdr *xdr, uint8_t *value); | |
| +int xdr_recv_int16(struct msm_rpc_xdr *xdr, int16_t *value); | |
| +int xdr_recv_uint16(struct msm_rpc_xdr *xdr, uint16_t *value); | |
| +int xdr_recv_int32(struct msm_rpc_xdr *xdr, int32_t *value); | |
| +int xdr_recv_uint32(struct msm_rpc_xdr *xdr, uint32_t *value); | |
| +int xdr_recv_bytes(struct msm_rpc_xdr *xdr, void **data, uint32_t *size); | |
| + | |
| struct msm_rpc_server | |
| { | |
| struct list_head list; | |
| uint32_t flags; | |
| uint32_t prog; | |
| uint32_t vers; | |
| struct mutex cb_req_lock; | |
| - struct mutex reply_lock; | |
| - char *cb_req; | |
| - char *reply; | |
| struct msm_rpc_endpoint *cb_ept; | |
| + struct msm_rpc_xdr cb_xdr; | |
| + | |
| + uint32_t version; | |
| + | |
| int (*rpc_call)(struct msm_rpc_server *server, | |
| struct rpc_request_hdr *req, unsigned len); | |
| + | |
| + int (*rpc_call2)(struct msm_rpc_server *server, | |
| + struct rpc_request_hdr *req, | |
| + struct msm_rpc_xdr *xdr); | |
| }; | |
| int msm_rpc_create_server(struct msm_rpc_server *server); | |
| +int msm_rpc_create_server2(struct msm_rpc_server *server); | |
| #define MSM_RPC_MSGSIZE_MAX 8192 | |
| struct msm_rpc_client; | |
| struct msm_rpc_client { | |
| struct task_struct *read_thread; | |
| struct task_struct *cb_thread; | |
| struct msm_rpc_endpoint *ept; | |
| wait_queue_head_t reply_wait; | |
| uint32_t prog, ver; | |
| void *buf; | |
| - int read_avail; | |
| + | |
| + struct msm_rpc_xdr xdr; | |
| + struct msm_rpc_xdr cb_xdr; | |
| + | |
| + uint32_t version; | |
| int (*cb_func)(struct msm_rpc_client *, void *, int); | |
| + int (*cb_func2)(struct msm_rpc_client *, struct rpc_request_hdr *req, | |
| + struct msm_rpc_xdr *); | |
| void *cb_buf; | |
| int cb_size; | |
| struct list_head cb_item_list; | |
| struct mutex cb_item_list_lock; | |
| wait_queue_head_t cb_wait; | |
| int cb_avail; | |
| @@ -206,43 +248,56 @@ | |
| struct mutex cb_list_lock; | |
| struct list_head cb_list; | |
| uint32_t exit_flag; | |
| struct completion complete; | |
| struct completion cb_complete; | |
| struct mutex req_lock; | |
| - struct mutex reply_lock; | |
| - char *req; | |
| - char *reply; | |
| }; | |
| struct msm_rpc_client_info { | |
| uint32_t pid; | |
| uint32_t cid; | |
| uint32_t prog; | |
| uint32_t vers; | |
| }; | |
| struct msm_rpc_client *msm_rpc_register_client( | |
| const char *name, | |
| uint32_t prog, uint32_t ver, | |
| uint32_t create_cb_thread, | |
| int (*cb_func)(struct msm_rpc_client *, void *, int)); | |
| +struct msm_rpc_client *msm_rpc_register_client2( | |
| + const char *name, | |
| + uint32_t prog, uint32_t ver, | |
| + uint32_t create_cb_thread, | |
| + int (*cb_func)(struct msm_rpc_client *, struct rpc_request_hdr *req, | |
| + struct msm_rpc_xdr *xdr)); | |
| + | |
| int msm_rpc_unregister_client(struct msm_rpc_client *client); | |
| int msm_rpc_client_req(struct msm_rpc_client *client, uint32_t proc, | |
| int (*arg_func)(struct msm_rpc_client *, | |
| void *, void *), void *arg_data, | |
| int (*result_func)(struct msm_rpc_client *, | |
| void *, void *), void *result_data, | |
| long timeout); | |
| +int msm_rpc_client_req2(struct msm_rpc_client *client, uint32_t proc, | |
| + int (*arg_func)(struct msm_rpc_client *, | |
| + struct msm_rpc_xdr *, void *), | |
| + void *arg_data, | |
| + int (*result_func)(struct msm_rpc_client *, | |
| + struct msm_rpc_xdr *, void *), | |
| + void *result_data, | |
| + long timeout); | |
| + | |
| void *msm_rpc_start_accepted_reply(struct msm_rpc_client *client, | |
| uint32_t xid, uint32_t accept_status); | |
| int msm_rpc_send_accepted_reply(struct msm_rpc_client *client, uint32_t size); | |
| void *msm_rpc_server_start_accepted_reply(struct msm_rpc_server *server, | |
| uint32_t xid, uint32_t accept_status); | |
| @@ -260,12 +315,41 @@ | |
| uint32_t cb_proc, | |
| int (*arg_func)(struct msm_rpc_server *server, | |
| void *buf, void *data), | |
| void *arg_data, | |
| int (*ret_func)(struct msm_rpc_server *server, | |
| void *buf, void *data), | |
| void *ret_data, long timeout); | |
| +int msm_rpc_server_cb_req2(struct msm_rpc_server *server, | |
| + struct msm_rpc_client_info *clnt_info, | |
| + uint32_t cb_proc, | |
| + int (*arg_func)(struct msm_rpc_server *server, | |
| + struct msm_rpc_xdr *xdr, void *data), | |
| + void *arg_data, | |
| + int (*ret_func)(struct msm_rpc_server *server, | |
| + struct msm_rpc_xdr *xdr, void *data), | |
| + void *ret_data, long timeout); | |
| + | |
| void msm_rpc_server_get_requesting_client( | |
| struct msm_rpc_client_info *clnt_info); | |
| +int xdr_send_pointer(struct msm_rpc_xdr *xdr, void **obj, | |
| + uint32_t obj_size, void *xdr_op); | |
| + | |
| +int xdr_recv_pointer(struct msm_rpc_xdr *xdr, void **obj, | |
| + uint32_t obj_size, void *xdr_op); | |
| + | |
| +int xdr_send_array(struct msm_rpc_xdr *xdr, void **addr, uint32_t *size, | |
| + uint32_t maxsize, uint32_t elm_size, void *xdr_op); | |
| + | |
| +int xdr_recv_array(struct msm_rpc_xdr *xdr, void **addr, uint32_t *size, | |
| + uint32_t maxsize, uint32_t elm_size, void *xdr_op); | |
| + | |
| +int xdr_recv_req(struct msm_rpc_xdr *xdr, struct rpc_request_hdr *req); | |
| +int xdr_recv_reply(struct msm_rpc_xdr *xdr, struct rpc_reply_hdr *reply); | |
| +int xdr_start_request(struct msm_rpc_xdr *xdr, uint32_t prog, | |
| + uint32_t ver, uint32_t proc); | |
| +int xdr_start_accepted_reply(struct msm_rpc_xdr *xdr, uint32_t accept_status); | |
| +int xdr_send_msg(struct msm_rpc_xdr *xdr); | |
| + | |
| #endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/pmic.h kernel/arch/arm/mach-msm/include/mach/pmic.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/pmic.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/pmic.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -209,16 +209,17 @@ | |
| PM_VREG_RFA_ID, | |
| PM_VREG_CDC2_ID, | |
| PM_VREG_RFTX2_ID, | |
| PM_VREG_USIM_ID, | |
| PM_VREG_USB2P6_ID, | |
| PM_VREG_USB3P3_ID, | |
| PM_VREG_EXTCDC1_ID, | |
| PM_VREG_EXTCDC2_ID, | |
| + PM_VREG_EXTCDC3_ID, | |
| /* backward compatible enums only */ | |
| PM_VREG_MSME_ID = PM_VREG_MSME1_ID, | |
| PM_VREG_MSME_BUCK_SMPS_ID = PM_VREG_MSME1_ID, | |
| PM_VREG_MSME1_LDO_ID = PM_VREG_MSME1_ID, | |
| PM_VREG_MSMC_ID = PM_VREG_MSMC1_ID, | |
| PM_VREG_MSMC_LDO_ID = PM_VREG_MSMC1_ID, | |
| PM_VREG_MSMC1_BUCK_SMPS_ID = PM_VREG_MSMC1_ID, | |
| @@ -549,9 +550,11 @@ | |
| uint32_t current_threshold | |
| ); | |
| int pmic_hsed_enable( | |
| enum hsed_controller controller, | |
| enum hsed_enable enable | |
| ); | |
| +int sh_pmic_vreg_control(enum switch_cmd cmd, enum vreg_id id); | |
| + | |
| #endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audplaycmdi.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audplaycmdi.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audplaycmdi.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audplaycmdi.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -42,35 +42,32 @@ | |
| #define AUDPLAY_CMD_BITSTREAM_DATA_AVAIL 0x0000 | |
| #define AUDPLAY_CMD_BITSTREAM_DATA_AVAIL_LEN \ | |
| sizeof(audplay_cmd_bitstream_data_avail) | |
| /* Type specification of dec_data_avail message sent to AUDPLAYTASK | |
| */ | |
| typedef struct { | |
| - /*command ID*/ | |
| - unsigned int cmd_id; | |
| + /*command ID*/ | |
| + unsigned int cmd_id; | |
| - /* Decoder ID for which message is being sent */ | |
| - unsigned int decoder_id; | |
| + /* Decoder ID for which message is being sent */ | |
| + unsigned int decoder_id; | |
| - /* Start address of data in ARM global memory */ | |
| - unsigned int buf_ptr; | |
| - | |
| - /* Number of 16-bit words of bit-stream data contiguously available at the | |
| - * above-mentioned address | |
| - */ | |
| - unsigned int buf_size; | |
| - | |
| - /* Partition number used by audPlayTask to communicate with DSP's RTOS | |
| - * kernel | |
| - */ | |
| - unsigned int partition_number; | |
| + /* Start address of data in ARM global memory */ | |
| + unsigned int buf_ptr; | |
| + /* Number of 16-bit words of bit-stream data contiguously available at the | |
| + * above-mentioned address. */ | |
| + unsigned int buf_size; | |
| + | |
| + /* Partition number used by audPlayTask to communicate with DSP's RTOS | |
| + * kernel */ | |
| + unsigned int partition_number; | |
| } __attribute__((packed)) audplay_cmd_bitstream_data_avail; | |
| #define AUDPLAY_CMD_HPCM_BUF_CFG 0x0003 | |
| #define AUDPLAY_CMD_HPCM_BUF_CFG_LEN \ | |
| sizeof(struct audplay_cmd_hpcm_buf_cfg) | |
| struct audplay_cmd_hpcm_buf_cfg { | |
| unsigned int cmd_id; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audplaymsg.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audplaymsg.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audplaymsg.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audplaymsg.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -6,58 +6,57 @@ | |
| Q D S P 5 A U D I O P L A Y T A S K M S G | |
| GENERAL DESCRIPTION | |
| Message sent by AUDPLAY task | |
| REFERENCES | |
| None | |
| - | |
| Copyright (c) 1992-2009, Code Aurora Forum. All rights reserved. | |
| This software is licensed under the terms of the GNU General Public | |
| License version 2, as published by the Free Software Foundation, and | |
| may be copied, distributed, and modified under those terms. | |
| - | |
| + | |
| This program is distributed in the hope that it will be useful, | |
| but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| GNU General Public License for more details. | |
| *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | |
| /*=========================================================================== | |
| EDIT HISTORY FOR FILE | |
| This section contains comments describing changes made to this file. | |
| Notice that changes are listed in reverse chronological order. | |
| - | |
| + | |
| $Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audplaymsg.h#3 $ | |
| ===========================================================================*/ | |
| #define AUDPLAY_MSG_DEC_NEEDS_DATA 0x0001 | |
| #define AUDPLAY_MSG_DEC_NEEDS_DATA_MSG_LEN \ | |
| sizeof(audplay_msg_dec_needs_data) | |
| typedef struct{ | |
| - /* reserved*/ | |
| - unsigned int dec_id; | |
| + /* reserved*/ | |
| + unsigned int dec_id; | |
| - /*The read pointer offset of external memory till which bitstream | |
| - has been dmed in*/ | |
| - unsigned int adecDataReadPtrOffset; | |
| - | |
| - /* The buffer size of external memory. */ | |
| - unsigned int adecDataBufSize; | |
| - | |
| - unsigned int bitstream_free_len; | |
| - unsigned int bitstream_write_ptr; | |
| - unsigned int bitstarem_buf_start; | |
| - unsigned int bitstream_buf_len; | |
| + /* The read pointer offset of external memory until which the | |
| + * bitstream has been DMAed in. */ | |
| + unsigned int adecDataReadPtrOffset; | |
| + | |
| + /* The buffer size of external memory. */ | |
| + unsigned int adecDataBufSize; | |
| + | |
| + unsigned int bitstream_free_len; | |
| + unsigned int bitstream_write_ptr; | |
| + unsigned int bitstarem_buf_start; | |
| + unsigned int bitstream_buf_len; | |
| } __attribute__((packed)) audplay_msg_dec_needs_data; | |
| #define AUDPLAY_UP_STREAM_INFO 0x0003 | |
| #define AUDPLAY_UP_STREAM_INFO_LEN \ | |
| sizeof(struct audplay_msg_stream_info) | |
| struct audplay_msg_stream_info { | |
| unsigned int decoder_id; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audppcmdi.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audppcmdi.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audppcmdi.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audppcmdi.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,50 +1,50 @@ | |
| #ifndef QDSP5AUDPPCMDI_H | |
| #define QDSP5AUDPPCMDI_H | |
| /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | |
| A U D I O P O S T P R O C E S S I N G I N T E R N A L C O M M A N D S | |
| GENERAL DESCRIPTION | |
| - This file contains defintions of format blocks of commands | |
| + This file contains defintions of format blocks of commands | |
| that are accepted by AUDPP Task | |
| REFERENCES | |
| None | |
| EXTERNALIZED FUNCTIONS | |
| None | |
| Copyright (c) 1992-2009, Code Aurora Forum. All rights reserved. | |
| This software is licensed under the terms of the GNU General Public | |
| License version 2, as published by the Free Software Foundation, and | |
| may be copied, distributed, and modified under those terms. | |
| - | |
| + | |
| This program is distributed in the hope that it will be useful, | |
| but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| GNU General Public License for more details. | |
| *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | |
| /*=========================================================================== | |
| EDIT HISTORY FOR FILE | |
| This section contains comments describing changes made to this file. | |
| Notice that changes are listed in reverse chronological order. | |
| - | |
| -$Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audppcmdi.h#2 $ | |
| - | |
| + | |
| +$Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audppcmdi.h#2 $ | |
| + | |
| ===========================================================================*/ | |
| /* | |
| - * ARM to AUDPPTASK Commands | |
| + * ARM to AUDPPTASK Commands | |
| * | |
| * ARM uses three command queues to communicate with AUDPPTASK | |
| * 1)uPAudPPCmd1Queue : Used for more frequent and shorter length commands | |
| * Location : MEMA | |
| * Buffer Size : 6 words | |
| * No of buffers in a queue : 20 for gaming audio and 5 for other images | |
| * 2)uPAudPPCmd2Queue : Used for commands which are not much lengthier | |
| * Location : MEMA | |
| @@ -56,17 +56,17 @@ | |
| * No of buffers in a queue : 3 | |
| */ | |
| /* | |
| * Commands Related to uPAudPPCmd1Queue | |
| */ | |
| /* | |
| - * Command Structure to enable or disable the active decoders | |
| + * Command Structure to enable or disable the active decoders | |
| */ | |
| #define AUDPP_CMD_CFG_DEC_TYPE 0x0001 | |
| #define AUDPP_CMD_CFG_DEC_TYPE_LEN sizeof(audpp_cmd_cfg_dec_type) | |
| /* Enable the decoder */ | |
| #define AUDPP_CMD_DEC_TYPE_M 0x000F | |
| @@ -74,24 +74,24 @@ | |
| #define AUDPP_CMD_DIS_DEC_V 0x0000 | |
| #define AUDPP_CMD_DEC_STATE_M 0x4000 | |
| #define AUDPP_CMD_UPDATDE_CFG_DEC 0x8000 | |
| #define AUDPP_CMD_DONT_UPDATE_CFG_DEC 0x0000 | |
| /* Type specification of cmd_cfg_dec */ | |
| - | |
| + | |
| typedef struct { | |
| - unsigned short cmd_id; | |
| - unsigned short dec0_cfg; | |
| - unsigned short dec1_cfg; | |
| - unsigned short dec2_cfg; | |
| - unsigned short dec3_cfg; | |
| - unsigned short dec4_cfg; | |
| + unsigned short cmd_id; | |
| + unsigned short dec0_cfg; | |
| + unsigned short dec1_cfg; | |
| + unsigned short dec2_cfg; | |
| + unsigned short dec3_cfg; | |
| + unsigned short dec4_cfg; | |
| } __attribute__((packed)) audpp_cmd_cfg_dec_type; | |
| /* | |
| * Command Structure to Pause , Resume and flushes the selected audio decoders | |
| */ | |
| #define AUDPP_CMD_DEC_CTRL 0x0002 | |
| #define AUDPP_CMD_DEC_CTRL_LEN sizeof(audpp_cmd_dec_ctrl) | |
| @@ -104,22 +104,22 @@ | |
| #define AUDPP_CMD_UPDATE_V 0x8000 | |
| #define AUDPP_CMD_IGNORE_V 0x0000 | |
| /* Type Spec for decoder control command*/ | |
| typedef struct { | |
| - unsigned short cmd_id; | |
| - unsigned short dec0_ctrl; | |
| - unsigned short dec1_ctrl; | |
| - unsigned short dec2_ctrl; | |
| - unsigned short dec3_ctrl; | |
| - unsigned short dec4_ctrl; | |
| + unsigned short cmd_id; | |
| + unsigned short dec0_ctrl; | |
| + unsigned short dec1_ctrl; | |
| + unsigned short dec2_ctrl; | |
| + unsigned short dec3_ctrl; | |
| + unsigned short dec4_ctrl; | |
| } __attribute__((packed)) audpp_cmd_dec_ctrl; | |
| /* | |
| * Command Structure to Configure the AVSync FeedBack Mechanism | |
| */ | |
| #define AUDPP_CMD_AVSYNC 0x0003 | |
| #define AUDPP_CMD_AVSYNC_LEN sizeof(audpp_cmd_avsync) | |
| @@ -127,28 +127,28 @@ | |
| typedef struct { | |
| unsigned short cmd_id; | |
| unsigned short object_number; | |
| unsigned short interrupt_interval_lsw; | |
| unsigned short interrupt_interval_msw; | |
| } __attribute__((packed)) audpp_cmd_avsync; | |
| /* | |
| - * Command Structure to enable or disable(sleep) the AUDPPTASK | |
| + * Command Structure to enable or disable(sleep) the AUDPPTASK | |
| */ | |
| #define AUDPP_CMD_CFG 0x0004 | |
| #define AUDPP_CMD_CFG_LEN sizeof(audpp_cmd_cfg) | |
| #define AUDPP_CMD_CFG_SLEEP 0x0000 | |
| #define AUDPP_CMD_CFG_ENABLE 0xFFFF | |
| typedef struct { | |
| - unsigned short cmd_id; | |
| - unsigned short cfg; | |
| + unsigned short cmd_id; | |
| + unsigned short cfg; | |
| } __attribute__((packed)) audpp_cmd_cfg; | |
| /* | |
| * Command Structure to Inject or drop the specified no of samples | |
| */ | |
| #define AUDPP_CMD_ADJUST_SAMP 0x0005 | |
| #define AUDPP_CMD_ADJUST_SAMP_LEN sizeof(audpp_cmd_adjust_samp) | |
| @@ -243,17 +243,17 @@ | |
| #define AUDPP_CMD_SAMP_RATE_24000 0x0006 | |
| #define AUDPP_CMD_SAMP_RATE_22050 0x0007 | |
| #define AUDPP_CMD_SAMP_RATE_16000 0x0008 | |
| #define AUDPP_CMD_SAMP_RATE_12000 0x0009 | |
| #define AUDPP_CMD_SAMP_RATE_11025 0x000A | |
| #define AUDPP_CMD_SAMP_RATE_8000 0x000B | |
| -/* | |
| +/* | |
| * Type specification of cmd_adec_cfg sent to all decoder | |
| */ | |
| typedef struct { | |
| unsigned short cmd_id; | |
| unsigned short length; | |
| unsigned short dec_id; | |
| unsigned short status_msg_flag; | |
| @@ -264,17 +264,17 @@ | |
| /* | |
| * Command Structure to configure Per decoder Parameters (Wav) | |
| */ | |
| #define AUDPP_CMD_CFG_ADEC_PARAMS_WAV_LEN \ | |
| sizeof(audpp_cmd_cfg_adec_params_wav) | |
| -#define AUDPP_CMD_WAV_STEREO_CFG_MONO 0x0001 | |
| +#define AUDPP_CMD_WAV_STEREO_CFG_MONO 0x0001 | |
| #define AUDPP_CMD_WAV_STEREO_CFG_STEREO 0x0002 | |
| #define AUDPP_CMD_WAV_PCM_WIDTH_8 0x0000 | |
| #define AUDPP_CMD_WAV_PCM_WIDTH_16 0x0001 | |
| #define AUDPP_CMD_WAV_PCM_WIDTH_24 0x0002 | |
| typedef struct { | |
| audpp_cmd_cfg_adec_params_common common; | |
| @@ -357,17 +357,16 @@ | |
| signed short format; | |
| unsigned short audio_object; | |
| unsigned short ep_config; | |
| unsigned short aac_section_data_resilience_flag; | |
| unsigned short aac_scalefactor_data_resilience_flag; | |
| unsigned short aac_spectral_data_resilience_flag; | |
| unsigned short sbr_on_flag; | |
| unsigned short sbr_ps_on_flag; | |
| - unsigned short dual_mono_mode; | |
| unsigned short channel_configuration; | |
| } __attribute__((packed)) audpp_cmd_cfg_adec_params_aac; | |
| /* | |
| * Command Structure to configure Per decoder Parameters (V13K) | |
| */ | |
| #define AUDPP_CMD_CFG_ADEC_PARAMS_V13K_LEN \ | |
| @@ -419,57 +418,57 @@ | |
| #define AUDPP_CMD_PCM_INTF_FULL_DUPLEX 0x0 | |
| #define AUDPP_CMD_PCM_INTF_HALF_DUPLEX_TODSP 0x1 | |
| #define AUDPP_CMD_PCM_INTF_OBJECT_NUM 0x5 | |
| #define AUDPP_CMD_PCM_INTF_COMMON_OBJECT_NUM 0x6 | |
| - | |
| + | |
| typedef struct { | |
| - unsigned short cmd_id; | |
| - unsigned short object_num; | |
| - signed short config; | |
| - unsigned short intf_type; | |
| - | |
| - /* DSP -> ARM Configuration */ | |
| - unsigned short read_buf1LSW; | |
| - unsigned short read_buf1MSW; | |
| - unsigned short read_buf1_len; | |
| - | |
| - unsigned short read_buf2LSW; | |
| - unsigned short read_buf2MSW; | |
| - unsigned short read_buf2_len; | |
| - /* 0:HOST_PCM_INTF disable | |
| - ** 0xFFFF: HOST_PCM_INTF enable | |
| - */ | |
| - signed short dsp_to_arm_flag; | |
| - unsigned short partition_number; | |
| - | |
| - /* ARM -> DSP Configuration */ | |
| - unsigned short write_buf1LSW; | |
| - unsigned short write_buf1MSW; | |
| - unsigned short write_buf1_len; | |
| - | |
| - unsigned short write_buf2LSW; | |
| - unsigned short write_buf2MSW; | |
| - unsigned short write_buf2_len; | |
| - | |
| - /* 0:HOST_PCM_INTF disable | |
| - ** 0xFFFF: HOST_PCM_INTF enable | |
| - */ | |
| - signed short arm_to_rx_flag; | |
| - unsigned short weight_decoder_to_rx; | |
| - unsigned short weight_arm_to_rx; | |
| - | |
| - unsigned short partition_number_arm_to_dsp; | |
| - unsigned short sample_rate; | |
| - unsigned short channel_mode; | |
| + unsigned short cmd_id; | |
| + unsigned short object_num; | |
| + signed short config; | |
| + unsigned short intf_type; | |
| + | |
| + /* DSP -> ARM Configuration */ | |
| + unsigned short read_buf1LSW; | |
| + unsigned short read_buf1MSW; | |
| + unsigned short read_buf1_len; | |
| + | |
| + unsigned short read_buf2LSW; | |
| + unsigned short read_buf2MSW; | |
| + unsigned short read_buf2_len; | |
| + /* 0:HOST_PCM_INTF disable | |
| + ** 0xFFFF: HOST_PCM_INTF enable | |
| + */ | |
| + signed short dsp_to_arm_flag; | |
| + unsigned short partition_number; | |
| + | |
| + /* ARM -> DSP Configuration */ | |
| + unsigned short write_buf1LSW; | |
| + unsigned short write_buf1MSW; | |
| + unsigned short write_buf1_len; | |
| + | |
| + unsigned short write_buf2LSW; | |
| + unsigned short write_buf2MSW; | |
| + unsigned short write_buf2_len; | |
| + | |
| + /* 0:HOST_PCM_INTF disable | |
| + ** 0xFFFF: HOST_PCM_INTF enable | |
| + */ | |
| + signed short arm_to_rx_flag; | |
| + unsigned short weight_decoder_to_rx; | |
| + unsigned short weight_arm_to_rx; | |
| + | |
| + unsigned short partition_number_arm_to_dsp; | |
| + unsigned short sample_rate; | |
| + unsigned short channel_mode; | |
| } __attribute__((packed)) audpp_cmd_pcm_intf; | |
| /* | |
| ** BUFFER UPDATE COMMAND | |
| */ | |
| #define AUDPP_CMD_PCM_INTF_SEND_BUF_PARAMS_LEN \ | |
| sizeof(audpp_cmd_pcm_intf_send_buffer) | |
| @@ -612,17 +611,17 @@ | |
| filter_2 filter_2_params; | |
| filter_3 filter_3_params; | |
| filter_4 filter_4_params; | |
| } __attribute__((packed)) params_filter; | |
| } __attribute__((packed)) audpp_cmd_cfg_object_params_pcm; | |
| /* | |
| - * Command Structure to configure post processing parameters (equalizer) | |
| + * Command Structure to configure post processing parameters (equalizer) | |
| */ | |
| #define AUDPP_CMD_CFG_OBJECT_PARAMS_EQALIZER_LEN \ | |
| sizeof(audpp_cmd_cfg_object_params_eqalizer) | |
| typedef struct { | |
| unsigned short numerator_coeff_0_lsw; | |
| unsigned short numerator_coeff_0_msw; | |
| @@ -733,17 +732,17 @@ | |
| eq_coeff_10 eq_coeffs_10; | |
| eq_coeff_11 eq_coeffs_11; | |
| eq_coeff_12 eq_coeffs_12; | |
| } __attribute__((packed)) eq_coeff; | |
| } __attribute__((packed)) audpp_cmd_cfg_object_params_eqalizer; | |
| /* | |
| - * Command Structure to configure post processing parameters (ADRC) | |
| + * Command Structure to configure post processing parameters (ADRC) | |
| */ | |
| #define AUDPP_CMD_CFG_OBJECT_PARAMS_ADRC_LEN \ | |
| sizeof(audpp_cmd_cfg_object_params_adrc) | |
| #define AUDPP_CMD_ADRC_FLAG_DIS 0x0000 | |
| #define AUDPP_CMD_ADRC_FLAG_ENA -1 | |
| @@ -799,17 +798,17 @@ | |
| typedef struct { | |
| audpp_cmd_cfg_object_params_common common; | |
| unsigned short sample_interval; | |
| unsigned short num_coeff; | |
| } __attribute__((packed)) audpp_cmd_cfg_object_params_spectram; | |
| /* | |
| - * Command Structure to configure post processing parameters (QConcert) | |
| + * Command Structure to configure post processing parameters (QConcert) | |
| */ | |
| #define AUDPP_CMD_CFG_OBJECT_PARAMS_QCONCERT_LEN \ | |
| sizeof(audpp_cmd_cfg_object_params_qconcert) | |
| #define AUDPP_CMD_QCON_ENA_FLAG_ENA -1 | |
| #define AUDPP_CMD_QCON_ENA_FLAG_DIS 0x0000 | |
| @@ -845,17 +844,17 @@ | |
| unsigned short delay_buff_size_msw; | |
| unsigned short delay_buff_size_lsw; | |
| unsigned short partition_num; | |
| unsigned short delay_buff_start_msw; | |
| unsigned short delay_buff_start_lsw; | |
| } __attribute__((packed)) audpp_cmd_cfg_object_params_qconcert; | |
| /* | |
| - * Command Structure to configure post processing parameters (Side Chain) | |
| + * Command Structure to configure post processing parameters (Side Chain) | |
| */ | |
| #define AUDPP_CMD_CFG_OBJECT_PARAMS_SIDECHAIN_LEN \ | |
| sizeof(audpp_cmd_cfg_object_params_sidechain) | |
| #define AUDPP_CMD_SIDECHAIN_ACTIVE_FLAG_DIS 0x0000 | |
| #define AUDPP_CMD_SIDECHAIN_ACTIVE_FLAG_ENA -1 | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audppmsg.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audppmsg.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audppmsg.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audppmsg.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,52 +1,52 @@ | |
| #ifndef QDSP5AUDPPMSG_H | |
| #define QDSP5AUDPPMSG_H | |
| /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | |
| Q D S P 5 A U D I O P O S T P R O C E S S I N G M S G | |
| GENERAL DESCRIPTION | |
| - Messages sent by AUDPPTASK to ARM | |
| + Messages sent by AUDPPTASK to ARM | |
| REFERENCES | |
| None | |
| EXTERNALIZED FUNCTIONS | |
| None | |
| Copyright (c) 1992-2009, Code Aurora Forum. All rights reserved. | |
| This software is licensed under the terms of the GNU General Public | |
| License version 2, as published by the Free Software Foundation, and | |
| may be copied, distributed, and modified under those terms. | |
| - | |
| + | |
| This program is distributed in the hope that it will be useful, | |
| but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| GNU General Public License for more details. | |
| *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | |
| /*=========================================================================== | |
| EDIT HISTORY FOR FILE | |
| This section contains comments describing changes made to this file. | |
| Notice that changes are listed in reverse chronological order. | |
| - | |
| + | |
| $Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audppmsg.h#4 $ | |
| ===========================================================================*/ | |
| /* | |
| * AUDPPTASK uses audPPuPRlist to send messages to the ARM | |
| * Location : MEMA | |
| * Buffer Size : 45 | |
| - * No of Buffers in a queue : 5 for gaming audio and 1 for other images | |
| + * No of Buffers in a queue : 5 for gaming audio and 1 for other images | |
| */ | |
| /* | |
| * MSG to Informs the ARM os Success/Failure of bringing up the decoder | |
| */ | |
| #define AUDPP_MSG_STATUS_MSG 0x0001 | |
| #define AUDPP_MSG_STATUS_MSG_LEN \ | |
| @@ -249,47 +249,47 @@ | |
| * MSG to provide PCM DMA Missed feedback from the DSP to ARM | |
| */ | |
| #define AUDPP_MSG_PCMDMAMISSED 0x0006 | |
| #define AUDPP_MSG_PCMDMAMISSED_LEN \ | |
| sizeof(audpp_msg_pcmdmamissed); | |
| typedef struct{ | |
| - /* | |
| - ** Bit 0 0 = PCM DMA not missed for object 0 | |
| - ** 1 = PCM DMA missed for object0 | |
| - ** Bit 1 0 = PCM DMA not missed for object 1 | |
| - ** 1 = PCM DMA missed for object1 | |
| - ** Bit 2 0 = PCM DMA not missed for object 2 | |
| - ** 1 = PCM DMA missed for object2 | |
| - ** Bit 3 0 = PCM DMA not missed for object 3 | |
| - ** 1 = PCM DMA missed for object3 | |
| - ** Bit 4 0 = PCM DMA not missed for object 4 | |
| - ** 1 = PCM DMA missed for object4 | |
| - */ | |
| - unsigned short pcmdmamissed; | |
| + /* | |
| + ** Bit 0 0 = PCM DMA not missed for object 0 | |
| + ** 1 = PCM DMA missed for object0 | |
| + ** Bit 1 0 = PCM DMA not missed for object 1 | |
| + ** 1 = PCM DMA missed for object1 | |
| + ** Bit 2 0 = PCM DMA not missed for object 2 | |
| + ** 1 = PCM DMA missed for object2 | |
| + ** Bit 3 0 = PCM DMA not missed for object 3 | |
| + ** 1 = PCM DMA missed for object3 | |
| + ** Bit 4 0 = PCM DMA not missed for object 4 | |
| + ** 1 = PCM DMA missed for object4 | |
| + */ | |
| + unsigned short pcmdmamissed; | |
| } __attribute__((packed)) audpp_msg_pcmdmamissed; | |
| /* | |
| * MSG to AUDPP enable or disable feedback form DSP to ARM | |
| */ | |
| #define AUDPP_MSG_CFG_MSG 0x0007 | |
| #define AUDPP_MSG_CFG_MSG_LEN \ | |
| sizeof(audpp_msg_cfg_msg) | |
| #define AUDPP_MSG_ENA_ENA 0xFFFF | |
| #define AUDPP_MSG_ENA_DIS 0x0000 | |
| typedef struct{ | |
| - /* Enabled - 0xffff | |
| - ** Disabled - 0 | |
| - */ | |
| - unsigned short enabled; | |
| + /* Enabled - 0xffff | |
| + ** Disabled - 0 | |
| + */ | |
| + unsigned short enabled; | |
| } __attribute__((packed)) audpp_msg_cfg_msg; | |
| /* | |
| * MSG to communicate the reverb per object volume | |
| */ | |
| #define AUDPP_MSG_QREVERB_VOLUME 0x0008 | |
| #define AUDPP_MSG_QREVERB_VOLUME_LEN \ | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audpreproccmdi.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audpreproccmdi.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audpreproccmdi.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audpreproccmdi.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,45 +1,45 @@ | |
| #ifndef QDSP5AUDPREPROCCMDI_H | |
| #define QDSP5AUDPREPROCCMDI_H | |
| /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | |
| A U D I O P R E P R O C E S S I N G I N T E R N A L C O M M A N D S | |
| GENERAL DESCRIPTION | |
| - This file contains defintions of format blocks of commands | |
| + This file contains defintions of format blocks of commands | |
| that are accepted by AUDPREPROC Task | |
| REFERENCES | |
| None | |
| EXTERNALIZED FUNCTIONS | |
| None | |
| Copyright (c) 1992-2009, Code Aurora Forum. All rights reserved. | |
| This software is licensed under the terms of the GNU General Public | |
| License version 2, as published by the Free Software Foundation, and | |
| may be copied, distributed, and modified under those terms. | |
| - | |
| + | |
| This program is distributed in the hope that it will be useful, | |
| but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| GNU General Public License for more details. | |
| *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | |
| /*=========================================================================== | |
| EDIT HISTORY FOR FILE | |
| This section contains comments describing changes made to this file. | |
| Notice that changes are listed in reverse chronological order. | |
| -$Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audpreproccmdi.h#2 $ | |
| +$Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audpreproccmdi.h#2 $ | |
| ===========================================================================*/ | |
| /* | |
| * AUDIOPREPROC COMMANDS: | |
| * ARM uses uPAudPreProcCmdQueue to communicate with AUDPREPROCTASK | |
| * Location : MEMB | |
| * Buffer size : 51 | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audpreprocmsg.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audpreprocmsg.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audpreprocmsg.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audpreprocmsg.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,31 +1,31 @@ | |
| #ifndef QDSP5AUDPREPROCMSG_H | |
| #define QDSP5AUDPREPROCMSG_H | |
| /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | |
| A U D I O P R E P R O C E S S I N G M E S S A G E S | |
| GENERAL DESCRIPTION | |
| - This file contains defintions of format blocks of messages | |
| + This file contains defintions of format blocks of messages | |
| that are rcvd by AUDPREPROC Task | |
| REFERENCES | |
| None | |
| EXTERNALIZED FUNCTIONS | |
| None | |
| Copyright (c) 1992-2009, Code Aurora Forum. All rights reserved. | |
| This software is licensed under the terms of the GNU General Public | |
| License version 2, as published by the Free Software Foundation, and | |
| may be copied, distributed, and modified under those terms. | |
| - | |
| + | |
| This program is distributed in the hope that it will be useful, | |
| but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| GNU General Public License for more details. | |
| *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | |
| /*=========================================================================== | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audreccmdi.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audreccmdi.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audreccmdi.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audreccmdi.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,64 +1,64 @@ | |
| #ifndef QDSP5AUDRECCMDI_H | |
| #define QDSP5AUDRECCMDI_H | |
| /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | |
| A U D I O R E C O R D I N T E R N A L C O M M A N D S | |
| GENERAL DESCRIPTION | |
| - This file contains defintions of format blocks of commands | |
| + This file contains defintions of format blocks of commands | |
| that are accepted by AUDREC Task | |
| REFERENCES | |
| None | |
| EXTERNALIZED FUNCTIONS | |
| None | |
| Copyright (c) 1992-2009, Code Aurora Forum. All rights reserved. | |
| This software is licensed under the terms of the GNU General Public | |
| License version 2, as published by the Free Software Foundation, and | |
| may be copied, distributed, and modified under those terms. | |
| - | |
| + | |
| This program is distributed in the hope that it will be useful, | |
| but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| GNU General Public License for more details. | |
| *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | |
| /*=========================================================================== | |
| EDIT HISTORY FOR FILE | |
| This section contains comments describing changes made to this file. | |
| Notice that changes are listed in reverse chronological order. | |
| - | |
| + | |
| $Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audreccmdi.h#3 $ | |
| - | |
| + | |
| ============================================================================*/ | |
| /* | |
| * AUDRECTASK COMMANDS | |
| * ARM uses 2 queues to communicate with the AUDRECTASK | |
| * 1.uPAudRecCmdQueue | |
| * Location :MEMC | |
| * Buffer Size : 8 | |
| * No of Buffers in a queue : 3 | |
| * 2.audRecUpBitStreamQueue | |
| * Location : MEMC | |
| * Buffer Size : 4 | |
| * No of buffers in a queue : 2 | |
| */ | |
| /* | |
| - * Commands on uPAudRecCmdQueue | |
| + * Commands on uPAudRecCmdQueue | |
| */ | |
| /* | |
| * Command to initiate and terminate the audio recording section | |
| */ | |
| #define AUDREC_CMD_CFG 0x0000 | |
| #define AUDREC_CMD_CFG_LEN sizeof(audrec_cmd_cfg) | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audrecmsg.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audrecmsg.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audrecmsg.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5audrecmsg.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,45 +1,45 @@ | |
| #ifndef QDSP5AUDRECMSGI_H | |
| #define QDSP5AUDRECMSGI_H | |
| /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | |
| A U D I O R E C O R D M E S S A G E S | |
| GENERAL DESCRIPTION | |
| - This file contains defintions of format blocks of messages | |
| + This file contains defintions of format blocks of messages | |
| that are sent by AUDREC Task | |
| REFERENCES | |
| None | |
| EXTERNALIZED FUNCTIONS | |
| None | |
| Copyright (c) 1992-2009, Code Aurora Forum. All rights reserved. | |
| This software is licensed under the terms of the GNU General Public | |
| License version 2, as published by the Free Software Foundation, and | |
| may be copied, distributed, and modified under those terms. | |
| - | |
| + | |
| This program is distributed in the hope that it will be useful, | |
| but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| GNU General Public License for more details. | |
| *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | |
| /*=========================================================================== | |
| EDIT HISTORY FOR FILE | |
| This section contains comments describing changes made to this file. | |
| Notice that changes are listed in reverse chronological order. | |
| - | |
| + | |
| $Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audrecmsg.h#3 $ | |
| ============================================================================*/ | |
| /* | |
| * AUDRECTASK MESSAGES | |
| * AUDRECTASK uses audRecUpRlist to communicate with ARM | |
| * Location : MEMC | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5jpegcmdi.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5jpegcmdi.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5jpegcmdi.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5jpegcmdi.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,47 +1,46 @@ | |
| #ifndef QDSP5VIDJPEGCMDI_H | |
| #define QDSP5VIDJPEGCMDI_H | |
| /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | |
| J P E G I N T E R N A L C O M M A N D S | |
| GENERAL DESCRIPTION | |
| - This file contains defintions of format blocks of commands | |
| + This file contains defintions of format blocks of commands | |
| that are accepted by JPEG Task | |
| REFERENCES | |
| None | |
| EXTERNALIZED FUNCTIONS | |
| None | |
| Copyright (c) 1992-2009, Code Aurora Forum. All rights reserved. | |
| This software is licensed under the terms of the GNU General Public | |
| License version 2, as published by the Free Software Foundation, and | |
| may be copied, distributed, and modified under those terms. | |
| - | |
| + | |
| This program is distributed in the hope that it will be useful, | |
| but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| GNU General Public License for more details. | |
| *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | |
| /*=========================================================================== | |
| EDIT HISTORY FOR FILE | |
| This section contains comments describing changes made to this file. | |
| Notice that changes are listed in reverse chronological order. | |
| - | |
| - | |
| -$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5jpegcmdi.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | |
| -Revision History: | |
| + | |
| +$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5jpegcmdi.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | |
| +Revision History: | |
| when who what, where, why | |
| -------- --- ---------------------------------------------------------- | |
| 06/09/08 sv initial version | |
| ===========================================================================*/ | |
| /* | |
| * ARM to JPEG configuration commands are passed through the | |
| * uPJpegCfgCmdQueue | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5jpegmsg.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5jpegmsg.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5jpegmsg.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5jpegmsg.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,47 +1,47 @@ | |
| #ifndef QDSP5VIDJPEGMSGI_H | |
| #define QDSP5VIDJPEGMSGI_H | |
| /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | |
| J P E G I N T E R N A L M E S S A G E S | |
| GENERAL DESCRIPTION | |
| - This file contains defintions of format blocks of messages | |
| + This file contains defintions of format blocks of messages | |
| that are sent by JPEG Task | |
| REFERENCES | |
| None | |
| EXTERNALIZED FUNCTIONS | |
| None | |
| Copyright (c) 1992-2009, Code Aurora Forum. All rights reserved. | |
| This software is licensed under the terms of the GNU General Public | |
| License version 2, as published by the Free Software Foundation, and | |
| may be copied, distributed, and modified under those terms. | |
| - | |
| + | |
| This program is distributed in the hope that it will be useful, | |
| but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| GNU General Public License for more details. | |
| *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | |
| /*=========================================================================== | |
| EDIT HISTORY FOR FILE | |
| This section contains comments describing changes made to this file. | |
| Notice that changes are listed in reverse chronological order. | |
| - | |
| -$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5jpegmsg.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | |
| -Revision History: | |
| - | |
| + | |
| +$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5jpegmsg.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | |
| +Revision History: | |
| + | |
| when who what, where, why | |
| -------- --- ---------------------------------------------------------- | |
| 05/10/08 sv initial version | |
| ===========================================================================*/ | |
| /* | |
| * Messages from JPEG task to ARM through jpeguPMsgQueue | |
| */ | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5lpmcmdi.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5lpmcmdi.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5lpmcmdi.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5lpmcmdi.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,48 +1,48 @@ | |
| #ifndef QDSP5LPMCMDI_H | |
| #define QDSP5LPMCMDI_H | |
| /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | |
| L P M I N T E R N A L C O M M A N D S | |
| GENERAL DESCRIPTION | |
| - This file contains defintions of format blocks of commands | |
| + This file contains defintions of format blocks of commands | |
| that are accepted by LPM Task | |
| REFERENCES | |
| None | |
| EXTERNALIZED FUNCTIONS | |
| None | |
| Copyright (c) 1992-2009, Code Aurora Forum. All rights reserved. | |
| This software is licensed under the terms of the GNU General Public | |
| License version 2, as published by the Free Software Foundation, and | |
| may be copied, distributed, and modified under those terms. | |
| - | |
| + | |
| This program is distributed in the hope that it will be useful, | |
| but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| GNU General Public License for more details. | |
| *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | |
| /*=========================================================================== | |
| EDIT HISTORY FOR FILE | |
| This section contains comments describing changes made to this file. | |
| Notice that changes are listed in reverse chronological order. | |
| - | |
| - | |
| -$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5lpmcmdi.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | |
| -Revision History: | |
| - | |
| + | |
| + | |
| +$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5lpmcmdi.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | |
| +Revision History: | |
| + | |
| when who what, where, why | |
| -------- --- ---------------------------------------------------------- | |
| 06/12/08 sv initial version | |
| ===========================================================================*/ | |
| /* | |
| * Command to start LPM processing based on the config params | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5lpmmsg.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5lpmmsg.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5lpmmsg.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5lpmmsg.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,47 +1,47 @@ | |
| #ifndef QDSP5LPMMSGI_H | |
| #define QDSP5LPMMSGI_H | |
| /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | |
| L P M I N T E R N A L M E S S A G E S | |
| GENERAL DESCRIPTION | |
| - This file contains defintions of format blocks of commands | |
| + This file contains defintions of format blocks of commands | |
| that are accepted by LPM Task | |
| REFERENCES | |
| None | |
| EXTERNALIZED FUNCTIONS | |
| None | |
| Copyright (c) 1992-2009, Code Aurora Forum. All rights reserved. | |
| This software is licensed under the terms of the GNU General Public | |
| License version 2, as published by the Free Software Foundation, and | |
| may be copied, distributed, and modified under those terms. | |
| - | |
| + | |
| This program is distributed in the hope that it will be useful, | |
| but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| GNU General Public License for more details. | |
| *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | |
| /*=========================================================================== | |
| EDIT HISTORY FOR FILE | |
| This section contains comments describing changes made to this file. | |
| Notice that changes are listed in reverse chronological order. | |
| - | |
| -$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5lpmmsg.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | |
| -Revision History: | |
| - | |
| + | |
| +$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5lpmmsg.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | |
| +Revision History: | |
| + | |
| when who what, where, why | |
| -------- --- ---------------------------------------------------------- | |
| 06/12/08 sv initial version | |
| ===========================================================================*/ | |
| /* | |
| * Message to acknowledge CMD_LPM_IDLE command | |
| */ | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5vdeccmdi.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5vdeccmdi.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5vdeccmdi.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5vdeccmdi.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,47 +1,47 @@ | |
| #ifndef QDSP5VIDDECCMDI_H | |
| #define QDSP5VIDDECCMDI_H | |
| /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | |
| V I D E O D E C O D E R I N T E R N A L C O M M A N D S | |
| GENERAL DESCRIPTION | |
| - This file contains defintions of format blocks of commands | |
| + This file contains defintions of format blocks of commands | |
| that are accepted by VIDDEC Task | |
| REFERENCES | |
| None | |
| EXTERNALIZED FUNCTIONS | |
| None | |
| Copyright (c) 1992-2009, Code Aurora Forum. All rights reserved. | |
| This software is licensed under the terms of the GNU General Public | |
| License version 2, as published by the Free Software Foundation, and | |
| may be copied, distributed, and modified under those terms. | |
| - | |
| + | |
| This program is distributed in the hope that it will be useful, | |
| but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| GNU General Public License for more details. | |
| *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | |
| /*=========================================================================== | |
| EDIT HISTORY FOR FILE | |
| This section contains comments describing changes made to this file. | |
| Notice that changes are listed in reverse chronological order. | |
| - | |
| -$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5vdeccmdi.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | |
| -Revision History: | |
| - | |
| + | |
| +$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5vdeccmdi.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | |
| +Revision History: | |
| + | |
| when who what, where, why | |
| -------- --- ---------------------------------------------------------- | |
| 05/10/08 ac initial version | |
| ===========================================================================*/ | |
| /* | |
| * Command to inform VIDDEC that new subframe packet is ready | |
| @@ -127,17 +127,17 @@ | |
| */ | |
| #define VIDDEC_CMD_FRAME_HEADER_PACKET 0x0002 | |
| #define VIDDEC_CMD_FRAME_INFO_0_ERROR_SKIP 0x0000 | |
| #define VIDDEC_CMD_FRAME_INFO_0_ERROR_BLACK 0x0800 | |
| /* | |
| - * SLICE HEADER PACKET | |
| + * SLICE HEADER PACKET | |
| * I-Slice and P-Slice | |
| */ | |
| #define VIDDEC_CMD_SLICE_HEADER_PKT_ISLICE 0x0003 | |
| #define VIDDEC_CMD_SLICE_HEADER_PKT_ISLICE_LEN \ | |
| sizeof(viddec_cmd_slice_header_pkt_islice) | |
| #define VIDDEC_CMD_ISLICE_INFO_1_MOD_SLICE_TYPE_PSLICE 0x0000 | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5vdecmsg.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5vdecmsg.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5vdecmsg.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5vdecmsg.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,47 +1,47 @@ | |
| #ifndef QDSP5VIDDECMSGI_H | |
| #define QDSP5VIDDECMSGI_H | |
| /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | |
| V I D E O D E C O D E R I N T E R N A L M E S S A G E S | |
| GENERAL DESCRIPTION | |
| - This file contains defintions of format blocks of messages | |
| + This file contains defintions of format blocks of messages | |
| that are sent by VIDDEC Task | |
| REFERENCES | |
| None | |
| EXTERNALIZED FUNCTIONS | |
| None | |
| Copyright (c) 1992-2009, Code Aurora Forum. All rights reserved. | |
| This software is licensed under the terms of the GNU General Public | |
| License version 2, as published by the Free Software Foundation, and | |
| may be copied, distributed, and modified under those terms. | |
| - | |
| + | |
| This program is distributed in the hope that it will be useful, | |
| but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| GNU General Public License for more details. | |
| *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | |
| /*=========================================================================== | |
| EDIT HISTORY FOR FILE | |
| This section contains comments describing changes made to this file. | |
| Notice that changes are listed in reverse chronological order. | |
| - | |
| -$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5vdecmsg.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | |
| -Revision History: | |
| - | |
| + | |
| +$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5vdecmsg.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | |
| +Revision History: | |
| + | |
| when who what, where, why | |
| -------- --- ---------------------------------------------------------- | |
| 05/10/08 ac initial version | |
| ===========================================================================*/ | |
| /* | |
| * Message to inform ARM which VDEC_SUBFRAME_PKT_CMD processed by VIDDEC TASK | |
| */ | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5venccmdi.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5venccmdi.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5venccmdi.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5venccmdi.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -47,65 +47,65 @@ | |
| * Command to pass the frame message information to VIDENC | |
| */ | |
| #define VIDENC_CMD_FRAME_START_LEN \ | |
| sizeof(videnc_cmd_frame_start) | |
| typedef struct { | |
| - unsigned short cmd_id; | |
| - unsigned short frame_info; | |
| - unsigned short frame_rho_budget_word_high; | |
| - unsigned short frame_rho_budget_word_low; | |
| - unsigned short input_luma_addr_high; | |
| - unsigned short input_luma_addr_low; | |
| - unsigned short input_chroma_addr_high; | |
| - unsigned short input_chroma_addr_low; | |
| - unsigned short ref_vop_buf_ptr_high; | |
| - unsigned short ref_vop_buf_ptr_low; | |
| - unsigned short enc_pkt_buf_ptr_high; | |
| - unsigned short enc_pkt_buf_ptr_low; | |
| - unsigned short enc_pkt_buf_size_high; | |
| - unsigned short enc_pkt_buf_size_low; | |
| - unsigned short unfilt_recon_vop_buf_ptr_high; | |
| - unsigned short unfilt_recon_vop_buf_ptr_low; | |
| - unsigned short filt_recon_vop_buf_ptr_high; | |
| - unsigned short filt_recon_vop_buf_ptr_low; | |
| + unsigned short cmd_id; | |
| + unsigned short frame_info; | |
| + unsigned short frame_rho_budget_word_high; | |
| + unsigned short frame_rho_budget_word_low; | |
| + unsigned short input_luma_addr_high; | |
| + unsigned short input_luma_addr_low; | |
| + unsigned short input_chroma_addr_high; | |
| + unsigned short input_chroma_addr_low; | |
| + unsigned short ref_vop_buf_ptr_high; | |
| + unsigned short ref_vop_buf_ptr_low; | |
| + unsigned short enc_pkt_buf_ptr_high; | |
| + unsigned short enc_pkt_buf_ptr_low; | |
| + unsigned short enc_pkt_buf_size_high; | |
| + unsigned short enc_pkt_buf_size_low; | |
| + unsigned short unfilt_recon_vop_buf_ptr_high; | |
| + unsigned short unfilt_recon_vop_buf_ptr_low; | |
| + unsigned short filt_recon_vop_buf_ptr_high; | |
| + unsigned short filt_recon_vop_buf_ptr_low; | |
| } __attribute__((packed)) videnc_cmd_frame_start; | |
| /* | |
| * Command to pass the frame-level digital stabilization parameters to VIDENC | |
| */ | |
| #define VIDENC_CMD_DIS_LEN \ | |
| sizeof(videnc_cmd_dis) | |
| typedef struct { | |
| - unsigned short cmd_id; | |
| - unsigned short vfe_out_prev_luma_addr_high; | |
| - unsigned short vfe_out_prev_luma_addr_low; | |
| - unsigned short stabilization_info; | |
| + unsigned short cmd_id; | |
| + unsigned short vfe_out_prev_luma_addr_high; | |
| + unsigned short vfe_out_prev_luma_addr_low; | |
| + unsigned short stabilization_info; | |
| } __attribute__((packed)) videnc_cmd_dis; | |
| /* | |
| * Command to pass the codec related parameters to VIDENC | |
| */ | |
| #define VIDENC_CMD_CFG_LEN \ | |
| sizeof(videnc_cmd_cfg) | |
| typedef struct { | |
| - unsigned short cmd_id; | |
| - unsigned short cfg_info_0; | |
| - unsigned short cfg_info_1; | |
| - unsigned short four_mv_threshold; | |
| - unsigned short ise_fse_mv_cost_fac; | |
| + unsigned short cmd_id; | |
| + unsigned short cfg_info_0; | |
| + unsigned short cfg_info_1; | |
| + unsigned short four_mv_threshold; | |
| + unsigned short ise_fse_mv_cost_fac; | |
| unsigned short venc_frame_dim; | |
| unsigned short venc_DM_partition; | |
| } __attribute__((packed)) videnc_cmd_cfg; | |
| /* | |
| * Command to start the video encoding | |
| */ | |
| @@ -121,92 +121,92 @@ | |
| * Command to stop the video encoding | |
| */ | |
| #define VIDENC_CMD_IDLE_LEN \ | |
| sizeof(videnc_cmd_idle) | |
| typedef struct { | |
| - unsigned short cmd_id; | |
| + unsigned short cmd_id; | |
| } __attribute__((packed)) videnc_cmd_idle; | |
| /* | |
| * Command to query staus of VIDENC | |
| */ | |
| #define VIDENC_CMD_STATUS_QUERY_LEN \ | |
| sizeof(videnc_cmd_status_query) | |
| typedef struct { | |
| - unsigned short cmd_id; | |
| + unsigned short cmd_id; | |
| } __attribute__((packed)) videnc_cmd_status_query; | |
| /* | |
| * Command to set rate control for a frame | |
| */ | |
| #define VIDENC_CMD_RC_CFG_LEN \ | |
| sizeof(videnc_cmd_rc_cfg) | |
| typedef struct { | |
| - unsigned short cmd_id; | |
| + unsigned short cmd_id; | |
| unsigned short max_frame_qp_delta; | |
| unsigned short max_min_frame_qp; | |
| } __attribute__((packed)) videnc_cmd_rc_cfg; | |
| /* | |
| * Command to set intra-refreshing | |
| */ | |
| #define VIDENC_CMD_INTRA_REFRESH_LEN \ | |
| sizeof(videnc_cmd_intra_refresh) | |
| typedef struct { | |
| - unsigned short cmd_id; | |
| + unsigned short cmd_id; | |
| unsigned short num_mb_refresh; | |
| unsigned short mb_index[15]; | |
| } __attribute__((packed)) videnc_cmd_intra_refresh; | |
| /* | |
| * Command to pass digital zoom information to the VIDENC | |
| */ | |
| #define VIDENC_CMD_DIGITAL_ZOOM_LEN \ | |
| sizeof(videnc_cmd_digital_zoom) | |
| typedef struct { | |
| - unsigned short cmd_id; | |
| - unsigned short digital_zoom_en; | |
| - unsigned short luma_frame_shift_X; | |
| - unsigned short luma_frame_shift_Y; | |
| - unsigned short up_ip_luma_rows; | |
| - unsigned short up_ip_luma_cols; | |
| - unsigned short up_ip_chroma_rows; | |
| - unsigned short up_ip_chroma_cols; | |
| - unsigned short luma_ph_incr_V_low; | |
| - unsigned short luma_ph_incr_V_high; | |
| - unsigned short luma_ph_incr_H_low; | |
| - unsigned short luma_ph_incr_H_high; | |
| - unsigned short chroma_ph_incr_V_low; | |
| - unsigned short chroma_ph_incr_V_high; | |
| - unsigned short chroma_ph_incr_H_low; | |
| - unsigned short chroma_ph_incr_H_high; | |
| + unsigned short cmd_id; | |
| + unsigned short digital_zoom_en; | |
| + unsigned short luma_frame_shift_X; | |
| + unsigned short luma_frame_shift_Y; | |
| + unsigned short up_ip_luma_rows; | |
| + unsigned short up_ip_luma_cols; | |
| + unsigned short up_ip_chroma_rows; | |
| + unsigned short up_ip_chroma_cols; | |
| + unsigned short luma_ph_incr_V_low; | |
| + unsigned short luma_ph_incr_V_high; | |
| + unsigned short luma_ph_incr_H_low; | |
| + unsigned short luma_ph_incr_H_high; | |
| + unsigned short chroma_ph_incr_V_low; | |
| + unsigned short chroma_ph_incr_V_high; | |
| + unsigned short chroma_ph_incr_H_low; | |
| + unsigned short chroma_ph_incr_H_high; | |
| } __attribute__((packed)) videnc_cmd_digital_zoom; | |
| /* | |
| * Command to configure digital stabilization parameters | |
| */ | |
| #define VIDENC_CMD_DIS_CFG_LEN \ | |
| sizeof(videnc_cmd_dis_cfg) | |
| typedef struct { | |
| - unsigned short cmd_id; | |
| - unsigned short image_stab_subf_start_row_col; | |
| - unsigned short image_stab_subf_dim; | |
| - unsigned short image_stab_info_0; | |
| + unsigned short cmd_id; | |
| + unsigned short image_stab_subf_start_row_col; | |
| + unsigned short image_stab_subf_dim; | |
| + unsigned short image_stab_info_0; | |
| } __attribute__((packed)) videnc_cmd_dis_cfg; | |
| #endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5vfecmdi.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5vfecmdi.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5vfecmdi.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5vfecmdi.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,47 +1,47 @@ | |
| #ifndef QDSP5VFECMDI_H | |
| #define QDSP5VFECMDI_H | |
| /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | |
| V F E I N T E R N A L C O M M A N D S | |
| GENERAL DESCRIPTION | |
| - This file contains defintions of format blocks of commands | |
| + This file contains defintions of format blocks of commands | |
| that are accepted by VFE Task | |
| REFERENCES | |
| None | |
| EXTERNALIZED FUNCTIONS | |
| None | |
| Copyright (c) 1992-2009, Code Aurora Forum. All rights reserved. | |
| This software is licensed under the terms of the GNU General Public | |
| License version 2, as published by the Free Software Foundation, and | |
| may be copied, distributed, and modified under those terms. | |
| - | |
| + | |
| This program is distributed in the hope that it will be useful, | |
| but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| GNU General Public License for more details. | |
| *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | |
| /*=========================================================================== | |
| EDIT HISTORY FOR FILE | |
| This section contains comments describing changes made to this file. | |
| Notice that changes are listed in reverse chronological order. | |
| - | |
| -$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5vfecmdi.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | |
| -Revision History: | |
| - | |
| + | |
| +$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5vfecmdi.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | |
| +Revision History: | |
| + | |
| when who what, where, why | |
| -------- --- ---------------------------------------------------------- | |
| 06/12/08 sv initial version | |
| ===========================================================================*/ | |
| /****************************************************************************** | |
| * Commands through vfeCommandScaleQueue | |
| *****************************************************************************/ | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5vfemsg.h kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5vfemsg.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/qdsp5vfemsg.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/qdsp5vfemsg.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,47 +1,47 @@ | |
| #ifndef QDSP5VFEMSGI_H | |
| #define QDSP5VFEMSGI_H | |
| /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | |
| V F E I N T E R N A L M E S S A G E S | |
| GENERAL DESCRIPTION | |
| - This file contains defintions of format blocks of commands | |
| + This file contains defintions of format blocks of commands | |
| that are sent by VFE Task | |
| REFERENCES | |
| None | |
| EXTERNALIZED FUNCTIONS | |
| None | |
| Copyright (c) 1992-2009, Code Aurora Forum. All rights reserved. | |
| This software is licensed under the terms of the GNU General Public | |
| License version 2, as published by the Free Software Foundation, and | |
| may be copied, distributed, and modified under those terms. | |
| - | |
| + | |
| This program is distributed in the hope that it will be useful, | |
| but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| GNU General Public License for more details. | |
| *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | |
| /*=========================================================================== | |
| EDIT HISTORY FOR FILE | |
| This section contains comments describing changes made to this file. | |
| Notice that changes are listed in reverse chronological order. | |
| - | |
| -$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5vfemsg.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | |
| -Revision History: | |
| - | |
| + | |
| +$Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5vfemsg.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | |
| +Revision History: | |
| + | |
| when who what, where, why | |
| -------- --- ---------------------------------------------------------- | |
| 06/12/08 sv initial version | |
| ===========================================================================*/ | |
| /* | |
| * Message to acknowledge CMD_VFE_REST command | |
| @@ -96,17 +96,17 @@ | |
| sizeof(vfe_msg_snapshot_done) | |
| typedef struct { | |
| } __attribute__((packed)) vfe_msg_snapshot_done; | |
| /* | |
| - * Message to notify ARM that illegal cmd was received and | |
| + * Message to notify ARM that illegal cmd was received and | |
| * system is in the IDLE state | |
| */ | |
| #define VFE_MSG_ILLEGAL_CMD 0x0005 | |
| #define VFE_MSG_ILLEGAL_CMD_LEN \ | |
| sizeof(vfe_msg_illegal_cmd) | |
| typedef struct { | |
| @@ -123,34 +123,34 @@ | |
| typedef struct { | |
| unsigned int op1_buf_y_addr; | |
| unsigned int op1_buf_cbcr_addr; | |
| unsigned int black_level_even_col; | |
| unsigned int black_level_odd_col; | |
| unsigned int defect_pixels_detected; | |
| unsigned int asf_max_edge; | |
| -} __attribute__((packed)) vfe_msg_op1; | |
| +} __attribute__((packed)) vfe_msg_op1; | |
| /* | |
| * Message to notify ARM that op2 buf is full and ready | |
| */ | |
| #define VFE_MSG_OP2 0x0007 | |
| #define VFE_MSG_OP2_LEN sizeof(vfe_msg_op2) | |
| typedef struct { | |
| unsigned int op2_buf_y_addr; | |
| unsigned int op2_buf_cbcr_addr; | |
| unsigned int black_level_even_col; | |
| unsigned int black_level_odd_col; | |
| unsigned int defect_pixels_detected; | |
| unsigned int asf_max_edge; | |
| -} __attribute__((packed)) vfe_msg_op2; | |
| +} __attribute__((packed)) vfe_msg_op2; | |
| /* | |
| * Message to notify ARM that autofocus(af) stats are ready | |
| */ | |
| #define VFE_MSG_STATS_AF 0x0008 | |
| #define VFE_MSG_STATS_AF_LEN sizeof(vfe_msg_stats_af) | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/snd_adie.h kernel/arch/arm/mach-msm/include/mach/qdsp5/snd_adie.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp5/snd_adie.h 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp5/snd_adie.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -0,0 +1,101 @@ | |
| +/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| + * | |
| + * Redistribution and use in source and binary forms, with or without | |
| + * modification, are permitted provided that the following conditions are met: | |
| + * * Redistributions of source code must retain the above copyright | |
| + * notice, this list of conditions and the following disclaimer. | |
| + * * Redistributions in binary form must reproduce the above copyright | |
| + * notice, this list of conditions and the following disclaimer in the | |
| + * documentation and/or other materials provided with the distribution. | |
| + * * Neither the name of Code Aurora nor | |
| + * the names of its contributors may be used to endorse or promote | |
| + * products derived from this software without specific prior written | |
| + * permission. | |
| + * | |
| + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| + * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR | |
| + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, | |
| + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, | |
| + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; | |
| + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
| + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
| + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| + */ | |
| + | |
| +#ifndef __SND_ADIE_SVC_H_ | |
| +#define __SND_ADIE_SVC_H_ | |
| + | |
| +#define ADIE_SVC_PROG 0x30000002 | |
| +#define ADIE_SVC_VERS 0x00020003 | |
| + | |
| +#define ADIE_SVC_CLIENT_STATUS_FUNC_PTR_TYPE_PROC 0xFFFFFF01 | |
| +#define SND_ADIE_SVC_CLIENT_REGISTER_PROC 34 | |
| +#define SND_ADIE_SVC_CONFIG_ADIE_BLOCK_PROC 35 | |
| +#define SND_ADIE_SVC_CLIENT_DEREGISTER_PROC 36 | |
| + | |
| +#define ADIE_SVC_MAX_CLIENTS 5 | |
| + | |
| +enum adie_svc_client_operation{ | |
| + ADIE_SVC_REGISTER_CLIENT, | |
| + ADIE_SVC_DEREGISTER_CLIENT, | |
| + ADIE_SVC_CONFIG_ADIE_BLOCK, | |
| +}; | |
| + | |
| +enum adie_svc_status_type{ | |
| + ADIE_SVC_STATUS_SUCCESS, | |
| + ADIE_SVC_STATUS_FAILURE, | |
| + ADIE_SVC_STATUS_INUSE | |
| +}; | |
| + | |
| +enum adie_block_enum_type{ | |
| + MIC_BIAS, | |
| + HSSD, | |
| + HPH_PA | |
| +}; | |
| + | |
| +enum adie_config_enum_type{ | |
| + DISABLE, | |
| + ENABLE | |
| +}; | |
| + | |
| +struct adie_svc_client{ | |
| + int client_id; | |
| + int cb_id; | |
| + enum adie_svc_status_type status; | |
| + bool adie_svc_cb_done; | |
| + struct mutex lock; | |
| + wait_queue_head_t wq; | |
| + struct msm_rpc_client *rpc_client; | |
| +}; | |
| + | |
| +struct adie_svc_client_register_cb_cb_args { | |
| + int cb_id; | |
| + uint32_t size; | |
| + int client_id; | |
| + enum adie_block_enum_type adie_block; | |
| + enum adie_svc_status_type status; | |
| + enum adie_svc_client_operation client_operation; | |
| +}; | |
| + | |
| +struct adie_svc_client_register_cb_args { | |
| + int cb_id; | |
| +}; | |
| + | |
| +struct adie_svc_client_deregister_cb_args { | |
| + int client_id; | |
| +}; | |
| + | |
| +struct adie_svc_config_adie_block_cb_args { | |
| + int client_id; | |
| + enum adie_block_enum_type adie_block; | |
| + enum adie_config_enum_type config; | |
| +}; | |
| + | |
| +int adie_svc_get(void); | |
| +int adie_svc_put(int id); | |
| +int adie_svc_config_adie_block(int id, | |
| + enum adie_block_enum_type adie_block_type, bool enable); | |
| +#endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp6/msm8k_adie_codec_dev.h kernel/arch/arm/mach-msm/include/mach/qdsp6/msm8k_adie_codec_dev.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp6/msm8k_adie_codec_dev.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp6/msm8k_adie_codec_dev.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,8 +1,24 @@ | |
| +/* | |
| + * Copyright (C) 2009 SHARP CORPORATION All rights reserved. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + * This code is based on msm8k_adie_codec_dev.h. | |
| + * The original copyright and notice are described below. | |
| + */ | |
| + | |
| /* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| @@ -72,8 +88,15 @@ | |
| /* Concurrency Profiles */ | |
| #define DAL_ADIE_CODEC_SPKR_STEREO_HDPH_MONO_RX 0x01073d83 | |
| #define DAL_ADIE_CODEC_SPKR_MONO_HDPH_MONO_RX 0x01073d84 | |
| #define DAL_ADIE_CODEC_SPKR_MONO_HDPH_STEREO_RX 0x01073d88 | |
| #define DAL_ADIE_CODEC_SPKR_STEREO_HDPH_STEREO_RX 0x01073d89 | |
| +#define DAL_ADIE_CODEC_LINE_IN_MIC_TX 0x01074131 | |
| +#define DAL_ADIE_CODEC_HANDSETMIC_HEADSET_MIC_TX 0x01074130 | |
| +#define DAL_ADIE_CODEC_LOOPBACK_SPKR_MIC_TX 0x01074132 | |
| +#define DAL_ADIE_CODEC_LOOPBACK_HEADSET_MIC_TX 0x01074133 | |
| +#define DAL_ADIE_CODEC_LOOPBACK_EAR_RX 0x01074134 | |
| +#define DAL_ADIE_CODEC_LOOPBACK_HEADPHONE_RX 0x01074135 | |
| +#define DAL_ADIE_CODEC_LOOPBACK_SPKR_RX 0x01074136 | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp6/msm8k_adsp_audio_command.h kernel/arch/arm/mach-msm/include/mach/qdsp6/msm8k_adsp_audio_command.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp6/msm8k_adsp_audio_command.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp6/msm8k_adsp_audio_command.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,9 +1,9 @@ | |
| -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| +/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| * documentation and/or other materials provided with the distribution. | |
| @@ -362,20 +362,24 @@ | |
| /* 0 == WNR disabled, 1 == WNR enabled */ | |
| u32 wnr; | |
| } __attribute__ ((packed)); | |
| struct adsp_audio_set_dev_equalizer_command { | |
| /* destination address, used in routing */ | |
| struct adsp_audio_address dest; | |
| + /* source address, used in routing */ | |
| + struct adsp_audio_address source; | |
| /* command data, used for processing */ | |
| struct adsp_audio_command_data cmd; | |
| /* read-only client data */ | |
| struct adsp_audio_client_data client_data; | |
| + /* pad header to 64byte aligned/also match event status */ | |
| + u32 padding; | |
| /* payload */ | |
| /* ADSP Device ID */ | |
| u32 device_id; | |
| /* 0 == Off, 1 == On */ | |
| u32 enable; | |
| /* Number of consequtive bands specified */ | |
| u32 num_bands; | |
| @@ -524,20 +528,24 @@ | |
| /* 0 == UnMute, 1 == Mute */ | |
| u32 mute; | |
| } __attribute__ ((packed)); | |
| struct adsp_audio_set_equalizer_command { | |
| /* destination address, used in routing */ | |
| struct adsp_audio_address dest; | |
| + /* source address, used in routing */ | |
| + struct adsp_audio_address source; | |
| /* command data, used for processing */ | |
| struct adsp_audio_command_data cmd; | |
| /* read-only client data */ | |
| struct adsp_audio_client_data client_data; | |
| + /* pad header to 64byte aligned/also match event status */ | |
| + u32 padding; | |
| /* payload */ | |
| /* 0 == Off, 1 == On */ | |
| u32 enable; | |
| /* Number of consequtive bands specified */ | |
| u32 num_bands; | |
| struct adsp_audio_eq_band eq_bands[ADSP_AUDIO_MAX_EQ_BANDS]; | |
| } __attribute__ ((packed)); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp6/msm8k_ard.h kernel/arch/arm/mach-msm/include/mach/qdsp6/msm8k_ard.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp6/msm8k_ard.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp6/msm8k_ard.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,9 +1,9 @@ | |
| -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| +/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| * documentation and/or other materials provided with the distribution. | |
| @@ -43,16 +43,19 @@ | |
| SAMPLE_RATE_44100, | |
| SAMPLE_RATE_48000, | |
| SAMPLE_RATE_MAX | |
| }; | |
| void print_data(u32 session_id); | |
| +void audio_prevent_sleep(s32 session_id); | |
| +void audio_allow_sleep(s32 session_id); | |
| + | |
| s32 cad_ard_init(struct cad_func_tbl_type **func_ptr_tbl); | |
| s32 ard_open(s32 session_id, | |
| struct cad_open_struct_type *open_param); | |
| s32 ard_close(s32 session_id); | |
| s32 ard_ioctl(s32 session_id, u32 cmd_code, void *cmd_buf, u32 cmd_len); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp6/msm8k_ardi.h kernel/arch/arm/mach-msm/include/mach/qdsp6/msm8k_ardi.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp6/msm8k_ardi.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp6/msm8k_ardi.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,9 +1,9 @@ | |
| -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| +/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| * documentation and/or other materials provided with the distribution. | |
| @@ -104,16 +104,17 @@ | |
| u32 stream_count; | |
| struct mutex device_mutex; | |
| u32 device_sample_rate; | |
| }; | |
| struct ard_state_struct_type { | |
| struct ard_device_struct_type ard_device[MAX_NUM_DEVICES]; | |
| struct mutex ard_state_machine_mutex; | |
| + s32 num_active_stream_sessions; | |
| u32 def_tx_device; | |
| u32 def_rx_device; | |
| u32 new_tx_device; | |
| u32 new_rx_device; | |
| }; | |
| enum ard_ret_enum_type valid_session_present(u32 dev_id); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp6/msm8k_cad_devices.h kernel/arch/arm/mach-msm/include/mach/qdsp6/msm8k_cad_devices.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp6/msm8k_cad_devices.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp6/msm8k_cad_devices.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,8 +1,24 @@ | |
| +/* | |
| + * Copyright (C) 2009 SHARP CORPORATION All rights reserved. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + * This code is based on msm8k_cad_devices.h. | |
| + * The original copyright and notice are described below. | |
| + */ | |
| + | |
| /* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| @@ -62,17 +78,28 @@ | |
| /* AUXPGA */ | |
| #define CAD_HW_DEVICE_ID_HEADSET_SPKR_STEREO_LB 0x22 | |
| #define CAD_HW_DEVICE_ID_HEADSET_SPKR_MONO_LB 0x23 | |
| #define CAD_HW_DEVICE_ID_SPEAKER_SPKR_STEREO_LB 0x24 | |
| #define CAD_HW_DEVICE_ID_SPEAKER_SPKR_MONO_LB 0x25 | |
| #define CAD_HW_DEVICE_ID_NULL_RX 0x2A | |
| -#define CAD_HW_DEVICE_ID_MAX_NUM 0x2F | |
| +#define CAD_HW_DEVICE_ID_I2S_RX_SPKR 0x30 | |
| +#define CAD_HW_DEVICE_ID_I2S_RX_HEADSET 0x31 | |
| +#define CAD_HW_DEVICE_ID_HANDSETMIC_HEADSET_MIC 0x32 | |
| +#define CAD_HW_DEVICE_ID_I2S_RX_HANDSETMIC_HEADSET 0x33 | |
| +#define CAD_HW_DEVICE_ID_LINE_IN_MIC 0x34 | |
| +#define CAD_HW_DEVICE_ID_I2S_RX_FAREND_TERMINAL 0x35 | |
| +#define CAD_HW_DEVICE_ID_LOOPBACK_SPKR_MIC 0x50 | |
| +#define CAD_HW_DEVICE_ID_LOOPBACK_HEADSET_MIC 0x51 | |
| +#define CAD_HW_DEVICE_ID_LOOPBACK_EAR 0x52 | |
| +#define CAD_HW_DEVICE_ID_LOOPBACK_HEADPHONE 0x53 | |
| +#define CAD_HW_DEVICE_ID_LOOPBACK_SPKR 0x54 | |
| +#define CAD_HW_DEVICE_ID_MAX_NUM 0x55 | |
| #define CAD_HW_DEVICE_ID_INVALID 0xFF | |
| #define CAD_RX_DEVICE 0x00 | |
| #define CAD_TX_DEVICE 0x01 | |
| #define CAD_AUXPGA_DEVICE 0x02 | |
| #endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/qdsp6/msm8k_cad_volume.h kernel/arch/arm/mach-msm/include/mach/qdsp6/msm8k_cad_volume.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/qdsp6/msm8k_cad_volume.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/qdsp6/msm8k_cad_volume.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,8 +1,24 @@ | |
| +/* | |
| + * Copyright (C) 2009 SHARP CORPORATION All rights reserved. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + * This code is based on msm8k_cad_volume.h. | |
| + * The original copyright and notice are described below. | |
| + */ | |
| + | |
| /* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| @@ -23,31 +39,58 @@ | |
| * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
| * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| * | |
| */ | |
| #include <mach/qdsp6/msm8k_cad_module.h> | |
| -#define CAD_STREAM_MAX_GAIN 1200 | |
| -#define CAD_STREAM_MIN_GAIN -4000 | |
| +#define CAD_STREAM_MAX_GAIN 450 | |
| +#define CAD_STREAM_MIN_GAIN -2050 | |
| + | |
| +#define CAD_STREAM_MSM8K_PCM_GAIN -150 | |
| #define CAD_DEVICE_HANDSET_MAX_GAIN 1100 | |
| #define CAD_DEVICE_HANDSET_MIN_GAIN -700 | |
| #define CAD_DEVICE_HEADSET_MAX_GAIN 400 | |
| #define CAD_DEVICE_HEADSET_MIN_GAIN -1400 | |
| #define CAD_DEVICE_SPEAKER_MAX_GAIN 500 | |
| #define CAD_DEVICE_SPEAKER_MIN_GAIN -700 | |
| -#define CAD_DEVICE_BT_SCO_MAX_GAIN 400 | |
| +#define CAD_DEVICE_BT_SCO_MAX_GAIN -2000 | |
| #define CAD_DEVICE_BT_SCO_MIN_GAIN -1400 | |
| #define CAD_DEVICE_BT_A2DP_MAX_GAIN 400 | |
| #define CAD_DEVICE_BT_A2DP_MIN_GAIN -1400 | |
| #define CAD_DEVICE_TTY_MAX_GAIN 400 | |
| #define CAD_DEVICE_TTY_MIN_GAIN -1400 | |
| +#define CAD_DEVICE_I2S_MAX_GAIN -150 | |
| +#define CAD_DEVICE_I2S_MIN_GAIN -700 | |
| + | |
| +#define CAD_DEVICE_LOOPBACK_SPKR_MIC_MAX_GAIN 1100 | |
| +#define CAD_DEVICE_LOOPBACK_SPKR_MIC_MIN_GAIN -700 | |
| +#define CAD_DEVICE_LOOPBACK_HEADSET_MIC_MAX_GAIN 400 | |
| +#define CAD_DEVICE_LOOPBACK_HEADSET_MIC_MIN_GAIN -1400 | |
| +#define CAD_DEVICE_LOOPBACK_EAR_MAX_GAIN 1100 | |
| +#define CAD_DEVICE_LOOPBACK_EAR_MIN_GAIN -700 | |
| +#define CAD_DEVICE_LOOPBACK_HEADPHONE_MAX_GAIN 400 | |
| +#define CAD_DEVICE_LOOPBACK_HEADPHONE_MIN_GAIN -1400 | |
| +#define CAD_DEVICE_LOOPBACK_SPKR_MAX_GAIN 500 | |
| +#define CAD_DEVICE_LOOPBACK_SPKR_MIN_GAIN -700 | |
| +#define CAD_DEVICE_I2S_RX_SPKR_MAX_GAIN -150 | |
| +#define CAD_DEVICE_I2S_RX_SPKR_MIN_GAIN -700 | |
| +#define CAD_DEVICE_I2S_RX_HEADSET_MAX_GAIN -150 | |
| +#define CAD_DEVICE_I2S_RX_HEADSET_MIN_GAIN -700 | |
| +#define CAD_DEVICE_HANDSETMIC_HEADSET_MIC_MAX_GAIN 1100 | |
| +#define CAD_DEVICE_HANDSETMIC_HEADSET_MIC_MIN_GAIN -700 | |
| +#define CAD_DEVICE_I2S_RX_HANDSETMIC_HEADSET_MAX_GAIN -150 | |
| +#define CAD_DEVICE_I2S_RX_HANDSETMIC_HEADSET_MIN_GAIN -700 | |
| +#define CAD_DEVICE_LINE_IN_MIC_MAX_GAIN 500 | |
| +#define CAD_DEVICE_LINE_IN_MIC_MIN_GAIN -700 | |
| +#define CAD_DEVICE_I2S_RX_FAREND_TERMINAL_MAX_GAIN -8500 | |
| +#define CAD_DEVICE_I2S_RX_FAREND_TERMINAL_MIN_GAIN -8500 | |
| #define CAD_FILTER_CONFIG_DEVICE_VOLUME_VERID 0x1000 | |
| #define CAD_FILTER_CONFIG_STREAM_VOLUME_VERID 0x1000 | |
| #define CAD_FILTER_CONFIG_DEVICE_MUTE_VERID 0x1000 | |
| #define CAD_FILTER_CONFIG_STREAM_MUTE_VERID 0x1000 | |
| #define CAD_FILTER_CONFIG_DEVICE_VOLUME 0x01087472 | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/rpc_hsusb.h kernel/arch/arm/mach-msm/include/mach/rpc_hsusb.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/rpc_hsusb.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/rpc_hsusb.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -31,16 +31,28 @@ | |
| int msm_hsusb_send_productID(uint32_t product_id); | |
| int msm_hsusb_send_serial_number(char *serial_number); | |
| int msm_hsusb_is_serial_num_null(uint32_t val); | |
| int msm_hsusb_reset_rework_installed(void); | |
| int msm_hsusb_enable_pmic_ulpidata0(void); | |
| int msm_hsusb_disable_pmic_ulpidata0(void); | |
| int msm_hsusb_rpc_close(void); | |
| +int msm_hsusb_set_chgen(uint32_t enable); | |
| +int msm_hsusb_get_chgen(void); | |
| + | |
| +int msm_hsusb_set_qxdmen(uint32_t enable); | |
| +int msm_hsusb_get_qxdmen(void); | |
| + | |
| +int msm_hsusb_enable_ldo_off(uint32_t enable); | |
| +int msm_hsusb_register_vbus_sn(void (*callback)(int online)); | |
| +void msm_hsusb_unregister_vbus_sn(void (*callback)(int online)); | |
| + | |
| +int msm_hsusb_get_boot_mode(void); | |
| + | |
| int msm_chg_rpc_connect(void); | |
| int msm_chg_usb_charger_connected(uint32_t type); | |
| int msm_chg_usb_i_is_available(uint32_t sample); | |
| int msm_chg_usb_i_is_not_available(void); | |
| int msm_chg_usb_charger_disconnected(void); | |
| int msm_chg_rpc_close(void); | |
| int msm_fsusb_rpc_init(struct msm_otg_ops *ops); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/rpc_server_handset.h kernel/arch/arm/mach-msm/include/mach/rpc_server_handset.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/rpc_server_handset.h 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/rpc_server_handset.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -0,0 +1,34 @@ | |
| +/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| + * | |
| + * Redistribution and use in source and binary forms, with or without | |
| + * modification, are permitted provided that the following conditions are met: | |
| + * * Redistributions of source code must retain the above copyright | |
| + * notice, this list of conditions and the following disclaimer. | |
| + * * Redistributions in binary form must reproduce the above copyright | |
| + * notice, this list of conditions and the following disclaimer in the | |
| + * documentation and/or other materials provided with the distribution. | |
| + * * Neither the name of Code Aurora nor | |
| + * the names of its contributors may be used to endorse or promote | |
| + * products derived from this software without specific prior written | |
| + * permission. | |
| + * | |
| + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| + * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR | |
| + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, | |
| + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, | |
| + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; | |
| + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
| + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
| + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| + * | |
| + */ | |
| + | |
| +#ifndef __ASM_ARCH_MSM_RPC_SERVER_HANDSET_H | |
| +#define __ASM_ARCH_MSM_RPC_SERVER_HANDSET_H | |
| + | |
| +void report_headset_status(bool connected); | |
| + | |
| +#endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/sh_sys_manager.h kernel/arch/arm/mach-msm/include/mach/sh_sys_manager.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/sh_sys_manager.h 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/sh_sys_manager.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -0,0 +1,15 @@ | |
| +/* arch/arm/mach-msm/include/mach/sh_sys_manager.h | |
| + * | |
| + * Copyright (C) 2009 Sharp Corporation | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + */ | |
| +unsigned short SH_GetHardwareRevision( void ); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/sharp_smem.h kernel/arch/arm/mach-msm/include/mach/sharp_smem.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/sharp_smem.h 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/sharp_smem.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -0,0 +1,54 @@ | |
| +/* arch/arm/mach-msm/include/mach/sharp_smem.h | |
| + * | |
| + * Copyright (C) 2009 Sharp Corporation | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + */ | |
| + | |
| +#include <sharp/shdisp_kerl.h> | |
| + | |
| +#include "shrlog_type.h" | |
| + | |
| +typedef struct | |
| +{ | |
| + unsigned long sh_filesystem_init; /* file system innitialize flag */ | |
| + unsigned long sh_hw_revision; /* hardware revision number */ | |
| + unsigned long sh_model_type; /* model type information */ | |
| + unsigned long sh_boot_mode; /* power up mode information */ | |
| + unsigned long sh_softupdate_mode; /* software update mode */ | |
| + unsigned long sh_pwr_on_status; /* power on status information from pmic */ | |
| + struct shdisp_boot_context shdisp_boot_ctx; | |
| + unsigned long shdiag_FlagData; /* shdiag flag information */ | |
| + unsigned short shdiag_BootMode; /* shdiag Powerup mode */ | |
| + unsigned char shdiag_FirstBoot; /* shdiag FirstBoot information */ | |
| + unsigned char rec[3]; /* reserved */ | |
| + unsigned char shdiag_AdjChashe[16]; /* shdiag Adj chashe information */ | |
| + unsigned long support_FlagData; /* support flag information */ | |
| + int sh_sleep_test_mode; | |
| + unsigned char shsecure_PassPhrase[32]; | |
| + unsigned char bootimg_header[2048]; /* APPSBOOT header information */ | |
| + shrlog_reset_info smem_reset_info; /* Reset Log information structure */ | |
| + unsigned char sh_i2c_access_dev; /* I2C access device */ | |
| + unsigned char sh_i2c_first_err_dev; /* I2C first error device*/ | |
| + unsigned char sh_i2c_last_success_dev; /* I2C final success device*/ | |
| + unsigned short sh_i2c_err_counter; /* I2C error counter */ | |
| + unsigned long fota_boot_mode; /* FOTA mode information */ | |
| + unsigned char pImeiData[9]; /* W-CDMA Imei data */ | |
| + | |
| +} sharp_smem_common_type; | |
| + | |
| +/*============================================================================= | |
| + | |
| +FUNCTION sh_smem_get_common_address | |
| + | |
| +=============================================================================*/ | |
| +sharp_smem_common_type *sh_smem_get_common_address( void ); | |
| + | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/shrlog_type.h kernel/arch/arm/mach-msm/include/mach/shrlog_type.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/shrlog_type.h 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/shrlog_type.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -0,0 +1,99 @@ | |
| +/* | |
| + * Copyright (C) 2009 Sharp. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + */ | |
| + | |
| +#ifndef SHRLOG_TYPE_H /* Double definition is prevented */ | |
| +#define SHRLOG_TYPE_H | |
| + | |
| +#define OEMLOG_MAGIC_NUM 0x8931baca | |
| +#define OEMLOG_FATAL_NUM 0x0930abe4 | |
| +#define OEMLOG_VERSION 4 | |
| +#define SH_VER 8 | |
| +#define TASK_NAME_MAX 11 | |
| +#define REG_NUMBER 17 | |
| +#define MAX_STACK 120 | |
| +#define MAX_STACK_TRACE 5 | |
| +#define MAX_TCB 100 | |
| +#define MAX_RUNNING_TASK 10 | |
| +#define MAX_RESETTYPE 7 | |
| +#define MAX_RESETHIST 100 | |
| +#define MAX_CRITSECT 16 | |
| +#define SMEM_LOG_TABLE_SIZE 120 | |
| +#define SMEM_LOG_SIZE (20 * 2000) | |
| +#define ERR_DATA_SIZE 2144 | |
| + | |
| +typedef struct | |
| +{ | |
| + char tcb_task_name[TASK_NAME_MAX]; | |
| + unsigned long tcb_add; | |
| + unsigned long tcb_sp; | |
| + unsigned long tcb_sigs; | |
| + unsigned long tcb_wait; | |
| + unsigned long tcb_pri; | |
| + unsigned long tcb_trace[MAX_STACK_TRACE]; | |
| +}tcb_info_struct; | |
| + | |
| +typedef struct | |
| +{ | |
| + char task_name[TASK_NAME_MAX]; | |
| + unsigned long reg[REG_NUMBER]; | |
| + unsigned long stk[MAX_STACK]; | |
| + unsigned long cs_num; | |
| + unsigned long cs_stack[MAX_CRITSECT]; | |
| +}task_info_struct; | |
| + | |
| +typedef struct | |
| +{ | |
| + unsigned long magic_num; | |
| + unsigned long log_version; | |
| + char dev_id[SH_VER]; | |
| + char sh_version[SH_VER]; | |
| + unsigned long reset_time; | |
| + unsigned long curr_mode; | |
| + unsigned long reset_reason; | |
| + char err_info[ERR_DATA_SIZE]; | |
| +} shrlog_system_info; | |
| + | |
| +typedef struct | |
| +{ | |
| + unsigned long sh_boot_flag; | |
| + unsigned long intlock; | |
| + task_info_struct curr_task; | |
| + task_info_struct running_info[MAX_RUNNING_TASK]; | |
| + unsigned long running_task_over; | |
| + tcb_info_struct tcb_info[MAX_TCB]; | |
| + unsigned char detect_info; | |
| + unsigned long last_timer_item; | |
| + unsigned long last_timer_tcb; | |
| + unsigned long last_timer_sig; | |
| + unsigned long last_timer_func1; | |
| + unsigned long last_timer_func2; | |
| +} shrlog_boot_info; | |
| + | |
| +typedef struct | |
| +{ | |
| + unsigned char smem_log_table[SMEM_LOG_TABLE_SIZE]; | |
| + unsigned char smem_log[SMEM_LOG_SIZE]; | |
| + unsigned long smem_log_idx; | |
| +} shrlog_smem_info; | |
| + | |
| +typedef struct | |
| +{ | |
| + char log_hdr[32]; | |
| + shrlog_system_info system_info; | |
| + shrlog_boot_info boot_info; | |
| + shrlog_smem_info smem_info; | |
| + unsigned char pad[2048]; | |
| +} shrlog_reset_info; | |
| + | |
| +#endif /* SHRLOG_TYPE_H */ | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/include/mach/usbdiag.h kernel/arch/arm/mach-msm/include/mach/usbdiag.h | |
| --- kernel-msm/arch/arm/mach-msm/include/mach/usbdiag.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/include/mach/usbdiag.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -16,29 +16,32 @@ | |
| * See the GNU General Public License for more details. | |
| * You should have received a copy of the GNU General Public License | |
| * along with this program; if not, you can find it at http://www.fsf.org | |
| */ | |
| #ifndef _DRIVERS_USB_DIAG_H_ | |
| #define _DRIVERS_USB_DIAG_H_ | |
| #define ENOREQ -1 | |
| +struct diag_request { | |
| + char *buf; | |
| + int length; | |
| + int actual; | |
| + int status; | |
| + void *context; | |
| +}; | |
| struct diag_operations { | |
| int (*diag_connect)(void); | |
| int (*diag_disconnect)(void); | |
| - int (*diag_char_write_complete)(unsigned char * , int, int); | |
| - int (*diag_char_read_complete)(unsigned char *, int , int); | |
| + int (*diag_char_write_complete)(struct diag_request *); | |
| + int (*diag_char_read_complete)(struct diag_request *); | |
| }; | |
| -struct diag_request { | |
| - char *buf; | |
| - int length; | |
| -}; | |
| int diag_open(int); | |
| void diag_close(void); | |
| -int diag_read(unsigned char *, int); | |
| -int diag_write(unsigned char *, int); | |
| +int diag_read(struct diag_request *); | |
| +int diag_write(struct diag_request *); | |
| int diag_usb_register(struct diag_operations *); | |
| int diag_usb_unregister(void); | |
| int diag_read_from_cb(unsigned char * , int); | |
| #endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/io.c kernel/arch/arm/mach-msm/io.c | |
| --- kernel-msm/arch/arm/mach-msm/io.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/io.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -53,17 +53,17 @@ | |
| iotable_init(io_desc, size); | |
| } | |
| #if defined(CONFIG_ARCH_MSM7X01A) || defined(CONFIG_ARCH_MSM7X27) \ | |
| || defined(CONFIG_ARCH_MSM7X25) | |
| static struct map_desc msm_io_desc[] __initdata = { | |
| MSM_DEVICE(VIC), | |
| MSM_DEVICE(CSR), | |
| - MSM_DEVICE(TMR), | |
| + MSM_DEVICE(GPT), | |
| MSM_DEVICE(DMOV), | |
| MSM_DEVICE(GPIO1), | |
| MSM_DEVICE(GPIO2), | |
| MSM_DEVICE(CLK_CTL), | |
| MSM_DEVICE(AD5), | |
| MSM_DEVICE(MDC), | |
| #ifdef CONFIG_MSM_DEBUG_UART | |
| MSM_DEVICE(DEBUG_UART), | |
| @@ -93,17 +93,17 @@ | |
| msm_map_io(msm_io_desc, ARRAY_SIZE(msm_io_desc)); | |
| } | |
| #endif | |
| #ifdef CONFIG_ARCH_QSD8X50 | |
| static struct map_desc qsd8x50_io_desc[] __initdata = { | |
| MSM_DEVICE(VIC), | |
| MSM_DEVICE(CSR), | |
| - MSM_DEVICE(TMR), | |
| + MSM_DEVICE(GPT), | |
| MSM_DEVICE(DMOV), | |
| MSM_DEVICE(GPIO1), | |
| MSM_DEVICE(GPIO2), | |
| MSM_DEVICE(CLK_CTL), | |
| MSM_DEVICE(SIRC), | |
| MSM_DEVICE(SCPLL), | |
| MSM_DEVICE(AD5), | |
| MSM_DEVICE(MDC), | |
| @@ -122,17 +122,17 @@ | |
| msm_map_io(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc)); | |
| } | |
| #endif /* CONFIG_ARCH_QSD8X50 */ | |
| #ifdef CONFIG_ARCH_MSM7X30 | |
| static struct map_desc msm7x30_io_desc[] __initdata = { | |
| MSM_DEVICE(VIC), | |
| MSM_DEVICE(CSR), | |
| - MSM_DEVICE(TMR), | |
| + MSM_DEVICE(GPT), | |
| MSM_DEVICE(DMOV), | |
| MSM_DEVICE(GPIO1), | |
| MSM_DEVICE(GPIO2), | |
| MSM_DEVICE(CLK_CTL), | |
| MSM_DEVICE(SIRC), | |
| MSM_DEVICE(SCPLL), | |
| MSM_DEVICE(AD5), | |
| MSM_DEVICE(MDC), | |
| @@ -152,17 +152,17 @@ | |
| msm_map_io(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc)); | |
| } | |
| #endif /* CONFIG_ARCH_MSM7X30 */ | |
| #ifdef CONFIG_MACH_QSD8X50_COMET | |
| static struct map_desc comet_io_desc[] __initdata = { | |
| MSM_DEVICE(VIC), | |
| MSM_DEVICE(CSR), | |
| - MSM_DEVICE(TMR), | |
| + MSM_DEVICE(GPT), | |
| MSM_DEVICE(DMOV), | |
| MSM_DEVICE(GPIO1), | |
| MSM_DEVICE(GPIO2), | |
| MSM_DEVICE(CLK_CTL), | |
| MSM_DEVICE(SIRC), | |
| MSM_DEVICE(SCPLL), | |
| MSM_DEVICE(AD5), | |
| MSM_DEVICE(MDC), | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/keypad-surf-ffa.h kernel/arch/arm/mach-msm/keypad-surf-ffa.h | |
| --- kernel-msm/arch/arm/mach-msm/keypad-surf-ffa.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/keypad-surf-ffa.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -15,15 +15,17 @@ | |
| #ifndef _KEYPAD_SURF_FFA_H | |
| #define _KEYPAD_SURF_FFA_H | |
| #include <linux/input.h> | |
| #if defined(CONFIG_SURF_FFA_GPIO_KEYPAD) | |
| struct input_dev *msm_keypad_get_input_dev(void); | |
| #else | |
| +#if 0 | |
| static struct input_dev *msm_keypad_get_input_dev(void) | |
| { | |
| return NULL; | |
| } | |
| #endif | |
| +#endif | |
| #endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/msm_hsusb_map.h kernel/arch/arm/mach-msm/msm_hsusb_map.h | |
| --- kernel-msm/arch/arm/mach-msm/msm_hsusb_map.h 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/msm_hsusb_map.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -0,0 +1,56 @@ | |
| +/* linux/arch/arm/mach-msm/msm_hsusb_map.h | |
| + * | |
| + * Copyright (c) 2010 Sharp Corporation. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + */ | |
| + | |
| +#ifndef __ARCH_ARM_MACH_MSM_MSM_HSUSB_MAP_H | |
| +#define __ARCH_ARM_MACH_MSM_MSM_HSUSB_MAP_H | |
| + | |
| + | |
| +#include <mach/msm_hsusb_desc.h> | |
| + | |
| + | |
| +static struct usb_function_map usb_functions_map[] = { | |
| + {"obex", 0}, | |
| + {"mdlm", 1}, | |
| + {"modem", 2}, | |
| + {"mass_storage", 3}, | |
| + {"mtp", 4}, | |
| + {"adb", 5}, | |
| + {"diag", 6}, | |
| +}; | |
| + | |
| +/* dynamic composition */ | |
| +static struct usb_composition usb_func_composition[] = { | |
| + { | |
| + .product_id = USB_PID_MODE1, | |
| + .functions = 0x67, /* 1100111 */ | |
| + }, | |
| + | |
| + { | |
| + .product_id = USB_PID_MODE2, | |
| + .functions = 0x70, /* 1110000 */ | |
| + }, | |
| + | |
| + { | |
| + .product_id = USB_PID_MODE3, | |
| + .functions = 0x68, /* 1101000 */ | |
| + }, | |
| + | |
| + { | |
| + .product_id = USB_PID_MODE4, | |
| + .functions = 0x61, /* 1100001 */ | |
| + }, | |
| +}; | |
| + | |
| +#endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/msm_vibrator.c kernel/arch/arm/mach-msm/msm_vibrator.c | |
| --- kernel-msm/arch/arm/mach-msm/msm_vibrator.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/msm_vibrator.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -1,8 +1,24 @@ | |
| +/* | |
| + * Copyright (C) 2009 SHARP CORPORATION All rights reserved. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + * This code is based on msm_vibrator.c. | |
| + * The original copyright and notice are described below. | |
| + */ | |
| + | |
| /* include/asm/mach-msm/htc_pwrsink.h | |
| * | |
| * Copyright (C) 2008 HTC Corporation. | |
| * Copyright (C) 2007 Google, Inc. | |
| * | |
| * This software is licensed under the terms of the GNU General Public | |
| * License version 2, as published by the Free Software Foundation, and | |
| * may be copied, distributed, and modified under those terms. | |
| @@ -15,122 +31,130 @@ | |
| */ | |
| #include <linux/kernel.h> | |
| #include <linux/platform_device.h> | |
| #include <linux/err.h> | |
| #include <linux/hrtimer.h> | |
| #include <../../../drivers/staging/android/timed_output.h> | |
| #include <linux/sched.h> | |
| +#if 1 | |
| +#include <mach/pmic.h> | |
| +#include <sharp/shterm_k.h> | |
| +#else | |
| #include <mach/msm_rpcrouter.h> | |
| -#define PM_LIBPROG 0x30000061 | |
| +#define PM_LIBPROG 0x30000061 | |
| #if (CONFIG_MSM_AMSS_VERSION == 6220) || (CONFIG_MSM_AMSS_VERSION == 6225) | |
| -#define PM_LIBVERS 0xfb837d0b | |
| +#define PM_LIBVERS 0xfb837d0b | |
| #else | |
| -#define PM_LIBVERS 0x10001 | |
| +#define PM_LIBVERS MSM_RPC_VERS(1,1) | |
| #endif | |
| #define HTC_PROCEDURE_SET_VIB_ON_OFF 21 | |
| -#define PMIC_VIBRATOR_LEVEL (3000) | |
| +#endif | |
| -static struct work_struct work_vibrator_on; | |
| -static struct work_struct work_vibrator_off; | |
| +#define PMIC_VIBRATOR_LEVEL (3100) | |
| + | |
| +static struct work_struct vibrator_work; | |
| static struct hrtimer vibe_timer; | |
| +static spinlock_t vibe_lock; | |
| +static int vibe_state; | |
| static void set_pmic_vibrator(int on) | |
| { | |
| +#if 1 | |
| + if (on) { | |
| + pmic_vib_mot_set_mode(PM_VIB_MOT_MODE__MANUAL); | |
| + pmic_vib_mot_set_volt(PMIC_VIBRATOR_LEVEL); | |
| + shterm_k_set_info( SHTERM_INFO_VIB, 1 ); | |
| + } else { | |
| + pmic_vib_mot_set_volt(0); | |
| + shterm_k_set_info( SHTERM_INFO_VIB, 0 ); | |
| + } | |
| +#else | |
| static struct msm_rpc_endpoint *vib_endpoint; | |
| struct set_vib_on_off_req { | |
| struct rpc_request_hdr hdr; | |
| uint32_t data; | |
| } req; | |
| if (!vib_endpoint) { | |
| vib_endpoint = msm_rpc_connect(PM_LIBPROG, PM_LIBVERS, 0); | |
| if (IS_ERR(vib_endpoint)) { | |
| printk(KERN_ERR "init vib rpc failed!\n"); | |
| vib_endpoint = 0; | |
| return; | |
| } | |
| } | |
| - | |
| if (on) | |
| req.data = cpu_to_be32(PMIC_VIBRATOR_LEVEL); | |
| else | |
| req.data = cpu_to_be32(0); | |
| msm_rpc_call(vib_endpoint, HTC_PROCEDURE_SET_VIB_ON_OFF, &req, | |
| sizeof(req), 5 * HZ); | |
| +#endif | |
| } | |
| -static void pmic_vibrator_on(struct work_struct *work) | |
| -{ | |
| - set_pmic_vibrator(1); | |
| -} | |
| - | |
| -static void pmic_vibrator_off(struct work_struct *work) | |
| -{ | |
| - set_pmic_vibrator(0); | |
| -} | |
| - | |
| -static void timed_vibrator_on(struct timed_output_dev *sdev) | |
| -{ | |
| - schedule_work(&work_vibrator_on); | |
| -} | |
| - | |
| -static void timed_vibrator_off(struct timed_output_dev *sdev) | |
| +static void update_vibrator(struct work_struct *work) | |
| { | |
| - schedule_work(&work_vibrator_off); | |
| + set_pmic_vibrator(vibe_state); | |
| } | |
| static void vibrator_enable(struct timed_output_dev *dev, int value) | |
| { | |
| + unsigned long flags; | |
| + | |
| + spin_lock_irqsave(&vibe_lock, flags); | |
| hrtimer_cancel(&vibe_timer); | |
| if (value == 0) | |
| - timed_vibrator_off(dev); | |
| + vibe_state = 0; | |
| else { | |
| value = (value > 15000 ? 15000 : value); | |
| - | |
| - timed_vibrator_on(dev); | |
| - | |
| + vibe_state = 1; | |
| hrtimer_start(&vibe_timer, | |
| - ktime_set(value / 1000, (value % 1000) * 1000000), | |
| - HRTIMER_MODE_REL); | |
| + ktime_set(value / 1000, (value % 1000) * 1000000), | |
| + HRTIMER_MODE_REL); | |
| } | |
| + spin_unlock_irqrestore(&vibe_lock, flags); | |
| + | |
| + schedule_work(&vibrator_work); | |
| } | |
| static int vibrator_get_time(struct timed_output_dev *dev) | |
| { | |
| if (hrtimer_active(&vibe_timer)) { | |
| ktime_t r = hrtimer_get_remaining(&vibe_timer); | |
| return r.tv.sec * 1000 + r.tv.nsec / 1000000; | |
| } else | |
| return 0; | |
| } | |
| static enum hrtimer_restart vibrator_timer_func(struct hrtimer *timer) | |
| { | |
| - timed_vibrator_off(NULL); | |
| + vibe_state = 0; | |
| + schedule_work(&vibrator_work); | |
| return HRTIMER_NORESTART; | |
| } | |
| static struct timed_output_dev pmic_vibrator = { | |
| .name = "vibrator", | |
| .get_time = vibrator_get_time, | |
| .enable = vibrator_enable, | |
| }; | |
| void __init msm_init_pmic_vibrator(void) | |
| { | |
| - INIT_WORK(&work_vibrator_on, pmic_vibrator_on); | |
| - INIT_WORK(&work_vibrator_off, pmic_vibrator_off); | |
| + INIT_WORK(&vibrator_work, update_vibrator); | |
| + spin_lock_init(&vibe_lock); | |
| + vibe_state = 0; | |
| hrtimer_init(&vibe_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); | |
| vibe_timer.function = vibrator_timer_func; | |
| timed_output_dev_register(&pmic_vibrator); | |
| } | |
| MODULE_DESCRIPTION("timed output pmic vibrator device"); | |
| MODULE_LICENSE("GPL"); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/pm.c kernel/arch/arm/mach-msm/pm.c | |
| --- kernel-msm/arch/arm/mach-msm/pm.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/pm.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -31,16 +31,17 @@ | |
| #include <mach/system.h> | |
| #include <asm/io.h> | |
| #ifdef CONFIG_HAS_WAKELOCK | |
| #include <linux/wakelock.h> | |
| #endif | |
| #include "smd_private.h" | |
| +#include "smd_rpcrouter.h" | |
| #include "acpuclock.h" | |
| #include "clock.h" | |
| #include "proc_comm.h" | |
| #include "idle.h" | |
| #include "irq.h" | |
| #include "gpio.h" | |
| #include "timer.h" | |
| #include "pm.h" | |
| @@ -683,22 +684,24 @@ | |
| .enter = msm_pm_enter, | |
| .valid = suspend_valid_only_mem, | |
| }; | |
| static uint32_t restart_reason = 0x776655AA; | |
| static void msm_pm_power_off(void) | |
| { | |
| + msm_rpcrouter_close(); | |
| msm_proc_comm(PCOM_POWER_DOWN, 0, 0); | |
| for (;;) ; | |
| } | |
| static void msm_pm_restart(char str) | |
| { | |
| + msm_rpcrouter_close(); | |
| msm_proc_comm(PCOM_RESET_CHIP, &restart_reason, 0); | |
| for (;;) ; | |
| } | |
| static int msm_reboot_call(struct notifier_block *this, unsigned long code, void *_cmd) | |
| { | |
| if((code == SYS_RESTART) && _cmd) { | |
| @@ -871,16 +874,17 @@ | |
| #undef MSM_PM_STATS_RESET | |
| #endif /* CONFIG_MSM_IDLE_STATS */ | |
| static int __init msm_pm_init(void) | |
| { | |
| #ifdef CONFIG_MSM_IDLE_STATS | |
| struct proc_dir_entry *d_entry; | |
| #endif | |
| + int ret; | |
| pm_power_off = msm_pm_power_off; | |
| arm_pm_restart = msm_pm_restart; | |
| msm_pm_max_sleep_time = 0; | |
| register_reboot_notifier(&msm_reboot_notifier); | |
| msm_pm_sma.sleep_delay = smem_alloc(SMEM_SMSM_SLEEP_DELAY, | |
| @@ -923,16 +927,20 @@ | |
| #else | |
| msm_pm_reset_vector = ioremap(0, PAGE_SIZE); | |
| if (msm_pm_reset_vector == NULL) { | |
| printk(KERN_ERR "msm_pm_init: failed to map reset vector\n"); | |
| return -ENODEV; | |
| } | |
| #endif /* CONFIG_ARCH_MSM_SCORPION */ | |
| + ret = msm_timer_init_time_sync(msm_pm_timeout); | |
| + if (ret) | |
| + return ret; | |
| + | |
| BUG_ON(msm_pm_modes == NULL); | |
| atomic_set(&msm_pm_init_done, 1); | |
| suspend_set_ops(&msm_pm_ops); | |
| #ifdef CONFIG_MSM_IDLE_STATS | |
| d_entry = create_proc_entry("msm_pm_stats", | |
| S_IRUGO | S_IWUSR | S_IWGRP, NULL); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/pm2.c kernel/arch/arm/mach-msm/pm2.c | |
| --- kernel-msm/arch/arm/mach-msm/pm2.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/pm2.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -34,18 +34,21 @@ | |
| #include <mach/msm_iomap.h> | |
| #include <mach/system.h> | |
| #ifdef CONFIG_CACHE_L2X0 | |
| #include <asm/hardware/cache-l2x0.h> | |
| #endif | |
| #ifdef CONFIG_VFP | |
| #include <asm/vfp.h> | |
| #endif | |
| +#include <sharp/sh_sleepcheck.h> | |
| +#include <sharp/shsleeptest.h> | |
| #include "smd_private.h" | |
| +#include "smd_rpcrouter.h" | |
| #include "acpuclock.h" | |
| #include "clock.h" | |
| #include "proc_comm.h" | |
| #include "idle.h" | |
| #include "irq.h" | |
| #include "gpio.h" | |
| #include "timer.h" | |
| #include "pm.h" | |
| @@ -359,19 +362,24 @@ | |
| #define APPS_PWRDOWN (MSM_CSR_BASE + 0x440) | |
| #define APPS_STANDBY_CTL (MSM_CSR_BASE + 0x108) | |
| /* | |
| * Configure hardware registers in preparation for Apps power down. | |
| */ | |
| static void msm_pm_config_hw_before_power_down(void) | |
| { | |
| +#if defined(CONFIG_ARCH_MSM7X27) | |
| + writel(0x1f, APPS_CLK_SLEEP_EN); | |
| + writel(1, APPS_PWRDOWN); | |
| +#else | |
| writel(0x1f, APPS_CLK_SLEEP_EN); | |
| writel(1, APPS_PWRDOWN); | |
| writel(0, APPS_STANDBY_CTL); | |
| +#endif | |
| } | |
| /* | |
| * Clear hardware registers after Apps powers up. | |
| */ | |
| static void msm_pm_config_hw_after_power_up(void) | |
| { | |
| writel(0, APPS_PWRDOWN); | |
| @@ -554,16 +562,33 @@ | |
| MSM_PM_DPRINTK(MSM_PM_DEBUG_SUSPEND, KERN_INFO, | |
| "%s(): Requested %lld ns Giving %u sclk ticks\n", __func__, | |
| max_sleep_time_ns, msm_pm_max_sleep_time); | |
| local_irq_restore(flags); | |
| } | |
| EXPORT_SYMBOL(msm_pm_set_max_sleep_time); | |
| +/* | |
| + * Set the sleep time for suspend. 0 means infinite sleep time. | |
| + */ | |
| +void msm_pm_set_shtimer_sleep_time(int64_t max_sleep_time_ns) | |
| +{ | |
| + unsigned long flags; | |
| + | |
| + local_irq_save(flags); | |
| + msm_pm_max_sleep_time = (uint32_t)msm_pm_convert_and_cap_time( | |
| + max_sleep_time_ns, msm_pm_max_sleep_time); | |
| + | |
| + MSM_PM_DPRINTK(MSM_PM_DEBUG_SUSPEND, KERN_INFO, | |
| + "%s(): Requested %lld ns Giving %u sclk ticks\n", __func__, | |
| + max_sleep_time_ns, msm_pm_max_sleep_time); | |
| + local_irq_restore(flags); | |
| +} | |
| +EXPORT_SYMBOL(msm_pm_set_shtimer_sleep_time); | |
| /****************************************************************************** | |
| * CONFIG_MSM_IDLE_STATS | |
| *****************************************************************************/ | |
| #ifdef CONFIG_MSM_IDLE_STATS | |
| enum msm_pm_time_stats_id { | |
| MSM_PM_STAT_REQUESTED_IDLE, | |
| @@ -628,26 +653,48 @@ | |
| [MSM_PM_STAT_NOT_IDLE].name = "not-idle", | |
| [MSM_PM_STAT_NOT_IDLE].first_bucket_time = | |
| CONFIG_MSM_IDLE_STATS_FIRST_BUCKET, | |
| }; | |
| static uint32_t msm_pm_sleep_limit = SLEEP_LIMIT_NONE; | |
| static DECLARE_BITMAP(msm_pm_clocks_no_tcxo_shutdown, NR_CLKS); | |
| +static sleepcheck_aarm_time sh_sleepcheck_time_aarm; | |
| +static void sh_sleepcheck_set_time( enum msm_pm_time_stats_id id, int64_t t ) | |
| +{ | |
| + switch( id ) { | |
| + case MSM_PM_STAT_IDLE_WFI: | |
| + sh_sleepcheck_time_aarm.t_halt += t; | |
| + break; | |
| + case MSM_PM_STAT_IDLE_POWER_COLLAPSE: | |
| + case MSM_PM_STAT_SUSPEND: | |
| + sh_sleepcheck_time_aarm.t_pc += t; | |
| + break; | |
| + default: | |
| + break; | |
| + } | |
| +} | |
| + | |
| +sleepcheck_aarm_time *sh_sleepcheck_get_time( void ) | |
| +{ | |
| + return &sh_sleepcheck_time_aarm; | |
| +} | |
| + | |
| /* | |
| * Add the given time data to the statistics collection. | |
| */ | |
| static void msm_pm_add_stat(enum msm_pm_time_stats_id id, int64_t t) | |
| { | |
| int i; | |
| int64_t bt; | |
| msm_pm_stats[id].total_time += t; | |
| msm_pm_stats[id].count++; | |
| + sh_sleepcheck_set_time( id, t ); | |
| bt = t; | |
| do_div(bt, msm_pm_stats[id].first_bucket_time); | |
| if (bt < 1ULL << (CONFIG_MSM_IDLE_STATS_BUCKET_SHIFT * | |
| (CONFIG_MSM_IDLE_STATS_BUCKET_COUNT - 1))) | |
| i = DIV_ROUND_UP(fls((uint32_t)bt), | |
| CONFIG_MSM_IDLE_STATS_BUCKET_SHIFT); | |
| @@ -836,16 +883,21 @@ | |
| #define DEM_SLAVE_SMSM_PWRC_EARLY_EXIT (0x0008) | |
| #define DEM_SLAVE_SMSM_WFPI (0x0010) | |
| #define DEM_SLAVE_SMSM_SLEEP (0x0020) | |
| #define DEM_SLAVE_SMSM_SLEEP_EXIT (0x0040) | |
| #define DEM_SLAVE_SMSM_MSGS_REDUCED (0x0080) | |
| #define DEM_SLAVE_SMSM_RESET (0x0100) | |
| #define DEM_SLAVE_SMSM_PWRC_SUSPEND (0x0200) | |
| +/* Time Slave State Bits */ | |
| +#define DEM_TIME_SLAVE_TIME_REQUEST (0x0400) | |
| +#define DEM_TIME_SLAVE_TIME_POLL (0x0800) | |
| +#define DEM_TIME_SLAVE_TIME_INIT (0x1000) | |
| + | |
| /****************************************************************************** | |
| * Shared Memory Data | |
| *****************************************************************************/ | |
| #define DEM_MAX_PORT_NAME_LEN (20) | |
| struct msm_pm_smem_t { | |
| @@ -907,16 +959,20 @@ | |
| memset(msm_pm_smem_data, 0, sizeof(*msm_pm_smem_data)); | |
| msm_irq_enter_sleep1(true, from_idle, &msm_pm_smem_data->irq_mask); | |
| msm_gpio_enter_sleep(from_idle); | |
| msm_pm_smem_data->sleep_time = sleep_delay; | |
| msm_pm_smem_data->resources_used = sleep_limit; | |
| + smsm_change_state(SMSM_APPS_DEM, | |
| + DEM_TIME_SLAVE_TIME_REQUEST | DEM_TIME_SLAVE_TIME_POLL, | |
| + DEM_TIME_SLAVE_TIME_INIT); | |
| + | |
| /* Enter PWRC/PWRC_SUSPEND */ | |
| if (from_idle) | |
| smsm_change_state(SMSM_APPS_DEM, DEM_SLAVE_SMSM_RUN, | |
| DEM_SLAVE_SMSM_PWRC); | |
| else | |
| smsm_change_state(SMSM_APPS_DEM, DEM_SLAVE_SMSM_RUN, | |
| DEM_SLAVE_SMSM_PWRC | DEM_SLAVE_SMSM_PWRC_SUSPEND); | |
| @@ -965,16 +1021,20 @@ | |
| /* XXX: Temp workaround that needs to be removed soon. The | |
| * right fix will probably involve the DMA driver taking | |
| * ownership of the ADM clock. */ | |
| /* id is set to denote ADM clock. */ | |
| id = 1; | |
| msm_proc_comm(PCOM_CLKCTL_RPC_DISABLE, &id, NULL); | |
| #endif | |
| + /* Enter the modem processor to sleep test mode */ | |
| + if (sleep_test_is_enabled()) | |
| + notify_sleep_test_mode_to_modem(); | |
| + | |
| msm_pm_config_hw_before_power_down(); | |
| MSM_PM_DEBUG_PRINT_STATE("msm_pm_power_collapse(): pre power down"); | |
| saved_acpuclk_rate = acpuclk_power_collapse(); | |
| MSM_PM_DPRINTK(MSM_PM_DEBUG_CLOCK, KERN_INFO, | |
| "%s(): change clock rate (old rate = %lu)\n", __func__, | |
| saved_acpuclk_rate); | |
| @@ -1409,16 +1469,19 @@ | |
| msm_timer_exit_idle(low_power); | |
| #ifdef CONFIG_MSM_IDLE_STATS | |
| t2 = ktime_to_ns(ktime_get()); | |
| msm_pm_add_stat(exit_stat, t2 - t1); | |
| #endif /* CONFIG_MSM_IDLE_STATS */ | |
| } | |
| +extern void shtimer_set_sleep_time(void); | |
| +extern void shtimer_get_sleep_time(int64_t ns); | |
| + | |
| /* | |
| * Suspend the Apps processor. | |
| * | |
| * Return value: | |
| * -EAGAIN: modem reset occurred or early exit from suspend | |
| * -EBUSY: modem not ready for our suspend | |
| * -EINVAL: invalid sleep mode | |
| * -EIO: could not ramp Apps processor clock | |
| @@ -1478,31 +1541,40 @@ | |
| for (i = 0; i < ARRAY_SIZE(allow); i++) { | |
| struct msm_pm_platform_data *mode = &msm_pm_modes[i]; | |
| if (!mode->supported || !mode->suspend_enabled) | |
| allow[i] = false; | |
| } | |
| ret = 0; | |
| + /* Forcibly enter power collapse on sleep test mode */ | |
| + if (sleep_test_is_enabled()) { | |
| + allow[MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = true; | |
| + allow[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = true; | |
| + } | |
| + | |
| if (allow[MSM_PM_SLEEP_MODE_POWER_COLLAPSE] || | |
| allow[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN]) { | |
| #ifdef CONFIG_MSM_IDLE_STATS | |
| enum msm_pm_time_stats_id id; | |
| int64_t end_time; | |
| #endif | |
| #ifdef CONFIG_MSM_SLEEP_TIME_OVERRIDE | |
| if (msm_pm_sleep_time_override > 0) { | |
| int64_t ns; | |
| ns = NSEC_PER_SEC * (int64_t)msm_pm_sleep_time_override; | |
| msm_pm_set_max_sleep_time(ns); | |
| msm_pm_sleep_time_override = 0; | |
| } | |
| #endif | |
| + | |
| + shtimer_set_sleep_time(); | |
| + | |
| if (!allow[MSM_PM_SLEEP_MODE_POWER_COLLAPSE]) | |
| sleep_limit = SLEEP_LIMIT_NO_TCXO_SHUTDOWN; | |
| ret = msm_pm_power_collapse( | |
| false, msm_pm_max_sleep_time, sleep_limit); | |
| #ifdef CONFIG_MSM_IDLE_STATS | |
| if (ret) | |
| @@ -1520,16 +1592,18 @@ | |
| time = end_time - time; | |
| if (time < 0) | |
| time += period; | |
| } else | |
| time = 0; | |
| } | |
| msm_pm_add_stat(id, time); | |
| + | |
| + shtimer_get_sleep_time(time); | |
| #endif | |
| } else if (allow[MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT]) { | |
| ret = msm_pm_swfi(true); | |
| if (ret) | |
| while (!msm_irq_pending()) | |
| udelay(1); | |
| } else if (allow[MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT]) { | |
| msm_pm_swfi(false); | |
| @@ -1550,43 +1624,64 @@ | |
| /****************************************************************************** | |
| * Restart Definitions | |
| *****************************************************************************/ | |
| static uint32_t restart_reason = 0x776655AA; | |
| static void msm_pm_power_off(void) | |
| { | |
| + msm_rpcrouter_close(); | |
| msm_proc_comm(PCOM_POWER_DOWN, 0, 0); | |
| for (;;) | |
| ; | |
| } | |
| static void msm_pm_restart(char str) | |
| { | |
| + msm_rpcrouter_close(); | |
| msm_proc_comm(PCOM_RESET_CHIP, &restart_reason, 0); | |
| for (;;) | |
| ; | |
| } | |
| +void msm_set_restart_reason(uint32_t reason) | |
| +{ | |
| + if (restart_reason == 0x776655AA) { | |
| + restart_reason = reason; | |
| + } | |
| + | |
| + return; | |
| +} | |
| + | |
| static int msm_reboot_call | |
| (struct notifier_block *this, unsigned long code, void *_cmd) | |
| { | |
| if ((code == SYS_RESTART) && _cmd) { | |
| char *cmd = _cmd; | |
| if (!strcmp(cmd, "bootloader")) { | |
| restart_reason = 0x77665500; | |
| } else if (!strcmp(cmd, "recovery")) { | |
| restart_reason = 0x77665502; | |
| } else if (!strcmp(cmd, "eraseflash")) { | |
| restart_reason = 0x776655EF; | |
| } else if (!strncmp(cmd, "oem-", 4)) { | |
| unsigned code = simple_strtoul(cmd + 4, 0, 16) & 0xff; | |
| restart_reason = 0x6f656d00 | code; | |
| + } else if (!strcmp(cmd, "UIM-OTA")) { | |
| + restart_reason = 0x77665580; | |
| + } else if (!strcmp(cmd, "UIM-PIN")) { | |
| + restart_reason = 0x77665581; | |
| + } else if (!strcmp(cmd, "URA_MODE")) { | |
| + restart_reason = 0x77665582; | |
| + } else if (!strcmp(cmd, "Checkin scheduled forced")) { | |
| + restart_reason = 0x77665583; | |
| + } else if (!strcmp(cmd, "Checked scheduled range")) { | |
| + restart_reason = 0x77665584; | |
| } else { | |
| restart_reason = 0x77665501; | |
| } | |
| } | |
| return NOTIFY_DONE; | |
| } | |
| static struct notifier_block msm_reboot_notifier = { | |
| @@ -1605,17 +1700,20 @@ | |
| * -ENODEV: initialization failed | |
| * 0: success | |
| */ | |
| static int __init msm_pm_init(void) | |
| { | |
| #ifdef CONFIG_MSM_IDLE_STATS | |
| struct proc_dir_entry *d_entry; | |
| #endif | |
| - int ret; | |
| + int ret; | |
| +#if 1 | |
| + uint32_t *pSleepSmemSleepDisabled; | |
| +#endif | |
| pm_power_off = msm_pm_power_off; | |
| arm_pm_restart = msm_pm_restart; | |
| register_reboot_notifier(&msm_reboot_notifier); | |
| msm_pm_smem_data = smem_alloc(SMEM_APPS_DEM_SLAVE_DATA, | |
| sizeof(*msm_pm_smem_data)); | |
| if (msm_pm_smem_data == NULL) { | |
| @@ -1634,17 +1732,17 @@ | |
| #else | |
| msm_pm_reset_vector = ioremap(0, PAGE_SIZE); | |
| if (msm_pm_reset_vector == NULL) { | |
| printk(KERN_ERR "%s: failed to map reset vector\n", __func__); | |
| return -ENODEV; | |
| } | |
| #endif /* CONFIG_ARCH_MSM_SCORPION */ | |
| - ret = msm_timer_init_time_sync(); | |
| + ret = msm_timer_init_time_sync(msm_pm_timeout); | |
| if (ret) | |
| return ret; | |
| ret = smsm_change_intr_mask(SMSM_POWER_MASTER_DEM, 0xFFFFFFFF, 0); | |
| if (ret) { | |
| printk(KERN_ERR "%s: failed to clear interrupt mask, %d\n", | |
| __func__, ret); | |
| return ret; | |
| @@ -1661,12 +1759,21 @@ | |
| S_IRUGO | S_IWUSR | S_IWGRP, NULL); | |
| if (d_entry) { | |
| d_entry->read_proc = msm_pm_read_proc; | |
| d_entry->write_proc = msm_pm_write_proc; | |
| d_entry->data = NULL; | |
| } | |
| #endif | |
| +#if 1 | |
| + /* Disable power collapse during JTAG debug */ | |
| + pSleepSmemSleepDisabled = smem_alloc(SMEM_SLEEP_POWER_COLLAPSE_DISABLED, sizeof(uint32_t)); | |
| + if (*pSleepSmemSleepDisabled) { | |
| + msm_pm_modes[MSM_PM_SLEEP_MODE_POWER_COLLAPSE].supported = 0; | |
| + msm_pm_modes[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].supported = 0; | |
| + } | |
| +#endif | |
| + | |
| return 0; | |
| } | |
| late_initcall(msm_pm_init); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/pmic.c kernel/arch/arm/mach-msm/pmic.c | |
| --- kernel-msm/arch/arm/mach-msm/pmic.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/pmic.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -137,16 +137,17 @@ | |
| #define SPKR_ADD_RIGHT_LEFT_CHAN_PROC 60 | |
| #define SPKR_SET_GAIN_PROC 61 | |
| #define SPKR_EN_PROC 62 | |
| #define HSED_SET_PERIOD_PROC 63 | |
| #define HSED_SET_HYSTERESIS_PROC 64 | |
| #define HSED_SET_CURRENT_THRESHOLD_PROC 65 | |
| #define HSED_ENABLE_PROC 66 | |
| +#define SH_PM_VREG_CONTROL_PROC 67 | |
| /* rpc related */ | |
| #define PMIC_RPC_TIMEOUT (5*HZ) | |
| #define PMIC_PDEV_NAME "rs00010001:00000000" | |
| #define PMIC_RPC_PROG 0x30000061 | |
| #define PMIC_RPC_VER_1_1 0x00010001 | |
| #define PMIC_RPC_VER_2_1 0x00020001 | |
| @@ -1088,8 +1089,15 @@ | |
| enum hsed_enable enable_hsed | |
| ) | |
| { | |
| return pmic_rpc_set_only(controller, enable_hsed, 0, 0, | |
| 2, | |
| HSED_ENABLE_PROC); | |
| } | |
| EXPORT_SYMBOL(pmic_hsed_enable); | |
| + | |
| +int sh_pmic_vreg_control(enum switch_cmd cmd, enum vreg_id id) | |
| +{ | |
| + return pmic_rpc_set_only(cmd, id, 0, 0, 2, SH_PM_VREG_CONTROL_PROC ); | |
| +} | |
| +EXPORT_SYMBOL(sh_pmic_vreg_control); | |
| + | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp5/Makefile kernel/arch/arm/mach-msm/qdsp5/Makefile | |
| --- kernel-msm/arch/arm/mach-msm/qdsp5/Makefile 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp5/Makefile 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -2,11 +2,11 @@ | |
| ifneq ($(CONFIG_ARCH_MSM7X30),y) | |
| obj-y += adsp_video_verify_cmd.o | |
| obj-y += adsp_videoenc_verify_cmd.o | |
| obj-y += adsp_jpeg_verify_cmd.o adsp_jpeg_patch_event.o | |
| obj-y += adsp_vfe_verify_cmd.o adsp_vfe_patch_event.o | |
| obj-y += adsp_lpm_verify_cmd.o | |
| obj-y += audio_out.o audio_in.o audio_mp3.o audmgr.o audpp.o audrec.o | |
| obj-y += audio_evrc.o audio_qcelp.o audio_amrnb.o audio_aac.o audio_amrnb_in.o | |
| -obj-y += audio_wma.o audio_voicememo.o audio_pcm.o | |
| -obj-y += snd.o | |
| +obj-y += audio_wma.o audio_voicememo.o audio_pcm.o | |
| +obj-y += snd.o snd_adie.o | |
| endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp5/adsp.c kernel/arch/arm/mach-msm/qdsp5/adsp.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp5/adsp.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp5/adsp.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -115,21 +115,23 @@ | |
| return -EINVAL; | |
| } | |
| MM_INFO("cmd_buf size is more than allowed size\n"); | |
| return -EINVAL; | |
| } | |
| uint32_t adsp_get_module(struct adsp_info *info, uint32_t task) | |
| { | |
| + BUG_ON(current_image == -1UL); | |
| return info->task_to_module[current_image][task]; | |
| } | |
| uint32_t adsp_get_queue_offset(struct adsp_info *info, uint32_t queue_id) | |
| { | |
| + BUG_ON(current_image == -1UL); | |
| return info->queue_offset[current_image][queue_id]; | |
| } | |
| static int rpc_adsp_rtos_app_to_modem(uint32_t cmd, uint32_t module, | |
| struct msm_adsp_module *adsp_module) | |
| { | |
| int rc; | |
| struct rpc_adsp_rtos_app_to_modem_args_t rpc_req; | |
| @@ -174,25 +176,23 @@ | |
| return mod_idx; | |
| return -ENXIO; | |
| } | |
| static struct msm_adsp_module *find_adsp_module_by_id( | |
| struct adsp_info *info, uint32_t id) | |
| { | |
| - int mod_idx; | |
| - | |
| if (id > info->max_module_id) { | |
| return NULL; | |
| } else { | |
| - mod_idx = get_module_index(id); | |
| - if (mod_idx < 0) | |
| + id = get_module_index(id); | |
| + if (id < 0) | |
| return NULL; | |
| - return info->id_to_module[mod_idx]; | |
| + return info->id_to_module[id]; | |
| } | |
| } | |
| static struct msm_adsp_module *find_adsp_module_by_name( | |
| struct adsp_info *info, const char *name) | |
| { | |
| unsigned n; | |
| for (n = 0; n < info->module_count; n++) | |
| @@ -372,17 +372,17 @@ | |
| reply->data.acc_hdr.verf_length = 0; | |
| rc = msm_rpc_write(rpc_cb_server_client, reply_buf, sizeof(reply_buf)); | |
| if (rc < 0) | |
| MM_ERR("could not write RPC response: %d\n", rc); | |
| return rc; | |
| } | |
| -int msm_adsp_write(struct msm_adsp_module *module, unsigned dsp_queue_addr, | |
| +int __msm_adsp_write(struct msm_adsp_module *module, unsigned dsp_queue_addr, | |
| void *cmd_buf, size_t cmd_size) | |
| { | |
| uint32_t ctrl_word; | |
| uint32_t dsp_q_addr; | |
| uint32_t dsp_addr; | |
| uint32_t cmd_id = 0; | |
| int cnt = 0; | |
| int ret_status = 0; | |
| @@ -467,99 +467,117 @@ | |
| cnt++; | |
| } | |
| /* Read the ctrl word */ | |
| ctrl_word = readl(info->write_ctrl); | |
| if ((ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_STATUS_M) != | |
| ADSP_RTOS_WRITE_CTRL_WORD_NO_ERR_V) { | |
| - ret_status = -EIO; | |
| + ret_status = -EAGAIN; | |
| MM_ERR("failed to write queue %x, retry\n", dsp_q_addr); | |
| goto fail; | |
| + } | |
| + | |
| + /* Ctrl word status bits were 00, no error in the ctrl word */ | |
| + /* Get the DSP buffer address */ | |
| + dsp_addr = (ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M) + | |
| + (uint32_t)MSM_AD5_BASE; | |
| + | |
| + if (dsp_addr < (uint32_t)(MSM_AD5_BASE + QDSP_RAMC_OFFSET)) { | |
| + uint16_t *buf_ptr = (uint16_t *) cmd_buf; | |
| + uint16_t *dsp_addr16 = (uint16_t *)dsp_addr; | |
| + cmd_size /= sizeof(uint16_t); | |
| + | |
| + /* Save the command ID */ | |
| + cmd_id = (uint32_t) buf_ptr[0]; | |
| + | |
| + /* Copy the command to DSP memory */ | |
| + cmd_size++; | |
| + while (--cmd_size) | |
| + *dsp_addr16++ = *buf_ptr++; | |
| } else { | |
| - /* No error */ | |
| - /* Get the DSP buffer address */ | |
| - dsp_addr = (ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M) + | |
| - (uint32_t)MSM_AD5_BASE; | |
| - | |
| - if (dsp_addr < (uint32_t)(MSM_AD5_BASE + QDSP_RAMC_OFFSET)) { | |
| - uint16_t *buf_ptr = (uint16_t *) cmd_buf; | |
| - uint16_t *dsp_addr16 = (uint16_t *)dsp_addr; | |
| - cmd_size /= sizeof(uint16_t); | |
| - | |
| - /* Save the command ID */ | |
| - cmd_id = (uint32_t) buf_ptr[0]; | |
| - | |
| - /* Copy the command to DSP memory */ | |
| - cmd_size++; | |
| - while (--cmd_size) | |
| - *dsp_addr16++ = *buf_ptr++; | |
| - } else { | |
| - uint32_t *buf_ptr = (uint32_t *) cmd_buf; | |
| - uint32_t *dsp_addr32 = (uint32_t *)dsp_addr; | |
| - cmd_size /= sizeof(uint32_t); | |
| - | |
| - /* Save the command ID */ | |
| - cmd_id = buf_ptr[0]; | |
| - | |
| - cmd_size++; | |
| - while (--cmd_size) | |
| - *dsp_addr32++ = *buf_ptr++; | |
| - } | |
| + uint32_t *buf_ptr = (uint32_t *) cmd_buf; | |
| + uint32_t *dsp_addr32 = (uint32_t *)dsp_addr; | |
| + cmd_size /= sizeof(uint32_t); | |
| + | |
| + /* Save the command ID */ | |
| + cmd_id = buf_ptr[0]; | |
| + | |
| + cmd_size++; | |
| + while (--cmd_size) | |
| + *dsp_addr32++ = *buf_ptr++; | |
| + } | |
| - /* Set the mutex bits */ | |
| - ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M); | |
| - ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V; | |
| - | |
| - /* Set the command bits to write done */ | |
| - ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_CMD_M); | |
| - ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_CMD_WRITE_DONE_V; | |
| - | |
| - /* Set the queue address bits */ | |
| - ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M); | |
| - ctrl_word |= dsp_q_addr; | |
| - | |
| - writel(ctrl_word, info->write_ctrl); | |
| - | |
| - /* Generate an interrupt to the DSP. It does not respond with | |
| - * an interrupt, and we do not need to wait for it to | |
| - * acknowledge, because it will hold the mutex lock until it's | |
| - * ready to receive more commands again. | |
| - */ | |
| - writel(1, info->send_irq); | |
| + /* Set the mutex bits */ | |
| + ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M); | |
| + ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V; | |
| + | |
| + /* Set the command bits to write done */ | |
| + ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_CMD_M); | |
| + ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_CMD_WRITE_DONE_V; | |
| + | |
| + /* Set the queue address bits */ | |
| + ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M); | |
| + ctrl_word |= dsp_q_addr; | |
| - module->num_commands++; | |
| - } /* Ctrl word status bits were 00, no error in the ctrl word */ | |
| + writel(ctrl_word, info->write_ctrl); | |
| + | |
| + /* Generate an interrupt to the DSP. It does not respond with | |
| + * an interrupt, and we do not need to wait for it to | |
| + * acknowledge, because it will hold the mutex lock until it's | |
| + * ready to receive more commands again. | |
| + */ | |
| + writel(1, info->send_irq); | |
| + | |
| + module->num_commands++; | |
| fail: | |
| spin_unlock_irqrestore(&adsp_write_lock, flags); | |
| return ret_status; | |
| } | |
| EXPORT_SYMBOL(msm_adsp_write); | |
| -static void *event_addr; | |
| -static void read_event(void *buf, size_t len) | |
| +int msm_adsp_write(struct msm_adsp_module *module, unsigned dsp_queue_addr, | |
| + void *cmd_buf, size_t cmd_size) | |
| +{ | |
| + int rc, retries = 0; | |
| + do { | |
| + rc = __msm_adsp_write(module, dsp_queue_addr, cmd_buf, | |
| + cmd_size); | |
| + if (rc == -EAGAIN) | |
| + udelay(10); | |
| + } while (rc == -EAGAIN && retries++ < 100); | |
| + if (retries > 50) | |
| + MM_DBG("adsp: %s command took %d attempts: rc %d\n", | |
| + module->name, retries, rc); | |
| + return rc; | |
| +} | |
| + | |
| +#ifdef CONFIG_MSM_ADSP_REPORT_EVENTS | |
| +static void *modem_event_addr; | |
| +static void read_modem_event(void *buf, size_t len) | |
| { | |
| uint32_t dptr[3]; | |
| struct rpc_adsp_rtos_modem_to_app_args_t *sptr; | |
| struct adsp_rtos_mp_mtoa_type *pkt_ptr; | |
| - sptr = event_addr; | |
| + sptr = modem_event_addr; | |
| pkt_ptr = &sptr->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_packet; | |
| dptr[0] = be32_to_cpu(sptr->mtoa_pkt.mp_mtoa_header.event); | |
| dptr[1] = be32_to_cpu(pkt_ptr->module); | |
| dptr[2] = be32_to_cpu(pkt_ptr->image); | |
| if (len > EVENT_LEN) | |
| len = EVENT_LEN; | |
| memcpy(buf, dptr, len); | |
| } | |
| +#endif | |
| static void handle_adsp_rtos_mtoa_app(struct rpc_request_hdr *req) | |
| { | |
| struct rpc_adsp_rtos_modem_to_app_args_t *args = | |
| (struct rpc_adsp_rtos_modem_to_app_args_t *)req; | |
| uint32_t event; | |
| uint32_t proc_id; | |
| uint32_t module_id; | |
| @@ -683,24 +701,22 @@ | |
| MM_ERR("unknown event %d\n", event); | |
| rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid, | |
| RPC_ACCEPTSTAT_GARBAGE_ARGS); | |
| mutex_unlock(&module->lock); | |
| return; | |
| } | |
| rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid, | |
| RPC_ACCEPTSTAT_SUCCESS); | |
| - mutex_unlock(&module->lock); | |
| #ifdef CONFIG_MSM_ADSP_REPORT_EVENTS | |
| - event_addr = (uint32_t *)req; | |
| - module->ops->event(module->driver_data, | |
| - EVENT_MSG_ID, | |
| - EVENT_LEN, | |
| - read_event); | |
| + modem_event_addr = (uint32_t *)req; | |
| + module->ops->event(module->driver_data, EVENT_MSG_ID, | |
| + EVENT_LEN, read_modem_event); | |
| #endif | |
| + mutex_unlock(&module->lock); | |
| } | |
| static int handle_adsp_rtos_mtoa(struct rpc_request_hdr *req) | |
| { | |
| switch (req->procedure) { | |
| case RPC_ADSP_RTOS_MTOA_NULL_PROC: | |
| rpc_send_accepted_void_reply(rpc_cb_server_client, | |
| req->xid, | |
| @@ -720,17 +736,17 @@ | |
| return 0; | |
| } | |
| /* this should be common code with rpc_servers.c */ | |
| static int adsp_rpc_thread(void *data) | |
| { | |
| void *buffer; | |
| struct rpc_request_hdr *req; | |
| - int rc, exit = 0; | |
| + int rc; | |
| do { | |
| rc = msm_rpc_read(rpc_cb_server_client, &buffer, -1, -1); | |
| if (rc < 0) { | |
| MM_ERR("could not read rpc: %d\n", rc); | |
| break; | |
| } | |
| req = (struct rpc_request_hdr *)buffer; | |
| @@ -754,17 +770,17 @@ | |
| handle_adsp_rtos_mtoa(req); | |
| kfree(buffer); | |
| continue; | |
| bad_rpc: | |
| MM_ERR("bogus rpc from modem\n"); | |
| kfree(buffer); | |
| - } while (!exit); | |
| + } while (1); | |
| do_exit(0); | |
| } | |
| static size_t read_event_size; | |
| static void *read_event_addr; | |
| static void read_event_16(void *buf, size_t len) | |
| { | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp5/adsp_driver.c kernel/arch/arm/mach-msm/qdsp5/adsp_driver.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp5/adsp_driver.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp5/adsp_driver.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -23,21 +23,16 @@ | |
| #include <linux/sched.h> | |
| #include <linux/uaccess.h> | |
| #include "adsp.h" | |
| #include <linux/msm_adsp.h> | |
| #include <linux/android_pmem.h> | |
| -struct adsp_pmem_info { | |
| - int fd; | |
| - void *vaddr; | |
| -}; | |
| - | |
| struct adsp_pmem_region { | |
| struct hlist_node list; | |
| void *vaddr; | |
| unsigned long paddr; | |
| unsigned long kvaddr; | |
| unsigned long len; | |
| struct file *file; | |
| }; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp5/audio_aac.c kernel/arch/arm/mach-msm/qdsp5/audio_aac.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp5/audio_aac.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp5/audio_aac.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -190,57 +190,73 @@ | |
| MM_DBG("\n"); /* Macro prints the file name and function */ | |
| if (audio->enabled) | |
| return 0; | |
| audio->out_tail = 0; | |
| audio->out_needed = 0; | |
| - cfg.tx_rate = RPC_AUD_DEF_SAMPLE_RATE_NONE; | |
| - cfg.rx_rate = RPC_AUD_DEF_SAMPLE_RATE_48000; | |
| - cfg.def_method = RPC_AUD_DEF_METHOD_PLAYBACK; | |
| - cfg.codec = RPC_AUD_DEF_CODEC_AAC; | |
| - cfg.snd_method = RPC_SND_METHOD_MIDI; | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) { | |
| + cfg.tx_rate = RPC_AUD_DEF_SAMPLE_RATE_NONE; | |
| + cfg.rx_rate = RPC_AUD_DEF_SAMPLE_RATE_48000; | |
| + cfg.def_method = RPC_AUD_DEF_METHOD_PLAYBACK; | |
| + cfg.codec = RPC_AUD_DEF_CODEC_AAC; | |
| + cfg.snd_method = RPC_SND_METHOD_MIDI; | |
| - rc = audmgr_enable(&audio->audmgr, &cfg); | |
| - if (rc < 0) | |
| - return rc; | |
| + rc = audmgr_enable(&audio->audmgr, &cfg); | |
| + if (rc < 0) | |
| + return rc; | |
| + } | |
| if (msm_adsp_enable(audio->audplay)) { | |
| MM_ERR("msm_adsp_enable(audplay) failed\n"); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| return -ENODEV; | |
| } | |
| if (audpp_enable(audio->dec_id, audio_dsp_event, audio)) { | |
| MM_ERR("audpp_enable() failed\n"); | |
| msm_adsp_disable(audio->audplay); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| return -ENODEV; | |
| } | |
| audio->enabled = 1; | |
| return 0; | |
| } | |
| /* must be called with audio->lock held */ | |
| static int audio_disable(struct audio *audio) | |
| { | |
| + int rc = 0; | |
| MM_DBG("\n"); /* Macro prints the file name and function */ | |
| if (audio->enabled) { | |
| audio->enabled = 0; | |
| + audio->dec_state = MSM_AUD_DECODER_STATE_NONE; | |
| auddec_dsp_config(audio, 0); | |
| + rc = wait_event_interruptible_timeout(audio->wait, | |
| + audio->dec_state != MSM_AUD_DECODER_STATE_NONE, | |
| + msecs_to_jiffies(MSM_AUD_DECODER_WAIT_MS)); | |
| + if (rc == 0) | |
| + rc = -ETIMEDOUT; | |
| + else if (audio->dec_state != MSM_AUD_DECODER_STATE_CLOSE) | |
| + rc = -EFAULT; | |
| + else | |
| + rc = 0; | |
| wake_up(&audio->write_wait); | |
| wake_up(&audio->read_wait); | |
| msm_adsp_disable(audio->audplay); | |
| audpp_disable(audio->dec_id, audio); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| audio->out_needed = 0; | |
| } | |
| - return 0; | |
| + return rc; | |
| } | |
| /* ------------------- dsp --------------------- */ | |
| static void audio_update_pcm_buf_entry(struct audio *audio, uint32_t *payload) | |
| { | |
| uint8_t index; | |
| unsigned long flags; | |
| @@ -343,16 +359,21 @@ | |
| MM_DBG("decoder status: sleep reason = \ | |
| 0x%04x\n", reason); | |
| if ((reason == AUDPP_MSG_REASON_MEM) | |
| || (reason == | |
| AUDPP_MSG_REASON_NODECODER)) { | |
| audio->dec_state = | |
| MSM_AUD_DECODER_STATE_FAILURE; | |
| wake_up(&audio->wait); | |
| + } else if (reason == AUDPP_MSG_REASON_NONE) { | |
| + /* decoder is in disable state */ | |
| + audio->dec_state = | |
| + MSM_AUD_DECODER_STATE_CLOSE; | |
| + wake_up(&audio->wait); | |
| } | |
| break; | |
| } | |
| case AUDPP_DEC_STATUS_INIT: | |
| MM_DBG("decoder status: init \n"); | |
| if (audio->pcm_feedback) | |
| audpp_cmd_cfg_routing_mode(audio); | |
| else | |
| @@ -614,16 +635,17 @@ | |
| if (config->format != AUDIO_AAC_FORMAT_ADTS && | |
| config->format != AUDIO_AAC_FORMAT_RAW && | |
| config->format != AUDIO_AAC_FORMAT_PSUEDO_RAW && | |
| config->format != AUDIO_AAC_FORMAT_LOAS) | |
| goto done; | |
| if (config->audio_object != AUDIO_AAC_OBJECT_LC && | |
| config->audio_object != AUDIO_AAC_OBJECT_LTP && | |
| + config->audio_object != AUDIO_AAC_OBJECT_BSAC && | |
| config->audio_object != AUDIO_AAC_OBJECT_ERLC) | |
| goto done; | |
| if (config->audio_object == AUDIO_AAC_OBJECT_ERLC) { | |
| if (config->ep_config > 3) | |
| goto done; | |
| if (config->aac_scalefactor_data_resilience_flag != | |
| AUDIO_AAC_SCA_DATA_RES_OFF && | |
| @@ -882,30 +904,33 @@ | |
| audio->event_abort = 1; | |
| wake_up(&audio->event_wait); | |
| return 0; | |
| } | |
| mutex_lock(&audio->lock); | |
| switch (cmd) { | |
| case AUDIO_START: | |
| + MM_DBG("AUDIO_START\n"); | |
| + audio->dec_state = MSM_AUD_DECODER_STATE_NONE; | |
| rc = audio_enable(audio); | |
| if (!rc) { | |
| rc = wait_event_interruptible_timeout(audio->wait, | |
| audio->dec_state != MSM_AUD_DECODER_STATE_NONE, | |
| msecs_to_jiffies(MSM_AUD_DECODER_WAIT_MS)); | |
| MM_DBG("dec_state %d rc = %d\n", audio->dec_state, rc); | |
| if (audio->dec_state != MSM_AUD_DECODER_STATE_SUCCESS) | |
| rc = -ENODEV; | |
| else | |
| rc = 0; | |
| } | |
| break; | |
| case AUDIO_STOP: | |
| + MM_DBG("AUDIO_STOP\n"); | |
| rc = audio_disable(audio); | |
| audio->stopped = 1; | |
| audio_ioport_reset(audio); | |
| audio->stopped = 0; | |
| break; | |
| case AUDIO_FLUSH: | |
| MM_DBG("AUDIO_FLUSH running=%d\n", audio->running); | |
| audio->rflush = 1; | |
| @@ -1644,25 +1669,28 @@ | |
| audpp_adec_free(audio->dec_id); | |
| MM_INFO("audio instance 0x%08x freeing\n", (int)audio); | |
| kfree(audio); | |
| goto done; | |
| } | |
| MM_DBG("read buf: phy addr 0x%08x kernel addr 0x%08x\n", | |
| audio->read_phys, (int)audio->read_data); | |
| - rc = audmgr_open(&audio->audmgr); | |
| - if (rc) | |
| - goto err; | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) { | |
| + rc = audmgr_open(&audio->audmgr); | |
| + if (rc) | |
| + goto err; | |
| + } | |
| rc = msm_adsp_get(audio->module_name, &audio->audplay, | |
| &audplay_adsp_ops_aac, audio); | |
| if (rc) { | |
| MM_ERR("failed to get %s module\n", audio->module_name); | |
| - audmgr_close(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_close(&audio->audmgr); | |
| goto err; | |
| } | |
| mutex_init(&audio->lock); | |
| mutex_init(&audio->write_lock); | |
| mutex_init(&audio->read_lock); | |
| mutex_init(&audio->get_event_lock); | |
| spin_lock_init(&audio->dsp_lock); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp5/audio_amrnb.c kernel/arch/arm/mach-msm/qdsp5/audio_amrnb.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp5/audio_amrnb.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp5/audio_amrnb.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -192,57 +192,76 @@ | |
| MM_DBG("\n"); /* Macro prints the file name and function */ | |
| if (audio->enabled) | |
| return 0; | |
| audio->out_tail = 0; | |
| audio->out_needed = 0; | |
| - cfg.tx_rate = RPC_AUD_DEF_SAMPLE_RATE_NONE; | |
| - cfg.rx_rate = RPC_AUD_DEF_SAMPLE_RATE_48000; | |
| - cfg.def_method = RPC_AUD_DEF_METHOD_PLAYBACK; | |
| - cfg.codec = RPC_AUD_DEF_CODEC_AMR_NB; | |
| - cfg.snd_method = RPC_SND_METHOD_MIDI; | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) { | |
| + cfg.tx_rate = RPC_AUD_DEF_SAMPLE_RATE_NONE; | |
| + cfg.rx_rate = RPC_AUD_DEF_SAMPLE_RATE_48000; | |
| + cfg.def_method = RPC_AUD_DEF_METHOD_PLAYBACK; | |
| + if (machine_is_msm7x25_surf()) | |
| + cfg.codec = RPC_AUD_DEF_CODEC_VOC_AMR; | |
| + else | |
| + cfg.codec = RPC_AUD_DEF_CODEC_AMR_NB; | |
| - rc = audmgr_enable(&audio->audmgr, &cfg); | |
| - if (rc < 0) | |
| - return rc; | |
| + cfg.snd_method = RPC_SND_METHOD_MIDI; | |
| + rc = audmgr_enable(&audio->audmgr, &cfg); | |
| + if (rc < 0) | |
| + return rc; | |
| + } | |
| if (msm_adsp_enable(audio->audplay)) { | |
| MM_ERR("msm_adsp_enable(audplay) failed\n"); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| return -ENODEV; | |
| } | |
| if (audpp_enable(audio->dec_id, audamrnb_dsp_event, audio)) { | |
| MM_ERR("audpp_enable() failed\n"); | |
| msm_adsp_disable(audio->audplay); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| return -ENODEV; | |
| } | |
| audio->enabled = 1; | |
| return 0; | |
| } | |
| /* must be called with audio->lock held */ | |
| static int audamrnb_disable(struct audio *audio) | |
| { | |
| + int rc = 0; | |
| MM_DBG("\n"); /* Macro prints the file name and function */ | |
| if (audio->enabled) { | |
| audio->enabled = 0; | |
| + audio->dec_state = MSM_AUD_DECODER_STATE_NONE; | |
| auddec_dsp_config(audio, 0); | |
| + rc = wait_event_interruptible_timeout(audio->wait, | |
| + audio->dec_state != MSM_AUD_DECODER_STATE_NONE, | |
| + msecs_to_jiffies(MSM_AUD_DECODER_WAIT_MS)); | |
| + if (rc == 0) | |
| + rc = -ETIMEDOUT; | |
| + else if (audio->dec_state != MSM_AUD_DECODER_STATE_CLOSE) | |
| + rc = -EFAULT; | |
| + else | |
| + rc = 0; | |
| wake_up(&audio->write_wait); | |
| wake_up(&audio->read_wait); | |
| msm_adsp_disable(audio->audplay); | |
| audpp_disable(audio->dec_id, audio); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| audio->out_needed = 0; | |
| } | |
| - return 0; | |
| + return rc; | |
| } | |
| /* ------------------- dsp --------------------- */ | |
| static void audamrnb_update_pcm_buf_entry(struct audio *audio, | |
| uint32_t *payload) | |
| { | |
| uint8_t index; | |
| unsigned long flags; | |
| @@ -318,16 +337,21 @@ | |
| MM_DBG("decoder status:sleep reason = \ | |
| 0x%04x\n", reason); | |
| if ((reason == AUDPP_MSG_REASON_MEM) | |
| || (reason == | |
| AUDPP_MSG_REASON_NODECODER)) { | |
| audio->dec_state = | |
| MSM_AUD_DECODER_STATE_FAILURE; | |
| wake_up(&audio->wait); | |
| + } else if (reason == AUDPP_MSG_REASON_NONE) { | |
| + /* decoder is in disable state */ | |
| + audio->dec_state = | |
| + MSM_AUD_DECODER_STATE_CLOSE; | |
| + wake_up(&audio->wait); | |
| } | |
| break; | |
| } | |
| case AUDPP_DEC_STATUS_INIT: | |
| MM_DBG("decoder status: init \n"); | |
| if (audio->pcm_feedback) | |
| audpp_cmd_cfg_routing_mode(audio); | |
| else | |
| @@ -772,30 +796,33 @@ | |
| audio->event_abort = 1; | |
| wake_up(&audio->event_wait); | |
| return 0; | |
| } | |
| mutex_lock(&audio->lock); | |
| switch (cmd) { | |
| case AUDIO_START: | |
| + MM_DBG("AUDIO_START\n"); | |
| + audio->dec_state = MSM_AUD_DECODER_STATE_NONE; | |
| rc = audamrnb_enable(audio); | |
| if (!rc) { | |
| rc = wait_event_interruptible_timeout(audio->wait, | |
| audio->dec_state != MSM_AUD_DECODER_STATE_NONE, | |
| msecs_to_jiffies(MSM_AUD_DECODER_WAIT_MS)); | |
| MM_DBG("dec_state %d rc = %d\n", audio->dec_state, rc); | |
| if (audio->dec_state != MSM_AUD_DECODER_STATE_SUCCESS) | |
| rc = -ENODEV; | |
| else | |
| rc = 0; | |
| } | |
| break; | |
| case AUDIO_STOP: | |
| + MM_DBG("AUDIO_STOP\n"); | |
| rc = audamrnb_disable(audio); | |
| audio->stopped = 1; | |
| audamrnb_ioport_reset(audio); | |
| audio->stopped = 0; | |
| break; | |
| case AUDIO_FLUSH: | |
| MM_DBG("AUDIO_FLUSH\n"); | |
| audio->rflush = 1; | |
| @@ -1405,25 +1432,28 @@ | |
| MM_INFO("audio instance 0x%08x freeing\n", (int)audio); | |
| kfree(audio); | |
| goto done; | |
| } | |
| MM_DBG("write buf: phy addr 0x%08x kernel addr \ | |
| 0x%08x\n", audio->phys, (int)audio->data); | |
| } | |
| - rc = audmgr_open(&audio->audmgr); | |
| - if (rc) | |
| - goto err; | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) { | |
| + rc = audmgr_open(&audio->audmgr); | |
| + if (rc) | |
| + goto err; | |
| + } | |
| rc = msm_adsp_get(audio->module_name, &audio->audplay, | |
| &audplay_adsp_ops_amrnb, audio); | |
| if (rc) { | |
| MM_ERR("failed to get %s module\n", audio->module_name); | |
| - audmgr_close(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_close(&audio->audmgr); | |
| goto err; | |
| } | |
| mutex_init(&audio->lock); | |
| mutex_init(&audio->write_lock); | |
| mutex_init(&audio->read_lock); | |
| mutex_init(&audio->get_event_lock); | |
| spin_lock_init(&audio->dsp_lock); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp5/audio_amrwb.c kernel/arch/arm/mach-msm/qdsp5/audio_amrwb.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp5/audio_amrwb.c 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp5/audio_amrwb.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -0,0 +1,1633 @@ | |
| +/* linux/arch/arm/mach-msm/qdsp5/audio_amrwb.c | |
| + * | |
| + * amrwb audio decoder device | |
| + * | |
| + * Based on the mp3 native driver in arch/arm/mach-msm/qdsp5/audio_mp3.c | |
| + * | |
| + * Copyright (C) 2008 Google, Inc. | |
| + * Copyright (C) 2008 HTC Corporation | |
| + * Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| + * | |
| + * All source code in this file is licensed under the following license except | |
| + * where indicated. | |
| + * | |
| + * This program is free software; you can redistribute it and/or modify it | |
| + * under the terms of the GNU General Public License version 2 as published | |
| + * by the Free Software Foundation. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | |
| + * | |
| + * See the GNU General Public License for more details. | |
| + * You should have received a copy of the GNU General Public License | |
| + * along with this program; if not, you can find it at http://www.fsf.org | |
| + */ | |
| + | |
| +#include <mach/debug_audio_mm.h> | |
| +#include <linux/module.h> | |
| +#include <linux/fs.h> | |
| +#include <linux/miscdevice.h> | |
| +#include <linux/uaccess.h> | |
| +#include <linux/kthread.h> | |
| +#include <linux/wait.h> | |
| +#include <linux/dma-mapping.h> | |
| +#include <linux/debugfs.h> | |
| +#include <linux/delay.h> | |
| +#include <linux/list.h> | |
| +#include <linux/earlysuspend.h> | |
| +#include <linux/android_pmem.h> | |
| +#include <asm/atomic.h> | |
| +#include <asm/ioctls.h> | |
| +#include <mach/msm_adsp.h> | |
| +#include <linux/msm_audio.h> | |
| +#include "audmgr.h" | |
| + | |
| +#include <mach/qdsp5/qdsp5audppcmdi.h> | |
| +#include <mach/qdsp5/qdsp5audppmsg.h> | |
| +#include <mach/qdsp5/qdsp5audplaycmdi.h> | |
| +#include <mach/qdsp5/qdsp5audplaymsg.h> | |
| + | |
| +#define BUFSZ 4110 /* Hold minimum 700ms voice data and 14 bytes of meta in*/ | |
| +#define DMASZ (BUFSZ * 2) | |
| + | |
| +#define AUDPLAY_INVALID_READ_PTR_OFFSET 0xFFFF | |
| +#define AUDDEC_DEC_AMRWB 11 | |
| + | |
| +#define PCM_BUFSZ_MIN 8216 /* 100ms worth of data and 24 bytes of meta out*/ | |
| +#define PCM_BUF_MAX_COUNT 5 /* DSP only accepts 5 buffers at most | |
| + but support 2 buffers currently */ | |
| +#define ROUTING_MODE_FTRT 1 | |
| +#define ROUTING_MODE_RT 2 | |
| +/* Decoder status received from AUDPPTASK */ | |
| +#define AUDPP_DEC_STATUS_SLEEP 0 | |
| +#define AUDPP_DEC_STATUS_INIT 1 | |
| +#define AUDPP_DEC_STATUS_CFG 2 | |
| +#define AUDPP_DEC_STATUS_PLAY 3 | |
| + | |
| +#define AUDAMRWB_METAFIELD_MASK 0xFFFF0000 | |
| +#define AUDAMRWB_EOS_FLG_OFFSET 0x0A /* Offset from beginning of buffer */ | |
| +#define AUDAMRWB_EOS_FLG_MASK 0x01 | |
| +#define AUDAMRWB_EOS_NONE 0x0 /* No EOS detected */ | |
| +#define AUDAMRWB_EOS_SET 0x1 /* EOS set in meta field */ | |
| + | |
| +#define AUDAMRWB_EVENT_NUM 10 /* Default number of pre-allocated event pkts */ | |
| + | |
| +struct buffer { | |
| + void *data; | |
| + unsigned size; | |
| + unsigned used; /* Input usage actual DSP produced PCM size */ | |
| + unsigned addr; | |
| + unsigned short mfield_sz; /*only useful for data has meta field */ | |
| +}; | |
| + | |
| +#ifdef CONFIG_HAS_EARLYSUSPEND | |
| +struct audamrwb_suspend_ctl { | |
| + struct early_suspend node; | |
| + struct audio *audio; | |
| +}; | |
| +#endif | |
| + | |
| +struct audamrwb_event{ | |
| + struct list_head list; | |
| + int event_type; | |
| + union msm_audio_event_payload payload; | |
| +}; | |
| + | |
| +struct audio { | |
| + struct buffer out[2]; | |
| + | |
| + spinlock_t dsp_lock; | |
| + | |
| + uint8_t out_head; | |
| + uint8_t out_tail; | |
| + uint8_t out_needed; /* number of buffers the dsp is waiting for */ | |
| + | |
| + atomic_t out_bytes; | |
| + | |
| + struct mutex lock; | |
| + struct mutex write_lock; | |
| + wait_queue_head_t write_wait; | |
| + | |
| + /* Host PCM section */ | |
| + struct buffer in[PCM_BUF_MAX_COUNT]; | |
| + struct mutex read_lock; | |
| + wait_queue_head_t read_wait; /* Wait queue for read */ | |
| + char *read_data; /* pointer to reader buffer */ | |
| + int32_t read_phys; /* physical address of reader buffer */ | |
| + uint8_t read_next; /* index to input buffers to be read next */ | |
| + uint8_t fill_next; /* index to buffer that DSP should be filling */ | |
| + uint8_t pcm_buf_count; /* number of pcm buffer allocated */ | |
| + /* ---- End of Host PCM section */ | |
| + | |
| + struct msm_adsp_module *audplay; | |
| + struct audmgr audmgr; | |
| + | |
| + /* configuration to use on next enable */ | |
| + uint32_t out_sample_rate; | |
| + uint32_t out_channel_mode; | |
| + | |
| + /* data allocated for various buffers */ | |
| + char *data; | |
| + int32_t phys; /* physical address of write buffer */ | |
| + | |
| + int mfield; /* meta field embedded in data */ | |
| + int rflush; /* Read flush */ | |
| + int wflush; /* Write flush */ | |
| + int opened; | |
| + int enabled; | |
| + int running; | |
| + int stopped; /* set when stopped, cleared on flush */ | |
| + int pcm_feedback; | |
| + int buf_refresh; | |
| + int teos; /* valid only if tunnel mode & no data left for decoder */ | |
| + enum msm_aud_decoder_state dec_state; /* Represents decoder state */ | |
| + int reserved; /* A byte is being reserved */ | |
| + char rsv_byte; /* Handle odd length user data */ | |
| + | |
| + const char *module_name; | |
| + unsigned queue_id; | |
| + uint16_t dec_id; | |
| + uint32_t read_ptr_offset; | |
| + | |
| +#ifdef CONFIG_HAS_EARLYSUSPEND | |
| + struct audamrwb_suspend_ctl suspend_ctl; | |
| +#endif | |
| + | |
| +#ifdef CONFIG_DEBUG_FS | |
| + struct dentry *dentry; | |
| +#endif | |
| + | |
| + wait_queue_head_t wait; | |
| + struct list_head free_event_queue; | |
| + struct list_head event_queue; | |
| + wait_queue_head_t event_wait; | |
| + spinlock_t event_queue_lock; | |
| + struct mutex get_event_lock; | |
| + int event_abort; | |
| + | |
| + int eq_enable; | |
| + int eq_needs_commit; | |
| + audpp_cmd_cfg_object_params_eqalizer eq; | |
| + audpp_cmd_cfg_object_params_volume vol_pan; | |
| +}; | |
| + | |
| +static int auddec_dsp_config(struct audio *audio, int enable); | |
| +static void audpp_cmd_cfg_adec_params(struct audio *audio); | |
| +static void audpp_cmd_cfg_routing_mode(struct audio *audio); | |
| +static void audamrwb_send_data(struct audio *audio, unsigned needed); | |
| +static void audamrwb_config_hostpcm(struct audio *audio); | |
| +static void audamrwb_buffer_refresh(struct audio *audio); | |
| +static void audamrwb_dsp_event(void *private, unsigned id, uint16_t *msg); | |
| +static void audamrwb_post_event(struct audio *audio, int type, | |
| + union msm_audio_event_payload payload); | |
| + | |
| +/* must be called with audio->lock held */ | |
| +static int audamrwb_enable(struct audio *audio) | |
| +{ | |
| + struct audmgr_config cfg; | |
| + int rc; | |
| + | |
| + pr_debug("audamrwb_enable()\n"); | |
| + | |
| + if (audio->enabled) | |
| + return 0; | |
| + | |
| + audio->out_tail = 0; | |
| + audio->out_needed = 0; | |
| + | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) { | |
| + cfg.tx_rate = RPC_AUD_DEF_SAMPLE_RATE_NONE; | |
| + cfg.rx_rate = RPC_AUD_DEF_SAMPLE_RATE_48000; | |
| + cfg.def_method = RPC_AUD_DEF_METHOD_PLAYBACK; | |
| + cfg.codec = RPC_AUD_DEF_CODEC_AMR_WB; | |
| + cfg.snd_method = RPC_SND_METHOD_MIDI; | |
| + | |
| + rc = audmgr_enable(&audio->audmgr, &cfg); | |
| + if (rc < 0) | |
| + return rc; | |
| + } | |
| + | |
| + if (msm_adsp_enable(audio->audplay)) { | |
| + pr_err("audio: msm_adsp_enable(audplay) failed\n"); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| + return -ENODEV; | |
| + } | |
| + | |
| + if (audpp_enable(audio->dec_id, audamrwb_dsp_event, audio)) { | |
| + pr_err("audio: audpp_enable() failed\n"); | |
| + msm_adsp_disable(audio->audplay); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| + return -ENODEV; | |
| + } | |
| + audio->enabled = 1; | |
| + return 0; | |
| +} | |
| + | |
| +/* must be called with audio->lock held */ | |
| +static int audamrwb_disable(struct audio *audio) | |
| +{ | |
| + int rc = 0; | |
| + pr_debug("audamrwb_disable()\n"); | |
| + if (audio->enabled) { | |
| + audio->enabled = 0; | |
| + audio->dec_state = MSM_AUD_DECODER_STATE_NONE; | |
| + auddec_dsp_config(audio, 0); | |
| + rc = wait_event_interruptible_timeout(audio->wait, | |
| + audio->dec_state != MSM_AUD_DECODER_STATE_NONE, | |
| + msecs_to_jiffies(MSM_AUD_DECODER_WAIT_MS)); | |
| + if (rc == 0) | |
| + rc = -ETIMEDOUT; | |
| + else if (audio->dec_state != MSM_AUD_DECODER_STATE_CLOSE) | |
| + rc = -EFAULT; | |
| + else | |
| + rc = 0; | |
| + wake_up(&audio->write_wait); | |
| + wake_up(&audio->read_wait); | |
| + msm_adsp_disable(audio->audplay); | |
| + audpp_disable(audio->dec_id, audio); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| + audio->out_needed = 0; | |
| + } | |
| + return rc; | |
| +} | |
| + | |
| +/* ------------------- dsp --------------------- */ | |
| +static void audamrwb_update_pcm_buf_entry(struct audio *audio, | |
| + uint32_t *payload) | |
| +{ | |
| + uint8_t index; | |
| + unsigned long flags; | |
| + | |
| + if (audio->rflush) | |
| + return; | |
| + | |
| + spin_lock_irqsave(&audio->dsp_lock, flags); | |
| + for (index = 0; index < payload[1]; index++) { | |
| + if (audio->in[audio->fill_next].addr == | |
| + payload[2 + index * 2]) { | |
| + pr_debug("audamrwb_update_pcm_buf_entry: \ | |
| + in[%d] ready\n", audio->fill_next); | |
| + audio->in[audio->fill_next].used = | |
| + payload[3 + index * 2]; | |
| + if ((++audio->fill_next) == audio->pcm_buf_count) | |
| + audio->fill_next = 0; | |
| + | |
| + } else { | |
| + pr_err | |
| + ("audamrwb_update_pcm_buf_entry: expected=%x ret=%x\n" | |
| + , audio->in[audio->fill_next].addr, | |
| + payload[1 + index * 2]); | |
| + break; | |
| + } | |
| + } | |
| + if (audio->in[audio->fill_next].used == 0) { | |
| + audamrwb_buffer_refresh(audio); | |
| + } else { | |
| + pr_debug("audamrwb_update_pcm_buf_entry: \ | |
| + read cannot keep up\n"); | |
| + audio->buf_refresh = 1; | |
| + } | |
| + wake_up(&audio->read_wait); | |
| + spin_unlock_irqrestore(&audio->dsp_lock, flags); | |
| +} | |
| + | |
| +static void audplay_dsp_event(void *data, unsigned id, size_t len, | |
| + void (*getevent) (void *ptr, size_t len)) | |
| +{ | |
| + struct audio *audio = data; | |
| + uint32_t msg[28]; | |
| + getevent(msg, sizeof(msg)); | |
| + | |
| + pr_debug("audplay_dsp_event: msg_id=%x\n", id); | |
| + | |
| + switch (id) { | |
| + case AUDPLAY_MSG_DEC_NEEDS_DATA: | |
| + audamrwb_send_data(audio, 1); | |
| + break; | |
| + | |
| + case AUDPLAY_MSG_BUFFER_UPDATE: | |
| + audamrwb_update_pcm_buf_entry(audio, msg); | |
| + break; | |
| + | |
| + default: | |
| + pr_debug("unexpected message from decoder \n"); | |
| + } | |
| +} | |
| + | |
| +static void audamrwb_dsp_event(void *private, unsigned id, uint16_t *msg) | |
| +{ | |
| + struct audio *audio = private; | |
| + | |
| + switch (id) { | |
| + case AUDPP_MSG_STATUS_MSG:{ | |
| + unsigned status = msg[1]; | |
| + | |
| + switch (status) { | |
| + case AUDPP_DEC_STATUS_SLEEP: { | |
| + uint16_t reason = msg[2]; | |
| + pr_debug( | |
| + "decoder status:sleep reason=0x%04x\n", | |
| + reason); | |
| + if ((reason == AUDPP_MSG_REASON_MEM) | |
| + || (reason == | |
| + AUDPP_MSG_REASON_NODECODER)) { | |
| + audio->dec_state = | |
| + MSM_AUD_DECODER_STATE_FAILURE; | |
| + wake_up(&audio->wait); | |
| + } else if (reason == AUDPP_MSG_REASON_NONE) { | |
| + /* decoder is in disable state */ | |
| + audio->dec_state = | |
| + MSM_AUD_DECODER_STATE_CLOSE; | |
| + wake_up(&audio->wait); | |
| + } | |
| + break; | |
| + } | |
| + case AUDPP_DEC_STATUS_INIT: | |
| + pr_debug("decoder status: init \n"); | |
| + if (audio->pcm_feedback) | |
| + audpp_cmd_cfg_routing_mode(audio); | |
| + else | |
| + audpp_cmd_cfg_adec_params(audio); | |
| + break; | |
| + | |
| + case AUDPP_DEC_STATUS_CFG: | |
| + pr_debug("decoder status: cfg \n"); | |
| + break; | |
| + case AUDPP_DEC_STATUS_PLAY: | |
| + pr_debug("decoder status: play \n"); | |
| + if (audio->pcm_feedback) { | |
| + audamrwb_config_hostpcm(audio); | |
| + audamrwb_buffer_refresh(audio); | |
| + } | |
| + audio->dec_state = | |
| + MSM_AUD_DECODER_STATE_SUCCESS; | |
| + wake_up(&audio->wait); | |
| + break; | |
| + default: | |
| + pr_debug("unknown decoder status \n"); | |
| + break; | |
| + } | |
| + break; | |
| + } | |
| + case AUDPP_MSG_CFG_MSG: | |
| + if (msg[0] == AUDPP_MSG_ENA_ENA) { | |
| + pr_debug("audamrwb_dsp_event: CFG_MSG ENABLE\n"); | |
| + auddec_dsp_config(audio, 1); | |
| + audio->out_needed = 0; | |
| + audio->running = 1; | |
| + audpp_dsp_set_vol_pan(audio->dec_id, &audio->vol_pan); | |
| + audpp_dsp_set_eq(audio->dec_id, audio->eq_enable, | |
| + &audio->eq); | |
| + audpp_avsync(audio->dec_id, 22050); | |
| + } else if (msg[0] == AUDPP_MSG_ENA_DIS) { | |
| + pr_debug("audamrwb_dsp_event: CFG_MSG DISABLE\n"); | |
| + audpp_avsync(audio->dec_id, 0); | |
| + audio->running = 0; | |
| + } else { | |
| + pr_debug("audamrwb_dsp_event: CFG_MSG %d?\n", msg[0]); | |
| + } | |
| + break; | |
| + case AUDPP_MSG_ROUTING_ACK: | |
| + pr_debug("audamrwb_dsp_event: ROUTING_ACK mode=%d\n", msg[1]); | |
| + audpp_cmd_cfg_adec_params(audio); | |
| + break; | |
| + case AUDPP_MSG_FLUSH_ACK: | |
| + pr_debug("%s: FLUSH_ACK\n", __func__); | |
| + audio->wflush = 0; | |
| + audio->rflush = 0; | |
| + wake_up(&audio->write_wait); | |
| + if (audio->pcm_feedback) | |
| + audamrwb_buffer_refresh(audio); | |
| + break; | |
| + case AUDPP_MSG_PCMDMAMISSED: | |
| + pr_debug("%s: PCMDMAMISSED\n", __func__); | |
| + audio->teos = 1; | |
| + wake_up(&audio->write_wait); | |
| + break; | |
| + default: | |
| + pr_debug("audamrwb_dsp_event: UNKNOWN (%d)\n", id); | |
| + } | |
| + | |
| +} | |
| + | |
| +struct msm_adsp_ops audplay_adsp_ops_amrwb = { | |
| + .event = audplay_dsp_event, | |
| +}; | |
| + | |
| +#define audplay_send_queue0(audio, cmd, len) \ | |
| + msm_adsp_write(audio->audplay, audio->queue_id, \ | |
| + cmd, len) | |
| + | |
| +static int auddec_dsp_config(struct audio *audio, int enable) | |
| +{ | |
| + u16 cfg_dec_cmd[AUDPP_CMD_CFG_DEC_TYPE_LEN / sizeof(unsigned short)]; | |
| + | |
| + memset(cfg_dec_cmd, 0, sizeof(cfg_dec_cmd)); | |
| + cfg_dec_cmd[0] = AUDPP_CMD_CFG_DEC_TYPE; | |
| + if (enable) | |
| + cfg_dec_cmd[1 + audio->dec_id] = AUDPP_CMD_UPDATDE_CFG_DEC | | |
| + AUDPP_CMD_ENA_DEC_V | AUDDEC_DEC_AMRWB; | |
| + else | |
| + cfg_dec_cmd[1 + audio->dec_id] = AUDPP_CMD_UPDATDE_CFG_DEC | | |
| + AUDPP_CMD_DIS_DEC_V; | |
| + | |
| + return audpp_send_queue1(&cfg_dec_cmd, sizeof(cfg_dec_cmd)); | |
| +} | |
| + | |
| +static void audpp_cmd_cfg_adec_params(struct audio *audio) | |
| +{ | |
| + struct audpp_cmd_cfg_adec_params_amrwb cmd; | |
| + | |
| + memset(&cmd, 0, sizeof(cmd)); | |
| + cmd.common.cmd_id = AUDPP_CMD_CFG_ADEC_PARAMS; | |
| + cmd.common.length = AUDPP_CMD_CFG_ADEC_PARAMS_AMRWB_LEN; | |
| + cmd.common.dec_id = audio->dec_id; | |
| + cmd.common.input_sampling_frequency = audio->out_sample_rate; | |
| + cmd.stereo_cfg = audio->out_channel_mode; | |
| + audpp_send_queue2(&cmd, sizeof(cmd)); | |
| +} | |
| + | |
| +static void audpp_cmd_cfg_routing_mode(struct audio *audio) | |
| +{ | |
| + struct audpp_cmd_routing_mode cmd; | |
| + pr_debug("audpp_cmd_cfg_routing_mode()\n"); | |
| + memset(&cmd, 0, sizeof(cmd)); | |
| + cmd.cmd_id = AUDPP_CMD_ROUTING_MODE; | |
| + cmd.object_number = audio->dec_id; | |
| + if (audio->pcm_feedback) | |
| + cmd.routing_mode = ROUTING_MODE_FTRT; | |
| + else | |
| + cmd.routing_mode = ROUTING_MODE_RT; | |
| + | |
| + audpp_send_queue1(&cmd, sizeof(cmd)); | |
| +} | |
| + | |
| +static int audplay_dsp_send_data_avail(struct audio *audio, | |
| + unsigned idx, unsigned len) | |
| +{ | |
| + struct audplay_cmd_bitstream_data_avail_nt2 cmd; | |
| + | |
| + cmd.cmd_id = AUDPLAY_CMD_BITSTREAM_DATA_AVAIL_NT2; | |
| + if (audio->mfield) | |
| + cmd.decoder_id = AUDAMRWB_METAFIELD_MASK | | |
| + (audio->out[idx].mfield_sz >> 1); | |
| + else | |
| + cmd.decoder_id = audio->dec_id; | |
| + cmd.buf_ptr = audio->out[idx].addr; | |
| + cmd.buf_size = len / 2; | |
| + cmd.partition_number = 0; | |
| + return audplay_send_queue0(audio, &cmd, sizeof(cmd)); | |
| +} | |
| + | |
| +static void audamrwb_buffer_refresh(struct audio *audio) | |
| +{ | |
| + struct audplay_cmd_buffer_refresh refresh_cmd; | |
| + | |
| + refresh_cmd.cmd_id = AUDPLAY_CMD_BUFFER_REFRESH; | |
| + refresh_cmd.num_buffers = 1; | |
| + refresh_cmd.buf0_address = audio->in[audio->fill_next].addr; | |
| + refresh_cmd.buf0_length = audio->in[audio->fill_next].size; | |
| + refresh_cmd.buf_read_count = 0; | |
| + pr_debug("audplay_buffer_fresh: buf0_addr=%x buf0_len=%d\n", | |
| + refresh_cmd.buf0_address, refresh_cmd.buf0_length); | |
| + (void)audplay_send_queue0(audio, &refresh_cmd, sizeof(refresh_cmd)); | |
| +} | |
| + | |
| +static void audamrwb_config_hostpcm(struct audio *audio) | |
| +{ | |
| + struct audplay_cmd_hpcm_buf_cfg cfg_cmd; | |
| + | |
| + pr_debug("audamrwb_config_hostpcm()\n"); | |
| + cfg_cmd.cmd_id = AUDPLAY_CMD_HPCM_BUF_CFG; | |
| + cfg_cmd.max_buffers = audio->pcm_buf_count; | |
| + cfg_cmd.byte_swap = 0; | |
| + cfg_cmd.hostpcm_config = (0x8000) | (0x4000); | |
| + cfg_cmd.feedback_frequency = 1; | |
| + cfg_cmd.partition_number = 0; | |
| + (void)audplay_send_queue0(audio, &cfg_cmd, sizeof(cfg_cmd)); | |
| + | |
| +} | |
| + | |
| +static void audamrwb_send_data(struct audio *audio, unsigned needed) | |
| +{ | |
| + struct buffer *frame; | |
| + unsigned long flags; | |
| + | |
| + spin_lock_irqsave(&audio->dsp_lock, flags); | |
| + if (!audio->running) | |
| + goto done; | |
| + | |
| + if (needed && !audio->wflush) { | |
| + /* We were called from the callback because the DSP | |
| + * requested more data. Note that the DSP does want | |
| + * more data, and if a buffer was in-flight, mark it | |
| + * as available (since the DSP must now be done with | |
| + * it). | |
| + */ | |
| + audio->out_needed = 1; | |
| + frame = audio->out + audio->out_tail; | |
| + if (frame->used == 0xffffffff) { | |
| + frame->used = 0; | |
| + audio->out_tail ^= 1; | |
| + wake_up(&audio->write_wait); | |
| + } | |
| + } | |
| + | |
| + if (audio->out_needed) { | |
| + /* If the DSP currently wants data and we have a | |
| + * buffer available, we will send it and reset | |
| + * the needed flag. We'll mark the buffer as in-flight | |
| + * so that it won't be recycled until the next buffer | |
| + * is requested | |
| + */ | |
| + | |
| + frame = audio->out + audio->out_tail; | |
| + if (frame->used) { | |
| + BUG_ON(frame->used == 0xffffffff); | |
| + pr_debug("frame %d busy\n", audio->out_tail); | |
| + audplay_dsp_send_data_avail(audio, audio->out_tail, | |
| + frame->used); | |
| + frame->used = 0xffffffff; | |
| + audio->out_needed = 0; | |
| + } | |
| + } | |
| + done: | |
| + spin_unlock_irqrestore(&audio->dsp_lock, flags); | |
| +} | |
| + | |
| +/* ------------------- device --------------------- */ | |
| + | |
| +static void audamrwb_flush(struct audio *audio) | |
| +{ | |
| + audio->out[0].used = 0; | |
| + audio->out[1].used = 0; | |
| + audio->out_head = 0; | |
| + audio->out_tail = 0; | |
| + audio->reserved = 0; | |
| + audio->out_needed = 0; | |
| + atomic_set(&audio->out_bytes, 0); | |
| +} | |
| + | |
| +static void audamrwb_flush_pcm_buf(struct audio *audio) | |
| +{ | |
| + uint8_t index; | |
| + | |
| + for (index = 0; index < PCM_BUF_MAX_COUNT; index++) | |
| + audio->in[index].used = 0; | |
| + | |
| + audio->buf_refresh = 0; | |
| + audio->read_next = 0; | |
| + audio->fill_next = 0; | |
| +} | |
| + | |
| +static void audamrwb_ioport_reset(struct audio *audio) | |
| +{ | |
| + /* Make sure read/write thread are free from | |
| + * sleep and knowing that system is not able | |
| + * to process io request at the moment | |
| + */ | |
| + wake_up(&audio->write_wait); | |
| + mutex_lock(&audio->write_lock); | |
| + audamrwb_flush(audio); | |
| + mutex_unlock(&audio->write_lock); | |
| + wake_up(&audio->read_wait); | |
| + mutex_lock(&audio->read_lock); | |
| + audamrwb_flush_pcm_buf(audio); | |
| + mutex_unlock(&audio->read_lock); | |
| +} | |
| + | |
| +static int audamrwb_events_pending(struct audio *audio) | |
| +{ | |
| + unsigned long flags; | |
| + int empty; | |
| + | |
| + spin_lock_irqsave(&audio->event_queue_lock, flags); | |
| + empty = !list_empty(&audio->event_queue); | |
| + spin_unlock_irqrestore(&audio->event_queue_lock, flags); | |
| + return empty || audio->event_abort; | |
| +} | |
| + | |
| +static void audamrwb_reset_event_queue(struct audio *audio) | |
| +{ | |
| + unsigned long flags; | |
| + struct audamrwb_event *drv_evt; | |
| + struct list_head *ptr, *next; | |
| + | |
| + spin_lock_irqsave(&audio->event_queue_lock, flags); | |
| + list_for_each_safe(ptr, next, &audio->event_queue) { | |
| + drv_evt = list_first_entry(&audio->event_queue, | |
| + struct audamrwb_event, list); | |
| + list_del(&drv_evt->list); | |
| + kfree(drv_evt); | |
| + } | |
| + list_for_each_safe(ptr, next, &audio->free_event_queue) { | |
| + drv_evt = list_first_entry(&audio->free_event_queue, | |
| + struct audamrwb_event, list); | |
| + list_del(&drv_evt->list); | |
| + kfree(drv_evt); | |
| + } | |
| + spin_unlock_irqrestore(&audio->event_queue_lock, flags); | |
| + | |
| + return; | |
| +} | |
| + | |
| +static long audamrwb_process_event_req(struct audio *audio, void __user *arg) | |
| +{ | |
| + long rc; | |
| + struct msm_audio_event usr_evt; | |
| + struct audamrwb_event *drv_evt = NULL; | |
| + int timeout; | |
| + unsigned long flags; | |
| + | |
| + if (copy_from_user(&usr_evt, arg, sizeof(struct msm_audio_event))) | |
| + return -EFAULT; | |
| + | |
| + timeout = (int) usr_evt.timeout_ms; | |
| + | |
| + if (timeout > 0) { | |
| + rc = wait_event_interruptible_timeout( | |
| + audio->event_wait, audamrwb_events_pending(audio), | |
| + msecs_to_jiffies(timeout)); | |
| + if (rc == 0) | |
| + return -ETIMEDOUT; | |
| + } else { | |
| + rc = wait_event_interruptible( | |
| + audio->event_wait, audamrwb_events_pending(audio)); | |
| + } | |
| + | |
| + if (rc < 0) | |
| + return rc; | |
| + | |
| + if (audio->event_abort) { | |
| + audio->event_abort = 0; | |
| + return -ENODEV; | |
| + } | |
| + | |
| + rc = 0; | |
| + | |
| + spin_lock_irqsave(&audio->event_queue_lock, flags); | |
| + if (!list_empty(&audio->event_queue)) { | |
| + drv_evt = list_first_entry(&audio->event_queue, | |
| + struct audamrwb_event, list); | |
| + list_del(&drv_evt->list); | |
| + } | |
| + | |
| + if (drv_evt) { | |
| + usr_evt.event_type = drv_evt->event_type; | |
| + usr_evt.event_payload = drv_evt->payload; | |
| + list_add_tail(&drv_evt->list, &audio->free_event_queue); | |
| + } else | |
| + rc = -1; | |
| + spin_unlock_irqrestore(&audio->event_queue_lock, flags); | |
| + | |
| + if (!rc && copy_to_user(arg, &usr_evt, sizeof(usr_evt))) | |
| + rc = -EFAULT; | |
| + | |
| + return rc; | |
| +} | |
| + | |
| +static int audio_enable_eq(struct audio *audio, int enable) | |
| +{ | |
| + if (audio->eq_enable == enable && !audio->eq_needs_commit) | |
| + return 0; | |
| + | |
| + audio->eq_enable = enable; | |
| + | |
| + if (audio->running) { | |
| + audpp_dsp_set_eq(audio->dec_id, enable, &audio->eq); | |
| + audio->eq_needs_commit = 0; | |
| + } | |
| + return 0; | |
| +} | |
| + | |
| +static long audamrwb_ioctl(struct file *file, unsigned int cmd, | |
| + unsigned long arg) | |
| +{ | |
| + struct audio *audio = file->private_data; | |
| + int rc = -EINVAL; | |
| + unsigned long flags = 0; | |
| + uint16_t enable_mask; | |
| + int enable; | |
| + int prev_state; | |
| + | |
| + pr_debug("audamrwb_ioctl() cmd = %d\n", cmd); | |
| + | |
| + if (cmd == AUDIO_GET_STATS) { | |
| + struct msm_audio_stats stats; | |
| + stats.byte_count = audpp_avsync_byte_count(audio->dec_id); | |
| + stats.sample_count = audpp_avsync_sample_count(audio->dec_id); | |
| + if (copy_to_user((void *)arg, &stats, sizeof(stats))) | |
| + return -EFAULT; | |
| + return 0; | |
| + } | |
| + | |
| + switch (cmd) { | |
| + case AUDIO_ENABLE_AUDPP: | |
| + if (copy_from_user(&enable_mask, (void *) arg, | |
| + sizeof(enable_mask))) { | |
| + rc = -EFAULT; | |
| + break; | |
| + } | |
| + | |
| + spin_lock_irqsave(&audio->dsp_lock, flags); | |
| + enable = (enable_mask & EQ_ENABLE) ? 1 : 0; | |
| + audio_enable_eq(audio, enable); | |
| + spin_unlock_irqrestore(&audio->dsp_lock, flags); | |
| + rc = 0; | |
| + break; | |
| + case AUDIO_SET_VOLUME: | |
| + spin_lock_irqsave(&audio->dsp_lock, flags); | |
| + audio->vol_pan.volume = arg; | |
| + if (audio->running) | |
| + audpp_dsp_set_vol_pan(audio->dec_id, &audio->vol_pan); | |
| + spin_unlock_irqrestore(&audio->dsp_lock, flags); | |
| + rc = 0; | |
| + break; | |
| + | |
| + case AUDIO_SET_PAN: | |
| + spin_lock_irqsave(&audio->dsp_lock, flags); | |
| + audio->vol_pan.pan = arg; | |
| + if (audio->running) | |
| + audpp_dsp_set_vol_pan(audio->dec_id, &audio->vol_pan); | |
| + spin_unlock_irqrestore(&audio->dsp_lock, flags); | |
| + rc = 0; | |
| + break; | |
| + | |
| + case AUDIO_SET_EQ: | |
| + prev_state = audio->eq_enable; | |
| + audio->eq_enable = 0; | |
| + if (copy_from_user(&audio->eq.num_bands, (void *) arg, | |
| + sizeof(audio->eq) - | |
| + (AUDPP_CMD_CFG_OBJECT_PARAMS_COMMON_LEN + 2))) { | |
| + rc = -EFAULT; | |
| + break; | |
| + } | |
| + audio->eq_enable = prev_state; | |
| + audio->eq_needs_commit = 1; | |
| + rc = 0; | |
| + break; | |
| + } | |
| + | |
| + if (-EINVAL != rc) | |
| + return rc; | |
| + | |
| + if (cmd == AUDIO_GET_EVENT) { | |
| + pr_debug("%s: AUDIO_GET_EVENT\n", __func__); | |
| + if (mutex_trylock(&audio->get_event_lock)) { | |
| + rc = audamrwb_process_event_req(audio, | |
| + (void __user *) arg); | |
| + mutex_unlock(&audio->get_event_lock); | |
| + } else | |
| + rc = -EBUSY; | |
| + return rc; | |
| + } | |
| + | |
| + if (cmd == AUDIO_ABORT_GET_EVENT) { | |
| + audio->event_abort = 1; | |
| + wake_up(&audio->event_wait); | |
| + return 0; | |
| + } | |
| + | |
| + mutex_lock(&audio->lock); | |
| + switch (cmd) { | |
| + case AUDIO_START: | |
| + MM_DBG("AUDIO_START\n"); | |
| + audio->dec_state = MSM_AUD_DECODER_STATE_NONE; | |
| + rc = audamrwb_enable(audio); | |
| + if (!rc) { | |
| + rc = wait_event_interruptible_timeout(audio->wait, | |
| + audio->dec_state != MSM_AUD_DECODER_STATE_NONE, | |
| + msecs_to_jiffies(MSM_AUD_DECODER_WAIT_MS)); | |
| + pr_debug("dec_state %d rc = %d\n", | |
| + audio->dec_state, rc); | |
| + | |
| + if (audio->dec_state != MSM_AUD_DECODER_STATE_SUCCESS) | |
| + rc = -ENODEV; | |
| + else | |
| + rc = 0; | |
| + } | |
| + break; | |
| + case AUDIO_STOP: | |
| + MM_DBG("AUDIO_STOP\n"); | |
| + rc = audamrwb_disable(audio); | |
| + audio->stopped = 1; | |
| + audamrwb_ioport_reset(audio); | |
| + audio->stopped = 0; | |
| + break; | |
| + case AUDIO_FLUSH: | |
| + pr_debug("%s: AUDIO_FLUSH\n", __func__); | |
| + audio->rflush = 1; | |
| + audio->wflush = 1; | |
| + audamrwb_ioport_reset(audio); | |
| + if (audio->running) { | |
| + audpp_flush(audio->dec_id); | |
| + rc = wait_event_interruptible(audio->write_wait, | |
| + !audio->wflush); | |
| + if (rc < 0) { | |
| + pr_err("%s: AUDIO_FLUSH interrupted\n", | |
| + __func__); | |
| + rc = -EINTR; | |
| + } | |
| + } else { | |
| + audio->rflush = 0; | |
| + audio->wflush = 0; | |
| + } | |
| + break; | |
| + case AUDIO_SET_CONFIG:{ | |
| + struct msm_audio_config config; | |
| + if (copy_from_user | |
| + (&config, (void *)arg, sizeof(config))) { | |
| + rc = -EFAULT; | |
| + break; | |
| + } | |
| + if (config.channel_count == 1) | |
| + config.channel_count = | |
| + AUDPP_CMD_PCM_INTF_MONO_V; | |
| + else if (config.channel_count == 2) | |
| + config.channel_count = | |
| + AUDPP_CMD_PCM_INTF_STEREO_V; | |
| + else | |
| + rc = -EINVAL; | |
| + audio->out_channel_mode = config.channel_count; | |
| + audio->out_sample_rate = config.sample_rate; | |
| + audio->mfield = config.meta_field; | |
| + rc = 0; | |
| + break; | |
| + } | |
| + case AUDIO_GET_CONFIG:{ | |
| + struct msm_audio_config config; | |
| + config.buffer_size = BUFSZ; | |
| + config.buffer_count = 2; | |
| + config.sample_rate = audio->out_sample_rate; | |
| + if (audio->out_channel_mode == | |
| + AUDPP_CMD_PCM_INTF_MONO_V) | |
| + config.channel_count = 1; | |
| + else | |
| + config.channel_count = 2; | |
| + config.meta_field = 0; | |
| + config.unused[0] = 0; | |
| + config.unused[1] = 0; | |
| + config.unused[2] = 0; | |
| + if (copy_to_user((void *)arg, &config, | |
| + sizeof(config))) | |
| + rc = -EFAULT; | |
| + else | |
| + rc = 0; | |
| + | |
| + break; | |
| + } | |
| + case AUDIO_GET_PCM_CONFIG:{ | |
| + struct msm_audio_pcm_config config; | |
| + config.pcm_feedback = 0; | |
| + config.buffer_count = PCM_BUF_MAX_COUNT; | |
| + config.buffer_size = PCM_BUFSZ_MIN; | |
| + if (copy_to_user((void *)arg, &config, | |
| + sizeof(config))) | |
| + rc = -EFAULT; | |
| + else | |
| + rc = 0; | |
| + break; | |
| + } | |
| + case AUDIO_SET_PCM_CONFIG:{ | |
| + struct msm_audio_pcm_config config; | |
| + if (copy_from_user | |
| + (&config, (void *)arg, sizeof(config))) { | |
| + rc = -EFAULT; | |
| + break; | |
| + } | |
| + if ((config.buffer_count > PCM_BUF_MAX_COUNT) || | |
| + (config.buffer_count == 1)) | |
| + config.buffer_count = PCM_BUF_MAX_COUNT; | |
| + | |
| + if (config.buffer_size < PCM_BUFSZ_MIN) | |
| + config.buffer_size = PCM_BUFSZ_MIN; | |
| + | |
| + /* Check if pcm feedback is required */ | |
| + if ((config.pcm_feedback) && (!audio->read_data)) { | |
| + pr_debug("audamrwb_ioctl: allocate PCM buf %d\n", | |
| + config.buffer_count * | |
| + config.buffer_size); | |
| + audio->read_phys = pmem_kalloc( | |
| + config.buffer_size * | |
| + config.buffer_count, | |
| + PMEM_MEMTYPE_EBI1| | |
| + PMEM_ALIGNMENT_4K); | |
| + if (IS_ERR((void *)audio->read_phys)) { | |
| + rc = -ENOMEM; | |
| + break; | |
| + } | |
| + audio->read_data = ioremap(audio->read_phys, | |
| + config.buffer_size * | |
| + config.buffer_count); | |
| + if (!audio->read_data) { | |
| + pr_err("audamrwb_ioctl: no mem for read buf\n"); | |
| + rc = -ENOMEM; | |
| + pmem_kfree(audio->read_phys); | |
| + } else { | |
| + uint8_t index; | |
| + uint32_t offset = 0; | |
| + audio->pcm_feedback = 1; | |
| + audio->buf_refresh = 0; | |
| + audio->pcm_buf_count = | |
| + config.buffer_count; | |
| + audio->read_next = 0; | |
| + audio->fill_next = 0; | |
| + | |
| + for (index = 0; | |
| + index < config.buffer_count; index++) { | |
| + audio->in[index].data = | |
| + audio->read_data + offset; | |
| + audio->in[index].addr = | |
| + audio->read_phys + offset; | |
| + audio->in[index].size = | |
| + config.buffer_size; | |
| + audio->in[index].used = 0; | |
| + offset += config.buffer_size; | |
| + } | |
| + pr_debug("read buf: phy addr 0x%08x \ | |
| + kernel addr 0x%08x\n", | |
| + audio->read_phys, | |
| + (int)audio->read_data); | |
| + rc = 0; | |
| + } | |
| + } else { | |
| + rc = 0; | |
| + } | |
| + break; | |
| + } | |
| + default: | |
| + rc = -EINVAL; | |
| + } | |
| + mutex_unlock(&audio->lock); | |
| + return rc; | |
| +} | |
| + | |
| +/* Only useful in tunnel-mode */ | |
| +static int audamrwb_fsync(struct file *file, struct dentry *dentry, | |
| + int datasync) | |
| +{ | |
| + struct audio *audio = file->private_data; | |
| + struct buffer *frame; | |
| + int rc = 0; | |
| + | |
| + pr_debug("%s()\n", __func__); | |
| + | |
| + if (!audio->running || audio->pcm_feedback) { | |
| + rc = -EINVAL; | |
| + goto done_nolock; | |
| + } | |
| + | |
| + mutex_lock(&audio->write_lock); | |
| + | |
| + rc = wait_event_interruptible(audio->write_wait, | |
| + (!audio->out[0].used && | |
| + !audio->out[1].used && | |
| + audio->out_needed) || audio->wflush); | |
| + | |
| + if (rc < 0) | |
| + goto done; | |
| + else if (audio->wflush) { | |
| + rc = -EBUSY; | |
| + goto done; | |
| + } | |
| + | |
| + if (audio->reserved) { | |
| + pr_debug("%s: send reserved byte\n", __func__); | |
| + frame = audio->out + audio->out_tail; | |
| + ((char *) frame->data)[0] = audio->rsv_byte; | |
| + ((char *) frame->data)[1] = 0; | |
| + frame->used = 2; | |
| + audamrwb_send_data(audio, 0); | |
| + | |
| + rc = wait_event_interruptible(audio->write_wait, | |
| + (!audio->out[0].used && | |
| + !audio->out[1].used && | |
| + audio->out_needed) || audio->wflush); | |
| + | |
| + if (rc < 0) | |
| + goto done; | |
| + else if (audio->wflush) { | |
| + rc = -EBUSY; | |
| + goto done; | |
| + } | |
| + } | |
| + | |
| + /* pcm dmamiss message is sent continously | |
| + * when decoder is starved so no race | |
| + * condition concern | |
| + */ | |
| + audio->teos = 0; | |
| + | |
| + rc = wait_event_interruptible(audio->write_wait, | |
| + audio->teos || audio->wflush); | |
| + | |
| + if (audio->wflush) | |
| + rc = -EBUSY; | |
| + | |
| +done: | |
| + mutex_unlock(&audio->write_lock); | |
| +done_nolock: | |
| + return rc; | |
| +} | |
| + | |
| +static ssize_t audamrwb_read(struct file *file, char __user *buf, size_t count, | |
| + loff_t *pos) | |
| +{ | |
| + struct audio *audio = file->private_data; | |
| + const char __user *start = buf; | |
| + int rc = 0; | |
| + | |
| + if (!audio->pcm_feedback) | |
| + return 0; /* PCM feedback is not enabled. Nothing to read */ | |
| + | |
| + mutex_lock(&audio->read_lock); | |
| + pr_debug("audamrwb_read() %d \n", count); | |
| + while (count > 0) { | |
| + rc = wait_event_interruptible(audio->read_wait, | |
| + (audio->in[audio->read_next].used > 0) || | |
| + (audio->stopped) || (audio->rflush)); | |
| + | |
| + if (rc < 0) | |
| + break; | |
| + | |
| + if (audio->stopped || audio->rflush) { | |
| + rc = -EBUSY; | |
| + break; | |
| + } | |
| + | |
| + if (count < audio->in[audio->read_next].used) { | |
| + /* Read must happen in frame boundary. Since driver does | |
| + * not know frame size, read count must be greater or | |
| + * equal to size of PCM samples | |
| + */ | |
| + pr_debug("audamrwb_read:read stop - partial frame\n"); | |
| + break; | |
| + } else { | |
| + pr_debug("audamrwb_read: read from in[%d]\n", | |
| + audio->read_next); | |
| + | |
| + if (copy_to_user | |
| + (buf, audio->in[audio->read_next].data, | |
| + audio->in[audio->read_next].used)) { | |
| + pr_err("audamrwb_read: invalid addr %x \n", | |
| + (unsigned int)buf); | |
| + rc = -EFAULT; | |
| + break; | |
| + } | |
| + count -= audio->in[audio->read_next].used; | |
| + buf += audio->in[audio->read_next].used; | |
| + audio->in[audio->read_next].used = 0; | |
| + if ((++audio->read_next) == audio->pcm_buf_count) | |
| + audio->read_next = 0; | |
| + break; | |
| + } | |
| + } | |
| + | |
| + /* don't feed output buffer to HW decoder during flushing | |
| + * buffer refresh command will be sent once flush completes | |
| + * send buf refresh command here can confuse HW decoder | |
| + */ | |
| + if (audio->buf_refresh && !audio->rflush) { | |
| + audio->buf_refresh = 0; | |
| + pr_debug("audamrwb_read: kick start pcm feedback again\n"); | |
| + audamrwb_buffer_refresh(audio); | |
| + } | |
| + | |
| + mutex_unlock(&audio->read_lock); | |
| + | |
| + if (buf > start) | |
| + rc = buf - start; | |
| + | |
| + pr_debug("audamrwb_read: read %d bytes\n", rc); | |
| + return rc; | |
| +} | |
| + | |
| +static int audamrwb_process_eos(struct audio *audio, | |
| + const char __user *buf_start, unsigned short mfield_size) | |
| +{ | |
| + struct buffer *frame; | |
| + char *buf_ptr; | |
| + int rc = 0; | |
| + | |
| + pr_debug("signal input EOS reserved=%d\n", audio->reserved); | |
| + if (audio->reserved) { | |
| + pr_debug("%s, Pass reserve byte\n", __func__); | |
| + frame = audio->out + audio->out_head; | |
| + buf_ptr = frame->data; | |
| + rc = wait_event_interruptible(audio->write_wait, | |
| + (frame->used == 0) | |
| + || (audio->stopped) | |
| + || (audio->wflush)); | |
| + if (rc < 0) | |
| + goto done; | |
| + if (audio->stopped || audio->wflush) { | |
| + rc = -EBUSY; | |
| + goto done; | |
| + } | |
| + buf_ptr[0] = audio->rsv_byte; | |
| + buf_ptr[1] = 0; | |
| + audio->out_head ^= 1; | |
| + frame->mfield_sz = 0; | |
| + audio->reserved = 0; | |
| + frame->used = 2; | |
| + audamrwb_send_data(audio, 0); | |
| + } | |
| + | |
| + pr_debug("Now signal input EOS after reserved bytes %d %d %d\n", | |
| + audio->out[0].used, audio->out[1].used, audio->out_needed); | |
| + | |
| + frame = audio->out + audio->out_head; | |
| + | |
| + rc = wait_event_interruptible(audio->write_wait, | |
| + (audio->out_needed && | |
| + audio->out[0].used == 0 && | |
| + audio->out[1].used == 0) | |
| + || (audio->stopped) | |
| + || (audio->wflush)); | |
| + | |
| + if (rc < 0) | |
| + goto done; | |
| + if (audio->stopped || audio->wflush) { | |
| + rc = -EBUSY; | |
| + goto done; | |
| + } | |
| + | |
| + if (copy_from_user(frame->data, buf_start, mfield_size)) { | |
| + rc = -EFAULT; | |
| + goto done; | |
| + } | |
| + | |
| + frame->mfield_sz = mfield_size; | |
| + audio->out_head ^= 1; | |
| + frame->used = mfield_size; | |
| + audamrwb_send_data(audio, 0); | |
| + | |
| +done: | |
| + return rc; | |
| +} | |
| + | |
| +static ssize_t audamrwb_write(struct file *file, const char __user *buf, | |
| + size_t count, loff_t *pos) | |
| +{ | |
| + struct audio *audio = file->private_data; | |
| + const char __user *start = buf; | |
| + struct buffer *frame; | |
| + size_t xfer; | |
| + char *cpy_ptr; | |
| + int rc = 0, eos_condition = AUDAMRWB_EOS_NONE; | |
| + unsigned short mfield_size = 0; | |
| + unsigned dsize; | |
| + | |
| + pr_debug("%s: cnt=%d\n", __func__, count); | |
| + | |
| + mutex_lock(&audio->write_lock); | |
| + while (count > 0) { | |
| + frame = audio->out + audio->out_head; | |
| + cpy_ptr = frame->data; | |
| + dsize = 0; | |
| + rc = wait_event_interruptible(audio->write_wait, | |
| + (frame->used == 0) | |
| + || (audio->stopped) | |
| + || (audio->wflush)); | |
| + | |
| + pr_debug("audamrwb_write() buffer available\n"); | |
| + if (rc < 0) | |
| + break; | |
| + if (audio->stopped || audio->wflush) { | |
| + rc = -EBUSY; | |
| + break; | |
| + } | |
| + | |
| + if (audio->mfield) { | |
| + if (buf == start) { | |
| + /* Processing beginning of user buffer */ | |
| + if (__get_user(mfield_size, | |
| + (unsigned short __user *) buf)) { | |
| + rc = -EFAULT; | |
| + break; | |
| + } else if (mfield_size > count) { | |
| + rc = -EINVAL; | |
| + break; | |
| + } | |
| + pr_debug("audio_write: mf offset_val %x\n", | |
| + mfield_size); | |
| + if (copy_from_user(cpy_ptr, buf, mfield_size)) { | |
| + rc = -EFAULT; | |
| + break; | |
| + } | |
| + /* Check if EOS flag is set and buffer | |
| + * contains just meta field | |
| + */ | |
| + if (cpy_ptr[AUDAMRWB_EOS_FLG_OFFSET] & | |
| + AUDAMRWB_EOS_FLG_MASK) { | |
| + pr_debug("audamrwb_write: eos set\n"); | |
| + eos_condition = AUDAMRWB_EOS_SET; | |
| + if (mfield_size == count) { | |
| + buf += mfield_size; | |
| + break; | |
| + } else | |
| + cpy_ptr[AUDAMRWB_EOS_FLG_OFFSET] &= | |
| + ~AUDAMRWB_EOS_FLG_MASK; | |
| + } | |
| + cpy_ptr += mfield_size; | |
| + count -= mfield_size; | |
| + dsize += mfield_size; | |
| + buf += mfield_size; | |
| + } else { | |
| + mfield_size = 0; | |
| + pr_debug("audio_write: continuous buffer\n"); | |
| + } | |
| + frame->mfield_sz = mfield_size; | |
| + } | |
| + | |
| + if (audio->reserved) { | |
| + pr_debug("append reserved byte %x\n", audio->rsv_byte); | |
| + *cpy_ptr = audio->rsv_byte; | |
| + xfer = (count > ((frame->size - mfield_size) - 1)) ? | |
| + ((frame->size - mfield_size) - 1) : count; | |
| + cpy_ptr++; | |
| + dsize += 1; | |
| + audio->reserved = 0; | |
| + } else | |
| + xfer = (count > (frame->size - mfield_size)) ? | |
| + (frame->size - mfield_size) : count; | |
| + | |
| + if (copy_from_user(cpy_ptr, buf, xfer)) { | |
| + rc = -EFAULT; | |
| + break; | |
| + } | |
| + | |
| + dsize += xfer; | |
| + if (dsize & 1) { | |
| + audio->rsv_byte = ((char *) frame->data)[dsize - 1]; | |
| + pr_debug("odd length buf reserve last byte %x\n", | |
| + audio->rsv_byte); | |
| + audio->reserved = 1; | |
| + dsize--; | |
| + } | |
| + count -= xfer; | |
| + buf += xfer; | |
| + | |
| + if (dsize > 0) { | |
| + audio->out_head ^= 1; | |
| + frame->used = dsize; | |
| + audamrwb_send_data(audio, 0); | |
| + } | |
| + } | |
| + pr_debug("audio_write: eos_condition %x buf[0x%x] start[0x%x]\n", | |
| + eos_condition, (int) buf, (int) start); | |
| + if (eos_condition == AUDAMRWB_EOS_SET) | |
| + rc = audamrwb_process_eos(audio, start, mfield_size); | |
| + mutex_unlock(&audio->write_lock); | |
| + if (!rc) { | |
| + if (buf > start) | |
| + return buf - start; | |
| + } | |
| + return rc; | |
| +} | |
| + | |
| +static int audamrwb_release(struct inode *inode, struct file *file) | |
| +{ | |
| + struct audio *audio = file->private_data; | |
| + | |
| + pr_debug("audamrwb_release()\n"); | |
| + | |
| + pr_info("%s: audio instance 0x%08x freeing\n", __func__, (int)audio); | |
| + mutex_lock(&audio->lock); | |
| + audamrwb_disable(audio); | |
| + audamrwb_flush(audio); | |
| + audamrwb_flush_pcm_buf(audio); | |
| + msm_adsp_put(audio->audplay); | |
| + audpp_adec_free(audio->dec_id); | |
| +#ifdef CONFIG_HAS_EARLYSUSPEND | |
| + unregister_early_suspend(&audio->suspend_ctl.node); | |
| +#endif | |
| + audio->event_abort = 1; | |
| + wake_up(&audio->event_wait); | |
| + audamrwb_reset_event_queue(audio); | |
| + iounmap(audio->data); | |
| + pmem_kfree(audio->phys); | |
| + if (audio->read_data) { | |
| + iounmap(audio->read_data); | |
| + pmem_kfree(audio->read_phys); | |
| + } | |
| + mutex_unlock(&audio->lock); | |
| +#ifdef CONFIG_DEBUG_FS | |
| + if (audio->dentry) | |
| + debugfs_remove(audio->dentry); | |
| +#endif | |
| + kfree(audio); | |
| + return 0; | |
| +} | |
| + | |
| +static void audamrwb_post_event(struct audio *audio, int type, | |
| + union msm_audio_event_payload payload) | |
| +{ | |
| + struct audamrwb_event *e_node = NULL; | |
| + unsigned long flags; | |
| + | |
| + spin_lock_irqsave(&audio->event_queue_lock, flags); | |
| + | |
| + if (!list_empty(&audio->free_event_queue)) { | |
| + e_node = list_first_entry(&audio->free_event_queue, | |
| + struct audamrwb_event, list); | |
| + list_del(&e_node->list); | |
| + } else { | |
| + e_node = kmalloc(sizeof(struct audamrwb_event), GFP_ATOMIC); | |
| + if (!e_node) { | |
| + pr_err("%s: No mem to post event %d\n", __func__, type); | |
| + return; | |
| + } | |
| + } | |
| + | |
| + e_node->event_type = type; | |
| + e_node->payload = payload; | |
| + | |
| + list_add_tail(&e_node->list, &audio->event_queue); | |
| + spin_unlock_irqrestore(&audio->event_queue_lock, flags); | |
| + wake_up(&audio->event_wait); | |
| +} | |
| + | |
| +#ifdef CONFIG_HAS_EARLYSUSPEND | |
| +static void audamrwb_suspend(struct early_suspend *h) | |
| +{ | |
| + struct audamrwb_suspend_ctl *ctl = | |
| + container_of(h, struct audamrwb_suspend_ctl, node); | |
| + union msm_audio_event_payload payload; | |
| + | |
| + pr_debug("%s()\n", __func__); | |
| + audamrwb_post_event(ctl->audio, AUDIO_EVENT_SUSPEND, payload); | |
| +} | |
| + | |
| +static void audamrwb_resume(struct early_suspend *h) | |
| +{ | |
| + struct audamrwb_suspend_ctl *ctl = | |
| + container_of(h, struct audamrwb_suspend_ctl, node); | |
| + union msm_audio_event_payload payload; | |
| + | |
| + pr_debug("%s()\n", __func__); | |
| + audamrwb_post_event(ctl->audio, AUDIO_EVENT_RESUME, payload); | |
| +} | |
| +#endif | |
| + | |
| +#ifdef CONFIG_DEBUG_FS | |
| +static ssize_t audamrwb_debug_open(struct inode *inode, struct file *file) | |
| +{ | |
| + file->private_data = inode->i_private; | |
| + return 0; | |
| +} | |
| + | |
| +static ssize_t audamrwb_debug_read(struct file *file, char __user *buf, | |
| + size_t count, loff_t *ppos) | |
| +{ | |
| + const int debug_bufmax = 1024; | |
| + static char buffer[1024]; | |
| + int n = 0, i; | |
| + struct audio *audio = file->private_data; | |
| + | |
| + mutex_lock(&audio->lock); | |
| + n = scnprintf(buffer, debug_bufmax, "opened %d\n", audio->opened); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "enabled %d\n", audio->enabled); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "stopped %d\n", audio->stopped); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "pcm_feedback %d\n", audio->pcm_feedback); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "out_buf_sz %d\n", audio->out[0].size); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "pcm_buf_count %d \n", audio->pcm_buf_count); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "pcm_buf_sz %d \n", audio->in[0].size); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "volume %x \n", audio->vol_pan.volume); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "sample rate %d \n", audio->out_sample_rate); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "channel mode %d \n", audio->out_channel_mode); | |
| + mutex_unlock(&audio->lock); | |
| + /* Following variables are only useful for debugging when | |
| + * when playback halts unexpectedly. Thus, no mutual exclusion | |
| + * enforced | |
| + */ | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "wflush %d\n", audio->wflush); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "rflush %d\n", audio->rflush); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "running %d \n", audio->running); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "dec state %d \n", audio->dec_state); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "out_needed %d \n", audio->out_needed); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "out_head %d \n", audio->out_head); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "out_tail %d \n", audio->out_tail); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "out[0].used %d \n", audio->out[0].used); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "out[1].used %d \n", audio->out[1].used); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "buffer_refresh %d \n", audio->buf_refresh); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "read_next %d \n", audio->read_next); | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "fill_next %d \n", audio->fill_next); | |
| + for (i = 0; i < audio->pcm_buf_count; i++) | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "in[%d].used %d \n", i, audio->in[i].used); | |
| + buffer[n] = 0; | |
| + return simple_read_from_buffer(buf, count, ppos, buffer, n); | |
| +} | |
| + | |
| +static const struct file_operations audamrwb_debug_fops = { | |
| + .read = audamrwb_debug_read, | |
| + .open = audamrwb_debug_open, | |
| +}; | |
| +#endif | |
| + | |
| +static int audamrwb_open(struct inode *inode, struct file *file) | |
| +{ | |
| + struct audio *audio = NULL; | |
| + int rc, dec_attrb, decid, i; | |
| + struct audamrwb_event *e_node = NULL; | |
| +#ifdef CONFIG_DEBUG_FS | |
| + /* 4 bytes represents decoder number, 1 byte for terminate string */ | |
| + char name[sizeof "msm_amrwb_" + 5]; | |
| +#endif | |
| + | |
| + /* Allocate Mem for audio instance */ | |
| + audio = kzalloc(sizeof(struct audio), GFP_KERNEL); | |
| + if (!audio) { | |
| + pr_err("%s: no memory to allocate audio instance \n", __func__); | |
| + rc = -ENOMEM; | |
| + goto done; | |
| + } | |
| + pr_info("%s: audio instance 0x%08x created\n", __func__, (int)audio); | |
| + | |
| + /* Allocate the decoder */ | |
| + dec_attrb = AUDDEC_DEC_AMRWB; | |
| + if (file->f_mode & FMODE_READ) | |
| + dec_attrb |= MSM_AUD_MODE_NONTUNNEL; | |
| + else | |
| + dec_attrb |= MSM_AUD_MODE_TUNNEL; | |
| + | |
| + decid = audpp_adec_alloc(dec_attrb, &audio->module_name, | |
| + &audio->queue_id); | |
| + | |
| + if (decid < 0) { | |
| + pr_err("%s: No free decoder available\n", __func__); | |
| + rc = -ENODEV; | |
| + pr_info("%s: audio instance 0x%08x freeing\n", __func__, | |
| + (int)audio); | |
| + kfree(audio); | |
| + goto done; | |
| + } | |
| + | |
| + audio->dec_id = decid & MSM_AUD_DECODER_MASK; | |
| + | |
| + audio->phys = pmem_kalloc(DMASZ, PMEM_MEMTYPE_EBI1|PMEM_ALIGNMENT_4K); | |
| + if (IS_ERR((void *)audio->phys)) { | |
| + pr_err("%s: could not allocate write buffers\n", __func__); | |
| + rc = -ENOMEM; | |
| + audpp_adec_free(audio->dec_id); | |
| + pr_info("%s: audio instance 0x%08x freeing\n", __func__, | |
| + (int)audio); | |
| + kfree(audio); | |
| + goto done; | |
| + } else { | |
| + audio->data = ioremap(audio->phys, DMASZ); | |
| + if (!audio->data) { | |
| + pr_err("%s: could not allocate write buffers\n", | |
| + __func__); | |
| + rc = -ENOMEM; | |
| + pmem_kfree(audio->phys); | |
| + audpp_adec_free(audio->dec_id); | |
| + pr_info("%s: audio instance 0x%08x freeing\n", __func__, | |
| + (int)audio); | |
| + kfree(audio); | |
| + goto done; | |
| + } | |
| + pr_debug("write buf: phy addr 0x%08x kernel addr 0x%08x\n", | |
| + audio->phys, (int)audio->data); | |
| + } | |
| + | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) { | |
| + rc = audmgr_open(&audio->audmgr); | |
| + if (rc) | |
| + goto err; | |
| + } | |
| + | |
| + rc = msm_adsp_get(audio->module_name, &audio->audplay, | |
| + &audplay_adsp_ops_amrwb, audio); | |
| + if (rc) { | |
| + pr_err("%s: failed to get %s module\n", __func__, | |
| + audio->module_name); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_close(&audio->audmgr); | |
| + goto err; | |
| + } | |
| + | |
| + mutex_init(&audio->lock); | |
| + mutex_init(&audio->write_lock); | |
| + mutex_init(&audio->read_lock); | |
| + mutex_init(&audio->get_event_lock); | |
| + spin_lock_init(&audio->dsp_lock); | |
| + spin_lock_init(&audio->event_queue_lock); | |
| + INIT_LIST_HEAD(&audio->free_event_queue); | |
| + INIT_LIST_HEAD(&audio->event_queue); | |
| + init_waitqueue_head(&audio->write_wait); | |
| + init_waitqueue_head(&audio->read_wait); | |
| + init_waitqueue_head(&audio->wait); | |
| + init_waitqueue_head(&audio->event_wait); | |
| + | |
| + audio->out[0].data = audio->data + 0; | |
| + audio->out[0].addr = audio->phys + 0; | |
| + audio->out[0].size = BUFSZ; | |
| + | |
| + audio->out[1].data = audio->data + BUFSZ; | |
| + audio->out[1].addr = audio->phys + BUFSZ; | |
| + audio->out[1].size = BUFSZ; | |
| + | |
| + audio->vol_pan.volume = 0x2000; | |
| + audio->vol_pan.pan = 0x0; | |
| + audio->eq_enable = 0; | |
| + audio->out_sample_rate = 44100; | |
| + audio->out_channel_mode = AUDPP_CMD_PCM_INTF_STEREO_V; | |
| + | |
| + audamrwb_flush(audio); | |
| + | |
| + file->private_data = audio; | |
| + audio->opened = 1; | |
| + audio->event_abort = 0; | |
| +#ifdef CONFIG_DEBUG_FS | |
| + snprintf(name, sizeof name, "msm_amrwb_%04x", audio->dec_id); | |
| + audio->dentry = debugfs_create_file(name, S_IFREG | S_IRUGO, | |
| + NULL, (void *) audio, &audamrwb_debug_fops); | |
| + | |
| + if (IS_ERR(audio->dentry)) | |
| + pr_debug("%s:debugfs_create_file failed\n", __func__); | |
| +#endif | |
| +#ifdef CONFIG_HAS_EARLYSUSPEND | |
| + audio->suspend_ctl.node.level = EARLY_SUSPEND_LEVEL_DISABLE_FB; | |
| + audio->suspend_ctl.node.resume = audamrwb_resume; | |
| + audio->suspend_ctl.node.suspend = audamrwb_suspend; | |
| + audio->suspend_ctl.audio = audio; | |
| + register_early_suspend(&audio->suspend_ctl.node); | |
| +#endif | |
| + for (i = 0; i < AUDAMRWB_EVENT_NUM; i++) { | |
| + e_node = kmalloc(sizeof(struct audamrwb_event), GFP_KERNEL); | |
| + if (e_node) | |
| + list_add_tail(&e_node->list, &audio->free_event_queue); | |
| + else { | |
| + pr_info("%s: event pkt alloc failed\n", __func__); | |
| + break; | |
| + } | |
| + } | |
| +done: | |
| + return rc; | |
| +err: | |
| + iounmap(audio->data); | |
| + pmem_kfree(audio->phys); | |
| + audpp_adec_free(audio->dec_id); | |
| + pr_info("%s: audio instance 0x%08x freeing\n", __func__, (int)audio); | |
| + kfree(audio); | |
| + return rc; | |
| +} | |
| + | |
| +static const struct file_operations audio_amrwb_fops = { | |
| + .owner = THIS_MODULE, | |
| + .open = audamrwb_open, | |
| + .release = audamrwb_release, | |
| + .read = audamrwb_read, | |
| + .write = audamrwb_write, | |
| + .unlocked_ioctl = audamrwb_ioctl, | |
| + .fsync = audamrwb_fsync, | |
| +}; | |
| + | |
| +struct miscdevice audio_amrwb_misc = { | |
| + .minor = MISC_DYNAMIC_MINOR, | |
| + .name = "msm_amrwb", | |
| + .fops = &audio_amrwb_fops, | |
| +}; | |
| + | |
| +static int __init audamrwb_init(void) | |
| +{ | |
| + return misc_register(&audio_amrwb_misc); | |
| +} | |
| + | |
| +static void __exit audamrwb_exit(void) | |
| +{ | |
| + misc_deregister(&audio_amrwb_misc); | |
| +} | |
| + | |
| +module_init(audamrwb_init); | |
| +module_exit(audamrwb_exit); | |
| + | |
| +MODULE_DESCRIPTION("MSM AMR-WB driver"); | |
| +MODULE_LICENSE("GPL v2"); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp5/audio_evrc.c kernel/arch/arm/mach-msm/qdsp5/audio_evrc.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp5/audio_evrc.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp5/audio_evrc.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -183,56 +183,75 @@ | |
| int rc; | |
| if (audio->enabled) | |
| return 0; | |
| audio->out_tail = 0; | |
| audio->out_needed = 0; | |
| - cfg.tx_rate = RPC_AUD_DEF_SAMPLE_RATE_NONE; | |
| - cfg.rx_rate = RPC_AUD_DEF_SAMPLE_RATE_48000; | |
| - cfg.def_method = RPC_AUD_DEF_METHOD_PLAYBACK; | |
| - cfg.codec = RPC_AUD_DEF_CODEC_EVRC; | |
| - cfg.snd_method = RPC_SND_METHOD_MIDI; | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) { | |
| + cfg.tx_rate = RPC_AUD_DEF_SAMPLE_RATE_NONE; | |
| + cfg.rx_rate = RPC_AUD_DEF_SAMPLE_RATE_48000; | |
| + cfg.def_method = RPC_AUD_DEF_METHOD_PLAYBACK; | |
| + if (machine_is_msm7x25_surf()) | |
| + cfg.codec = RPC_AUD_DEF_CODEC_VOC_EVRC; | |
| + else | |
| + cfg.codec = RPC_AUD_DEF_CODEC_EVRC; | |
| - rc = audmgr_enable(&audio->audmgr, &cfg); | |
| - if (rc < 0) | |
| - return rc; | |
| + cfg.snd_method = RPC_SND_METHOD_MIDI; | |
| + rc = audmgr_enable(&audio->audmgr, &cfg); | |
| + if (rc < 0) | |
| + return rc; | |
| + } | |
| if (msm_adsp_enable(audio->audplay)) { | |
| MM_ERR("msm_adsp_enable(audplay) failed\n"); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| return -ENODEV; | |
| } | |
| if (audpp_enable(audio->dec_id, audevrc_dsp_event, audio)) { | |
| MM_ERR("audpp_enable() failed\n"); | |
| msm_adsp_disable(audio->audplay); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| return -ENODEV; | |
| } | |
| audio->enabled = 1; | |
| return 0; | |
| } | |
| /* must be called with audio->lock held */ | |
| static int audevrc_disable(struct audio *audio) | |
| { | |
| + int rc = 0; | |
| if (audio->enabled) { | |
| audio->enabled = 0; | |
| + audio->dec_state = MSM_AUD_DECODER_STATE_NONE; | |
| auddec_dsp_config(audio, 0); | |
| + rc = wait_event_interruptible_timeout(audio->wait, | |
| + audio->dec_state != MSM_AUD_DECODER_STATE_NONE, | |
| + msecs_to_jiffies(MSM_AUD_DECODER_WAIT_MS)); | |
| + if (rc == 0) | |
| + rc = -ETIMEDOUT; | |
| + else if (audio->dec_state != MSM_AUD_DECODER_STATE_CLOSE) | |
| + rc = -EFAULT; | |
| + else | |
| + rc = 0; | |
| wake_up(&audio->write_wait); | |
| wake_up(&audio->read_wait); | |
| msm_adsp_disable(audio->audplay); | |
| audpp_disable(audio->dec_id, audio); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| audio->out_needed = 0; | |
| } | |
| - return 0; | |
| + return rc; | |
| } | |
| /* ------------------- dsp --------------------- */ | |
| static void audevrc_update_pcm_buf_entry(struct audio *audio, | |
| uint32_t *payload) | |
| { | |
| uint8_t index; | |
| @@ -306,16 +325,21 @@ | |
| MM_DBG("decoder status:sleep reason = \ | |
| 0x%04x\n", reason); | |
| if ((reason == AUDPP_MSG_REASON_MEM) | |
| || (reason == | |
| AUDPP_MSG_REASON_NODECODER)) { | |
| audio->dec_state = | |
| MSM_AUD_DECODER_STATE_FAILURE; | |
| wake_up(&audio->wait); | |
| + } else if (reason == AUDPP_MSG_REASON_NONE) { | |
| + /* decoder is in disable state */ | |
| + audio->dec_state = | |
| + MSM_AUD_DECODER_STATE_CLOSE; | |
| + wake_up(&audio->wait); | |
| } | |
| break; | |
| } | |
| case AUDPP_DEC_STATUS_INIT: | |
| MM_DBG("decoder status: init \n"); | |
| if (audio->pcm_feedback) | |
| audpp_cmd_cfg_routing_mode(audio); | |
| else | |
| @@ -760,30 +784,33 @@ | |
| audio->event_abort = 1; | |
| wake_up(&audio->event_wait); | |
| return 0; | |
| } | |
| mutex_lock(&audio->lock); | |
| switch (cmd) { | |
| case AUDIO_START: | |
| + MM_DBG("AUDIO_START\n"); | |
| + audio->dec_state = MSM_AUD_DECODER_STATE_NONE; | |
| rc = audevrc_enable(audio); | |
| if (!rc) { | |
| rc = wait_event_interruptible_timeout(audio->wait, | |
| audio->dec_state != MSM_AUD_DECODER_STATE_NONE, | |
| msecs_to_jiffies(MSM_AUD_DECODER_WAIT_MS)); | |
| MM_DBG("dec_state %d rc = %d\n", audio->dec_state, rc); | |
| if (audio->dec_state != MSM_AUD_DECODER_STATE_SUCCESS) | |
| rc = -ENODEV; | |
| else | |
| rc = 0; | |
| } | |
| break; | |
| case AUDIO_STOP: | |
| + MM_DBG("AUDIO_STOP\n"); | |
| rc = audevrc_disable(audio); | |
| audio->stopped = 1; | |
| audevrc_ioport_reset(audio); | |
| audio->stopped = 0; | |
| break; | |
| case AUDIO_FLUSH: | |
| MM_DBG("AUDIO_FLUSH\n"); | |
| audio->rflush = 1; | |
| @@ -1395,26 +1422,29 @@ | |
| MM_INFO("audio instance 0x%08x freeing\n", (int)audio); | |
| kfree(audio); | |
| goto done; | |
| } | |
| MM_DBG("write buf: phy addr 0x%08x kernel addr 0x%08x\n", | |
| audio->phys, (int)audio->data); | |
| } | |
| - rc = audmgr_open(&audio->audmgr); | |
| - if (rc) | |
| - goto err; | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) { | |
| + rc = audmgr_open(&audio->audmgr); | |
| + if (rc) | |
| + goto err; | |
| + } | |
| rc = msm_adsp_get(audio->module_name, &audio->audplay, | |
| &audplay_adsp_ops_evrc, audio); | |
| if (rc) { | |
| MM_ERR("failed to get %s module\n", audio->module_name); | |
| - audmgr_close(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_close(&audio->audmgr); | |
| goto err; | |
| } | |
| /* Initialize all locks of audio instance */ | |
| mutex_init(&audio->lock); | |
| mutex_init(&audio->write_lock); | |
| mutex_init(&audio->read_lock); | |
| mutex_init(&audio->get_event_lock); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp5/audio_mp3.c kernel/arch/arm/mach-msm/qdsp5/audio_mp3.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp5/audio_mp3.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp5/audio_mp3.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -260,58 +260,74 @@ | |
| MM_DBG("\n"); /* Macro prints the file name and function */ | |
| if (audio->enabled) | |
| return 0; | |
| audio->out_tail = 0; | |
| audio->out_needed = 0; | |
| - cfg.tx_rate = RPC_AUD_DEF_SAMPLE_RATE_NONE; | |
| - cfg.rx_rate = RPC_AUD_DEF_SAMPLE_RATE_48000; | |
| - cfg.def_method = RPC_AUD_DEF_METHOD_PLAYBACK; | |
| - cfg.codec = RPC_AUD_DEF_CODEC_MP3; | |
| - cfg.snd_method = RPC_SND_METHOD_MIDI; | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) { | |
| + cfg.tx_rate = RPC_AUD_DEF_SAMPLE_RATE_NONE; | |
| + cfg.rx_rate = RPC_AUD_DEF_SAMPLE_RATE_48000; | |
| + cfg.def_method = RPC_AUD_DEF_METHOD_PLAYBACK; | |
| + cfg.codec = RPC_AUD_DEF_CODEC_MP3; | |
| + cfg.snd_method = RPC_SND_METHOD_MIDI; | |
| - rc = audmgr_enable(&audio->audmgr, &cfg); | |
| - if (rc < 0) | |
| - return rc; | |
| + rc = audmgr_enable(&audio->audmgr, &cfg); | |
| + if (rc < 0) | |
| + return rc; | |
| + } | |
| if (msm_adsp_enable(audio->audplay)) { | |
| MM_ERR("msm_adsp_enable(audplay) failed\n"); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| return -ENODEV; | |
| } | |
| if (audpp_enable(audio->dec_id, audio_dsp_event, audio)) { | |
| MM_ERR("audpp_enable() failed\n"); | |
| msm_adsp_disable(audio->audplay); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| return -ENODEV; | |
| } | |
| audio->enabled = 1; | |
| return 0; | |
| } | |
| /* must be called with audio->lock held */ | |
| static int audio_disable(struct audio *audio) | |
| { | |
| + int rc = 0; | |
| MM_DBG("\n"); /* Macro prints the file name and function */ | |
| if (audio->enabled) { | |
| audio->enabled = 0; | |
| + audio->dec_state = MSM_AUD_DECODER_STATE_NONE; | |
| auddec_dsp_config(audio, 0); | |
| + rc = wait_event_interruptible_timeout(audio->wait, | |
| + audio->dec_state != MSM_AUD_DECODER_STATE_NONE, | |
| + msecs_to_jiffies(MSM_AUD_DECODER_WAIT_MS)); | |
| + if (rc == 0) | |
| + rc = -ETIMEDOUT; | |
| + else if (audio->dec_state != MSM_AUD_DECODER_STATE_CLOSE) | |
| + rc = -EFAULT; | |
| + else | |
| + rc = 0; | |
| wake_up(&audio->write_wait); | |
| wake_up(&audio->read_wait); | |
| msm_adsp_disable(audio->audplay); | |
| audpp_disable(audio->dec_id, audio); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| audio->out_needed = 0; | |
| } | |
| - return 0; | |
| + return rc; | |
| } | |
| /* ------------------- dsp --------------------- */ | |
| static void audmp3_async_pcm_buf_update(struct audio *audio, uint32_t *payload) | |
| { | |
| unsigned long flags; | |
| union msm_audio_event_payload event_payload; | |
| struct audmp3_buffer_node *filled_buf; | |
| @@ -426,16 +442,21 @@ | |
| MM_DBG("decoder status: sleep reason=0x%04x\n", | |
| reason); | |
| if ((reason == AUDPP_MSG_REASON_MEM) | |
| || (reason == | |
| AUDPP_MSG_REASON_NODECODER)) { | |
| audio->dec_state = | |
| MSM_AUD_DECODER_STATE_FAILURE; | |
| wake_up(&audio->wait); | |
| + } else if (reason == AUDPP_MSG_REASON_NONE) { | |
| + /* decoder is in disable state */ | |
| + audio->dec_state = | |
| + MSM_AUD_DECODER_STATE_CLOSE; | |
| + wake_up(&audio->wait); | |
| } | |
| break; | |
| } | |
| case AUDPP_DEC_STATUS_INIT: | |
| MM_DBG("decoder status: init \n"); | |
| if (audio->pcm_feedback) | |
| audpp_cmd_cfg_routing_mode(audio); | |
| else | |
| @@ -1257,30 +1278,33 @@ | |
| audio->event_abort = 1; | |
| wake_up(&audio->event_wait); | |
| return 0; | |
| } | |
| mutex_lock(&audio->lock); | |
| switch (cmd) { | |
| case AUDIO_START: | |
| + MM_DBG("AUDIO_START\n"); | |
| + audio->dec_state = MSM_AUD_DECODER_STATE_NONE; | |
| rc = audio_enable(audio); | |
| if (!rc) { | |
| rc = wait_event_interruptible_timeout(audio->wait, | |
| audio->dec_state != MSM_AUD_DECODER_STATE_NONE, | |
| msecs_to_jiffies(MSM_AUD_DECODER_WAIT_MS)); | |
| MM_DBG("dec_state %d rc = %d\n", audio->dec_state, rc); | |
| if (audio->dec_state != MSM_AUD_DECODER_STATE_SUCCESS) | |
| rc = -ENODEV; | |
| else | |
| rc = 0; | |
| } | |
| break; | |
| case AUDIO_STOP: | |
| + MM_DBG("AUDIO_STOP\n"); | |
| rc = audio_disable(audio); | |
| audio->stopped = 1; | |
| audio_ioport_reset(audio); | |
| audio->stopped = 0; | |
| break; | |
| case AUDIO_FLUSH: | |
| MM_DBG("AUDIO_FLUSH\n"); | |
| audio->rflush = 1; | |
| @@ -2091,26 +2115,29 @@ | |
| MM_INFO("audio instance 0x%08x freeing\n", (int)audio); | |
| kfree(audio); | |
| goto done; | |
| } else | |
| pmem_sz >>= 1; | |
| } | |
| audio->out_dma_sz = pmem_sz; | |
| - rc = audmgr_open(&audio->audmgr); | |
| - if (rc) | |
| - goto err; | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) { | |
| + rc = audmgr_open(&audio->audmgr); | |
| + if (rc) | |
| + goto err; | |
| + } | |
| rc = msm_adsp_get(audio->module_name, &audio->audplay, | |
| &audplay_adsp_ops, audio); | |
| if (rc) { | |
| MM_ERR("failed to get %s module\n", audio->module_name); | |
| - audmgr_close(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_close(&audio->audmgr); | |
| goto err; | |
| } | |
| if (file->f_flags & O_NONBLOCK) { | |
| MM_DBG("set to aio interface \n"); | |
| audio->drv_status |= ADRV_STATUS_AIO_INTF; | |
| audio->drv_ops.pcm_buf_update = audmp3_async_pcm_buf_update; | |
| audio->drv_ops.buffer_refresh = audmp3_async_buffer_refresh; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp5/audio_pcm.c kernel/arch/arm/mach-msm/qdsp5/audio_pcm.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp5/audio_pcm.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp5/audio_pcm.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -261,27 +261,38 @@ | |
| audio->enabled = 1; | |
| return 0; | |
| } | |
| /* must be called with audio->lock held */ | |
| static int audio_disable(struct audio *audio) | |
| { | |
| + int rc = 0; | |
| MM_DBG("\n"); /* Macro prints the file name and function */ | |
| if (audio->enabled) { | |
| audio->enabled = 0; | |
| + audio->dec_state = MSM_AUD_DECODER_STATE_NONE; | |
| auddec_dsp_config(audio, 0); | |
| + rc = wait_event_interruptible_timeout(audio->wait, | |
| + audio->dec_state != MSM_AUD_DECODER_STATE_NONE, | |
| + msecs_to_jiffies(MSM_AUD_DECODER_WAIT_MS)); | |
| + if (rc == 0) | |
| + rc = -ETIMEDOUT; | |
| + else if (audio->dec_state != MSM_AUD_DECODER_STATE_CLOSE) | |
| + rc = -EFAULT; | |
| + else | |
| + rc = 0; | |
| wake_up(&audio->write_wait); | |
| msm_adsp_disable(audio->audplay); | |
| audpp_disable(audio->dec_id, audio); | |
| audmgr_disable(&audio->audmgr); | |
| audio->out_needed = 0; | |
| } | |
| - return 0; | |
| + return rc; | |
| } | |
| /* ------------------- dsp --------------------- */ | |
| static void audplay_dsp_event(void *data, unsigned id, size_t len, | |
| void (*getevent) (void *ptr, size_t len)) | |
| { | |
| struct audio *audio = data; | |
| uint32_t msg[28]; | |
| @@ -316,16 +327,21 @@ | |
| MM_DBG("decoder status: sleep reason = \ | |
| 0x%04x\n", reason); | |
| if ((reason == AUDPP_MSG_REASON_MEM) | |
| || (reason == | |
| AUDPP_MSG_REASON_NODECODER)) { | |
| audio->dec_state = | |
| MSM_AUD_DECODER_STATE_FAILURE; | |
| wake_up(&audio->wait); | |
| + } else if (reason == AUDPP_MSG_REASON_NONE) { | |
| + /* decoder is in disable state */ | |
| + audio->dec_state = | |
| + MSM_AUD_DECODER_STATE_CLOSE; | |
| + wake_up(&audio->wait); | |
| } | |
| break; | |
| } | |
| case AUDPP_DEC_STATUS_INIT: | |
| MM_DBG("decoder status: init\n"); | |
| audpp_cmd_cfg_adec_params(audio); | |
| break; | |
| @@ -942,30 +958,33 @@ | |
| audio->event_abort = 1; | |
| wake_up(&audio->event_wait); | |
| return 0; | |
| } | |
| mutex_lock(&audio->lock); | |
| switch (cmd) { | |
| case AUDIO_START: | |
| + MM_DBG("AUDIO_START\n"); | |
| + audio->dec_state = MSM_AUD_DECODER_STATE_NONE; | |
| rc = audio_enable(audio); | |
| if (!rc) { | |
| rc = wait_event_interruptible_timeout(audio->wait, | |
| audio->dec_state != MSM_AUD_DECODER_STATE_NONE, | |
| msecs_to_jiffies(MSM_AUD_DECODER_WAIT_MS)); | |
| MM_DBG("dec_state %d rc = %d\n", audio->dec_state, rc); | |
| if (audio->dec_state != MSM_AUD_DECODER_STATE_SUCCESS) | |
| rc = -ENODEV; | |
| else | |
| rc = 0; | |
| } | |
| break; | |
| case AUDIO_STOP: | |
| + MM_DBG("AUDIO_STOP\n"); | |
| rc = audio_disable(audio); | |
| audio->stopped = 1; | |
| audio_ioport_reset(audio); | |
| audio->stopped = 0; | |
| break; | |
| case AUDIO_FLUSH: | |
| MM_DBG("AUDIO_FLUSH\n"); | |
| audio->wflush = 1; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp5/audio_qcelp.c kernel/arch/arm/mach-msm/qdsp5/audio_qcelp.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp5/audio_qcelp.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp5/audio_qcelp.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -180,57 +180,75 @@ | |
| MM_DBG("\n"); /* Macro prints the file name and function */ | |
| if (audio->enabled) | |
| return 0; | |
| audio->out_tail = 0; | |
| audio->out_needed = 0; | |
| - cfg.tx_rate = RPC_AUD_DEF_SAMPLE_RATE_NONE; | |
| - cfg.rx_rate = RPC_AUD_DEF_SAMPLE_RATE_48000; | |
| - cfg.def_method = RPC_AUD_DEF_METHOD_PLAYBACK; | |
| - cfg.codec = RPC_AUD_DEF_CODEC_13K; | |
| - cfg.snd_method = RPC_SND_METHOD_MIDI; | |
| - | |
| - rc = audmgr_enable(&audio->audmgr, &cfg); | |
| - if (rc < 0) | |
| - return rc; | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) { | |
| + cfg.tx_rate = RPC_AUD_DEF_SAMPLE_RATE_NONE; | |
| + cfg.rx_rate = RPC_AUD_DEF_SAMPLE_RATE_48000; | |
| + cfg.def_method = RPC_AUD_DEF_METHOD_PLAYBACK; | |
| + if (machine_is_msm7x25_surf()) | |
| + cfg.codec = RPC_AUD_DEF_CODEC_VOC_13K; | |
| + else | |
| + cfg.codec = RPC_AUD_DEF_CODEC_13K; | |
| + cfg.snd_method = RPC_SND_METHOD_MIDI; | |
| + rc = audmgr_enable(&audio->audmgr, &cfg); | |
| + if (rc < 0) | |
| + return rc; | |
| + } | |
| if (msm_adsp_enable(audio->audplay)) { | |
| MM_ERR("msm_adsp_enable(audplay) failed\n"); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| return -ENODEV; | |
| } | |
| if (audpp_enable(audio->dec_id, audqcelp_dsp_event, audio)) { | |
| MM_ERR("audpp_enable() failed\n"); | |
| msm_adsp_disable(audio->audplay); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| return -ENODEV; | |
| } | |
| audio->enabled = 1; | |
| return 0; | |
| } | |
| /* must be called with audio->lock held */ | |
| static int audqcelp_disable(struct audio *audio) | |
| { | |
| + int rc = 0; | |
| MM_DBG("\n"); /* Macro prints the file name and function */ | |
| if (audio->enabled) { | |
| audio->enabled = 0; | |
| + audio->dec_state = MSM_AUD_DECODER_STATE_NONE; | |
| auddec_dsp_config(audio, 0); | |
| + rc = wait_event_interruptible_timeout(audio->wait, | |
| + audio->dec_state != MSM_AUD_DECODER_STATE_NONE, | |
| + msecs_to_jiffies(MSM_AUD_DECODER_WAIT_MS)); | |
| + if (rc == 0) | |
| + rc = -ETIMEDOUT; | |
| + else if (audio->dec_state != MSM_AUD_DECODER_STATE_CLOSE) | |
| + rc = -EFAULT; | |
| + else | |
| + rc = 0; | |
| wake_up(&audio->write_wait); | |
| wake_up(&audio->read_wait); | |
| msm_adsp_disable(audio->audplay); | |
| audpp_disable(audio->dec_id, audio); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| audio->out_needed = 0; | |
| } | |
| - return 0; | |
| + return rc; | |
| } | |
| /* ------------------- dsp --------------------- */ | |
| static void audqcelp_update_pcm_buf_entry(struct audio *audio, | |
| uint32_t *payload) | |
| { | |
| uint8_t index; | |
| unsigned long flags; | |
| @@ -305,16 +323,21 @@ | |
| MM_DBG("decoder status:sleep reason = \ | |
| 0x%04x\n", reason); | |
| if ((reason == AUDPP_MSG_REASON_MEM) | |
| || (reason == | |
| AUDPP_MSG_REASON_NODECODER)) { | |
| audio->dec_state = | |
| MSM_AUD_DECODER_STATE_FAILURE; | |
| wake_up(&audio->wait); | |
| + } else if (reason == AUDPP_MSG_REASON_NONE) { | |
| + /* decoder is in disable state */ | |
| + audio->dec_state = | |
| + MSM_AUD_DECODER_STATE_CLOSE; | |
| + wake_up(&audio->wait); | |
| } | |
| break; | |
| } | |
| case AUDPP_DEC_STATUS_INIT: | |
| MM_DBG("decoder status: init \n"); | |
| if (audio->pcm_feedback) | |
| audpp_cmd_cfg_routing_mode(audio); | |
| else | |
| @@ -758,30 +781,33 @@ | |
| audio->event_abort = 1; | |
| wake_up(&audio->event_wait); | |
| return 0; | |
| } | |
| mutex_lock(&audio->lock); | |
| switch (cmd) { | |
| case AUDIO_START: | |
| + MM_DBG("AUDIO_START\n"); | |
| + audio->dec_state = MSM_AUD_DECODER_STATE_NONE; | |
| rc = audqcelp_enable(audio); | |
| if (!rc) { | |
| rc = wait_event_interruptible_timeout(audio->wait, | |
| audio->dec_state != MSM_AUD_DECODER_STATE_NONE, | |
| msecs_to_jiffies(MSM_AUD_DECODER_WAIT_MS)); | |
| MM_DBG("dec_state %d rc = %d\n", audio->dec_state, rc); | |
| if (audio->dec_state != MSM_AUD_DECODER_STATE_SUCCESS) | |
| rc = -ENODEV; | |
| else | |
| rc = 0; | |
| } | |
| break; | |
| case AUDIO_STOP: | |
| + MM_DBG("AUDIO_STOP\n"); | |
| rc = audqcelp_disable(audio); | |
| audio->stopped = 1; | |
| audqcelp_ioport_reset(audio); | |
| audio->stopped = 0; | |
| break; | |
| case AUDIO_FLUSH: | |
| MM_DBG("AUDIO_FLUSH\n"); | |
| audio->rflush = 1; | |
| @@ -1396,25 +1422,28 @@ | |
| MM_INFO("audio instance 0x%08x freeing\n", (int)audio); | |
| kfree(audio); | |
| goto done; | |
| } | |
| MM_DBG("write buf: phy addr 0x%08x kernel addr 0x%08x\n", | |
| audio->phys, (int)audio->data); | |
| } | |
| - rc = audmgr_open(&audio->audmgr); | |
| - if (rc) | |
| - goto err; | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) { | |
| + rc = audmgr_open(&audio->audmgr); | |
| + if (rc) | |
| + goto err; | |
| + } | |
| rc = msm_adsp_get(audio->module_name, &audio->audplay, | |
| &audplay_adsp_ops_qcelp, audio); | |
| if (rc) { | |
| MM_ERR("failed to get %s module\n", audio->module_name); | |
| - audmgr_close(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_close(&audio->audmgr); | |
| goto err; | |
| } | |
| /* Initialize all locks of audio instance */ | |
| mutex_init(&audio->lock); | |
| mutex_init(&audio->write_lock); | |
| mutex_init(&audio->read_lock); | |
| mutex_init(&audio->get_event_lock); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp5/audio_wma.c kernel/arch/arm/mach-msm/qdsp5/audio_wma.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp5/audio_wma.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp5/audio_wma.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -198,58 +198,74 @@ | |
| MM_DBG("\n"); /* Macro prints the file name and function */ | |
| if (audio->enabled) | |
| return 0; | |
| audio->out_tail = 0; | |
| audio->out_needed = 0; | |
| - cfg.tx_rate = RPC_AUD_DEF_SAMPLE_RATE_NONE; | |
| - cfg.rx_rate = RPC_AUD_DEF_SAMPLE_RATE_48000; | |
| - cfg.def_method = RPC_AUD_DEF_METHOD_PLAYBACK; | |
| - cfg.codec = RPC_AUD_DEF_CODEC_WMA; | |
| - cfg.snd_method = RPC_SND_METHOD_MIDI; | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) { | |
| + cfg.tx_rate = RPC_AUD_DEF_SAMPLE_RATE_NONE; | |
| + cfg.rx_rate = RPC_AUD_DEF_SAMPLE_RATE_48000; | |
| + cfg.def_method = RPC_AUD_DEF_METHOD_PLAYBACK; | |
| + cfg.codec = RPC_AUD_DEF_CODEC_WMA; | |
| + cfg.snd_method = RPC_SND_METHOD_MIDI; | |
| - rc = audmgr_enable(&audio->audmgr, &cfg); | |
| - if (rc < 0) | |
| - return rc; | |
| + rc = audmgr_enable(&audio->audmgr, &cfg); | |
| + if (rc < 0) | |
| + return rc; | |
| + } | |
| if (msm_adsp_enable(audio->audplay)) { | |
| MM_ERR("msm_adsp_enable(audplay) failed\n"); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| return -ENODEV; | |
| } | |
| if (audpp_enable(audio->dec_id, audio_dsp_event, audio)) { | |
| MM_ERR("audpp_enable() failed\n"); | |
| msm_adsp_disable(audio->audplay); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| return -ENODEV; | |
| } | |
| audio->enabled = 1; | |
| return 0; | |
| } | |
| /* must be called with audio->lock held */ | |
| static int audio_disable(struct audio *audio) | |
| { | |
| + int rc = 0; | |
| MM_DBG("\n"); /* Macro prints the file name and function */ | |
| if (audio->enabled) { | |
| audio->enabled = 0; | |
| + audio->dec_state = MSM_AUD_DECODER_STATE_NONE; | |
| auddec_dsp_config(audio, 0); | |
| + rc = wait_event_interruptible_timeout(audio->wait, | |
| + audio->dec_state != MSM_AUD_DECODER_STATE_NONE, | |
| + msecs_to_jiffies(MSM_AUD_DECODER_WAIT_MS)); | |
| + if (rc == 0) | |
| + rc = -ETIMEDOUT; | |
| + else if (audio->dec_state != MSM_AUD_DECODER_STATE_CLOSE) | |
| + rc = -EFAULT; | |
| + else | |
| + rc = 0; | |
| wake_up(&audio->write_wait); | |
| wake_up(&audio->read_wait); | |
| msm_adsp_disable(audio->audplay); | |
| audpp_disable(audio->dec_id, audio); | |
| - audmgr_disable(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_disable(&audio->audmgr); | |
| audio->out_needed = 0; | |
| } | |
| - return 0; | |
| + return rc; | |
| } | |
| /* ------------------- dsp --------------------- */ | |
| static void audio_update_pcm_buf_entry(struct audio *audio, | |
| uint32_t *payload) | |
| { | |
| uint8_t index; | |
| unsigned long flags; | |
| @@ -328,16 +344,21 @@ | |
| MM_DBG("decoder status:sleep reason = \ | |
| 0x%04x\n", reason); | |
| if ((reason == AUDPP_MSG_REASON_MEM) | |
| || (reason == | |
| AUDPP_MSG_REASON_NODECODER)) { | |
| audio->dec_state = | |
| MSM_AUD_DECODER_STATE_FAILURE; | |
| wake_up(&audio->wait); | |
| + } else if (reason == AUDPP_MSG_REASON_NONE) { | |
| + /* decoder is in disable state */ | |
| + audio->dec_state = | |
| + MSM_AUD_DECODER_STATE_CLOSE; | |
| + wake_up(&audio->wait); | |
| } | |
| break; | |
| } | |
| case AUDPP_DEC_STATUS_INIT: | |
| MM_DBG("decoder status: init\n"); | |
| if (audio->pcm_feedback) | |
| audpp_cmd_cfg_routing_mode(audio); | |
| else | |
| @@ -804,30 +825,33 @@ | |
| audio->event_abort = 1; | |
| wake_up(&audio->event_wait); | |
| return 0; | |
| } | |
| mutex_lock(&audio->lock); | |
| switch (cmd) { | |
| case AUDIO_START: | |
| + MM_DBG("AUDIO_START\n"); | |
| + audio->dec_state = MSM_AUD_DECODER_STATE_NONE; | |
| rc = audio_enable(audio); | |
| if (!rc) { | |
| rc = wait_event_interruptible_timeout(audio->wait, | |
| audio->dec_state != MSM_AUD_DECODER_STATE_NONE, | |
| msecs_to_jiffies(MSM_AUD_DECODER_WAIT_MS)); | |
| MM_DBG("dec_state %d rc = %d\n", audio->dec_state, rc); | |
| if (audio->dec_state != MSM_AUD_DECODER_STATE_SUCCESS) | |
| rc = -ENODEV; | |
| else | |
| rc = 0; | |
| } | |
| break; | |
| case AUDIO_STOP: | |
| + MM_DBG("AUDIO_STOP\n"); | |
| rc = audio_disable(audio); | |
| audio->stopped = 1; | |
| audio_ioport_reset(audio); | |
| audio->stopped = 0; | |
| break; | |
| case AUDIO_FLUSH: | |
| MM_DBG("AUDIO_FLUSH\n"); | |
| audio->rflush = 1; | |
| @@ -1554,25 +1578,28 @@ | |
| (int)audio); | |
| kfree(audio); | |
| goto done; | |
| } else | |
| pmem_sz >>= 1; | |
| } | |
| audio->out_dma_sz = pmem_sz; | |
| - rc = audmgr_open(&audio->audmgr); | |
| - if (rc) | |
| - goto err; | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) { | |
| + rc = audmgr_open(&audio->audmgr); | |
| + if (rc) | |
| + goto err; | |
| + } | |
| rc = msm_adsp_get(audio->module_name, &audio->audplay, | |
| &audplay_adsp_ops_wma, audio); | |
| if (rc) { | |
| MM_ERR("failed to get %s module\n", audio->module_name); | |
| - audmgr_close(&audio->audmgr); | |
| + if (audio->pcm_feedback == TUNNEL_MODE_PLAYBACK) | |
| + audmgr_close(&audio->audmgr); | |
| goto err; | |
| } | |
| mutex_init(&audio->lock); | |
| mutex_init(&audio->write_lock); | |
| mutex_init(&audio->read_lock); | |
| mutex_init(&audio->get_event_lock); | |
| spin_lock_init(&audio->dsp_lock); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp5/audmgr.c kernel/arch/arm/mach-msm/qdsp5/audmgr.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp5/audmgr.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp5/audmgr.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -218,38 +218,47 @@ | |
| if (am->state != STATE_CLOSED) | |
| return 0; | |
| mutex_lock(amg->lock); | |
| /* connect to audmgr end point and polling thread only once */ | |
| if (amg->ept == NULL) { | |
| amg->ept = msm_rpc_connect_compatible(AUDMGR_PROG, | |
| - AUDMGR_VERS_COMP_VER2, | |
| + AUDMGR_VERS_COMP_VER3, | |
| MSM_RPC_UNINTERRUPTIBLE); | |
| - | |
| if (IS_ERR(amg->ept)) { | |
| MM_ERR("connect failed with current VERS \ | |
| = %x, trying again with another API\n", | |
| - AUDMGR_VERS_COMP_VER2); | |
| + AUDMGR_VERS_COMP_VER3); | |
| amg->ept = msm_rpc_connect_compatible(AUDMGR_PROG, | |
| - AUDMGR_VERS_COMP, | |
| + AUDMGR_VERS_COMP_VER2, | |
| MSM_RPC_UNINTERRUPTIBLE); | |
| if (IS_ERR(amg->ept)) { | |
| - MM_ERR("connect failed with current \ | |
| + MM_ERR("connect failed with current VERS \ | |
| + = %x, trying again with another API\n", | |
| + AUDMGR_VERS_COMP_VER2); | |
| + amg->ept = msm_rpc_connect_compatible( | |
| + AUDMGR_PROG, | |
| + AUDMGR_VERS_COMP, | |
| + MSM_RPC_UNINTERRUPTIBLE); | |
| + if (IS_ERR(amg->ept)) { | |
| + MM_ERR("connect failed with current \ | |
| VERS=%x, trying again with another \ | |
| API\n", AUDMGR_VERS_COMP); | |
| - amg->ept = msm_rpc_connect(AUDMGR_PROG, | |
| + amg->ept = msm_rpc_connect(AUDMGR_PROG, | |
| AUDMGR_VERS, | |
| MSM_RPC_UNINTERRUPTIBLE); | |
| - amg->rpc_version = AUDMGR_VERS; | |
| + amg->rpc_version = AUDMGR_VERS; | |
| + } else | |
| + amg->rpc_version = AUDMGR_VERS_COMP; | |
| } else | |
| - amg->rpc_version = AUDMGR_VERS_COMP; | |
| + amg->rpc_version = AUDMGR_VERS_COMP_VER2; | |
| } else | |
| - amg->rpc_version = AUDMGR_VERS_COMP_VER2; | |
| + amg->rpc_version = AUDMGR_VERS_COMP_VER3; | |
| if (IS_ERR(amg->ept)) { | |
| rc = PTR_ERR(amg->ept); | |
| amg->ept = NULL; | |
| MM_ERR("failed to connect to audmgr svc\n"); | |
| goto done; | |
| } | |
| @@ -307,17 +316,16 @@ | |
| rc = msm_rpc_write(amg->ept, &msg, sizeof(msg)); | |
| if (rc < 0) | |
| return rc; | |
| rc = wait_event_timeout(am->wait, am->state != STATE_ENABLING, 15 * HZ); | |
| if (rc == 0) { | |
| MM_ERR("ARM9 did not reply to RPC am->state = %d\n", am->state); | |
| - BUG(); | |
| } | |
| if (am->state == STATE_ENABLED) | |
| return 0; | |
| MM_ERR("unexpected state %d while enabling?!\n", am->state); | |
| return -ENODEV; | |
| } | |
| EXPORT_SYMBOL(audmgr_enable); | |
| @@ -340,17 +348,16 @@ | |
| rc = msm_rpc_write(amg->ept, &msg, sizeof(msg)); | |
| if (rc < 0) | |
| return rc; | |
| rc = wait_event_timeout(am->wait, am->state != STATE_DISABLING, 15 * HZ); | |
| if (rc == 0) { | |
| MM_ERR("ARM9 did not reply to RPC am->state = %d\n", am->state); | |
| - BUG(); | |
| } | |
| if (am->state == STATE_DISABLED) | |
| return 0; | |
| MM_ERR("unexpected state %d while disabling?!\n", am->state); | |
| return -ENODEV; | |
| } | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp5/audmgr.h kernel/arch/arm/mach-msm/qdsp5/audmgr.h | |
| --- kernel-msm/arch/arm/mach-msm/qdsp5/audmgr.h 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp5/audmgr.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -148,16 +148,17 @@ | |
| #define AUDMGR_GET_TX_SAMPLE_RATE 9 | |
| #define AUDMGR_SET_DEVICE_MODE 10 | |
| #define AUDMGR_PROG_VERS "rs30000013:0x7feccbff" | |
| #define AUDMGR_PROG 0x30000013 | |
| #define AUDMGR_VERS 0x7feccbff | |
| #define AUDMGR_VERS_COMP 0x00010001 | |
| #define AUDMGR_VERS_COMP_VER2 0x00020001 | |
| +#define AUDMGR_VERS_COMP_VER3 0x00030001 | |
| struct rpc_audmgr_cb_func_ptr { | |
| uint32_t cb_id; /* cb_func */ | |
| uint32_t status; /* Audmgr status */ | |
| uint32_t set_to_one; /* Pointer status (1 = valid, 0 = invalid) */ | |
| uint32_t disc; | |
| /* disc = AUDMGR_STATUS_READY => data=handle | |
| disc = AUDMGR_STATUS_CODEC_CONFIG => data = volume | |
| @@ -198,30 +199,31 @@ | |
| int audmgr_close(struct audmgr *am); | |
| int audmgr_enable(struct audmgr *am, struct audmgr_config *cfg); | |
| int audmgr_disable(struct audmgr *am); | |
| typedef void (*audpp_event_func)(void *private, unsigned id, uint16_t *msg); | |
| typedef void (*audrec_event_func)(void *private, unsigned id, uint16_t *msg); | |
| /* worst case delay of 100ms for response */ | |
| -#define MSM_AUD_DECODER_WAIT_MS 100 | |
| +#define MSM_AUD_DECODER_WAIT_MS 200 | |
| #define MSM_AUD_MODE_TUNNEL 0x00000100 | |
| #define MSM_AUD_MODE_NONTUNNEL 0x00000200 | |
| #define MSM_AUD_DECODER_MASK 0x0000FFFF | |
| #define MSM_AUD_OP_MASK 0xFFFF0000 | |
| /*Playback mode*/ | |
| #define NON_TUNNEL_MODE_PLAYBACK 1 | |
| #define TUNNEL_MODE_PLAYBACK 0 | |
| enum msm_aud_decoder_state { | |
| MSM_AUD_DECODER_STATE_NONE = 0, | |
| MSM_AUD_DECODER_STATE_FAILURE = 1, | |
| MSM_AUD_DECODER_STATE_SUCCESS = 2, | |
| + MSM_AUD_DECODER_STATE_CLOSE = 3, | |
| }; | |
| int audpp_adec_alloc(unsigned dec_attrb, const char **module_name, | |
| unsigned *queueid); | |
| void audpp_adec_free(int decid); | |
| struct audpp_event_callback { | |
| audpp_event_func fn; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp5/audmgr_new.h kernel/arch/arm/mach-msm/qdsp5/audmgr_new.h | |
| --- kernel-msm/arch/arm/mach-msm/qdsp5/audmgr_new.h 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp5/audmgr_new.h 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -0,0 +1,213 @@ | |
| +/* arch/arm/mach-msm/qdsp5/audmgr.h | |
| + * | |
| + * Copyright (c) 2008, Code Aurora Forum. All rights reserved. | |
| + * Copyright (C) 2008 Google, Inc. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + */ | |
| + | |
| +#ifndef _ARCH_ARM_MACH_MSM_AUDMGR_NEW_H | |
| +#define _ARCH_ARM_MACH_MSM_AUDMGR_NEW_H | |
| + | |
| +enum rpc_aud_def_sample_rate_type { | |
| + RPC_AUD_DEF_SAMPLE_RATE_NONE, | |
| + RPC_AUD_DEF_SAMPLE_RATE_8000, | |
| + RPC_AUD_DEF_SAMPLE_RATE_11025, | |
| + RPC_AUD_DEF_SAMPLE_RATE_12000, | |
| + RPC_AUD_DEF_SAMPLE_RATE_16000, | |
| + RPC_AUD_DEF_SAMPLE_RATE_22050, | |
| + RPC_AUD_DEF_SAMPLE_RATE_24000, | |
| + RPC_AUD_DEF_SAMPLE_RATE_32000, | |
| + RPC_AUD_DEF_SAMPLE_RATE_44100, | |
| + RPC_AUD_DEF_SAMPLE_RATE_48000, | |
| + RPC_AUD_DEF_SAMPLE_RATE_MAX, | |
| +}; | |
| + | |
| +enum rpc_aud_def_method_type { | |
| + RPC_AUD_DEF_METHOD_NONE, | |
| + RPC_AUD_DEF_METHOD_KEY_BEEP, | |
| + RPC_AUD_DEF_METHOD_PLAYBACK, | |
| + RPC_AUD_DEF_METHOD_VOICE, | |
| + RPC_AUD_DEF_METHOD_RECORD, | |
| + RPC_AUD_DEF_METHOD_HOST_PCM, | |
| + RPC_AUD_DEF_METHOD_MIDI_OUT, | |
| + RPC_AUD_DEF_METHOD_RECORD_SBC, | |
| + RPC_AUD_DEF_METHOD_DTMF_RINGER, | |
| + RPC_AUD_DEF_METHOD_MAX, | |
| +}; | |
| + | |
| +enum rpc_aud_def_codec_type { | |
| + RPC_AUD_DEF_CODEC_NONE, | |
| + RPC_AUD_DEF_CODEC_DTMF, | |
| + RPC_AUD_DEF_CODEC_MIDI, | |
| + RPC_AUD_DEF_CODEC_MP3, | |
| + RPC_AUD_DEF_CODEC_PCM, | |
| + RPC_AUD_DEF_CODEC_AAC, | |
| + RPC_AUD_DEF_CODEC_WMA, | |
| + RPC_AUD_DEF_CODEC_RA, | |
| + RPC_AUD_DEF_CODEC_ADPCM, | |
| + RPC_AUD_DEF_CODEC_GAUDIO, | |
| + RPC_AUD_DEF_CODEC_VOC_EVRC, | |
| + RPC_AUD_DEF_CODEC_VOC_13K, | |
| + RPC_AUD_DEF_CODEC_VOC_4GV_NB, | |
| + RPC_AUD_DEF_CODEC_VOC_AMR, | |
| + RPC_AUD_DEF_CODEC_VOC_EFR, | |
| + RPC_AUD_DEF_CODEC_VOC_FR, | |
| + RPC_AUD_DEF_CODEC_VOC_HR, | |
| + RPC_AUD_DEF_CODEC_VOC_CDMA, | |
| + RPC_AUD_DEF_CODEC_VOC_CDMA_WB, | |
| + RPC_AUD_DEF_CODEC_VOC_UMTS, | |
| + RPC_AUD_DEF_CODEC_VOC_UMTS_WB, | |
| + RPC_AUD_DEF_CODEC_SBC, | |
| + RPC_AUD_DEF_CODEC_VOC_PCM, | |
| + RPC_AUD_DEF_CODEC_AMR_WB, | |
| + RPC_AUD_DEF_CODEC_AMR_WB_PLUS, | |
| + RPC_AUD_DEF_CODEC_AAC_BSAC, | |
| + RPC_AUD_DEF_CODEC_MAX, | |
| + RPC_AUD_DEF_CODEC_AMR_NB, | |
| + RPC_AUD_DEF_CODEC_13K, | |
| + RPC_AUD_DEF_CODEC_EVRC, | |
| + RPC_AUD_DEF_CODEC_MAX_002, | |
| +}; | |
| + | |
| +enum rpc_snd_method_type { | |
| + RPC_SND_METHOD_VOICE = 0, | |
| + RPC_SND_METHOD_KEY_BEEP, | |
| + RPC_SND_METHOD_MESSAGE, | |
| + RPC_SND_METHOD_RING, | |
| + RPC_SND_METHOD_MIDI, | |
| + RPC_SND_METHOD_AUX, | |
| + RPC_SND_METHOD_MAX, | |
| +}; | |
| + | |
| +enum rpc_voc_codec_type { | |
| + RPC_VOC_CODEC_DEFAULT, | |
| + RPC_VOC_CODEC_ON_CHIP_0 = RPC_VOC_CODEC_DEFAULT, | |
| + RPC_VOC_CODEC_ON_CHIP_1, | |
| + RPC_VOC_CODEC_STEREO_HEADSET, | |
| + RPC_VOC_CODEC_ON_CHIP_AUX, | |
| + RPC_VOC_CODEC_BT_OFF_BOARD, | |
| + RPC_VOC_CODEC_BT_A2DP, | |
| + RPC_VOC_CODEC_OFF_BOARD, | |
| + RPC_VOC_CODEC_SDAC, | |
| + RPC_VOC_CODEC_RX_EXT_SDAC_TX_INTERNAL, | |
| + RPC_VOC_CODEC_IN_STEREO_SADC_OUT_MONO_HANDSET, | |
| + RPC_VOC_CODEC_IN_STEREO_SADC_OUT_STEREO_HEADSET, | |
| + RPC_VOC_CODEC_TX_INT_SADC_RX_EXT_AUXPCM, | |
| + RPC_VOC_CODEC_EXT_STEREO_SADC_OUT_MONO_HANDSET, | |
| + RPC_VOC_CODEC_EXT_STEREO_SADC_OUT_STEREO_HEADSET, | |
| + RPC_VOC_CODEC_TTY_ON_CHIP_1, | |
| + RPC_VOC_CODEC_TTY_OFF_BOARD, | |
| + RPC_VOC_CODEC_TTY_VCO, | |
| + RPC_VOC_CODEC_TTY_HCO, | |
| + RPC_VOC_CODEC_ON_CHIP_0_DUAL_MIC, | |
| + RPC_VOC_CODEC_MAX, | |
| + RPC_VOC_CODEC_NONE, | |
| +}; | |
| + | |
| +enum rpc_audmgr_status_type { | |
| + RPC_AUDMGR_STATUS_READY, | |
| + RPC_AUDMGR_STATUS_CODEC_CONFIG, | |
| + RPC_AUDMGR_STATUS_PENDING, | |
| + RPC_AUDMGR_STATUS_SUSPEND, | |
| + RPC_AUDMGR_STATUS_FAILURE, | |
| + RPC_AUDMGR_STATUS_VOLUME_CHANGE, | |
| + RPC_AUDMGR_STATUS_DISABLED, | |
| + RPC_AUDMGR_STATUS_ERROR, | |
| +}; | |
| + | |
| +struct rpc_audmgr_enable_client_args { | |
| + uint32_t set_to_one; | |
| + uint32_t tx_sample_rate; | |
| + uint32_t rx_sample_rate; | |
| + uint32_t def_method; | |
| + uint32_t codec_type; | |
| + uint32_t snd_method; | |
| + | |
| + uint32_t cb_func; | |
| + uint32_t client_data; | |
| +}; | |
| + | |
| +#define AUDMGR_ENABLE_CLIENT 2 | |
| +#define AUDMGR_DISABLE_CLIENT 3 | |
| +#define AUDMGR_SUSPEND_EVENT_RSP 4 | |
| +#define AUDMGR_REGISTER_OPERATION_LISTENER 5 | |
| +#define AUDMGR_UNREGISTER_OPERATION_LISTENER 6 | |
| +#define AUDMGR_REGISTER_CODEC_LISTENER 7 | |
| +#define AUDMGR_GET_RX_SAMPLE_RATE 8 | |
| +#define AUDMGR_GET_TX_SAMPLE_RATE 9 | |
| +#define AUDMGR_SET_DEVICE_MODE 10 | |
| + | |
| +#define AUDMGR_PROG 0x30000013 | |
| +#define AUDMGR_VERS MSM_RPC_VERS(1,0) | |
| + | |
| +struct rpc_audmgr_cb_func_ptr { | |
| + uint32_t cb_id; | |
| + uint32_t status; /* Audmgr status */ | |
| + uint32_t set_to_one; /* Pointer status (1 = valid, 0 = invalid) */ | |
| + uint32_t disc; | |
| + /* disc = AUDMGR_STATUS_READY => data=handle | |
| + disc = AUDMGR_STATUS_CODEC_CONFIG => data = handle | |
| + disc = AUDMGR_STATUS_DISABLED => data =status_disabled | |
| + disc = AUDMGR_STATUS_VOLUME_CHANGE => data = volume-change */ | |
| + union { | |
| + uint32_t handle; | |
| + uint32_t volume; | |
| + uint32_t status_disabled; | |
| + uint32_t volume_change; | |
| + } u; | |
| +}; | |
| + | |
| +#define AUDMGR_CB_FUNC_PTR 1 | |
| +#define AUDMGR_OPR_LSTNR_CB_FUNC_PTR 2 | |
| +#define AUDMGR_CODEC_LSTR_FUNC_PTR 3 | |
| + | |
| +#define AUDMGR_CB_PROG 0x31000013 | |
| +#define AUDMGR_CB_VERS 0xf8e3e2d9 | |
| + | |
| +struct audmgr { | |
| + wait_queue_head_t wait; | |
| + uint32_t handle; | |
| + struct msm_rpc_endpoint *ept; | |
| + struct task_struct *task; | |
| + int state; | |
| +}; | |
| + | |
| +struct audmgr_config { | |
| + uint32_t tx_rate; | |
| + uint32_t rx_rate; | |
| + uint32_t def_method; | |
| + uint32_t codec; | |
| + uint32_t snd_method; | |
| +}; | |
| + | |
| +int audmgr_open(struct audmgr *am); | |
| +int audmgr_close(struct audmgr *am); | |
| +int audmgr_enable(struct audmgr *am, struct audmgr_config *cfg); | |
| +int audmgr_disable(struct audmgr *am); | |
| + | |
| +typedef void (*audpp_event_func)(void *private, unsigned id, uint16_t *msg); | |
| + | |
| +int audpp_enable(int id, audpp_event_func func, void *private); | |
| +void audpp_disable(int id, void *private); | |
| + | |
| +int audpp_send_queue1(void *cmd, unsigned len); | |
| +int audpp_send_queue2(void *cmd, unsigned len); | |
| +int audpp_send_queue3(void *cmd, unsigned len); | |
| + | |
| +int audpp_set_volume_and_pan(unsigned id, unsigned volume, int pan); | |
| +int audpp_pause(unsigned id, int pause); | |
| +int audpp_flush(unsigned id); | |
| +void audpp_avsync(int id, unsigned rate); | |
| +unsigned audpp_avsync_sample_count(int id); | |
| +unsigned audpp_avsync_byte_count(int id); | |
| + | |
| +#endif | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp5/snd_adie.c kernel/arch/arm/mach-msm/qdsp5/snd_adie.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp5/snd_adie.c 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp5/snd_adie.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -0,0 +1,524 @@ | |
| +/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| + * | |
| + * Redistribution and use in source and binary forms, with or without | |
| + * modification, are permitted provided that the following conditions are met: | |
| + * * Redistributions of source code must retain the above copyright | |
| + * notice, this list of conditions and the following disclaimer. | |
| + * * Redistributions in binary form must reproduce the above copyright | |
| + * notice, this list of conditions and the following disclaimer in the | |
| + * documentation and/or other materials provided with the distribution. | |
| + * * Neither the name of Code Aurora Forum nor | |
| + * the names of its contributors may be used to endorse or promote | |
| + * products derived from this software without specific prior written | |
| + * permission. | |
| + * | |
| + * Alternatively, provided that this notice is retained in full, this software | |
| + * may be relicensed by the recipient under the terms of the GNU General Public | |
| + * License version 2 ("GPL") and only version 2, in which case the provisions of | |
| + * the GPL apply INSTEAD OF those given above. If the recipient relicenses the | |
| + * software under the GPL, then the identification text in the MODULE_LICENSE | |
| + * macro must be changed to reflect "GPLv2" instead of "Dual BSD/GPL". Once a | |
| + * recipient changes the license terms to the GPL, subsequent recipients shall | |
| + * not relicense under alternate licensing terms, including the BSD or dual | |
| + * BSD/GPL terms. In addition, the following license statement immediately | |
| + * below and between the words START and END shall also then apply when this | |
| + * software is relicensed under the GPL: | |
| + * | |
| + * START | |
| + * | |
| + * This program is free software; you can redistribute it and/or modify it under | |
| + * the terms of the GNU General Public License version 2 and only version 2 as | |
| + * published by the Free Software Foundation. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, but WITHOUT | |
| + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS | |
| + * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more | |
| + * details. | |
| + * | |
| + * You should have received a copy of the GNU General Public License along with | |
| + * this program; if not, write to the Free Software Foundation, Inc., | |
| + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | |
| + * | |
| + * END | |
| + * | |
| + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE | |
| + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
| + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
| + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | |
| + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | |
| + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
| + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
| + * POSSIBILITY OF SUCH DAMAGE. | |
| + * | |
| + */ | |
| +#include <mach/debug_audio_mm.h> | |
| +#include <linux/module.h> | |
| +#include <linux/fs.h> | |
| +#include <linux/miscdevice.h> | |
| +#include <linux/uaccess.h> | |
| +#include <linux/kthread.h> | |
| +#include <linux/delay.h> | |
| +#include <mach/msm_rpcrouter.h> | |
| +#include <linux/debugfs.h> | |
| +#include <mach/qdsp5/snd_adie.h> | |
| + | |
| +static struct adie_svc_client adie_client[ADIE_SVC_MAX_CLIENTS]; | |
| +static DEFINE_MUTEX(adie_client_lock); | |
| + | |
| +static int adie_svc_process_cb(struct msm_rpc_client *client, | |
| + void *buffer, int in_size) | |
| +{ | |
| + int rc, id; | |
| + uint32_t accept_status; | |
| + struct rpc_request_hdr *req; | |
| + struct adie_svc_client_register_cb_cb_args arg, *buf_ptr; | |
| + | |
| + req = (struct rpc_request_hdr *)buffer; | |
| + for (id = 0; id < ADIE_SVC_MAX_CLIENTS; id++) { | |
| + if (adie_client[id].rpc_client == client) | |
| + break; | |
| + } | |
| + if (id == ADIE_SVC_MAX_CLIENTS) { | |
| + MM_ERR("RPC reply with invalid rpc client\n"); | |
| + accept_status = RPC_ACCEPTSTAT_SYSTEM_ERR; | |
| + goto err; | |
| + } | |
| + | |
| + buf_ptr = (struct adie_svc_client_register_cb_cb_args *)(req + 1); | |
| + arg.cb_id = be32_to_cpu(buf_ptr->cb_id); | |
| + arg.size = be32_to_cpu(buf_ptr->size); | |
| + arg.client_id = be32_to_cpu(buf_ptr->client_id); | |
| + arg.adie_block = be32_to_cpu(buf_ptr->adie_block); | |
| + arg.status = be32_to_cpu(buf_ptr->status); | |
| + arg.client_operation = be32_to_cpu(buf_ptr->client_operation); | |
| + | |
| + if (arg.cb_id != adie_client[id].cb_id) { | |
| + MM_ERR("RPC reply with invalid invalid cb_id\n"); | |
| + accept_status = RPC_ACCEPTSTAT_SYSTEM_ERR; | |
| + goto err; | |
| + } | |
| + | |
| + mutex_lock(&adie_client[id].lock); | |
| + switch (arg.client_operation) { | |
| + case ADIE_SVC_REGISTER_CLIENT: | |
| + MM_DBG("ADIE_SVC_REGISTER_CLIENT callback\n"); | |
| + adie_client[id].client_id = arg.client_id; | |
| + break; | |
| + case ADIE_SVC_DEREGISTER_CLIENT: | |
| + MM_DBG("ADIE_SVC_DEREGISTER_CLIENT callback\n"); | |
| + break; | |
| + case ADIE_SVC_CONFIG_ADIE_BLOCK: | |
| + MM_DBG("ADIE_SVC_CONFIG_ADIE_BLOCK callback\n"); | |
| + if (adie_client[id].client_id != arg.client_id) { | |
| + mutex_unlock(&adie_client[id].lock); | |
| + accept_status = RPC_ACCEPTSTAT_SYSTEM_ERR; | |
| + goto err; | |
| + } | |
| + break; | |
| + default: | |
| + accept_status = RPC_ACCEPTSTAT_SYSTEM_ERR; | |
| + goto err; | |
| + } | |
| + | |
| + adie_client[id].status = arg.status; | |
| + adie_client[id].adie_svc_cb_done = 1; | |
| + mutex_unlock(&adie_client[id].lock); | |
| + wake_up(&adie_client[id].wq); | |
| + accept_status = RPC_ACCEPTSTAT_SUCCESS; | |
| + | |
| +err: | |
| + msm_rpc_start_accepted_reply(client, be32_to_cpu(req->xid), | |
| + accept_status); | |
| + rc = msm_rpc_send_accepted_reply(client, 0); | |
| + if (rc) | |
| + MM_ERR("%s: send accepted reply failed: %d\n", __func__, rc); | |
| + | |
| + return rc; | |
| +} | |
| + | |
| +static int adie_svc_rpc_cb_func(struct msm_rpc_client *client, | |
| + void *buffer, int in_size) | |
| +{ | |
| + int rc = 0; | |
| + struct rpc_request_hdr *req; | |
| + | |
| + req = (struct rpc_request_hdr *)buffer; | |
| + | |
| + MM_DBG("procedure received to rpc cb %d\n", | |
| + be32_to_cpu(req->procedure)); | |
| + switch (be32_to_cpu(req->procedure)) { | |
| + case ADIE_SVC_CLIENT_STATUS_FUNC_PTR_TYPE_PROC: | |
| + rc = adie_svc_process_cb(client, buffer, in_size); | |
| + break; | |
| + default: | |
| + MM_ERR("%s: procedure not supported %d\n", __func__, | |
| + be32_to_cpu(req->procedure)); | |
| + msm_rpc_start_accepted_reply(client, be32_to_cpu(req->xid), | |
| + RPC_ACCEPTSTAT_PROC_UNAVAIL); | |
| + rc = msm_rpc_send_accepted_reply(client, 0); | |
| + if (rc) | |
| + MM_ERR("%s: sending reply failed: %d\n", __func__, rc); | |
| + break; | |
| + } | |
| + return rc; | |
| +} | |
| + | |
| +static int adie_svc_client_register_arg(struct msm_rpc_client *client, | |
| + void *buf, void *data) | |
| +{ | |
| + struct adie_svc_client_register_cb_args *arg; | |
| + | |
| + arg = (struct adie_svc_client_register_cb_args *)data; | |
| + | |
| + *((int *)buf) = cpu_to_be32((int)arg->cb_id); | |
| + return sizeof(int); | |
| +} | |
| + | |
| +static int adie_svc_client_deregister_arg(struct msm_rpc_client *client, | |
| + void *buf, void *data) | |
| +{ | |
| + struct adie_svc_client_deregister_cb_args *arg; | |
| + | |
| + arg = (struct adie_svc_client_deregister_cb_args *)data; | |
| + | |
| + *((int *)buf) = cpu_to_be32(arg->client_id); | |
| + return sizeof(int); | |
| +} | |
| + | |
| +static int adie_svc_config_adie_block_arg(struct msm_rpc_client *client, | |
| + void *buf, void *data) | |
| +{ | |
| + struct adie_svc_config_adie_block_cb_args *arg; | |
| + int size = 0; | |
| + | |
| + arg = (struct adie_svc_config_adie_block_cb_args *)data; | |
| + | |
| + *((int *)buf) = cpu_to_be32(arg->client_id); | |
| + size += sizeof(int); | |
| + buf += sizeof(int); | |
| + | |
| + *((int *)buf) = cpu_to_be32(arg->adie_block); | |
| + size += sizeof(int); | |
| + buf += sizeof(int); | |
| + | |
| + *((int *)buf) = cpu_to_be32(arg->config); | |
| + size += sizeof(int); | |
| + | |
| + return size; | |
| +} | |
| + | |
| +/* Returns : client id on success | |
| + * and -1 on failure | |
| + */ | |
| +int adie_svc_get(void) | |
| +{ | |
| + int id, rc = 0; | |
| + struct adie_svc_client_register_cb_args arg; | |
| + | |
| + mutex_lock(&adie_client_lock); | |
| + for (id = 0; id < ADIE_SVC_MAX_CLIENTS; id++) { | |
| + if (adie_client[id].client_id == -1 && | |
| + adie_client[id].rpc_client == NULL) | |
| + break; | |
| + } | |
| + if (id == ADIE_SVC_MAX_CLIENTS) { | |
| + mutex_unlock(&adie_client_lock); | |
| + return -1; | |
| + } | |
| + | |
| + mutex_lock(&adie_client[id].lock); | |
| + adie_client[id].rpc_client = msm_rpc_register_client("adie_client", | |
| + ADIE_SVC_PROG, | |
| + ADIE_SVC_VERS, 1, | |
| + adie_svc_rpc_cb_func); | |
| + if (IS_ERR(adie_client[id].rpc_client)) { | |
| + MM_ERR("Failed to register RPC client\n"); | |
| + adie_client[id].rpc_client = NULL; | |
| + mutex_unlock(&adie_client[id].lock); | |
| + mutex_unlock(&adie_client_lock); | |
| + return -1; | |
| + } | |
| + mutex_unlock(&adie_client_lock); | |
| + | |
| + adie_client[id].adie_svc_cb_done = 0; | |
| + arg.cb_id = id; | |
| + adie_client[id].cb_id = arg.cb_id; | |
| + mutex_unlock(&adie_client[id].lock); | |
| + rc = msm_rpc_client_req(adie_client[id].rpc_client, | |
| + SND_ADIE_SVC_CLIENT_REGISTER_PROC, | |
| + adie_svc_client_register_arg, &arg, | |
| + NULL, NULL, -1); | |
| + if (!rc) { | |
| + rc = wait_event_interruptible(adie_client[id].wq, | |
| + adie_client[id].adie_svc_cb_done); | |
| + mutex_lock(&adie_client[id].lock); | |
| + if (unlikely(rc < 0)) { | |
| + if (rc == -ERESTARTSYS) | |
| + MM_ERR("wait_event_interruptible " | |
| + "returned -ERESTARTSYS\n"); | |
| + else | |
| + MM_ERR("wait_event_interruptible " | |
| + "returned error\n"); | |
| + rc = -1; | |
| + goto err; | |
| + } | |
| + MM_DBG("Status %d received from CB function, id %d rc %d\n", | |
| + adie_client[id].status, adie_client[id].client_id, rc); | |
| + rc = id; | |
| + if (adie_client[id].status == ADIE_SVC_STATUS_FAILURE) { | |
| + MM_ERR("Received failed status for register request\n"); | |
| + rc = -1; | |
| + } else | |
| + goto done; | |
| + } else { | |
| + MM_ERR("Failed to send register client request\n"); | |
| + rc = -1; | |
| + mutex_lock(&adie_client[id].lock); | |
| + } | |
| +err: | |
| + msm_rpc_unregister_client(adie_client[id].rpc_client); | |
| + adie_client[id].rpc_client = NULL; | |
| + adie_client[id].client_id = -1; | |
| + adie_client[id].cb_id = MSM_RPC_CLIENT_NULL_CB_ID; | |
| + adie_client[id].adie_svc_cb_done = 0; | |
| +done: | |
| + mutex_unlock(&adie_client[id].lock); | |
| + return rc; | |
| +} | |
| +EXPORT_SYMBOL(adie_svc_get); | |
| + | |
| +/* Returns: 0 on succes and | |
| + * -1 on failure | |
| + */ | |
| +int adie_svc_put(int id) | |
| +{ | |
| + int rc = 0; | |
| + struct adie_svc_client_deregister_cb_args arg; | |
| + | |
| + if (id < 0 || id >= ADIE_SVC_MAX_CLIENTS) | |
| + return -1; | |
| + | |
| + mutex_lock(&adie_client[id].lock); | |
| + if (adie_client[id].client_id == -1 || | |
| + adie_client[id].rpc_client == NULL) { | |
| + mutex_unlock(&adie_client[id].lock); | |
| + return -1; | |
| + } | |
| + arg.client_id = adie_client[id].client_id; | |
| + adie_client[id].adie_svc_cb_done = 0; | |
| + mutex_unlock(&adie_client[id].lock); | |
| + rc = msm_rpc_client_req(adie_client[id].rpc_client, | |
| + SND_ADIE_SVC_CLIENT_DEREGISTER_PROC, | |
| + adie_svc_client_deregister_arg, &arg, | |
| + NULL, NULL, -1); | |
| + if (!rc) { | |
| + rc = wait_event_interruptible(adie_client[id].wq, | |
| + adie_client[id].adie_svc_cb_done); | |
| + if (unlikely(rc < 0)) { | |
| + if (rc == -ERESTARTSYS) | |
| + MM_ERR("wait_event_interruptible " | |
| + "returned -ERESTARTSYS\n"); | |
| + else | |
| + MM_ERR("wait_event_interruptible " | |
| + "returned error\n"); | |
| + rc = -1; | |
| + goto err; | |
| + } | |
| + MM_DBG("Status received from CB function\n"); | |
| + mutex_lock(&adie_client[id].lock); | |
| + if (adie_client[id].status == ADIE_SVC_STATUS_FAILURE) { | |
| + rc = -1; | |
| + } else { | |
| + msm_rpc_unregister_client(adie_client[id].rpc_client); | |
| + adie_client[id].rpc_client = NULL; | |
| + adie_client[id].client_id = -1; | |
| + adie_client[id].cb_id = MSM_RPC_CLIENT_NULL_CB_ID; | |
| + adie_client[id].adie_svc_cb_done = 0; | |
| + } | |
| + mutex_unlock(&adie_client[id].lock); | |
| + } else { | |
| + MM_ERR("Failed to send deregister client request\n"); | |
| + rc = -1; | |
| + } | |
| +err: | |
| + return rc; | |
| +} | |
| +EXPORT_SYMBOL(adie_svc_put); | |
| + | |
| +/* Returns: 0 on success | |
| + * 2 already in use | |
| + * -1 on failure | |
| + */ | |
| +int adie_svc_config_adie_block(int id, | |
| + enum adie_block_enum_type adie_block_type, bool enable) | |
| +{ | |
| + int rc = 0; | |
| + struct adie_svc_config_adie_block_cb_args arg; | |
| + | |
| + if (id < 0 || id >= ADIE_SVC_MAX_CLIENTS) | |
| + return -1; | |
| + | |
| + mutex_lock(&adie_client[id].lock); | |
| + if (adie_client[id].client_id == -1 || | |
| + adie_client[id].rpc_client == NULL) { | |
| + mutex_unlock(&adie_client[id].lock); | |
| + return -1; | |
| + } | |
| + arg.client_id = adie_client[id].client_id; | |
| + arg.adie_block = adie_block_type; | |
| + arg.config = (enum adie_config_enum_type)enable; | |
| + adie_client[id].adie_svc_cb_done = 0; | |
| + mutex_unlock(&adie_client[id].lock); | |
| + rc = msm_rpc_client_req(adie_client[id].rpc_client, | |
| + SND_ADIE_SVC_CONFIG_ADIE_BLOCK_PROC, | |
| + adie_svc_config_adie_block_arg, &arg, | |
| + NULL, NULL, -1); | |
| + if (!rc) { | |
| + rc = wait_event_interruptible(adie_client[id].wq, | |
| + adie_client[id].adie_svc_cb_done); | |
| + if (unlikely(rc < 0)) { | |
| + if (rc == -ERESTARTSYS) | |
| + MM_ERR("wait_event_interruptible " | |
| + "returned -ERESTARTSYS\n"); | |
| + else | |
| + MM_ERR("wait_event_interruptible " | |
| + "returned error\n"); | |
| + rc = -1; | |
| + goto err; | |
| + } | |
| + MM_DBG("Status received from CB function\n"); | |
| + mutex_lock(&adie_client[id].lock); | |
| + if (adie_client[id].status == ADIE_SVC_STATUS_FAILURE) | |
| + rc = -1; | |
| + else | |
| + rc = adie_client[id].status; | |
| + mutex_unlock(&adie_client[id].lock); | |
| + } else { | |
| + MM_ERR("Failed to send adie block config request\n"); | |
| + rc = -1; | |
| + } | |
| +err: | |
| + return rc; | |
| +} | |
| +EXPORT_SYMBOL(adie_svc_config_adie_block); | |
| + | |
| +#ifdef CONFIG_DEBUG_FS | |
| + | |
| +struct dentry *dentry; | |
| + | |
| +static ssize_t snd_adie_debug_open(struct inode *inode, struct file *file) | |
| +{ | |
| + file->private_data = inode->i_private; | |
| + return 0; | |
| +} | |
| + | |
| +static ssize_t snd_adie_debug_write(struct file *file, const char __user *buf, | |
| + size_t count, loff_t *ppos) | |
| +{ | |
| + int rc = 0, op = 0; | |
| + int id = 0, adie_block = 0, config = 1; | |
| + | |
| + sscanf(buf, "%d %d %d %d", &op, &id, &adie_block, &config); | |
| + MM_INFO("\nUser input: op %d id %d block %d config %d\n", op, id, | |
| + adie_block, config); | |
| + switch (op) { | |
| + case ADIE_SVC_REGISTER_CLIENT: | |
| + MM_INFO("ADIE_SVC_REGISTER_CLIENT\n"); | |
| + rc = adie_svc_get(); | |
| + if (rc >= 0) | |
| + MM_INFO("Client registered: %d\n", rc); | |
| + else | |
| + MM_ERR("Failed registering client\n"); | |
| + break; | |
| + case ADIE_SVC_DEREGISTER_CLIENT: | |
| + MM_INFO("ADIE_SVC_DEREGISTER_CLIENT: %d\n", id); | |
| + rc = adie_svc_put(id); | |
| + if (!rc) | |
| + MM_INFO("Client %d deregistered\n", id); | |
| + else | |
| + MM_ERR("Failed unregistering the client: %d\n", id); | |
| + break; | |
| + case ADIE_SVC_CONFIG_ADIE_BLOCK: | |
| + MM_INFO("ADIE_SVC_CONFIG_ADIE_BLOCK: id %d adie_block %d \ | |
| + config %d\n", id, adie_block, config); | |
| + rc = adie_svc_config_adie_block(id, | |
| + (enum adie_block_enum_type)adie_block, (bool)config); | |
| + if (!rc) | |
| + MM_INFO("ADIE block %d %s", adie_block, | |
| + config ? "enabled\n" : "disabled\n"); | |
| + else if (rc == 2) | |
| + MM_INFO("ADIE block %d already in use\n", adie_block); | |
| + else | |
| + MM_ERR("ERROR configuring the ADIE block\n"); | |
| + break; | |
| + default: | |
| + MM_INFO("Invalid operation\n"); | |
| + } | |
| + return count; | |
| +} | |
| + | |
| +static ssize_t snd_adie_debug_read(struct file *file, char __user *buf, | |
| + size_t count, loff_t *ppos) | |
| +{ | |
| + static char buffer[1024]; | |
| + const int debug_bufmax = sizeof(buffer); | |
| + int id, n = 0; | |
| + | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "LIST OF CLIENTS\n"); | |
| + for (id = 0; id < ADIE_SVC_MAX_CLIENTS ; id++) { | |
| + if (adie_client[id].client_id != -1 && | |
| + adie_client[id].rpc_client != NULL) { | |
| + n += scnprintf(buffer + n, debug_bufmax - n, | |
| + "id %d rpc client 0x%08x\n", id, | |
| + (uint32_t)adie_client[id].rpc_client); | |
| + } | |
| + } | |
| + buffer[n] = 0; | |
| + return simple_read_from_buffer(buf, count, ppos, buffer, n); | |
| +} | |
| + | |
| +static const struct file_operations snd_adie_debug_fops = { | |
| + .read = snd_adie_debug_read, | |
| + .open = snd_adie_debug_open, | |
| + .write = snd_adie_debug_write, | |
| +}; | |
| +#endif | |
| + | |
| +static void __exit snd_adie_exit(void) | |
| +{ | |
| +#ifdef CONFIG_DEBUG_FS | |
| + if (dentry) | |
| + debugfs_remove(dentry); | |
| +#endif | |
| +} | |
| + | |
| +static int __init snd_adie_init(void) | |
| +{ | |
| + int id; | |
| +#ifdef CONFIG_DEBUG_FS | |
| + char name[sizeof "msm_snd_adie"]; | |
| + | |
| + snprintf(name, sizeof name, "msm_snd_adie"); | |
| + dentry = debugfs_create_file(name, S_IFREG | S_IRUGO | S_IWUGO, | |
| + NULL, NULL, &snd_adie_debug_fops); | |
| + if (IS_ERR(dentry)) | |
| + MM_DBG("debugfs_create_file failed\n"); | |
| +#endif | |
| + for (id = 0; id < ADIE_SVC_MAX_CLIENTS; id++) { | |
| + adie_client[id].client_id = -1; | |
| + adie_client[id].cb_id = MSM_RPC_CLIENT_NULL_CB_ID; | |
| + adie_client[id].status = 0; | |
| + adie_client[id].adie_svc_cb_done = 0; | |
| + mutex_init(&adie_client[id].lock); | |
| + init_waitqueue_head(&adie_client[id].wq); | |
| + adie_client[id].rpc_client = NULL; | |
| + } | |
| + return 0; | |
| +} | |
| + | |
| +module_init(snd_adie_init); | |
| +module_exit(snd_adie_exit); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_ard.c kernel/arch/arm/mach-msm/qdsp6/msm8k_ard.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_ard.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp6/msm8k_ard.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -1,9 +1,9 @@ | |
| -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| +/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| * documentation and/or other materials provided with the distribution. | |
| @@ -54,37 +54,41 @@ | |
| * POSSIBILITY OF SUCH DAMAGE. | |
| * | |
| */ | |
| #include <linux/kernel.h> | |
| #include <linux/slab.h> | |
| #include <linux/mutex.h> | |
| #include <linux/dma-mapping.h> | |
| +#include <linux/wakelock.h> | |
| #include <mach/qdsp6/msm8k_cad.h> | |
| #include <mach/qdsp6/msm8k_ard_clk.h> | |
| #include <mach/qdsp6/msm8k_ard_adie.h> | |
| #include <mach/qdsp6/msm8k_cad_rpc_type.h> | |
| #include <mach/qdsp6/msm8k_cad_rpc.h> | |
| #include <mach/qdsp6/msm8k_ard_q6.h> | |
| #include <mach/qdsp6/msm8k_ard_helper.h> | |
| #include <mach/qdsp6/msm8k_ard_acdb.h> | |
| #include <mach/qdsp6/msm8k_cad_q6dec_drvi.h> | |
| #include <mach/qdsp6/msm8k_cad_q6enc_drvi.h> | |
| #include <mach/qdsp6/msm8k_cad_write_pcm_format.h> | |
| #include <mach/qdsp6/msm8k_cad_write_aac_format.h> | |
| #include <mach/qdsp6/msm8k_adsp_audio_types.h> | |
| + | |
| static struct ard_session_info_struct_type ard_session | |
| [ARD_AUDIO_MAX_CLIENT]; | |
| struct ard_session_info_struct_type *ardsession[CAD_MAX_SESSION]; | |
| struct ard_state_struct_type ard_state; | |
| struct clk_info g_clk_info = {8000, 0}; | |
| u32 device_control_session; | |
| +static struct wake_lock idle_lock; | |
| +static struct wake_lock suspend_lock; | |
| #if 0 | |
| #define D(fmt, args...) printk(KERN_INFO "ARD: " fmt, ##args) | |
| #else | |
| #define D(fmt, args...) do {} while (0) | |
| #endif | |
| @@ -140,16 +144,20 @@ | |
| /* Create the session mutexes */ | |
| for (i = 0; i < ARD_AUDIO_MAX_CLIENT; i++) | |
| mutex_init(&ard_session[i].session_mutex); | |
| /* Create a mutex for the state machine */ | |
| mutex_init(&local_ard_state->ard_state_machine_mutex); | |
| + /* Initialize wake lock to avoid power collapse during use */ | |
| + wake_lock_init(&idle_lock, WAKE_LOCK_IDLE, "audio_idle"); | |
| + wake_lock_init(&suspend_lock, WAKE_LOCK_SUSPEND, "audio_suspend"); | |
| + | |
| /* Initialize the ADIE */ | |
| dal_rc = adie_init(); | |
| if (dal_rc != CAD_RES_SUCCESS) { | |
| pr_err("ARD ard_init failed\n"); | |
| rc = CAD_RES_FAILURE; | |
| goto done; | |
| } | |
| @@ -314,16 +322,18 @@ | |
| mutex_lock(&ardsession[session_id]->session_mutex); | |
| /* Commit session */ | |
| ard_session[i].enabled = ARD_TRUE; | |
| ard_session[i].available = ARD_TRUE; | |
| mutex_unlock(&ardsession[session_id]->session_mutex); | |
| + audio_prevent_sleep(session_id); | |
| + | |
| D("ARD Opened session_id %d, sess_opn_info(cadr) = %p\n", | |
| session_id, op); | |
| print_data(session_id); | |
| done: | |
| return rc; | |
| @@ -340,46 +350,45 @@ | |
| struct cad_stream_config_struct_type *cadr_config = NULL; | |
| struct cad_stream_device_struct_type *strm_dev = NULL; | |
| struct ard_state_struct_type *local_ard_state = NULL; | |
| rc = dal_rc = CAD_RES_SUCCESS; | |
| if (ardsession[session_id]->enabled == ARD_FALSE) | |
| return rc; | |
| + audio_allow_sleep(session_id); | |
| + | |
| /*PCM recording specific change*/ | |
| if (ardsession[session_id]->sess_open_info->cad_open.op_code == | |
| CAD_OPEN_OP_READ && ( | |
| ardsession[session_id]->sess_open_info->cad_open.format == | |
| CAD_FORMAT_PCM || | |
| ardsession[session_id]->sess_open_info->cad_open.format == | |
| - CAD_FORMAT_AAC)) { | |
| - | |
| + CAD_FORMAT_AAC)) | |
| g_clk_info.open_rec_sessions -= 1; | |
| - g_clk_info.tx_clk_freq = 8000; | |
| - } | |
| local_ard_state = &ard_state; | |
| cadr = ardsession[session_id]->sess_open_info; | |
| strm_dev = &cadr->cad_device; | |
| D("ARD close ses_id %d, sess_opn_info(cadr) = %p, strm_dev = %p\n", | |
| session_id, cadr, strm_dev); | |
| print_data(session_id); | |
| - /* Disable the session */ | |
| - ardsession[session_id]->enabled = ARD_FALSE; | |
| - | |
| if (ardsession[session_id]->session_type != DEVICE_CTRL_TYPE | |
| && ardsession[session_id]->active == ARD_TRUE) { | |
| mutex_lock(&local_ard_state->ard_state_machine_mutex); | |
| + /* Disable the session */ | |
| + ardsession[session_id]->enabled = ARD_FALSE; | |
| + | |
| for (i = 0; i < strm_dev->device_len; i++) { | |
| if (strm_dev->device[i] == CAD_HW_DEVICE_ID_DEFAULT_TX) | |
| cad_device = local_ard_state->def_tx_device; | |
| else if (strm_dev->device[i] == | |
| CAD_HW_DEVICE_ID_DEFAULT_RX) | |
| cad_device = local_ard_state->def_rx_device; | |
| else | |
| /* not asking for default devices */ | |
| @@ -404,19 +413,16 @@ | |
| /* No more streams, so teardown device */ | |
| local_ard_state->ard_device[dev_id]. | |
| device_configured = ARD_FALSE; | |
| /* invoke the state m/c */ | |
| rc = ard_state_control(session_id, dev_id); | |
| - | |
| - mutex_unlock(&local_ard_state-> | |
| - ard_state_machine_mutex); | |
| } else | |
| D("Ses Closed no teardown, ses %d, dev %d," | |
| "%d\n", session_id, dev_id, | |
| local_ard_state->ard_device[dev_id]. | |
| stream_count); | |
| /* Release the device data*/ | |
| mutex_unlock(&local_ard_state->ard_device[dev_id]. | |
| @@ -521,16 +527,17 @@ | |
| dev_id = get_device_id | |
| (local_ard_state->def_tx_device); | |
| local_ard_state->new_tx_device | |
| = def_device->device; | |
| } | |
| if (dev_id == CAD_HW_DEVICE_ID_INVALID) { | |
| pr_err("%s: unsupported device\n", __func__); | |
| + mutex_unlock(&local_ard_state->ard_state_machine_mutex); | |
| return CAD_RES_FAILURE; | |
| } | |
| if ((local_ard_state->ard_device[dev_id].device_inuse | |
| == def_device->device) || | |
| (CAD_HW_DEVICE_ID_DEFAULT_TX == | |
| def_device->device) || | |
| (CAD_HW_DEVICE_ID_DEFAULT_RX == | |
| @@ -575,16 +582,18 @@ | |
| if (def_device->reserved == CAD_RX_DEVICE) { | |
| local_ard_state->def_rx_device = | |
| def_device->device; | |
| dev_id = get_device_id( | |
| local_ard_state-> | |
| def_rx_device); | |
| if (dev_id == CAD_HW_DEVICE_ID_INVALID) { | |
| pr_err("%s: unsupported device\n", __func__); | |
| + mutex_unlock(&local_ard_state-> | |
| + ard_state_machine_mutex); | |
| return CAD_RES_FAILURE; | |
| } | |
| /* Grab the Device Mutex and set */ | |
| /* Device In Use */ | |
| mutex_lock(&local_ard_state->ard_device | |
| [dev_id].device_mutex); | |
| @@ -600,16 +609,18 @@ | |
| } else { | |
| local_ard_state->def_tx_device = | |
| def_device->device; | |
| dev_id = get_device_id( | |
| local_ard_state-> | |
| def_tx_device); | |
| if (dev_id == CAD_HW_DEVICE_ID_INVALID) { | |
| pr_err("%s: unsupported device\n", __func__); | |
| + mutex_unlock(&local_ard_state-> | |
| + ard_state_machine_mutex); | |
| return CAD_RES_FAILURE; | |
| } | |
| /* Grab the Device Mutex and set */ | |
| /* Device In Use */ | |
| mutex_lock(&local_ard_state->ard_device | |
| [dev_id].device_mutex); | |
| @@ -655,58 +666,58 @@ | |
| /* Go ahead and open a Q6 Dev_Ctrl */ | |
| /* Session & send the Q6 dev chg */ | |
| /* notification Open QDSP6 session */ | |
| rc = qdsp6_open(session_id); | |
| if (rc != CAD_RES_SUCCESS) { | |
| /* Log Error and do nothing */ | |
| pr_err("Q6 OPEN FAILED %d\n", | |
| session_id); | |
| - goto done; | |
| + goto gd_done; | |
| } | |
| rc = qdsp6_devchg_notify(session_id, | |
| dev_id); | |
| if (rc != CAD_RES_SUCCESS) { | |
| /* Log Error and do nothing */ | |
| pr_err("Q6 DEV_CHG FAILED %d\n", | |
| session_id); | |
| qdsp6_close(session_id); | |
| - goto done; | |
| + goto gd_done; | |
| } | |
| rc = qdsp6_standby(session_id); | |
| if (rc != CAD_RES_SUCCESS) { | |
| /* Log Error and do nothing */ | |
| pr_err("Q6 STANDBY FAILED %d\n", | |
| session_id); | |
| qdsp6_close(session_id); | |
| - goto done; | |
| + goto gd_done; | |
| } | |
| rc = qdsp6_start(session_id); | |
| if (rc != CAD_RES_SUCCESS) { | |
| /* Log Error and do nothing */ | |
| pr_err("Q6 START FAILED %d\n", | |
| session_id); | |
| qdsp6_close(session_id); | |
| - goto done; | |
| + goto gd_done; | |
| } | |
| } | |
| /* New devices setup, so update def device. */ | |
| if (def_device->reserved == CAD_RX_DEVICE) | |
| local_ard_state->def_rx_device = | |
| local_ard_state->new_rx_device; | |
| else | |
| local_ard_state->def_tx_device = | |
| local_ard_state->new_tx_device; | |
| - | |
| +gd_done: | |
| /* Release mutex */ | |
| mutex_unlock(&local_ard_state-> | |
| ard_device[dev_id].device_mutex); | |
| /* Release mutex */ | |
| mutex_unlock(&local_ard_state-> | |
| ard_state_machine_mutex); | |
| @@ -752,16 +763,18 @@ | |
| cad_device = local_ard_state->def_rx_device; | |
| else | |
| /* not asking for default devices */ | |
| cad_device = strm_dev->device[i]; | |
| dev_id = get_device_id(cad_device); | |
| if (dev_id == CAD_HW_DEVICE_ID_INVALID) { | |
| pr_err("%s: unsupported device\n", __func__); | |
| + mutex_unlock(&local_ard_state-> | |
| + ard_state_machine_mutex); | |
| return CAD_RES_FAILURE; | |
| } | |
| /* Grab the Device mutex so that no updates */ | |
| /* are allowed to the device data */ | |
| mutex_lock(&local_ard_state->ard_device[dev_id]. | |
| device_mutex); | |
| @@ -784,52 +797,58 @@ | |
| } | |
| /* Release the device mutex */ | |
| mutex_unlock(&local_ard_state->ard_device[dev_id]. | |
| device_mutex); | |
| } | |
| - /* Release mutex */ | |
| - mutex_unlock(&local_ard_state->ard_state_machine_mutex); | |
| - | |
| /* If Device needed setup, the Q6 would've been */ | |
| /* Opened for this session if not, then go */ | |
| /* ahead and open & send the Q6 info */ | |
| if (ardsession[session_id]->qdsp6_opened != ARD_TRUE) { | |
| /* Open QDSP6 session */ | |
| rc = qdsp6_open(session_id); | |
| if (rc != CAD_RES_SUCCESS) { | |
| /* Log Error and do nothing */ | |
| pr_err("ARD DAL RPC OPEN FAILED %d\n", | |
| session_id); | |
| + mutex_unlock(&local_ard_state-> | |
| + ard_state_machine_mutex); | |
| goto done; | |
| } | |
| rc = qdsp6_standby(session_id); | |
| if (rc != CAD_RES_SUCCESS) { | |
| /* Log Error and do nothing */ | |
| pr_err("ARD IOCTL STANDBY FAILED %d\n", | |
| session_id); | |
| qdsp6_close(session_id); | |
| + mutex_unlock(&local_ard_state-> | |
| + ard_state_machine_mutex); | |
| goto done; | |
| } | |
| rc = qdsp6_start(session_id); | |
| if (rc != CAD_RES_SUCCESS) { | |
| /* Log Error and do nothing */ | |
| pr_err("ARD IOCTL START FAILED %d\n", | |
| session_id); | |
| qdsp6_close(session_id); | |
| + mutex_unlock(&local_ard_state-> | |
| + ard_state_machine_mutex); | |
| goto done; | |
| } | |
| } | |
| + /* Release mutex */ | |
| + mutex_unlock(&local_ard_state->ard_state_machine_mutex); | |
| + | |
| /* We don't know which of the devices are default device. | |
| Also, the stream can request more than one device */ | |
| for (i = 0; i < strm_dev->device_len; i++) { | |
| if (strm_dev->device[i] == CAD_HW_DEVICE_ID_DEFAULT_TX) | |
| cad_device = local_ard_state->def_tx_device; | |
| else if (strm_dev->device[i] == | |
| CAD_HW_DEVICE_ID_DEFAULT_RX) | |
| cad_device = local_ard_state->def_rx_device; | |
| @@ -932,25 +951,18 @@ | |
| } | |
| memcpy(cadr_stream, cmd_buf, cmd_len); | |
| if (cadr_stream->app_type == CAD_STREAM_APP_VOICE && | |
| ardsession[session_id]->sess_open_info->cad_open.op_code | |
| == CAD_OPEN_OP_READ) { | |
| - if (g_clk_info.tx_clk_freq != 8000) | |
| - for (i = 0; i < ARD_AUDIO_MAX_CLIENT; i++) | |
| - if (ardsession[i] && | |
| - ardsession[i]->sess_open_info | |
| - ->cad_open.op_code | |
| - == CAD_OPEN_OP_READ | |
| - && i != session_id) | |
| - ard_close(i); | |
| - | |
| + if (!g_clk_info.open_rec_sessions) | |
| + g_clk_info.tx_clk_freq = 8000; | |
| g_clk_info.open_rec_sessions += 1; | |
| } | |
| D("ard_ioctl STRM INFO SET ses %d, sess_opn_info(cadr) = %p\n", | |
| session_id, cadr); | |
| print_data(session_id); | |
| @@ -1036,23 +1048,17 @@ | |
| clk_freq = 11025; | |
| break; | |
| case 11: | |
| default: | |
| clk_freq = 8000; | |
| break; | |
| } | |
| - if (g_clk_info.open_rec_sessions > 0 && | |
| - g_clk_info.tx_clk_freq != clk_freq) { | |
| - | |
| - rc = CAD_RES_FAILURE; | |
| - pr_err("clk mismatch with current recording\n"); | |
| - break; | |
| - } else | |
| + if (!g_clk_info.open_rec_sessions) | |
| g_clk_info.tx_clk_freq = clk_freq; | |
| g_clk_info.open_rec_sessions += 1; | |
| } | |
| print_data(session_id); | |
| break; | |
| @@ -1234,19 +1240,17 @@ | |
| = ARD_STATE_CLK_ACTIVE; | |
| rc = ARD_STATE_RC_CONTINUE; | |
| goto done; | |
| } | |
| codec_type = get_codec_type(local_ard_state-> | |
| ard_device[dev_id].device_inuse); | |
| - if (ardsession[session_id]->sess_open_info->cad_open.op_code == | |
| - CAD_OPEN_OP_WRITE) | |
| - audio_resync_afe_clk(); | |
| + audio_resync_afe_clk(); | |
| res = codec_enable(codec_type, | |
| (u32)local_ard_state->ard_device[dev_id].device_type, | |
| local_ard_state->ard_device[dev_id].device_inuse); | |
| if (res == CAD_RES_FAILURE) { | |
| /* Failed to setup Codec. Go back to previous state */ | |
| pr_err("ARD Codec setup failed, state %d\n", | |
| @@ -1394,31 +1398,33 @@ | |
| /* Check if there are any valid stream sessions. */ | |
| switch (dev_id) { | |
| case 0: | |
| case 2: | |
| case 4: /* A2DP */ | |
| case 6: /* I2S */ | |
| for (i = 0; i < ARD_AUDIO_MAX_CLIENT; i++) { | |
| if ((ard_session[i].enabled == ARD_TRUE) | |
| + && (ard_session[i].sess_open_info != NULL) | |
| && (ard_session[i].sess_open_info-> | |
| cad_open.op_code | |
| == CAD_OPEN_OP_WRITE)) { | |
| /* Valid RX stream exists. */ | |
| rc = ARD_TRUE; | |
| break; | |
| } | |
| } | |
| break; | |
| case 1: | |
| case 3: | |
| case 5: /* A2DP */ | |
| case 7: /* I2S */ | |
| for (i = 0; i < ARD_AUDIO_MAX_CLIENT; i++) { | |
| if ((ard_session[i].enabled == ARD_TRUE) | |
| + && (ard_session[i].sess_open_info != NULL) | |
| && (ard_session[i].sess_open_info-> | |
| cad_open.op_code | |
| == CAD_OPEN_OP_READ)) { | |
| /* Valid TX stream exists. */ | |
| rc = ARD_TRUE; | |
| break; | |
| } | |
| } | |
| @@ -1459,16 +1465,42 @@ | |
| rc = ARD_FALSE; | |
| break; | |
| } | |
| } | |
| return rc; | |
| } | |
| +void audio_prevent_sleep(s32 session_id) | |
| +{ | |
| + if (ardsession[session_id]->session_type == DEVICE_CTRL_TYPE) | |
| + return; | |
| + | |
| + mutex_lock(&ard_state.ard_state_machine_mutex); | |
| + if (ard_state.num_active_stream_sessions++ == 0) { | |
| + wake_lock(&idle_lock); | |
| + wake_lock(&suspend_lock); | |
| + } | |
| + mutex_unlock(&ard_state.ard_state_machine_mutex); | |
| +} | |
| + | |
| +void audio_allow_sleep(s32 session_id) | |
| +{ | |
| + if (ardsession[session_id]->session_type == DEVICE_CTRL_TYPE) | |
| + return; | |
| + | |
| + mutex_lock(&ard_state.ard_state_machine_mutex); | |
| + if (ard_state.num_active_stream_sessions-- == 1) { | |
| + wake_unlock(&idle_lock); | |
| + wake_unlock(&suspend_lock); | |
| + } | |
| + mutex_unlock(&ard_state.ard_state_machine_mutex); | |
| +} | |
| + | |
| void print_data(u32 session_id) | |
| { | |
| struct cadi_open_struct_type *cadr = NULL; | |
| struct cad_stream_info_struct_type *cadr_stream = NULL; | |
| struct cad_stream_config_struct_type *cadr_config = NULL; | |
| struct cad_stream_device_struct_type *strm_dev = NULL; | |
| struct cad_open_struct_type *cad_open = NULL; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_ard_acdb.c kernel/arch/arm/mach-msm/qdsp6/msm8k_ard_acdb.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_ard_acdb.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp6/msm8k_ard_acdb.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -106,54 +106,24 @@ | |
| #endif | |
| /* this function calcuate the sample rate for TX session*/ | |
| enum ard_acdb_sample_rate ard_acdb_calculate_sample_rate(u32 session_id) | |
| { | |
| enum ard_acdb_sample_rate sample_rate = ARD_ACDB_SR_INVALID; | |
| - u32 voice_exist = 0; | |
| - u32 i; | |
| + if (g_clk_info.tx_clk_freq > ARD_ACDB_SR_16K_HZ) | |
| + sample_rate = ARD_ACDB_SR_48K_HZ; | |
| + else if (g_clk_info.tx_clk_freq > ARD_ACDB_SR_8K_HZ) | |
| + sample_rate = ARD_ACDB_SR_16K_HZ; | |
| + else | |
| + sample_rate = ARD_ACDB_SR_8K_HZ; | |
| - for (i = 0; i < ARD_AUDIO_MAX_CLIENT; ++i) { | |
| - if (ardsession[i] == NULL || | |
| - ardsession[i]->enabled != ARD_TRUE) | |
| - | |
| - continue; | |
| - | |
| - if ((ardsession[i]->sess_open_info)->cad_open.op_code != | |
| - CAD_OPEN_OP_DEVICE_CTRL) { | |
| - | |
| - if (ardsession[i]->sess_open_info->cad_stream.app_type | |
| - == CAD_STREAM_APP_VOICE) { | |
| - | |
| - voice_exist = 1; | |
| - sample_rate = ARD_ACDB_SR_8K_HZ; | |
| - break; | |
| - } | |
| - } | |
| - } | |
| - | |
| - if (voice_exist != 1) { | |
| - if ((ardsession[session_id]->sess_open_info->cad_open.format == | |
| - CAD_FORMAT_PCM) || (ardsession[session_id]-> | |
| - sess_open_info->cad_open.format == CAD_FORMAT_AAC)) { | |
| - | |
| - if (g_clk_info.tx_clk_freq > ARD_ACDB_SR_16K_HZ) | |
| - sample_rate = ARD_ACDB_SR_48K_HZ; | |
| - else if (g_clk_info.tx_clk_freq > ARD_ACDB_SR_8K_HZ) | |
| - sample_rate = ARD_ACDB_SR_16K_HZ; | |
| - else | |
| - sample_rate = ARD_ACDB_SR_8K_HZ; | |
| - } else { | |
| - sample_rate = ARD_ACDB_SR_8K_HZ; | |
| - } | |
| - } | |
| return sample_rate; | |
| } | |
| /* this is the current sample rate selection for cad device */ | |
| /* It will be revisited once we finalize the cad device definition*/ | |
| u32 ard_acdb_get_sample_rate(u32 session_id, u32 route_id) | |
| { | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_ard_adie.c kernel/arch/arm/mach-msm/qdsp6/msm8k_ard_adie.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_ard_adie.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp6/msm8k_ard_adie.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -1,8 +1,24 @@ | |
| +/* | |
| + * Copyright (C) 2009 SHARP CORPORATION All rights reserved. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + * This code is based on msm8k_ard_adie.c. | |
| + * The original copyright and notice are described below. | |
| + */ | |
| + | |
| /* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| @@ -130,16 +146,44 @@ | |
| adie_path_id = DAL_ADIE_CODEC_AUXPGA_HDPH_MONO_LB; | |
| break; | |
| case CAD_HW_DEVICE_ID_SPEAKER_SPKR_STEREO_LB: | |
| adie_path_id = DAL_ADIE_CODEC_AUXPGA_LINEOUT_STEREO_LB; | |
| break; | |
| case CAD_HW_DEVICE_ID_SPEAKER_SPKR_MONO_LB: | |
| adie_path_id = DAL_ADIE_CODEC_AUXPGA_LINEOUT_MONO_LB; | |
| break; | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_SPKR_MIC: | |
| + pr_err("[get_path_id] case: CAD_HW_DEVICE_ID_LOOPBACK_SPKR_MIC \n" ); | |
| + adie_path_id = DAL_ADIE_CODEC_LOOPBACK_SPKR_MIC_TX; | |
| + break; | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_HEADSET_MIC: | |
| + pr_err("[get_path_id] case: CAD_HW_DEVICE_ID_LOOPBACK_HEADSET_MIC \n" ); | |
| + adie_path_id = DAL_ADIE_CODEC_LOOPBACK_HEADSET_MIC_TX; | |
| + break; | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_EAR: | |
| + pr_err("[get_path_id] case: CAD_HW_DEVICE_ID_LOOPBACK_EAR \n" ); | |
| + adie_path_id = DAL_ADIE_CODEC_LOOPBACK_EAR_RX; | |
| + break; | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_HEADPHONE: | |
| + pr_err("[get_path_id] case: CAD_HW_DEVICE_ID_LOOPBACK_HEADPHONE \n" ); | |
| + adie_path_id = DAL_ADIE_CODEC_LOOPBACK_HEADPHONE_RX; | |
| + break; | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_SPKR: | |
| + pr_err("[get_path_id] case: CAD_HW_DEVICE_ID_LOOPBACK_SPKR \n" ); | |
| + adie_path_id = DAL_ADIE_CODEC_LOOPBACK_SPKR_RX; | |
| + break; | |
| + case CAD_HW_DEVICE_ID_HANDSETMIC_HEADSET_MIC: | |
| + pr_err("[get_path_id] case: CAD_HW_DEVICE_ID_HANDSETMIC_HEADSET_MIC \n" ); | |
| + adie_path_id = DAL_ADIE_CODEC_HANDSETMIC_HEADSET_MIC_TX; | |
| + break; | |
| + case CAD_HW_DEVICE_ID_LINE_IN_MIC: | |
| + pr_err("[get_path_id] case: CAD_HW_DEVICE_ID_LINE_IN_MIC \n" ); | |
| + adie_path_id = DAL_ADIE_CODEC_LINE_IN_MIC_TX; | |
| + break; | |
| case CAD_HW_DEVICE_ID_BT_SCO_MIC: | |
| case CAD_HW_DEVICE_ID_BT_SCO_SPKR: | |
| case CAD_HW_DEVICE_ID_BT_A2DP_SPKR: | |
| case CAD_HW_DEVICE_ID_BT_A2DP_TX: | |
| default: | |
| pr_err("ARD ADIE Paths not supported for dev_id %d\n", dev_id); | |
| break; | |
| } | |
| @@ -462,17 +506,21 @@ | |
| path_type = get_path_type(dev_type); | |
| if (adie_state.adie_path_type[dev_type].enable_request == ADIE_TRUE) { | |
| /* Prepare the PMIC, if necessary. Configure and power on, | |
| but mute it until codec output is ready. */ | |
| if (path_type == ADIE_CODEC_TX) | |
| if ((dev_id == CAD_HW_DEVICE_ID_HANDSET_MIC) || | |
| (dev_id == CAD_HW_DEVICE_ID_HEADSET_MIC) || | |
| - (dev_id == CAD_HW_DEVICE_ID_SPKR_PHONE_MIC)) | |
| + (dev_id == CAD_HW_DEVICE_ID_SPKR_PHONE_MIC) || | |
| + (dev_id == CAD_HW_DEVICE_ID_HANDSETMIC_HEADSET_MIC) || | |
| + (dev_id == CAD_HW_DEVICE_ID_LOOPBACK_SPKR_MIC) || | |
| + (dev_id == CAD_HW_DEVICE_ID_LOOPBACK_HEADSET_MIC) || | |
| + (dev_id == CAD_HW_DEVICE_ID_LINE_IN_MIC) ) | |
| pmic_mic_en(ON_CMD); | |
| else | |
| /* need to turn off MIC bias | |
| for TTY_HEADSET_MIC */ | |
| pmic_mic_en(OFF_CMD); | |
| else if ((path_type == ADIE_CODEC_RX) || | |
| (path_type == ADIE_CODEC_LB)) { | |
| struct spkr_config_mode scm; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_ard_helper.c kernel/arch/arm/mach-msm/qdsp6/msm8k_ard_helper.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_ard_helper.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp6/msm8k_ard_helper.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -1,8 +1,24 @@ | |
| +/* | |
| + * Copyright (C) 2009 SHARP CORPORATION All rights reserved. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + * This code is based on msm8k_ard_helper.c. | |
| + * The original copyright and notice are described below. | |
| + */ | |
| + | |
| /* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| @@ -91,32 +107,41 @@ | |
| (cad_device_requested == CAD_HW_DEVICE_ID_HANDSET_SPKR) || | |
| (cad_device_requested == CAD_HW_DEVICE_ID_HEADSET_SPKR_MONO) || | |
| (cad_device_requested == CAD_HW_DEVICE_ID_TTY_HEADSET_SPKR) || | |
| (cad_device_requested == | |
| CAD_HW_DEVICE_ID_HEADSET_MONO_PLUS_SPKR_MONO_RX) || | |
| (cad_device_requested == | |
| CAD_HW_DEVICE_ID_HEADSET_MONO_PLUS_SPKR_STEREO_RX) || | |
| (cad_device_requested == | |
| - CAD_HW_DEVICE_ID_HEADSET_SPKR_STEREO)) { | |
| - | |
| + CAD_HW_DEVICE_ID_HEADSET_SPKR_STEREO) || | |
| + (cad_device_requested == CAD_HW_DEVICE_ID_LOOPBACK_EAR) || | |
| + (cad_device_requested == CAD_HW_DEVICE_ID_LOOPBACK_HEADPHONE) || | |
| + (cad_device_requested == CAD_HW_DEVICE_ID_LOOPBACK_SPKR)) { | |
| dev_id = 0; | |
| } else if ((cad_device_requested == CAD_HW_DEVICE_ID_SPKR_PHONE_MIC) || | |
| (cad_device_requested == CAD_HW_DEVICE_ID_HEADSET_MIC) || | |
| (cad_device_requested == CAD_HW_DEVICE_ID_TTY_HEADSET_MIC) || | |
| - (cad_device_requested == CAD_HW_DEVICE_ID_HANDSET_MIC)) { | |
| - | |
| + (cad_device_requested == CAD_HW_DEVICE_ID_HANDSET_MIC) || | |
| + (cad_device_requested == CAD_HW_DEVICE_ID_LOOPBACK_SPKR_MIC) || | |
| + (cad_device_requested == CAD_HW_DEVICE_ID_LOOPBACK_HEADSET_MIC) || | |
| + (cad_device_requested == CAD_HW_DEVICE_ID_HANDSETMIC_HEADSET_MIC) || | |
| + (cad_device_requested == CAD_HW_DEVICE_ID_LINE_IN_MIC) ){ | |
| dev_id = 1; | |
| } else if ((cad_device_requested == CAD_HW_DEVICE_ID_BT_SCO_SPKR) || | |
| (cad_device_requested == CAD_HW_DEVICE_ID_BT_A2DP_SPKR)) { | |
| dev_id = 2; | |
| } else if (cad_device_requested == CAD_HW_DEVICE_ID_BT_SCO_MIC) { | |
| dev_id = 3; | |
| - } else if (cad_device_requested == CAD_HW_DEVICE_ID_I2S_RX) { | |
| + } else if ((cad_device_requested == CAD_HW_DEVICE_ID_I2S_RX) || | |
| + (cad_device_requested == CAD_HW_DEVICE_ID_I2S_RX_SPKR) || | |
| + (cad_device_requested == CAD_HW_DEVICE_ID_I2S_RX_HEADSET) || | |
| + (cad_device_requested == CAD_HW_DEVICE_ID_I2S_RX_HANDSETMIC_HEADSET) || | |
| + (cad_device_requested == CAD_HW_DEVICE_ID_I2S_RX_FAREND_TERMINAL)) { | |
| dev_id = 6; | |
| } else if (cad_device_requested == CAD_HW_DEVICE_ID_I2S_TX) { | |
| dev_id = 7; | |
| } else { | |
| pr_err("ARD No Support for other devices device = %d\n", | |
| cad_device_requested); | |
| dev_id = CAD_HW_DEVICE_ID_INVALID; | |
| } | |
| @@ -197,24 +222,35 @@ | |
| case CAD_HW_DEVICE_ID_HEADSET_MIC: | |
| case CAD_HW_DEVICE_ID_SPKR_PHONE_MIC: | |
| case CAD_HW_DEVICE_ID_SPKR_PHONE_MONO: | |
| case CAD_HW_DEVICE_ID_SPKR_PHONE_STEREO: | |
| case CAD_HW_DEVICE_ID_TTY_HEADSET_SPKR: | |
| case CAD_HW_DEVICE_ID_TTY_HEADSET_MIC: | |
| case CAD_HW_DEVICE_ID_HEADSET_MONO_PLUS_SPKR_MONO_RX: | |
| case CAD_HW_DEVICE_ID_HEADSET_MONO_PLUS_SPKR_STEREO_RX: | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_SPKR_MIC: | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_HEADSET_MIC: | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_EAR: | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_HEADPHONE: | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_SPKR: | |
| + case CAD_HW_DEVICE_ID_HANDSETMIC_HEADSET_MIC: | |
| + case CAD_HW_DEVICE_ID_LINE_IN_MIC: | |
| rc = CODEC_INT; | |
| break; | |
| case CAD_HW_DEVICE_ID_BT_SCO_MIC: | |
| case CAD_HW_DEVICE_ID_BT_SCO_SPKR: | |
| rc = CODEC_AUX_PCM; | |
| break; | |
| case CAD_HW_DEVICE_ID_I2S_TX: | |
| case CAD_HW_DEVICE_ID_I2S_RX: | |
| + case CAD_HW_DEVICE_ID_I2S_RX_SPKR: | |
| + case CAD_HW_DEVICE_ID_I2S_RX_HEADSET: | |
| + case CAD_HW_DEVICE_ID_I2S_RX_HANDSETMIC_HEADSET: | |
| + case CAD_HW_DEVICE_ID_I2S_RX_FAREND_TERMINAL: | |
| rc = CODEC_I2S; | |
| break; | |
| default: | |
| rc = CODEC_INT; | |
| pr_err("unsupported device %d\n", device_in_use); | |
| break; | |
| } | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_audio_dev_ctrl.c kernel/arch/arm/mach-msm/qdsp6/msm8k_audio_dev_ctrl.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_audio_dev_ctrl.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp6/msm8k_audio_dev_ctrl.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -1,8 +1,24 @@ | |
| +/* | |
| + * Copyright (C) 2009 SHARP CORPORATION All rights reserved. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + * This code is based on msm8k_audio_dev_ctrl.c. | |
| + * The original copyright and notice are described below. | |
| + */ | |
| + | |
| /* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| @@ -88,16 +104,153 @@ | |
| int current_tx_device; | |
| struct delayed_work cad_open_work; | |
| int q6_initialized; | |
| struct completion q6_init_compl; | |
| }; | |
| struct msm8k_audio_dev_ctrl g_ctrl; | |
| +int get_cad_hw_device_id(int new_device, struct cad_device_struct_type *cad_dev) | |
| +{ | |
| + int rc=CAD_RES_SUCCESS; | |
| + | |
| + switch (new_device) { | |
| + case HANDSET_MIC: | |
| + cad_dev->device = CAD_HW_DEVICE_ID_HANDSET_MIC; | |
| + cad_dev->reserved = CAD_TX_DEVICE; | |
| + break; | |
| + case HANDSET_SPKR: | |
| + cad_dev->device = CAD_HW_DEVICE_ID_HANDSET_SPKR; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case HEADSET_MIC: | |
| + cad_dev->device = CAD_HW_DEVICE_ID_HEADSET_MIC; | |
| + cad_dev->reserved = CAD_TX_DEVICE; | |
| + break; | |
| + case HEADSET_SPKR_MONO: | |
| + cad_dev->device = CAD_HW_DEVICE_ID_HEADSET_SPKR_MONO; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case HEADSET_SPKR_STEREO: | |
| + cad_dev->device = CAD_HW_DEVICE_ID_HEADSET_SPKR_STEREO; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case SPKR_PHONE_MIC: | |
| + cad_dev->device = CAD_HW_DEVICE_ID_SPKR_PHONE_MIC; | |
| + cad_dev->reserved = CAD_TX_DEVICE; | |
| + break; | |
| + case SPKR_PHONE_MONO: | |
| + cad_dev->device = CAD_HW_DEVICE_ID_SPKR_PHONE_MONO; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case SPKR_PHONE_STEREO: | |
| + cad_dev->device = CAD_HW_DEVICE_ID_SPKR_PHONE_STEREO; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case BT_SCO_MIC: | |
| + cad_dev->device = CAD_HW_DEVICE_ID_BT_SCO_MIC; | |
| + cad_dev->reserved = CAD_TX_DEVICE; | |
| + break; | |
| + case BT_SCO_SPKR: | |
| + cad_dev->device = CAD_HW_DEVICE_ID_BT_SCO_SPKR; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case BT_A2DP_SPKR: | |
| + cad_dev->device = CAD_HW_DEVICE_ID_BT_A2DP_SPKR; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case TTY_HEADSET_MIC: | |
| + cad_dev->device = CAD_HW_DEVICE_ID_TTY_HEADSET_MIC; | |
| + cad_dev->reserved = CAD_TX_DEVICE; | |
| + break; | |
| + case TTY_HEADSET_SPKR: | |
| + cad_dev->device = CAD_HW_DEVICE_ID_TTY_HEADSET_SPKR; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case HEADSET_MONO_PLUS_SPKR_MONO_RX: | |
| + cad_dev->device = | |
| + CAD_HW_DEVICE_ID_HEADSET_MONO_PLUS_SPKR_MONO_RX; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case HEADSET_MONO_PLUS_SPKR_STEREO_RX: | |
| + cad_dev->device = | |
| + CAD_HW_DEVICE_ID_HEADSET_MONO_PLUS_SPKR_STEREO_RX; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case I2S_RX: | |
| + cad_dev->device = CAD_HW_DEVICE_ID_I2S_RX; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case I2S_TX: | |
| + cad_dev->device = CAD_HW_DEVICE_ID_I2S_TX; | |
| + cad_dev->reserved = CAD_TX_DEVICE; | |
| + break; | |
| + case LOOPBACK_SPKR_MIC: | |
| + D("[audio_switch_device] case LOOPBACK_SPKR_MIC\n"); | |
| + cad_dev->device = CAD_HW_DEVICE_ID_LOOPBACK_SPKR_MIC; | |
| + cad_dev->reserved = CAD_TX_DEVICE; | |
| + break; | |
| + case LOOPBACK_HEADSET_MIC: | |
| + D("[audio_switch_device] case LOOPBACK_HEADSET_MIC\n"); | |
| + cad_dev->device = CAD_HW_DEVICE_ID_LOOPBACK_HEADSET_MIC; | |
| + cad_dev->reserved = CAD_TX_DEVICE; | |
| + break; | |
| + case LOOPBACK_EAR: | |
| + D("[audio_switch_device] case LOOPBACK_EAR\n"); | |
| + cad_dev->device = CAD_HW_DEVICE_ID_LOOPBACK_EAR; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case LOOPBACK_HEADPHONE: | |
| + D("[audio_switch_device] case LOOPBACK_HEADPHONE\n"); | |
| + cad_dev->device = CAD_HW_DEVICE_ID_LOOPBACK_HEADPHONE; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case LOOPBACK_SPKR: | |
| + D("[audio_switch_device] case LOOPBACK_SPKR\n"); | |
| + cad_dev->device = CAD_HW_DEVICE_ID_LOOPBACK_SPKR; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case I2S_RX_SPKR: | |
| + D("[audio_switch_device] case I2S_RX_SPKR\n"); | |
| + cad_dev->device = CAD_HW_DEVICE_ID_I2S_RX_SPKR; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case I2S_RX_HEADSET: | |
| + D("[audio_switch_device] case I2S_RX_HEADSET\n"); | |
| + cad_dev->device = CAD_HW_DEVICE_ID_I2S_RX_HEADSET; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case HANDSETMIC_HEADSET_MIC: | |
| + D("[audio_switch_device] case HANDSETMIC_HEADSET_MIC\n"); | |
| + cad_dev->device = CAD_HW_DEVICE_ID_HANDSETMIC_HEADSET_MIC; | |
| + cad_dev->reserved = CAD_TX_DEVICE; | |
| + break; | |
| + case I2S_RX_HANDSETMIC_HEADSET: | |
| + D("[audio_switch_device] case I2S_RX_HANDSETMIC_HEADSET\n"); | |
| + cad_dev->device = CAD_HW_DEVICE_ID_I2S_RX_HANDSETMIC_HEADSET; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + case LINE_IN_MIC: | |
| + D("[audio_switch_device] case LINE_IN_MIC\n"); | |
| + cad_dev->device = CAD_HW_DEVICE_ID_LINE_IN_MIC; | |
| + cad_dev->reserved = CAD_TX_DEVICE; | |
| + break; | |
| + case I2S_RX_FAREND_TERMINAL: | |
| + D("[audio_switch_device] case I2S_RX_FAREND_TERMINAL\n"); | |
| + cad_dev->device = CAD_HW_DEVICE_ID_I2S_RX_FAREND_TERMINAL; | |
| + cad_dev->reserved = CAD_RX_DEVICE; | |
| + break; | |
| + default: | |
| + rc = -ENODEV; | |
| + } | |
| + | |
| + return rc; | |
| +} | |
| + | |
| static int msm8k_audio_dev_ctrl_open(struct inode *inode, struct file *f) | |
| { | |
| struct msm8k_audio_dev_ctrl *ctrl = &g_ctrl; | |
| D("%s\n", __func__); | |
| f->private_data = ctrl; | |
| if (!ctrl->q6_initialized) { | |
| @@ -137,88 +290,17 @@ | |
| int rc; | |
| struct msm8k_audio_dev_ctrl *ctrl = &g_ctrl; | |
| struct cad_device_struct_type cad_dev; | |
| D("%s\n", __func__); | |
| memset(&cad_dev, 0, sizeof(struct cad_device_struct_type)); | |
| - switch (new_device) { | |
| - case HANDSET_MIC: | |
| - cad_dev.device = CAD_HW_DEVICE_ID_HANDSET_MIC; | |
| - cad_dev.reserved = CAD_TX_DEVICE; | |
| - break; | |
| - case HANDSET_SPKR: | |
| - cad_dev.device = CAD_HW_DEVICE_ID_HANDSET_SPKR; | |
| - cad_dev.reserved = CAD_RX_DEVICE; | |
| - break; | |
| - case HEADSET_MIC: | |
| - cad_dev.device = CAD_HW_DEVICE_ID_HEADSET_MIC; | |
| - cad_dev.reserved = CAD_TX_DEVICE; | |
| - break; | |
| - case HEADSET_SPKR_MONO: | |
| - cad_dev.device = CAD_HW_DEVICE_ID_HEADSET_SPKR_MONO; | |
| - cad_dev.reserved = CAD_RX_DEVICE; | |
| - break; | |
| - case HEADSET_SPKR_STEREO: | |
| - cad_dev.device = CAD_HW_DEVICE_ID_HEADSET_SPKR_STEREO; | |
| - cad_dev.reserved = CAD_RX_DEVICE; | |
| - break; | |
| - case SPKR_PHONE_MIC: | |
| - cad_dev.device = CAD_HW_DEVICE_ID_SPKR_PHONE_MIC; | |
| - cad_dev.reserved = CAD_TX_DEVICE; | |
| - break; | |
| - case SPKR_PHONE_MONO: | |
| - cad_dev.device = CAD_HW_DEVICE_ID_SPKR_PHONE_MONO; | |
| - cad_dev.reserved = CAD_RX_DEVICE; | |
| - break; | |
| - case SPKR_PHONE_STEREO: | |
| - cad_dev.device = CAD_HW_DEVICE_ID_SPKR_PHONE_STEREO; | |
| - cad_dev.reserved = CAD_RX_DEVICE; | |
| - break; | |
| - case BT_SCO_MIC: | |
| - cad_dev.device = CAD_HW_DEVICE_ID_BT_SCO_MIC; | |
| - cad_dev.reserved = CAD_TX_DEVICE; | |
| - break; | |
| - case BT_SCO_SPKR: | |
| - cad_dev.device = CAD_HW_DEVICE_ID_BT_SCO_SPKR; | |
| - cad_dev.reserved = CAD_RX_DEVICE; | |
| - break; | |
| - case BT_A2DP_SPKR: | |
| - cad_dev.device = CAD_HW_DEVICE_ID_BT_A2DP_SPKR; | |
| - cad_dev.reserved = CAD_RX_DEVICE; | |
| - break; | |
| - case TTY_HEADSET_MIC: | |
| - cad_dev.device = CAD_HW_DEVICE_ID_TTY_HEADSET_MIC; | |
| - cad_dev.reserved = CAD_TX_DEVICE; | |
| - break; | |
| - case TTY_HEADSET_SPKR: | |
| - cad_dev.device = CAD_HW_DEVICE_ID_TTY_HEADSET_SPKR; | |
| - cad_dev.reserved = CAD_RX_DEVICE; | |
| - break; | |
| - case HEADSET_MONO_PLUS_SPKR_MONO_RX: | |
| - cad_dev.device = | |
| - CAD_HW_DEVICE_ID_HEADSET_MONO_PLUS_SPKR_MONO_RX; | |
| - cad_dev.reserved = CAD_RX_DEVICE; | |
| - break; | |
| - case HEADSET_MONO_PLUS_SPKR_STEREO_RX: | |
| - cad_dev.device = | |
| - CAD_HW_DEVICE_ID_HEADSET_MONO_PLUS_SPKR_STEREO_RX; | |
| - cad_dev.reserved = CAD_RX_DEVICE; | |
| - break; | |
| - case I2S_RX: | |
| - cad_dev.device = CAD_HW_DEVICE_ID_I2S_RX; | |
| - cad_dev.reserved = CAD_RX_DEVICE; | |
| - break; | |
| - case I2S_TX: | |
| - cad_dev.device = CAD_HW_DEVICE_ID_I2S_TX; | |
| - cad_dev.reserved = CAD_TX_DEVICE; | |
| - break; | |
| - default: | |
| + if(get_cad_hw_device_id(new_device,&cad_dev)!=CAD_RES_SUCCESS){ | |
| return -ENODEV; | |
| } | |
| rc = cad_ioctl(ctrl->cad_ctrl_handle, | |
| CAD_IOCTL_CMD_DEVICE_SET_GLOBAL_DEFAULT, | |
| &cad_dev, | |
| sizeof(struct cad_device_struct_type)); | |
| if (rc) { | |
| @@ -337,16 +419,56 @@ | |
| sizeof(struct cad_filter_struct)); | |
| if (rc) | |
| pr_err("cad_ioctl() set mute failed\n"); | |
| return rc; | |
| } | |
| EXPORT_SYMBOL(audio_set_device_mute); | |
| +int audio_set_device_mute_ex(struct msm_mute_ex_info *m) | |
| + { | |
| + int rc; | |
| + struct cad_filter_struct flt; | |
| + struct cad_flt_cfg_dev_mute dev_mute_buf; | |
| + struct msm8k_audio_dev_ctrl *ctrl = &g_ctrl; | |
| + struct cad_device_struct_type cad_dev; | |
| + | |
| + D("%s\n", __func__); | |
| + | |
| + memset(&flt, 0, sizeof(struct cad_filter_struct)); | |
| + memset(&dev_mute_buf, 0, | |
| + sizeof(struct cad_flt_cfg_dev_mute)); | |
| + memset(&cad_dev, 0, sizeof(struct cad_device_struct_type)); | |
| + | |
| + if(get_cad_hw_device_id(m->device,&cad_dev) != CAD_RES_SUCCESS){ | |
| + pr_err("%s: invalid device\n", __func__); | |
| + return -1; | |
| + } | |
| + | |
| + dev_mute_buf.ver_id = CAD_FILTER_CONFIG_DEVICE_VOLUME_VERID; | |
| + dev_mute_buf.device_id = cad_dev.device; | |
| + dev_mute_buf.path = cad_dev.reserved; | |
| + dev_mute_buf.mute = m->mute; | |
| + | |
| + flt.cmd = CAD_FILTER_CONFIG_DEVICE_MUTE; | |
| + flt.filter_type = CAD_DEVICE_FILTER_TYPE_VOL; | |
| + flt.format_block_len = | |
| + sizeof(struct cad_flt_cfg_dev_mute); | |
| + flt.format_block = &dev_mute_buf; | |
| + rc = cad_ioctl(ctrl->cad_ctrl_handle, | |
| + CAD_IOCTL_CMD_SET_DEVICE_FILTER_CONFIG, | |
| + &flt, | |
| + sizeof(struct cad_filter_struct)); | |
| + if (rc) | |
| + pr_err("cad_ioctl() set mute ex failed\n"); | |
| + | |
| + return rc; | |
| + } | |
| +EXPORT_SYMBOL(audio_set_device_mute_ex); | |
| static int msm8k_audio_dev_ctrl_ioctl(struct inode *inode, struct file *f, | |
| unsigned int cmd, unsigned long arg) | |
| { | |
| int rc; | |
| u32 uparam; | |
| struct msm_mute_info m; | |
| struct msm_vol_info v; | |
| @@ -383,16 +505,30 @@ | |
| if (rc) { | |
| pr_err("AUDIO_SET_MUTE copy from user failed\n"); | |
| break; | |
| } | |
| rc = audio_set_device_mute(&m); | |
| break; | |
| + case AUDIO_SET_MUTE_EX: | |
| + { | |
| + struct msm_mute_ex_info m_ex; | |
| + rc = copy_from_user(&m_ex, (void *)arg, | |
| + sizeof(struct msm_mute_ex_info)); | |
| + if (rc) { | |
| + pr_err("AUDIO_SET_MUTE_EX copy from user failed\n"); | |
| + break; | |
| + } | |
| + | |
| + rc = audio_set_device_mute_ex(&m_ex); | |
| + | |
| + break; | |
| + } | |
| case AUDIO_SET_MAX_VOL_ALL: | |
| rc = volume_set_max_vol_all(); | |
| break; | |
| default: | |
| rc = -EINVAL; | |
| } | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_cad_q6enc_session.c kernel/arch/arm/mach-msm/qdsp6/msm8k_cad_q6enc_session.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_cad_q6enc_session.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp6/msm8k_cad_q6enc_session.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -186,17 +186,16 @@ | |
| sizeof(self->q6_data_buf), NULL) != | |
| CAD_RES_SUCCESS) { | |
| pr_err("Can not push read buffers to the Q6!!!\n"); | |
| mutex_lock(&self->session_mutex); | |
| self->used_nodes = self->used_nodes->next; | |
| node->next = self->free_nodes; | |
| self->free_nodes = node; | |
| - mutex_unlock(&self->session_mutex); | |
| res = CAD_RES_FAILURE; | |
| break; | |
| } | |
| D("Send Buffer (0x%x) to Q6\n", | |
| self->q6_data_buf.buffer.buffer_addr); | |
| /* lock for next loop iteration */ | |
| mutex_lock(&self->session_mutex); | |
| } | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_cad_q6equalizer.c kernel/arch/arm/mach-msm/qdsp6/msm8k_cad_q6equalizer.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_cad_q6equalizer.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp6/msm8k_cad_q6equalizer.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -1,9 +1,9 @@ | |
| -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| +/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| * documentation and/or other materials provided with the distribution. | |
| @@ -75,16 +75,21 @@ | |
| static struct cad_filter_eq_driver_struct cad_filter_eq_data; | |
| s32 cad_filter_eq_send_stream_config(u32 sess_id) | |
| { | |
| static union adsp_audio_event result; | |
| s32 rc = CAD_RES_SUCCESS; | |
| + cad_filter_eq_data.eq_stream_data[sess_id].cmd.op_code = | |
| + ADSP_AUDIO_IOCTL_SET_SESSION_EQ_CONFIG; | |
| + cad_filter_eq_data.eq_stream_data[sess_id].cmd.response_type = | |
| + ADSP_AUDIO_RESPONSE_COMMAND; | |
| + | |
| if (ardsession[sess_id]->group_id == 0) { | |
| pr_err("CAD::EQ=>Can not get group id"); | |
| return CAD_RES_FAILURE; | |
| } | |
| rc = cad_rpc_control(sess_id, ardsession[sess_id]->group_id, | |
| (void *)&cad_filter_eq_data.eq_stream_data[sess_id], | |
| sizeof(cad_filter_eq_data.eq_stream_data[sess_id]), | |
| @@ -130,16 +135,17 @@ | |
| /* check the stream status */ | |
| if (!ardsession[sess_id]->active) { | |
| D("%s: stream is not active.\n", __func__); | |
| return CAD_RES_SUCCESS; | |
| } | |
| /* send it if stream is active */ | |
| rc = cad_filter_eq_send_stream_config(sess_id); | |
| + | |
| return CAD_RES_SUCCESS; | |
| } | |
| s32 cad_filter_eq_process_stream_start(s32 sess_id) | |
| { | |
| struct cadi_open_struct_type *open_struct = | |
| ardsession[sess_id]->sess_open_info; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_cad_rpc.c kernel/arch/arm/mach-msm/qdsp6/msm8k_cad_rpc.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_cad_rpc.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp6/msm8k_cad_rpc.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -1,9 +1,9 @@ | |
| -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| +/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| * documentation and/or other materials provided with the distribution. | |
| @@ -205,31 +205,31 @@ | |
| 1/*DALRPC_DEST_QDSP*/, | |
| &(cad_rpc_data_type.remote_handle)); | |
| if (err) { | |
| pr_err("RPC call to Q6 attach failed\n"); | |
| mutex_unlock(&cad_rpc_data_type.resource_mutex); | |
| return err; | |
| } | |
| - D("Attached for session %d!\n", session_id); | |
| + D("Attached for session!\n"); | |
| /* get physical addresss of the buffer */ | |
| memset(&info, 0, sizeof(struct cad_rpc_config_info)); | |
| info.domain_id = cad_rpc_data_type.processor_id; | |
| info.cb_evt = dalrpc_alloc_cb(cad_rpc_data_type. | |
| remote_handle, | |
| &remote_cb_function, &cad_rpc_data_type); | |
| - D("Try to configure the remote session %d!\n", session_id); | |
| + D("Try to configure the remote session!\n"); | |
| /* initlize the rpc call */ | |
| err = dalrpc_fcn_5(ADSP_RPC_INIT, | |
| cad_rpc_data_type.remote_handle, | |
| (void *)&info, | |
| sizeof(struct cad_rpc_config_info)); | |
| - D("Configured remote session %d!\n", session_id); | |
| + D("Configured remote session!\n"); | |
| mutex_unlock(&cad_rpc_data_type.resource_mutex); | |
| return err; | |
| } | |
| /* public functions */ | |
| s32 cad_rpc_init(u32 processor_id) | |
| { | |
| u32 i; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_cad_volume.c kernel/arch/arm/mach-msm/qdsp6/msm8k_cad_volume.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_cad_volume.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp6/msm8k_cad_volume.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -1,8 +1,24 @@ | |
| +/* | |
| + * Copyright (C) 2009 SHARP CORPORATION All rights reserved. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + * This code is based on msm8k_cad_volume.c. | |
| + * The original copyright and notice are described below. | |
| + */ | |
| + | |
| /* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| @@ -108,17 +124,27 @@ | |
| INT_CAD_HW_DEVICE_ID_HEADSET_SPKR_STEREO_LB, | |
| INT_CAD_HW_DEVICE_ID_HEADSET_SPKR_MONO_LB, | |
| INT_CAD_HW_DEVICE_ID_SPEAKER_SPKR_STEREO_LB, | |
| INT_CAD_HW_DEVICE_ID_SPEAKER_SPKR_MONO_LB, | |
| /* Currently support following Single Stream/Multiple Devices combo: */ | |
| INT_CAD_HW_DEVICE_ID_HEADSET_MONO_PLUS_SPKR_MONO_RX, | |
| INT_CAD_HW_DEVICE_ID_HEADSET_MONO_PLUS_SPKR_STEREO_RX, | |
| - | |
| + INT_CAD_HW_DEVICE_ID_LOOPBACK_SPKR_MIC, | |
| + INT_CAD_HW_DEVICE_ID_LOOPBACK_HEADSET_MIC, | |
| + INT_CAD_HW_DEVICE_ID_LOOPBACK_EAR, | |
| + INT_CAD_HW_DEVICE_ID_LOOPBACK_HEADPHONE, | |
| + INT_CAD_HW_DEVICE_ID_LOOPBACK_SPKR, | |
| + INT_CAD_HW_DEVICE_ID_I2S_RX_SPKR, | |
| + INT_CAD_HW_DEVICE_ID_I2S_RX_HEADSET, | |
| + INT_CAD_HW_DEVICE_ID_HANDSETMIC_HEADSET_MIC, | |
| + INT_CAD_HW_DEVICE_ID_I2S_RX_HANDSETMIC_HEADSET, | |
| + INT_CAD_HW_DEVICE_ID_LINE_IN_MIC, | |
| + INT_CAD_HW_DEVICE_ID_I2S_RX_FAREND_TERMINAL, | |
| INT_CAD_HW_DEVICE_ID_MAX_NUM, | |
| INT_CAD_HW_DEVICE_ID_INVALID | |
| }; | |
| static struct cad_device_volume_cache | |
| qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_MAX_NUM]; | |
| @@ -177,16 +203,38 @@ | |
| case CAD_HW_DEVICE_ID_HEADSET_SPKR_STEREO_LB: | |
| return INT_CAD_HW_DEVICE_ID_HEADSET_SPKR_STEREO_LB; | |
| case CAD_HW_DEVICE_ID_HEADSET_SPKR_MONO_LB: | |
| return INT_CAD_HW_DEVICE_ID_HEADSET_SPKR_MONO_LB; | |
| case CAD_HW_DEVICE_ID_SPEAKER_SPKR_STEREO_LB: | |
| return INT_CAD_HW_DEVICE_ID_SPEAKER_SPKR_STEREO_LB; | |
| case CAD_HW_DEVICE_ID_SPEAKER_SPKR_MONO_LB: | |
| return INT_CAD_HW_DEVICE_ID_SPEAKER_SPKR_MONO_LB; | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_SPKR_MIC: | |
| + return INT_CAD_HW_DEVICE_ID_LOOPBACK_SPKR_MIC; | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_HEADSET_MIC: | |
| + return INT_CAD_HW_DEVICE_ID_LOOPBACK_HEADSET_MIC; | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_EAR: | |
| + return INT_CAD_HW_DEVICE_ID_LOOPBACK_EAR; | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_HEADPHONE: | |
| + return INT_CAD_HW_DEVICE_ID_LOOPBACK_HEADPHONE; | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_SPKR: | |
| + return INT_CAD_HW_DEVICE_ID_LOOPBACK_SPKR; | |
| + case CAD_HW_DEVICE_ID_I2S_RX_SPKR: | |
| + return INT_CAD_HW_DEVICE_ID_I2S_RX_SPKR; | |
| + case CAD_HW_DEVICE_ID_I2S_RX_HEADSET: | |
| + return INT_CAD_HW_DEVICE_ID_I2S_RX_HEADSET; | |
| + case CAD_HW_DEVICE_ID_HANDSETMIC_HEADSET_MIC: | |
| + return INT_CAD_HW_DEVICE_ID_HANDSETMIC_HEADSET_MIC; | |
| + case CAD_HW_DEVICE_ID_I2S_RX_HANDSETMIC_HEADSET: | |
| + return INT_CAD_HW_DEVICE_ID_I2S_RX_HANDSETMIC_HEADSET; | |
| + case CAD_HW_DEVICE_ID_LINE_IN_MIC: | |
| + return INT_CAD_HW_DEVICE_ID_LINE_IN_MIC; | |
| + case CAD_HW_DEVICE_ID_I2S_RX_FAREND_TERMINAL: | |
| + return INT_CAD_HW_DEVICE_ID_I2S_RX_FAREND_TERMINAL; | |
| default: | |
| pr_err("%s: invalid device id %d\n", __func__, | |
| device_id); | |
| return INT_CAD_HW_DEVICE_ID_INVALID; | |
| } | |
| } | |
| @@ -336,17 +384,18 @@ | |
| void *cmd_buf, u32 cmd_len) | |
| { | |
| enum cad_int_device_id device_id = INT_CAD_HW_DEVICE_ID_INVALID; | |
| struct cad_filter_struct *vol_flt = NULL; | |
| struct cad_flt_cfg_dev_vol *dev_vol_buf = NULL; | |
| struct cad_flt_cfg_strm_vol *stream_vol_buf = NULL; | |
| struct cad_flt_cfg_dev_mute *dev_mute_buf = NULL; | |
| struct cad_flt_cfg_strm_mute *stream_mute_buf = NULL; | |
| - | |
| + struct cad_stream_info_struct_type *cadr_stream = NULL; | |
| + struct cadi_open_struct_type *cadr = NULL; | |
| struct adsp_audio_set_dev_volume_command *q6_set_dev_vol = NULL; | |
| struct adsp_audio_set_volume_command *q6_set_strm_vol = NULL; | |
| struct adsp_audio_set_dev_mute_command *q6_set_dev_mute = NULL; | |
| struct adsp_audio_set_mute_command *q6_set_strm_mute = NULL; | |
| int rc = CAD_RES_SUCCESS; | |
| s32 device_volume = 0; | |
| u8 *rpc_cmd_buf = NULL; | |
| @@ -724,18 +773,16 @@ | |
| device_id, | |
| dev_vol_buf->volume); | |
| /* Cache the device volume. */ | |
| qdsp6_volume_cache_tbl[device_id] | |
| .current_volume = device_volume; | |
| qdsp6_volume_cache_tbl[device_id] | |
| .valid_current_volume = 1; | |
| - qdsp6_volume_cache_tbl[device_id] | |
| - .mute = 0; | |
| /* Construct QDSP6 device volume command: */ | |
| /* 1. Allocate memory for command buffer. */ | |
| q6_set_dev_vol = kmalloc( | |
| sizeof(*q6_set_dev_vol), | |
| GFP_KERNEL); | |
| if (!q6_set_dev_vol) | |
| return CAD_RES_FAILURE; | |
| @@ -753,17 +800,18 @@ | |
| sizeof(*q6_set_dev_vol); | |
| q6_set_dev_vol->cmd.op_code = | |
| ADSP_AUDIO_IOCTL_CMD_SET_DEVICE_VOL; | |
| q6_set_dev_vol->cmd.response_type = | |
| ADSP_AUDIO_RESPONSE_COMMAND; | |
| /* HACK: for volume = 0%: send mute command instead. */ | |
| - if (dev_vol_buf->volume == 0) { | |
| + if ((dev_vol_buf->volume == 0) || | |
| + (qdsp6_volume_cache_tbl[device_id].mute == 1)) { | |
| /* Construct QDSP6 device mute command. */ | |
| /* 1. Allocate memory for command buffer. */ | |
| q6_set_dev_mute = kmalloc( | |
| sizeof(*q6_set_dev_mute), | |
| GFP_KERNEL); | |
| if (!q6_set_dev_mute) | |
| return CAD_RES_FAILURE; | |
| @@ -821,18 +869,21 @@ | |
| q6_set_dev_mute->cmd.op_code = | |
| ADSP_AUDIO_IOCTL_CMD_SET_DEVICE_MUTE; | |
| q6_set_dev_mute->cmd.response_type = | |
| ADSP_AUDIO_RESPONSE_COMMAND; | |
| break; | |
| case CAD_FILTER_CONFIG_STREAM_VOLUME: | |
| D("CAD:VOL: Stream Volume\n"); | |
| + cadr = ardsession[session_id]->sess_open_info; | |
| + cadr_stream = &cadr->cad_stream; | |
| - stream_volume_cache = stream_vol_buf->volume; | |
| + if (cadr_stream->app_type != CAD_STREAM_APP_VOICE) | |
| + stream_volume_cache = stream_vol_buf->volume; | |
| if (ardsession[session_id]->active != ARD_TRUE) { | |
| rc = CAD_RES_SUCCESS; | |
| D("not active session, cached stream volume.\n"); | |
| goto done; | |
| } | |
| if (ardsession[session_id]->sess_open_info->cad_stream.app_type | |
| @@ -1056,17 +1107,64 @@ | |
| INT_CAD_HW_DEVICE_ID_HEADSET_MONO_PLUS_SPKR_MONO_RX] | |
| .min_gain = CAD_DEVICE_HEADSET_MIN_GAIN; | |
| qdsp6_volume_cache_tbl[ | |
| INT_CAD_HW_DEVICE_ID_HEADSET_MONO_PLUS_SPKR_STEREO_RX] | |
| .max_gain = CAD_DEVICE_HEADSET_MAX_GAIN; | |
| qdsp6_volume_cache_tbl[ | |
| INT_CAD_HW_DEVICE_ID_HEADSET_MONO_PLUS_SPKR_STEREO_RX] | |
| .min_gain = CAD_DEVICE_HEADSET_MIN_GAIN; | |
| - | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_I2S_RX].max_gain | |
| + = CAD_DEVICE_I2S_MAX_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_I2S_RX].min_gain | |
| + = CAD_DEVICE_I2S_MIN_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_LOOPBACK_SPKR_MIC].max_gain | |
| + = CAD_DEVICE_LOOPBACK_SPKR_MIC_MAX_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_LOOPBACK_SPKR_MIC].min_gain | |
| + = CAD_DEVICE_LOOPBACK_SPKR_MIC_MIN_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_LOOPBACK_HEADSET_MIC].max_gain | |
| + = CAD_DEVICE_LOOPBACK_HEADSET_MIC_MAX_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_LOOPBACK_HEADSET_MIC].min_gain | |
| + = CAD_DEVICE_LOOPBACK_HEADSET_MIC_MIN_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_LOOPBACK_EAR].max_gain | |
| + = CAD_DEVICE_LOOPBACK_EAR_MAX_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_LOOPBACK_EAR].min_gain | |
| + = CAD_DEVICE_LOOPBACK_EAR_MIN_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_LOOPBACK_HEADPHONE].max_gain | |
| + = CAD_DEVICE_LOOPBACK_HEADPHONE_MAX_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_LOOPBACK_HEADPHONE].min_gain | |
| + = CAD_DEVICE_LOOPBACK_HEADPHONE_MIN_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_LOOPBACK_SPKR].max_gain | |
| + = CAD_DEVICE_LOOPBACK_SPKR_MAX_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_LOOPBACK_SPKR].min_gain | |
| + = CAD_DEVICE_LOOPBACK_SPKR_MIN_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_I2S_RX_SPKR].max_gain | |
| + = CAD_DEVICE_I2S_RX_SPKR_MAX_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_I2S_RX_SPKR].min_gain | |
| + = CAD_DEVICE_I2S_RX_SPKR_MIN_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_I2S_RX_HEADSET].max_gain | |
| + = CAD_DEVICE_I2S_RX_HEADSET_MAX_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_I2S_RX_HEADSET].min_gain | |
| + = CAD_DEVICE_I2S_RX_HEADSET_MIN_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_HANDSETMIC_HEADSET_MIC].max_gain | |
| + = CAD_DEVICE_HANDSETMIC_HEADSET_MIC_MAX_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_HANDSETMIC_HEADSET_MIC].min_gain | |
| + = CAD_DEVICE_HANDSETMIC_HEADSET_MIC_MIN_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_I2S_RX_HANDSETMIC_HEADSET].max_gain | |
| + = CAD_DEVICE_I2S_RX_HANDSETMIC_HEADSET_MAX_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_I2S_RX_HANDSETMIC_HEADSET].min_gain | |
| + = CAD_DEVICE_I2S_RX_HANDSETMIC_HEADSET_MIN_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_LINE_IN_MIC].max_gain | |
| + = CAD_DEVICE_LINE_IN_MIC_MAX_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_LINE_IN_MIC].min_gain | |
| + = CAD_DEVICE_LINE_IN_MIC_MIN_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_I2S_RX_FAREND_TERMINAL].max_gain | |
| + = CAD_DEVICE_I2S_RX_FAREND_TERMINAL_MAX_GAIN; | |
| + qdsp6_volume_cache_tbl[INT_CAD_HW_DEVICE_ID_I2S_RX_FAREND_TERMINAL].min_gain | |
| + = CAD_DEVICE_I2S_RX_FAREND_TERMINAL_MIN_GAIN; | |
| stream_volume_cache = 0; | |
| return CAD_RES_SUCCESS; | |
| } | |
| int cad_apply_cached_vol_on_dev(u32 device_id) | |
| { | |
| struct adsp_audio_set_dev_volume_command *q6_set_dev_vol; | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_pcm.c kernel/arch/arm/mach-msm/qdsp6/msm8k_pcm.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_pcm.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp6/msm8k_pcm.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -1,8 +1,24 @@ | |
| +/* | |
| + * Copyright (C) 2009 SHARP CORPORATION All rights reserved. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + * This code is based on msm8k_pcm.c. | |
| + * The original copyright and notice are described below. | |
| + */ | |
| + | |
| /* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| @@ -322,16 +338,30 @@ | |
| } | |
| rc = cad_ioctl(p->cad_w_handle, CAD_IOCTL_CMD_STREAM_START, | |
| NULL, 0); | |
| if (rc) { | |
| pr_err("cad_ioctl() STREAM_START failed\n"); | |
| break; | |
| } | |
| + memset(&cad_strm_volume, 0, sizeof(struct cad_flt_cfg_strm_vol)); | |
| + cad_strm_volume.volume = CAD_STREAM_MSM8K_PCM_GAIN; | |
| + flt.filter_type = CAD_DEVICE_FILTER_TYPE_VOL; | |
| + flt.format_block = &cad_strm_volume; | |
| + flt.cmd = CAD_FILTER_CONFIG_STREAM_VOLUME; | |
| + flt.format_block_len = sizeof(struct cad_flt_cfg_strm_vol); | |
| + rc = cad_ioctl(p->cad_w_handle, | |
| + CAD_IOCTL_CMD_SET_STREAM_FILTER_CONFIG, | |
| + &flt, | |
| + sizeof(struct cad_filter_struct)); | |
| + if (rc) { | |
| + pr_err("cad_ioctl() AUDIO_START set volume failed\n"); | |
| + break; | |
| + } | |
| break; | |
| case AUDIO_STOP: | |
| rc = cad_ioctl(p->cad_w_handle, CAD_IOCTL_CMD_STREAM_PAUSE, | |
| NULL, 0); | |
| break; | |
| case AUDIO_FLUSH: | |
| p->flush_rcvd = 1; | |
| rc = cad_ioctl(p->cad_w_handle, CAD_IOCTL_CMD_STREAM_FLUSH, | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_q6_api_flip_utils.c kernel/arch/arm/mach-msm/qdsp6/msm8k_q6_api_flip_utils.c | |
| --- kernel-msm/arch/arm/mach-msm/qdsp6/msm8k_q6_api_flip_utils.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/qdsp6/msm8k_q6_api_flip_utils.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -1,8 +1,24 @@ | |
| +/* | |
| + * Copyright (C) 2009 SHARP CORPORATION All rights reserved. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + * This code is based on msm8k_q6_api_flip_utils.c. | |
| + * The original copyright and notice are described below. | |
| + */ | |
| + | |
| /* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| @@ -191,16 +207,39 @@ | |
| case CAD_HW_DEVICE_ID_VOICE: | |
| return ADSP_AUDIO_DEVICE_ID_VOICE; | |
| case CAD_HW_DEVICE_ID_DEFAULT_RX: | |
| case CAD_HW_DEVICE_ID_DEFAULT_TX: | |
| return ADSP_AUDIO_DEVICE_ID_DEFAULT; | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_SPKR_MIC: | |
| + return ADSP_AUDIO_DEVICE_ID_SPKR_PHONE_MIC; | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_HEADSET_MIC: | |
| + return ADSP_AUDIO_DEVICE_ID_HEADSET_MIC; | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_EAR: | |
| + return ADSP_AUDIO_DEVICE_ID_HANDSET_SPKR; | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_HEADPHONE: | |
| + return ADSP_AUDIO_DEVICE_ID_HEADSET_SPKR_STEREO; | |
| + case CAD_HW_DEVICE_ID_LOOPBACK_SPKR: | |
| + return ADSP_AUDIO_DEVICE_ID_HANDSET_SPKR; | |
| + case CAD_HW_DEVICE_ID_I2S_RX_SPKR: | |
| + return ADSP_AUDIO_DEVICE_ID_I2S_SPKR; | |
| + case CAD_HW_DEVICE_ID_I2S_RX_HEADSET: | |
| + return ADSP_AUDIO_DEVICE_ID_I2S_SPKR; | |
| + case CAD_HW_DEVICE_ID_HANDSETMIC_HEADSET_MIC: | |
| + return ADSP_AUDIO_DEVICE_ID_SPKR_PHONE_MIC; | |
| + case CAD_HW_DEVICE_ID_I2S_RX_HANDSETMIC_HEADSET: | |
| + return ADSP_AUDIO_DEVICE_ID_I2S_SPKR; | |
| + case CAD_HW_DEVICE_ID_LINE_IN_MIC: | |
| + return ADSP_AUDIO_DEVICE_ID_HEADSET_MIC; | |
| + case CAD_HW_DEVICE_ID_I2S_RX_FAREND_TERMINAL: | |
| + return ADSP_AUDIO_DEVICE_ID_I2S_SPKR; | |
| + | |
| default: | |
| return 0xFFFFFFFF; | |
| } | |
| } | |
| u8 q6_device_direction_mapping(u8 device) | |
| { | |
| switch (device) { | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/rpc_hsusb.c kernel/arch/arm/mach-msm/rpc_hsusb.c | |
| --- kernel-msm/arch/arm/mach-msm/rpc_hsusb.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/rpc_hsusb.c 2011-03-14 09:53:51.000000000 +0900 | |
| @@ -1,11 +1,12 @@ | |
| /* linux/arch/arm/mach-msm/rpc_hsusb.c | |
| * | |
| * Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. | |
| + * Copyright (c) 2010 Sharp Corporation. | |
| * | |
| * All source code in this file is licensed under the following license except | |
| * where indicated. | |
| * | |
| * This program is free software; you can redistribute it and/or modify it | |
| * under the terms of the GNU General Public License version 2 as published | |
| * by the Free Software Foundation. | |
| * | |
| @@ -42,16 +43,22 @@ | |
| unsigned long vbus_pwr_up; | |
| unsigned long vbus_pwr_down; | |
| unsigned long update_product_id; | |
| unsigned long update_serial_num; | |
| unsigned long update_is_serial_num_null; | |
| unsigned long reset_rework_installed; | |
| unsigned long enable_pmic_ulpi_data0; | |
| unsigned long disable_pmic_ulpi_data0; | |
| + unsigned long set_chgen; | |
| + unsigned long get_chgen; | |
| + unsigned long set_qxdmen; | |
| + unsigned long get_qxdmen; | |
| + unsigned long enable_ldo_off; | |
| + unsigned long get_boot_mode; | |
| }; | |
| static struct msm_hsusb_rpc_ids usb_rpc_ids; | |
| static struct msm_chg_rpc_ids chg_rpc_ids; | |
| static int msm_hsusb_init_rpc_ids(unsigned long vers) | |
| { | |
| if (vers == 0x00010001) { | |
| @@ -61,53 +68,109 @@ | |
| usb_rpc_ids.vbus_pwr_up = 6; | |
| usb_rpc_ids.vbus_pwr_down = 7; | |
| usb_rpc_ids.update_product_id = 8; | |
| usb_rpc_ids.update_serial_num = 9; | |
| usb_rpc_ids.update_is_serial_num_null = 10; | |
| usb_rpc_ids.reset_rework_installed = 17; | |
| usb_rpc_ids.enable_pmic_ulpi_data0 = 18; | |
| usb_rpc_ids.disable_pmic_ulpi_data0 = 19; | |
| + usb_rpc_ids.set_chgen = 26; | |
| + usb_rpc_ids.get_chgen = 27; | |
| + usb_rpc_ids.set_qxdmen = 28; | |
| + usb_rpc_ids.get_qxdmen = 29; | |
| + usb_rpc_ids.enable_ldo_off = 30; | |
| + usb_rpc_ids.get_boot_mode = 31; | |
| return 0; | |
| } else if (vers == 0x00010002) { | |
| usb_rpc_ids.prog = 0x30000064; | |
| usb_rpc_ids.vers_comp = 0x00010002; | |
| usb_rpc_ids.init_phy = 2; | |
| usb_rpc_ids.vbus_pwr_up = 6; | |
| usb_rpc_ids.vbus_pwr_down = 7; | |
| usb_rpc_ids.update_product_id = 8; | |
| usb_rpc_ids.update_serial_num = 9; | |
| usb_rpc_ids.update_is_serial_num_null = 10; | |
| usb_rpc_ids.reset_rework_installed = 17; | |
| usb_rpc_ids.enable_pmic_ulpi_data0 = 18; | |
| usb_rpc_ids.disable_pmic_ulpi_data0 = 19; | |
| + usb_rpc_ids.set_chgen = 26; | |
| + usb_rpc_ids.get_chgen = 27; | |
| + usb_rpc_ids.set_qxdmen = 28; | |
| + usb_rpc_ids.get_qxdmen = 29; | |
| + usb_rpc_ids.enable_ldo_off = 30; | |
| + usb_rpc_ids.get_boot_mode = 31; | |
| return 0; | |
| } else { | |
| printk(KERN_INFO "%s: no matches found for version\n", | |
| __func__); | |
| return -ENODATA; | |
| } | |
| } | |
| + | |
| +#define ONCRPC_HSU_API_EXIT_LPM_PROC 4 | |
| +extern void msm_hsusb_set_vbus_state(int online); | |
| + | |
| +static int hsu_app_apis_call(struct msm_rpc_server *server, | |
| + struct rpc_request_hdr *req, unsigned len) | |
| +{ | |
| + switch (req->procedure) { | |
| + case 0: | |
| + return 0; | |
| + case ONCRPC_HSU_API_EXIT_LPM_PROC: { | |
| + msm_hsusb_set_vbus_state(1); | |
| + return 0; | |
| + } | |
| + default: | |
| + printk(KERN_ERR "%s: program 0x%08x:%d: unknown procedure %d\n", | |
| + __FUNCTION__, req->prog, req->vers, req->procedure); | |
| + return -ENODEV; | |
| + } | |
| +} | |
| + | |
| +static struct msm_rpc_server hsu_app_apis_server = { | |
| + .prog = 0x30000063, | |
| + .vers = 0, | |
| + .rpc_call = hsu_app_apis_call, | |
| +}; | |
| + | |
| static int msm_chg_init_rpc(unsigned long vers) | |
| { | |
| +#if 1 | |
| + if (((vers & RPC_VERSION_MAJOR_MASK) == 0x00010000) || | |
| + ((vers & RPC_VERSION_MAJOR_MASK) == 0x00020000)) { | |
| + chg_ep = msm_rpc_connect_compatible(0x300000a2, vers, | |
| + MSM_RPC_UNINTERRUPTIBLE); | |
| + if (IS_ERR(chg_ep)) | |
| + return -ENODATA; | |
| + chg_rpc_ids.vers_comp = vers; | |
| + chg_rpc_ids.chg_usb_charger_connected_proc = 3; | |
| + chg_rpc_ids.chg_usb_charger_disconnected_proc = 4; | |
| + chg_rpc_ids.chg_usb_i_is_available_proc = 5; | |
| + chg_rpc_ids.chg_usb_i_is_not_available_proc = 6; | |
| + return 0; | |
| + } else | |
| + return -ENODATA; | |
| +#else | |
| if (((vers & RPC_VERSION_MAJOR_MASK) == 0x00010000) || | |
| ((vers & RPC_VERSION_MAJOR_MASK) == 0x00020000)) { | |
| chg_ep = msm_rpc_connect_compatible(MSM_RPC_CHG_PROG, vers, | |
| MSM_RPC_UNINTERRUPTIBLE); | |
| if (IS_ERR(chg_ep)) | |
| return -ENODATA; | |
| chg_rpc_ids.vers_comp = vers; | |
| chg_rpc_ids.chg_usb_charger_connected_proc = 7; | |
| chg_rpc_ids.chg_usb_charger_disconnected_proc = 8; | |
| chg_rpc_ids.chg_usb_i_is_available_proc = 9; | |
| chg_rpc_ids.chg_usb_i_is_not_available_proc = 10; | |
| return 0; | |
| } else | |
| return -ENODATA; | |
| +#endif | |
| } | |
| /* rpc connect for hsusb */ | |
| int msm_hsusb_rpc_connect(void) | |
| { | |
| if (usb_ep && !IS_ERR(usb_ep)) { | |
| printk(KERN_INFO "%s: usb_ep already connected\n", __func__); | |
| @@ -143,29 +206,33 @@ | |
| if (IS_ERR(usb_ep)) { | |
| printk(KERN_ERR "%s: connect compatible failed vers = %lx\n", | |
| __func__, usb_rpc_ids.vers_comp); | |
| return -EAGAIN; | |
| } else | |
| printk(KERN_INFO "%s: rpc connect success vers = %lx\n", | |
| __func__, usb_rpc_ids.vers_comp); | |
| + { | |
| + msm_rpc_create_server(&hsu_app_apis_server); | |
| + } | |
| + | |
| return 0; | |
| } | |
| EXPORT_SYMBOL(msm_hsusb_rpc_connect); | |
| /* rpc connect for charging */ | |
| int msm_chg_rpc_connect(void) | |
| { | |
| uint32_t chg_vers; | |
| - | |
| +#if 0 | |
| if (machine_is_msm7201a_surf() || machine_is_msm7x27_surf() || | |
| machine_is_qsd8x50_surf() || machine_is_msm7x25_surf()) | |
| return -ENOTSUPP; | |
| - | |
| +#endif | |
| if (chg_ep && !IS_ERR(chg_ep)) { | |
| printk(KERN_INFO "%s: chg_ep already connected\n", __func__); | |
| return 0; | |
| } | |
| chg_vers = 0x00020001; | |
| if (!msm_chg_init_rpc(chg_vers)) | |
| goto chg_found; | |
| @@ -568,8 +635,200 @@ | |
| } | |
| EXPORT_SYMBOL(msm_hsusb_enable_pmic_ulpidata0); | |
| int msm_hsusb_disable_pmic_ulpidata0(void) | |
| { | |
| return msm_hsusb_pmic_ulpidata0_config(0); | |
| } | |
| EXPORT_SYMBOL(msm_hsusb_disable_pmic_ulpidata0); | |
| + | |
| +int msm_hsusb_set_chgen(uint32_t enable) | |
| +{ | |
| + int rc = 0; | |
| + struct hsusb_phy_start_req { | |
| + struct rpc_request_hdr hdr; | |
| + uint32_t chg_enb; | |
| + } req; | |
| + | |
| + if (!usb_ep || IS_ERR(usb_ep)) | |
| + return -EAGAIN; | |
| + req.chg_enb = cpu_to_be32(enable); | |
| + rc = msm_rpc_call(usb_ep, usb_rpc_ids.set_chgen, | |
| + &req, sizeof(req), 5 * HZ); | |
| + | |
| + if (rc < 0) { | |
| + printk(KERN_ERR "%s: set_chgen failed! rc = %d\n", | |
| + __func__, rc); | |
| + } else | |
| + printk(KERN_INFO "msm_hsus_set_chgenb\n"); | |
| + | |
| + return rc; | |
| +} | |
| +EXPORT_SYMBOL(msm_hsusb_set_chgen); | |
| + | |
| + | |
| +int msm_hsusb_get_chgen(void) | |
| +{ | |
| + int rc = 0; | |
| + struct hsusb_start_req { | |
| + struct rpc_request_hdr hdr; | |
| + } req; | |
| + struct hsusb_rpc_rep { | |
| + struct rpc_reply_hdr hdr; | |
| + uint32_t enable; | |
| + } rep; | |
| + | |
| + memset(&rep, 0, sizeof(rep)); | |
| + | |
| + if (!usb_ep || IS_ERR(usb_ep)) { | |
| + pr_err("%s: hsusb rpc connection not initialized, rc = %ld\n", | |
| + __func__, PTR_ERR(usb_ep)); | |
| + return -EAGAIN; | |
| + } | |
| + | |
| + rc = msm_rpc_call_reply(usb_ep, usb_rpc_ids.get_chgen, | |
| + &req, sizeof(req), | |
| + &rep, sizeof(rep), 5 * HZ); | |
| + | |
| + if (rc < 0) { | |
| + pr_err("%s: rpc call failed! error: (%d)" | |
| + "proc id: (%lx)\n", | |
| + __func__, rc, | |
| + usb_rpc_ids.get_chgen); | |
| + return rc; | |
| + } | |
| + | |
| + pr_info("%s: enable: (%d)\n", __func__, rep.enable); | |
| + return be32_to_cpu(rep.enable); | |
| +} | |
| +EXPORT_SYMBOL(msm_hsusb_get_chgen); | |
| + | |
| + | |
| +int msm_hsusb_set_qxdmen(uint32_t enable) | |
| +{ | |
| + int rc = 0; | |
| + struct hsusb_phy_start_req { | |
| + struct rpc_request_hdr hdr; | |
| + uint32_t qxdm_enb; | |
| + } req; | |
| + struct hsusb_rpc_rep { | |
| + struct rpc_reply_hdr hdr; | |
| + uint32_t result; | |
| + } rep; | |
| + | |
| + if (!usb_ep || IS_ERR(usb_ep)) | |
| + return -EAGAIN; | |
| + req.qxdm_enb = cpu_to_be32(enable); | |
| + rc = msm_rpc_call_reply(usb_ep, usb_rpc_ids.set_qxdmen, | |
| + &req, sizeof(req), | |
| + &rep, sizeof(rep), 5 * HZ); | |
| + | |
| + if (rc < 0) { | |
| + printk(KERN_ERR "%s: set_chgen failed! rc = %d\n", | |
| + __func__, rc); | |
| + return rc; | |
| + } | |
| + | |
| + printk(KERN_INFO "%s:result (%d)\n", __func__, rep.result); | |
| + | |
| + return be32_to_cpu(rep.result); | |
| +} | |
| +EXPORT_SYMBOL(msm_hsusb_set_qxdmen); | |
| + | |
| + | |
| +int msm_hsusb_get_qxdmen(void) | |
| +{ | |
| + int rc = 0; | |
| + struct hsusb_start_req { | |
| + struct rpc_request_hdr hdr; | |
| + } req; | |
| + struct hsusb_rpc_rep { | |
| + struct rpc_reply_hdr hdr; | |
| + uint32_t enable; | |
| + } rep; | |
| + | |
| + memset(&rep, 0, sizeof(rep)); | |
| + | |
| + if (!usb_ep || IS_ERR(usb_ep)) { | |
| + pr_err("%s: hsusb rpc connection not initialized, rc = %ld\n", | |
| + __func__, PTR_ERR(usb_ep)); | |
| + return -EAGAIN; | |
| + } | |
| + | |
| + rc = msm_rpc_call_reply(usb_ep, usb_rpc_ids.get_qxdmen, | |
| + &req, sizeof(req), | |
| + &rep, sizeof(rep), 5 * HZ); | |
| + | |
| + if (rc < 0) { | |
| + pr_err("%s: rpc call failed! error: (%d)" | |
| + "proc id: (%lx)\n", | |
| + __func__, rc, | |
| + usb_rpc_ids.get_qxdmen); | |
| + return rc; | |
| + } | |
| + | |
| + pr_info("%s: enable: (%d)\n", __func__, rep.enable); | |
| + return be32_to_cpu(rep.enable); | |
| +} | |
| +EXPORT_SYMBOL(msm_hsusb_get_qxdmen); | |
| + | |
| + | |
| +int msm_hsusb_enable_ldo_off(uint32_t enable) | |
| +{ | |
| + int rc = 0; | |
| + struct hsusb_phy_start_req { | |
| + struct rpc_request_hdr hdr; | |
| + uint32_t ldooff_enable; | |
| + } req; | |
| + | |
| + if (!usb_ep || IS_ERR(usb_ep)) | |
| + return -EAGAIN; | |
| + req.ldooff_enable = cpu_to_be32(enable); | |
| + rc = msm_rpc_call(usb_ep, usb_rpc_ids.enable_ldo_off, | |
| + &req, sizeof(req), 5 * HZ); | |
| + | |
| + if (rc < 0) { | |
| + printk(KERN_ERR "%s: enable_ldo_off failed! rc = %d\n", | |
| + __func__, rc); | |
| + } else | |
| + printk(KERN_INFO "msm_hsusb_enable_ldo_off\n"); | |
| + | |
| + return rc; | |
| +} | |
| +EXPORT_SYMBOL(msm_hsusb_enable_ldo_off); | |
| + | |
| + | |
| +int msm_hsusb_get_boot_mode(void) | |
| +{ | |
| + int rc = 0; | |
| + struct hsusb_start_req { | |
| + struct rpc_request_hdr hdr; | |
| + } req; | |
| + struct hsusb_rpc_rep { | |
| + struct rpc_reply_hdr hdr; | |
| + uint32_t mode; | |
| + } rep; | |
| + | |
| + memset(&rep, 0, sizeof(rep)); | |
| + | |
| + if (!usb_ep || IS_ERR(usb_ep)) { | |
| + pr_err("%s: hsusb rpc connection not initialized, rc = %ld\n", | |
| + __func__, PTR_ERR(usb_ep)); | |
| + return -EAGAIN; | |
| + } | |
| + | |
| + rc = msm_rpc_call_reply(usb_ep, usb_rpc_ids.get_boot_mode, | |
| + &req, sizeof(req), | |
| + &rep, sizeof(rep), 5 * HZ); | |
| + | |
| + if (rc < 0) { | |
| + pr_err("%s: rpc call failed! error: (%d)" | |
| + "proc id: (%lx)\n", | |
| + __func__, rc, | |
| + usb_rpc_ids.get_boot_mode); | |
| + return rc; | |
| + } | |
| + | |
| + pr_info("%s: mode: (%d)\n", __func__, rep.mode); | |
| + return be32_to_cpu(rep.mode); | |
| +} | |
| +EXPORT_SYMBOL(msm_hsusb_get_boot_mode); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/rpc_pmapp.c kernel/arch/arm/mach-msm/rpc_pmapp.c | |
| --- kernel-msm/arch/arm/mach-msm/rpc_pmapp.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/rpc_pmapp.c 2010-08-27 11:17:41.000000000 +0900 | |
| @@ -1,9 +1,10 @@ | |
| /* Copyright (c) 2009, Code Aurora Forum. All rights reserved. | |
| + * Copyright (c) 2010 Sharp Corporation. | |
| * | |
| * Redistribution and use in source and binary forms, with or without | |
| * modification, are permitted provided that the following conditions are met: | |
| * * Redistributions of source code must retain the above copyright | |
| * notice, this list of conditions and the following disclaimer. | |
| * * Redistributions in binary form must reproduce the above copyright | |
| * notice, this list of conditions and the following disclaimer in the | |
| * documentation and/or other materials provided with the distribution. | |
| @@ -74,17 +75,19 @@ | |
| struct rpc_pmapp_ids { | |
| unsigned long reg_for_vbus_valid; | |
| unsigned long vote_for_vbus_valid_switch; | |
| }; | |
| static struct rpc_pmapp_ids rpc_ids; | |
| static struct vreg *boost_vreg, *usb_vreg; | |
| static struct msm_rpc_client *client; | |
| +#if 0 | |
| static int ldo_on; | |
| +#endif | |
| static void rpc_pmapp_init_rpc_ids(unsigned long vers) | |
| { | |
| if (vers == PM_APP_USB_VERS_1_1) { | |
| rpc_ids.reg_for_vbus_valid = 5; | |
| rpc_ids.vote_for_vbus_valid_switch = 6; | |
| } else if (vers == PM_APP_USB_VERS_1_2) { | |
| rpc_ids.reg_for_vbus_valid = 16; | |
| @@ -96,16 +99,17 @@ | |
| } | |
| struct usb_pwr_sel_switch_args { | |
| uint32_t cmd; | |
| uint32_t switch_id; | |
| uint32_t app_mask; | |
| }; | |
| +#if 0 | |
| static int usb_pwr_sel_switch_arg_cb(struct msm_rpc_client *client, | |
| void *buf, void *data) | |
| { | |
| struct usb_pwr_sel_switch_args *args = buf; | |
| args->cmd = cpu_to_be32(*(uint32_t *)data); | |
| args->switch_id = cpu_to_be32(PM_USB_PWR_SEL_SWITCH_ID); | |
| args->app_mask = cpu_to_be32(PM_VOTE_USB_PWR_SEL_SWITCH_APP__HSUSB); | |
| @@ -114,16 +118,17 @@ | |
| static int msm_pm_app_vote_usb_pwr_sel_switch(uint32_t cmd) | |
| { | |
| return msm_rpc_client_req(client, | |
| rpc_ids.vote_for_vbus_valid_switch, | |
| usb_pwr_sel_switch_arg_cb, | |
| &cmd, NULL, NULL, -1); | |
| } | |
| +#endif | |
| struct vbus_sess_valid_args { | |
| uint32_t cb_id; | |
| }; | |
| static int vbus_sess_valid_arg_cb(struct msm_rpc_client *client, | |
| void *buf, void *data) | |
| { | |
| @@ -152,16 +157,18 @@ | |
| void msm_pm_app_unregister_vbus_sn(void (*callback)(int online)) | |
| { | |
| msm_rpc_remove_cb_func(client, (void *)callback); | |
| } | |
| EXPORT_SYMBOL(msm_pm_app_unregister_vbus_sn); | |
| int msm_pm_app_enable_usb_ldo(int enable) | |
| { | |
| + /* for test */ | |
| +#if 0 | |
| int ret; | |
| if (ldo_on == enable) | |
| return 0; | |
| ldo_on = enable; | |
| if (enable) { | |
| /* vote to turn ON Boost Vreg_5V */ | |
| @@ -188,17 +195,17 @@ | |
| ret = vreg_disable(boost_vreg); | |
| if (ret < 0) | |
| return ret; | |
| /* vote to switch it to VBUS source */ | |
| ret = msm_pm_app_vote_usb_pwr_sel_switch(0); | |
| if (ret < 0) | |
| return ret; | |
| } | |
| - | |
| +#endif | |
| return 0; | |
| } | |
| EXPORT_SYMBOL(msm_pm_app_enable_usb_ldo); | |
| struct vbus_sn_notification_args { | |
| uint32_t cb_id; | |
| uint32_t vbus; /* vbus = 0 if VBUS is present */ | |
| }; | |
| @@ -255,18 +262,22 @@ | |
| break; | |
| } | |
| return rc; | |
| } | |
| int msm_pm_app_rpc_init(void) | |
| { | |
| +#if 1 | |
| + /* allow qsd8650 */ | |
| +#else | |
| if (!machine_is_qsd8x50_ffa() && !machine_is_msm7x27_ffa()) | |
| return -ENOTSUPP; | |
| +#endif | |
| boost_vreg = vreg_get(NULL, "boost"); | |
| if (IS_ERR(boost_vreg)) { | |
| pr_err("%s: boost vreg get failed\n", __func__); | |
| return PTR_ERR(boost_vreg); | |
| } | |
| usb_vreg = vreg_get(NULL, "usb"); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/rpc_server_dog_keepalive.c kernel/arch/arm/mach-msm/rpc_server_dog_keepalive.c | |
| --- kernel-msm/arch/arm/mach-msm/rpc_server_dog_keepalive.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/rpc_server_dog_keepalive.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -17,61 +17,67 @@ | |
| #include <linux/module.h> | |
| #include <linux/kernel.h> | |
| #include <mach/msm_rpcrouter.h> | |
| /* dog_keepalive server definitions */ | |
| #define DOG_KEEPALIVE_PROG 0x30000015 | |
| -#if CONFIG_MSM_AMSS_VERSION==6210 | |
| -#define DOG_KEEPALIVE_VERS 0 | |
| -#define RPC_DOG_KEEPALIVE_BEACON 1 | |
| -#elif (CONFIG_MSM_AMSS_VERSION==6220) || (CONFIG_MSM_AMSS_VERSION==6225) | |
| +#define DOG_KEEPALIVE_VERS_OLD 0 | |
| +#define RPC_DOG_KEEPALIVE_BEACON_OLD 1 | |
| #define DOG_KEEPALIVE_VERS 0x731fa727 | |
| #define RPC_DOG_KEEPALIVE_BEACON 2 | |
| -#else | |
| -#error "Unsupported AMSS version" | |
| -#endif | |
| #define DOG_KEEPALIVE_VERS_COMP 0x00010001 | |
| #define RPC_DOG_KEEPALIVE_NULL 0 | |
| /* TODO: Remove server registration with _VERS when modem is upated with _COMP*/ | |
| static int handle_rpc_call(struct msm_rpc_server *server, | |
| struct rpc_request_hdr *req, unsigned len) | |
| { | |
| switch (req->procedure) { | |
| case RPC_DOG_KEEPALIVE_NULL: | |
| return 0; | |
| case RPC_DOG_KEEPALIVE_BEACON: | |
| return 0; | |
| + case RPC_DOG_KEEPALIVE_BEACON_OLD: | |
| + return 0; | |
| default: | |
| return -ENODEV; | |
| } | |
| } | |
| static struct msm_rpc_server rpc_server[] = { | |
| { | |
| .prog = DOG_KEEPALIVE_PROG, | |
| + .vers = DOG_KEEPALIVE_VERS_OLD, | |
| + .rpc_call = handle_rpc_call, | |
| + }, | |
| + { | |
| + .prog = DOG_KEEPALIVE_PROG, | |
| .vers = DOG_KEEPALIVE_VERS, | |
| .rpc_call = handle_rpc_call, | |
| }, | |
| { | |
| .prog = DOG_KEEPALIVE_PROG, | |
| .vers = DOG_KEEPALIVE_VERS_COMP, | |
| .rpc_call = handle_rpc_call, | |
| }, | |
| }; | |
| static int __init rpc_server_init(void) | |
| { | |
| /* Dual server registration to support backwards compatibility vers */ | |
| int ret; | |
| + ret = msm_rpc_create_server(&rpc_server[2]); | |
| + if (ret < 0) | |
| + return ret; | |
| ret = msm_rpc_create_server(&rpc_server[1]); | |
| if (ret < 0) | |
| return ret; | |
| + printk(KERN_ERR "Using very old AMSS modem firmware.\n"); | |
| return msm_rpc_create_server(&rpc_server[0]); | |
| } | |
| module_init(rpc_server_init); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/rpc_server_handset.c kernel/arch/arm/mach-msm/rpc_server_handset.c | |
| --- kernel-msm/arch/arm/mach-msm/rpc_server_handset.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/rpc_server_handset.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -1,64 +1,99 @@ | |
| +/* | |
| + * Copyright (C) 2009 SHARP CORPORATION All rights reserved. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + * This code is based on rpc_server_handset.c. | |
| + * The original copyright and notice are described below. | |
| +*/ | |
| + | |
| /* arch/arm/mach-msm/rpc_server_handset.c | |
| * | |
| * Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. | |
| * | |
| * This software is licensed under the terms of the GNU General Public | |
| * License version 2, as published by the Free Software Foundation, and | |
| * may be copied, distributed, and modified under those terms. | |
| * | |
| * This program is distributed in the hope that it will be useful, | |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | |
| * | |
| * See the GNU General Public License for more details. | |
| * You should have received a copy of the GNU General Public License | |
| * along with this program; if not, you can find it at http://www.fsf.org. | |
| - */ | |
| +*/ | |
| #include <linux/module.h> | |
| #include <linux/kernel.h> | |
| #include <linux/platform_device.h> | |
| #include <linux/input.h> | |
| #include <linux/switch.h> | |
| +#include <linux/miscdevice.h> | |
| + | |
| #include <asm/mach-types.h> | |
| #include <mach/msm_rpcrouter.h> | |
| #include <mach/board.h> | |
| +#if 1 | |
| +#include <mach/msm_i2ckbd.h> | |
| +#include <mach/msm_i2ctps.h> | |
| +#include <sharp/shterm_k.h> | |
| +#endif | |
| #include "keypad-surf-ffa.h" | |
| #define DRIVER_NAME "msm-handset" | |
| +#if 1 | |
| +#define DRIVER_SH_PM_NAME "SH_pm_key" | |
| +#define DRIVER_SH_HS_NAME "SH_headset_key" | |
| +#endif | |
| #define HS_SERVER_PROG 0x30000062 | |
| #define HS_SERVER_VERS 0x00010001 | |
| #define HS_RPC_PROG 0x30000091 | |
| #define HS_RPC_VERS 0x00010001 | |
| #define HS_RPC_CB_PROG 0x31000091 | |
| #define HS_RPC_CB_VERS 0x00010001 | |
| #define HS_SUBSCRIBE_SRVC_PROC 0x03 | |
| +#if 1 | |
| +#define HS_SHEXTDET_API_INITIALIZE_REMOTE_PROC 0x05 | |
| +#endif | |
| #define HS_EVENT_CB_PROC 1 | |
| #define RPC_KEYPAD_NULL_PROC 0 | |
| #define RPC_KEYPAD_PASS_KEY_CODE_PROC 2 | |
| #define RPC_KEYPAD_SET_PWR_KEY_STATE_PROC 3 | |
| #define HS_PWR_K 0x6F /* Power key */ | |
| #define HS_END_K 0x51 /* End key or Power key */ | |
| #define HS_STEREO_HEADSET_K 0x82 | |
| #define HS_HEADSET_SWITCH_K 0x84 | |
| +#if 1 | |
| +#define HS_FLIP_K 0x88 | |
| +#endif | |
| #define HS_REL_K 0xFF /* key release */ | |
| #define KEY(hs_key, input_key) ((hs_key << 24) | input_key) | |
| +#define DEBUG 0 | |
| + | |
| struct hs_key_data { | |
| uint32_t ver; /* Version number to track sturcture changes */ | |
| uint32_t code; /* which key? */ | |
| uint32_t parm; /* key status. Up/down or pressed/released */ | |
| }; | |
| enum hs_subs_srvc { | |
| HS_SUBS_SEND_CMD = 0, /* Subscribe to send commands to HS */ | |
| @@ -108,32 +143,73 @@ | |
| struct hs_key_data key; | |
| }; | |
| static const uint32_t hs_key_map[] = { | |
| KEY(HS_PWR_K, KEY_POWER), | |
| KEY(HS_END_K, KEY_END), | |
| KEY(HS_STEREO_HEADSET_K, SW_HEADPHONE_INSERT), | |
| KEY(HS_HEADSET_SWITCH_K, KEY_MEDIA), | |
| +#if 1 | |
| + KEY(HS_FLIP_K, SW_LID), | |
| +#endif | |
| 0 | |
| }; | |
| +#if 0 | |
| enum { | |
| NO_DEVICE = 0, | |
| MSM_HEADSET = 1, | |
| }; | |
| +#else | |
| +enum { | |
| + NO_DEVICE = 0x00, | |
| + MSM_HEADSET_MONO = 0x01, | |
| + MSM_HEADSET_STE = 0x02, | |
| + MSM_HEADSET_OTHER = 0x03, | |
| +}; | |
| +#endif | |
| + | |
| +#if 1 | |
| +enum { | |
| + MSM_OPEN = 0x00, | |
| + MSM_CLOSE = 0x01, | |
| + MSM_OPEN_CHATT = 0x10, | |
| + MSM_CLOSE_CHATT = 0x11, | |
| +}; | |
| +enum { | |
| + MSM_HSSW_RELEASE = 0x00, | |
| + MSM_HSSW_PRESS = 0x01, | |
| +}; | |
| +#endif | |
| struct msm_handset { | |
| struct input_dev *ipdev; | |
| struct switch_dev sdev; | |
| +#if 1 | |
| + struct switch_dev sdev_flip; | |
| + struct switch_dev sdev_flip_chatt; | |
| + struct switch_dev sdev_hssw; | |
| +#endif | |
| }; | |
| static struct msm_rpc_client *rpc_client; | |
| static struct msm_handset *hs; | |
| +#if 1 | |
| +static struct msm_handset *hssw; | |
| +static struct msm_handset *pm_key; | |
| + | |
| +static uint8_t Headset_Status = NO_DEVICE; | |
| +#endif | |
| + | |
| +#if 1 | |
| +static struct msm_rpc_endpoint* rpc_svc_p; | |
| +#endif | |
| + | |
| static int hs_find_key(uint32_t hscode) | |
| { | |
| int i, key; | |
| key = KEY(hscode, 0); | |
| for (i = 0; hs_key_map[i] != 0; i++) { | |
| if ((hs_key_map[i] & 0xff000000) == key) | |
| @@ -141,20 +217,160 @@ | |
| } | |
| return -1; | |
| } | |
| static void | |
| report_headset_switch(struct input_dev *dev, int key, int value) | |
| { | |
| struct msm_handset *hs = input_get_drvdata(dev); | |
| +#if 1 | |
| + static int old_state = NO_DEVICE; | |
| +#endif | |
| +#if 0 | |
| input_report_switch(dev, key, value); | |
| switch_set_state(&hs->sdev, value); | |
| +#else | |
| + switch(value) | |
| + { | |
| + case MSM_HEADSET_STE: | |
| + if(old_state == MSM_HEADSET_MONO) | |
| + { | |
| +#if DEBUG | |
| + printk(KERN_INFO "[msm-handset] [%s] dummy remove\n", __func__); | |
| +#endif | |
| + input_report_switch(dev, key, 0x00); | |
| + } | |
| +#if DEBUG | |
| + printk(KERN_INFO "[msm-handset] [%s] key = %d, !!value = %d, value = %d\n", __func__, key, !!value, value); | |
| +#endif | |
| + input_report_switch(dev, key, !!value); | |
| + break; | |
| + case MSM_HEADSET_MONO: | |
| + if(old_state == MSM_HEADSET_STE) | |
| + { | |
| +#if DEBUG | |
| + printk(KERN_INFO "[msm-handset] [%s] dummy remove\n", __func__); | |
| +#endif | |
| + input_report_switch(dev, key, 0x00); | |
| + } | |
| +#if DEBUG | |
| + printk(KERN_INFO "[msm-handset] [%s] key = %d, !!value = %d, value = %d\n", __func__, key, !!value, value); | |
| +#endif | |
| + input_report_switch(dev, key, !!value); | |
| + break; | |
| + case NO_DEVICE: | |
| + if(old_state != MSM_HEADSET_OTHER) | |
| + { | |
| +#if DEBUG | |
| + printk(KERN_INFO "[msm-handset] [%s] key = %d, !!value = %d, value = %d\n", __func__, key, !!value, value); | |
| +#endif | |
| + input_report_switch(dev, key, !!value); | |
| + } | |
| + else | |
| + { | |
| +#if DEBUG | |
| + printk(KERN_INFO "[msm-handset] [%s] input_report_switch not send [%d]->[%d]\n", __func__, old_state, value); | |
| +#endif | |
| + } | |
| + break; | |
| + case MSM_HEADSET_OTHER: | |
| + if(old_state != NO_DEVICE) | |
| + { | |
| +#if DEBUG | |
| + printk(KERN_INFO "[msm-handset] [%s] key = %d, !!value = %d, value = %d\n", __func__, key, !!NO_DEVICE, value); | |
| +#endif | |
| + input_report_switch(dev, key, !!NO_DEVICE); | |
| + } | |
| + else | |
| + { | |
| +#if DEBUG | |
| + printk(KERN_INFO "[msm-handset] [%s] input_report_switch not send [%d]->[%d]\n", __func__, old_state, value); | |
| +#endif | |
| + } | |
| + break; | |
| + default: | |
| +#if DEBUG | |
| + printk(KERN_INFO "[msm-handset] [%s] non Value [%d]\n", __func__, value); | |
| +#endif | |
| + break; | |
| + } | |
| + Headset_Status = value; | |
| + switch_set_state(&hs->sdev, value); | |
| + old_state = value; | |
| +#endif | |
| +} | |
| + | |
| +#if 1 | |
| +static int | |
| +report_flip_switch(struct input_dev *dev, int key, int value) | |
| +{ | |
| + struct msm_handset *hs = input_get_drvdata(dev); | |
| + static int old_state = 0x0F; | |
| +#if 1 | |
| + static int old_state2 = 0x0F; | |
| +#endif | |
| +#if DEBUG | |
| + printk(KERN_INFO "[msm-handset] [%s] sdev_flip_chatt value = 0x%02x\n", __func__, value); | |
| +#endif | |
| + switch_set_state(&hs->sdev_flip_chatt, value); | |
| + | |
| +#if 1 | |
| + if(old_state2 != value) | |
| + { | |
| + msm_i2ctps_flipchange(value); | |
| + } | |
| + old_state2 = value; | |
| +#endif | |
| + if( ((value & 0xF0) == 0x00) && (old_state != value) ) | |
| + { | |
| +#if 1 | |
| + msm_i2ckbd_flipchange(value); | |
| +#endif | |
| +#if DEBUG | |
| + printk(KERN_INFO "[msm-handset] [%s] key = %d, !!value = %d, value = %d\n", __func__, key, !!value, value); | |
| +#endif | |
| + input_report_switch(dev, key, !!value); | |
| + switch_set_state(&hs->sdev_flip, value); | |
| + /* Flip Open? */ | |
| + if(value == 0x00) | |
| + { | |
| + shterm_flip_status_set(SHTERM_FLIP_STATE_OPEN); | |
| + } | |
| + else | |
| + { | |
| + shterm_flip_status_set(SHTERM_FLIP_STATE_CLOSE); | |
| + } | |
| + old_state = value; | |
| + return 0; | |
| + } | |
| + return -1; | |
| } | |
| +static void | |
| +report_headphone_switch(struct input_dev *dev, int key, int value) | |
| +{ | |
| +#if 0 | |
| + struct msm_handset *hs = input_get_drvdata(dev); | |
| +#if DEBUG | |
| + printk(KERN_INFO "[msm-handset] [%s] sdev_hssw value = 0x%02x\n", __func__, value); | |
| +#endif | |
| + switch_set_state(&hs->sdev_hssw, value); | |
| + input_report_key(dev, key, value); | |
| +#else | |
| + struct msm_handset *hssw = input_get_drvdata(dev); | |
| + | |
| +#if DEBUG | |
| + printk(KERN_INFO "[msm-handset] [%s] sdev_hssw value = 0x%02x\n", __func__, value); | |
| +#endif | |
| + switch_set_state(&hssw->sdev_hssw, value); | |
| + input_report_key(dev, key, value); | |
| +#endif | |
| +} | |
| +#endif | |
| /* | |
| * tuple format: (key_code, key_param) | |
| * | |
| * old-architecture: | |
| * key-press = (key_code, 0) | |
| * key-release = (0xff, key_code) | |
| * | |
| @@ -174,28 +390,65 @@ | |
| temp_key_code = key_code; | |
| if (key_parm == HS_REL_K) | |
| key_code = key_parm; | |
| switch (key) { | |
| case KEY_POWER: | |
| case KEY_END: | |
| +#if 0 | |
| case KEY_MEDIA: | |
| +#endif | |
| +#if 0 | |
| input_report_key(hs->ipdev, key, (key_code != HS_REL_K)); | |
| +#else | |
| + input_report_key(pm_key->ipdev, key, (key_code != HS_REL_K)); | |
| + input_sync(pm_key->ipdev); | |
| +#endif | |
| break; | |
| +#if 1 | |
| + case KEY_MEDIA: | |
| +#if 0 | |
| + report_headphone_switch(hs->ipdev, key, (key_code != HS_REL_K)); | |
| +#else | |
| + report_headphone_switch(hssw->ipdev, key, (key_code != HS_REL_K)); | |
| + input_sync(hssw->ipdev); | |
| +#endif | |
| + break; | |
| +#endif | |
| case SW_HEADPHONE_INSERT: | |
| +#if 0 | |
| report_headset_switch(hs->ipdev, key, (key_code != HS_REL_K)); | |
| +#else | |
| + report_headset_switch(hs->ipdev, key, key_parm); | |
| +#endif | |
| +#if 1 | |
| + input_sync(hs->ipdev); | |
| +#endif | |
| + break; | |
| +#if 1 | |
| + case SW_LID: | |
| + if(report_flip_switch(hs->ipdev, key, key_parm) != 0) | |
| + { | |
| + return; | |
| + } | |
| +#if 1 | |
| + input_sync(hs->ipdev); | |
| +#endif | |
| break; | |
| +#endif | |
| case -1: | |
| printk(KERN_ERR "%s: No mapping for remote handset event %d\n", | |
| __func__, temp_key_code); | |
| return; | |
| } | |
| +#if 0 | |
| input_sync(hs->ipdev); | |
| +#endif | |
| } | |
| static int handle_hs_rpc_call(struct msm_rpc_server *server, | |
| struct rpc_request_hdr *req, unsigned len) | |
| { | |
| struct rpc_keypad_pass_key_code_args { | |
| uint32_t key_code; | |
| uint32_t key_parm; | |
| @@ -355,63 +608,170 @@ | |
| } | |
| static int __devinit hs_rpc_init(void) | |
| { | |
| int rc; | |
| if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa() || | |
| machine_is_qsd8x50_surf() || machine_is_qsd8x50_ffa() || | |
| +#if 0 | |
| + machine_is_msm7x30_surf() || machine_is_msm7x30_ffa()) { | |
| +#else | |
| machine_is_msm7x30_surf() || machine_is_msm7x30_ffa() || | |
| - machine_is_msm7x25_surf() || machine_is_msm7x25_ffa()) { | |
| + machine_is_deckard()){ | |
| +#endif | |
| rc = hs_rpc_cb_init(); | |
| if (rc) | |
| pr_err("%s: failed to initialize\n", __func__); | |
| } | |
| +#if 1 | |
| + rpc_svc_p = msm_rpc_connect_compatible(HS_RPC_PROG,HS_RPC_VERS,0); | |
| + | |
| + if(IS_ERR(rpc_svc_p)) { | |
| + pr_err("%s: couldn't connect compatible rpc client err %ld\n", __func__, | |
| + PTR_ERR(rpc_svc_p)); | |
| + return PTR_ERR(rpc_svc_p); | |
| + } | |
| +#endif | |
| rc = msm_rpc_create_server(&hs_rpc_server); | |
| if (rc < 0) | |
| pr_err("%s: failed to create rpc server\n", __func__); | |
| return 0; | |
| } | |
| static void __devexit hs_rpc_deinit(void) | |
| { | |
| if (rpc_client) | |
| msm_rpc_unregister_client(rpc_client); | |
| } | |
| static ssize_t msm_headset_print_name(struct switch_dev *sdev, char *buf) | |
| { | |
| switch (switch_get_state(&hs->sdev)) { | |
| +#if 0 | |
| case NO_DEVICE: | |
| return sprintf(buf, "No Device\n"); | |
| case MSM_HEADSET: | |
| return sprintf(buf, "Headset\n"); | |
| +#else | |
| + case NO_DEVICE: | |
| + return sprintf(buf, "NoDevice\n"); | |
| + case MSM_HEADSET_MONO: | |
| + return sprintf(buf, "MonoHeadset\n"); | |
| + case MSM_HEADSET_OTHER: | |
| + case MSM_HEADSET_STE: | |
| + return sprintf(buf, "StereoHeadset\n"); | |
| +#endif | |
| + } | |
| + return -EINVAL; | |
| +} | |
| + | |
| +#if 1 | |
| +static ssize_t msm_flip_print_name(struct switch_dev *sdev, char *buf) | |
| +{ | |
| + switch (switch_get_state(&hs->sdev_flip)) { | |
| + case MSM_OPEN: | |
| + return sprintf(buf, "OPEN\n"); | |
| + case MSM_CLOSE: | |
| + return sprintf(buf, "CLOSE\n"); | |
| } | |
| return -EINVAL; | |
| } | |
| +static ssize_t msm_flip_chatt_print_name(struct switch_dev *sdev, char *buf) | |
| +{ | |
| + switch (switch_get_state(&hs->sdev_flip_chatt)) { | |
| + case MSM_OPEN: | |
| + return sprintf(buf, "OPEN\n"); | |
| + case MSM_CLOSE: | |
| + return sprintf(buf, "CLOSE\n"); | |
| + case MSM_OPEN_CHATT: | |
| + return sprintf(buf, "OPEN_CHATT\n"); | |
| + case MSM_CLOSE_CHATT: | |
| + return sprintf(buf, "CLOSE_CHATT\n"); | |
| + } | |
| + return -EINVAL; | |
| +} | |
| + | |
| +static ssize_t msm_hssw_print_name(struct switch_dev *sdev, char *buf) | |
| +{ | |
| +#if 0 | |
| + switch (switch_get_state(&hs->sdev_hssw)) { | |
| + case MSM_HSSW_RELEASE: | |
| + return sprintf(buf, "RELEASE\n"); | |
| + case MSM_HSSW_PRESS: | |
| + return sprintf(buf, "PRESS\n"); | |
| + } | |
| + return -EINVAL; | |
| +#else | |
| + switch (switch_get_state(&hssw->sdev_hssw)) { | |
| + case MSM_HSSW_RELEASE: | |
| + return sprintf(buf, "RELEASE\n"); | |
| + case MSM_HSSW_PRESS: | |
| + return sprintf(buf, "PRESS\n"); | |
| + } | |
| + return -EINVAL; | |
| +#endif | |
| +} | |
| +#endif | |
| + | |
| static int __devinit hs_probe(struct platform_device *pdev) | |
| { | |
| int rc; | |
| struct input_dev *ipdev; | |
| + | |
| +#if 1 | |
| + struct api_remote_req_t1 { | |
| + struct rpc_request_hdr hdr; | |
| + } send_p; | |
| +#endif | |
| hs = kzalloc(sizeof(struct msm_handset), GFP_KERNEL); | |
| if (!hs) | |
| return -ENOMEM; | |
| +#if 0 | |
| hs->sdev.name = "h2w"; | |
| +#else | |
| + hs->sdev.name = "headphone"; | |
| +#endif | |
| hs->sdev.print_name = msm_headset_print_name; | |
| rc = switch_dev_register(&hs->sdev); | |
| if (rc) | |
| goto err_switch_dev_register; | |
| +#if 1 | |
| + hs->sdev_flip.name = "flip"; | |
| + hs->sdev_flip.print_name = msm_flip_print_name; | |
| + | |
| + rc = switch_dev_register(&hs->sdev_flip); | |
| + if (rc) | |
| + goto err_switch_dev_register; | |
| + | |
| + hs->sdev_flip_chatt.name = "flip_chatt"; | |
| + hs->sdev_flip_chatt.print_name = msm_flip_chatt_print_name; | |
| + | |
| + rc = switch_dev_register(&hs->sdev_flip_chatt); | |
| + if (rc) | |
| + goto err_switch_dev_register; | |
| + | |
| +#if 0 | |
| + hs->sdev_hssw.name = "headphone_switch"; | |
| + hs->sdev_hssw.print_name = msm_hssw_print_name; | |
| + | |
| + rc = switch_dev_register(&hs->sdev_hssw); | |
| + if (rc) | |
| + goto err_switch_dev_register; | |
| +#endif | |
| +#endif | |
| + | |
| ipdev = input_allocate_device(); | |
| if (!ipdev) { | |
| rc = -ENOMEM; | |
| goto err_alloc_input_dev; | |
| } | |
| input_set_drvdata(ipdev, hs); | |
| hs->ipdev = ipdev; | |
| @@ -420,74 +780,324 @@ | |
| ipdev->name = pdev->dev.platform_data; | |
| else | |
| ipdev->name = DRIVER_NAME; | |
| ipdev->id.vendor = 0x0001; | |
| ipdev->id.product = 1; | |
| ipdev->id.version = 1; | |
| +#if 0 | |
| input_set_capability(ipdev, EV_KEY, KEY_MEDIA); | |
| input_set_capability(ipdev, EV_SW, SW_HEADPHONE_INSERT); | |
| input_set_capability(ipdev, EV_KEY, KEY_POWER); | |
| input_set_capability(ipdev, EV_KEY, KEY_END); | |
| +#else | |
| + input_set_capability(ipdev, EV_SW, SW_HEADPHONE_INSERT); | |
| +#endif | |
| + | |
| +#if 1 | |
| + input_set_capability(ipdev, EV_SW, SW_LID); | |
| +#endif | |
| rc = input_register_device(ipdev); | |
| if (rc) { | |
| dev_err(&ipdev->dev, | |
| "hs_probe: input_register_device rc=%d\n", rc); | |
| goto err_reg_input_dev; | |
| } | |
| platform_set_drvdata(pdev, hs); | |
| rc = hs_rpc_init(); | |
| if (rc) | |
| goto err_hs_rpc_init; | |
| +#if 1 | |
| + rc = msm_rpc_call_reply(rpc_svc_p, | |
| + HS_SHEXTDET_API_INITIALIZE_REMOTE_PROC, | |
| + &send_p,sizeof(send_p), | |
| + NULL,0, | |
| + 5 * HZ); | |
| + if(rc) | |
| + goto err_hs_rpc_init; | |
| +#endif | |
| + | |
| return 0; | |
| err_hs_rpc_init: | |
| input_unregister_device(ipdev); | |
| ipdev = NULL; | |
| err_reg_input_dev: | |
| input_free_device(ipdev); | |
| err_alloc_input_dev: | |
| switch_dev_unregister(&hs->sdev); | |
| +#if 1 | |
| + switch_dev_unregister(&hs->sdev_flip); | |
| + switch_dev_unregister(&hs->sdev_flip_chatt); | |
| +#if 0 | |
| + switch_dev_unregister(&hs->sdev_hssw); | |
| +#endif | |
| +#endif | |
| err_switch_dev_register: | |
| kfree(hs); | |
| return rc; | |
| } | |
| static int __devexit hs_remove(struct platform_device *pdev) | |
| { | |
| struct msm_handset *hs = platform_get_drvdata(pdev); | |
| input_unregister_device(hs->ipdev); | |
| switch_dev_unregister(&hs->sdev); | |
| +#if 1 | |
| + switch_dev_unregister(&hs->sdev_flip); | |
| + switch_dev_unregister(&hs->sdev_flip_chatt); | |
| +#if 0 | |
| + switch_dev_unregister(&hs->sdev_hssw); | |
| +#endif | |
| +#endif | |
| kfree(hs); | |
| hs_rpc_deinit(); | |
| return 0; | |
| } | |
| +#if 1 | |
| +static int __devinit sh_pm_probe(struct platform_device *pdev) | |
| +{ | |
| + int rc; | |
| + struct input_dev *ipdev; | |
| + | |
| + pm_key = kzalloc(sizeof(struct msm_handset), GFP_KERNEL); | |
| + if (!pm_key) | |
| + return -ENOMEM; | |
| + | |
| + ipdev = input_allocate_device(); | |
| + if (!ipdev) { | |
| + rc = -ENOMEM; | |
| + goto err_alloc_input_dev; | |
| + } | |
| + input_set_drvdata(ipdev, pm_key); | |
| + | |
| + pm_key->ipdev = ipdev; | |
| + | |
| + if (pdev->dev.platform_data) | |
| + ipdev->name = pdev->dev.platform_data; | |
| + else | |
| + ipdev->name = DRIVER_SH_PM_NAME; | |
| + | |
| + ipdev->id.vendor = 0x0001; | |
| + ipdev->id.product = 1; | |
| + ipdev->id.version = 1; | |
| + | |
| + input_set_capability(ipdev, EV_KEY, KEY_POWER); | |
| + input_set_capability(ipdev, EV_KEY, KEY_END); | |
| + | |
| + rc = input_register_device(ipdev); | |
| + if (rc) { | |
| + dev_err(&ipdev->dev, | |
| + "hs_probe: input_register_device rc=%d\n", rc); | |
| + goto err_reg_input_dev; | |
| + } | |
| + | |
| + platform_set_drvdata(pdev, pm_key); | |
| + | |
| + return 0; | |
| + | |
| +err_reg_input_dev: | |
| + input_free_device(ipdev); | |
| +err_alloc_input_dev: | |
| + kfree(pm_key); | |
| + return rc; | |
| +} | |
| + | |
| +static int __devexit sh_pm_remove(struct platform_device *pdev) | |
| +{ | |
| + struct msm_handset *pm_key_data = platform_get_drvdata(pdev); | |
| + | |
| + input_unregister_device(pm_key_data->ipdev); | |
| + | |
| + kfree(pm_key_data); | |
| + return 0; | |
| +} | |
| + | |
| +static int __devinit sh_hs_probe(struct platform_device *pdev) | |
| +{ | |
| + int rc; | |
| + struct input_dev *ipdev; | |
| + | |
| + hssw = kzalloc(sizeof(struct msm_handset), GFP_KERNEL); | |
| + if (!hssw) | |
| + return -ENOMEM; | |
| + | |
| + hssw->sdev_hssw.name = "headphone_switch"; | |
| + hssw->sdev_hssw.print_name = msm_hssw_print_name; | |
| + | |
| + rc = switch_dev_register(&hssw->sdev_hssw); | |
| + if (rc) | |
| + goto err_switch_dev_register; | |
| + | |
| + ipdev = input_allocate_device(); | |
| + if (!ipdev) { | |
| + rc = -ENOMEM; | |
| + goto err_alloc_input_dev; | |
| + } | |
| + input_set_drvdata(ipdev, hssw); | |
| + | |
| + hssw->ipdev = ipdev; | |
| + | |
| + if (pdev->dev.platform_data) | |
| + ipdev->name = pdev->dev.platform_data; | |
| + else | |
| + ipdev->name = DRIVER_SH_HS_NAME; | |
| + | |
| + ipdev->id.vendor = 0x0001; | |
| + ipdev->id.product = 1; | |
| + ipdev->id.version = 1; | |
| + | |
| + input_set_capability(ipdev, EV_KEY, KEY_MEDIA); | |
| + | |
| + rc = input_register_device(ipdev); | |
| + if (rc) { | |
| + dev_err(&ipdev->dev, | |
| + "hs_probe: input_register_device rc=%d\n", rc); | |
| + goto err_reg_input_dev; | |
| + } | |
| + | |
| + platform_set_drvdata(pdev, hssw); | |
| + | |
| + return 0; | |
| + | |
| +err_reg_input_dev: | |
| + input_free_device(ipdev); | |
| +err_alloc_input_dev: | |
| + switch_dev_unregister(&hssw->sdev_hssw); | |
| +err_switch_dev_register: | |
| + kfree(hssw); | |
| + return rc; | |
| +} | |
| + | |
| +static int __devexit sh_hs_remove(struct platform_device *pdev) | |
| +{ | |
| + struct msm_handset *hssw_data = platform_get_drvdata(pdev); | |
| + | |
| + input_unregister_device(hssw_data->ipdev); | |
| + switch_dev_unregister(&hssw_data->sdev_hssw); | |
| + | |
| + kfree(hssw_data); | |
| + return 0; | |
| +} | |
| +#endif | |
| + | |
| static struct platform_driver hs_driver = { | |
| .probe = hs_probe, | |
| .remove = __devexit_p(hs_remove), | |
| .driver = { | |
| .name = DRIVER_NAME, | |
| .owner = THIS_MODULE, | |
| }, | |
| }; | |
| +#if 1 | |
| +static struct platform_driver sh_pm_driver = { | |
| + .probe = sh_pm_probe, | |
| + .remove = __devexit_p(sh_pm_remove), | |
| + .driver = { | |
| + .name = DRIVER_SH_PM_NAME, | |
| + .owner = THIS_MODULE, | |
| + }, | |
| +}; | |
| +static struct platform_driver sh_hs_driver = { | |
| + .probe = sh_hs_probe, | |
| + .remove = __devexit_p(sh_hs_remove), | |
| + .driver = { | |
| + .name = DRIVER_SH_HS_NAME, | |
| + .owner = THIS_MODULE, | |
| + }, | |
| +}; | |
| +#endif | |
| + | |
| +#if 1 | |
| +static int headset_diag_open(struct inode *inode, struct file *file) | |
| +{ | |
| +#if DEBUG | |
| + printk(KERN_INFO "%s\n", __FUNCTION__); | |
| +#endif | |
| + return nonseekable_open(inode, file); | |
| +} | |
| + | |
| +static int headset_diag_release(struct inode *inode, struct file *file) | |
| +{ | |
| +#if DEBUG | |
| + printk(KERN_INFO "%s\n", __FUNCTION__); | |
| +#endif | |
| + return 0; | |
| +} | |
| + | |
| +static ssize_t headset_diag_read(struct file *file, char __user *buf, | |
| + size_t count, loff_t *ppos) | |
| +{ | |
| +#if DEBUG | |
| + printk(KERN_INFO "%s\n", __FUNCTION__); | |
| +#endif | |
| + | |
| + sprintf(buf, "%d\n",Headset_Status); | |
| + | |
| + return strlen(buf); | |
| +} | |
| + | |
| + | |
| +static struct file_operations headset_diag_fops = { | |
| + .owner = THIS_MODULE, | |
| + .open = headset_diag_open, | |
| + .release = headset_diag_release, | |
| + .read = headset_diag_read, | |
| +}; | |
| + | |
| +static struct miscdevice headset_diag_device = { | |
| + .minor = MISC_DYNAMIC_MINOR, | |
| + .name = "headset_diag", | |
| + .fops = &headset_diag_fops, | |
| +}; | |
| +#endif | |
| static int __init hs_init(void) | |
| { | |
| + int err = -ENODEV; | |
| + | |
| +#if 0 | |
| return platform_driver_register(&hs_driver); | |
| +#else | |
| + int rc; | |
| + if(0 != (rc = platform_driver_register(&sh_pm_driver))) { | |
| + return rc; | |
| + } | |
| + if(0 != (rc = platform_driver_register(&sh_hs_driver))) { | |
| + platform_driver_unregister(&sh_pm_driver); | |
| + return rc; | |
| + } | |
| + if(0 != (rc = platform_driver_register(&hs_driver))) { | |
| + platform_driver_unregister(&sh_pm_driver); | |
| + platform_driver_unregister(&sh_hs_driver); | |
| + return rc; | |
| + } | |
| + err = misc_register(&headset_diag_device); | |
| + if (err) { | |
| + printk(KERN_ERR | |
| + "headset_diag_device: register failed\n"); | |
| + } | |
| + return rc; | |
| +#endif | |
| } | |
| late_initcall(hs_init); | |
| static void __exit hs_exit(void) | |
| { | |
| platform_driver_unregister(&hs_driver); | |
| +#if 1 | |
| + platform_driver_unregister(&sh_pm_driver); | |
| + platform_driver_unregister(&sh_hs_driver); | |
| + misc_deregister(&headset_diag_device); | |
| +#endif | |
| } | |
| module_exit(hs_exit); | |
| MODULE_LICENSE("GPL v2"); | |
| MODULE_ALIAS("platform:msm-handset"); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/rpc_server_time_remote.c kernel/arch/arm/mach-msm/rpc_server_time_remote.c | |
| --- kernel-msm/arch/arm/mach-msm/rpc_server_time_remote.c 2009-10-13 01:28:24.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/rpc_server_time_remote.c 2010-08-27 11:17:41.000000000 +0900 | |
| @@ -12,38 +12,95 @@ | |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| * GNU General Public License for more details. | |
| * | |
| */ | |
| #include <linux/module.h> | |
| #include <linux/kernel.h> | |
| +#include <linux/err.h> | |
| #include <mach/msm_rpcrouter.h> | |
| #include "rpc_server_time_remote.h" | |
| +#include <linux/rtc.h> | |
| /* time_remote_mtoa server definitions. */ | |
| #define TIME_REMOTE_MTOA_PROG 0x3000005d | |
| -#if CONFIG_MSM_AMSS_VERSION==6210 | |
| -#define TIME_REMOTE_MTOA_VERS 0 | |
| -#elif (CONFIG_MSM_AMSS_VERSION==6220) || (CONFIG_MSM_AMSS_VERSION==6225) | |
| +#define TIME_REMOTE_MTOA_VERS_OLD 0 | |
| #define TIME_REMOTE_MTOA_VERS 0x9202a8e4 | |
| -#else | |
| -#error "Unknown AMSS version" | |
| -#endif | |
| -#define TIME_REMOTE_MTOA_VERS_COMP 0x00010001 | |
| +#define TIME_REMOTE_MTOA_VERS_COMP 0x00010002 | |
| #define RPC_TIME_REMOTE_MTOA_NULL 0 | |
| #define RPC_TIME_TOD_SET_APPS_BASES 2 | |
| +#define RPC_TIME_GET_APPS_USER_TIME 3 | |
| struct rpc_time_tod_set_apps_bases_args { | |
| uint32_t tick; | |
| uint64_t stamp; | |
| }; | |
| +static int read_rtc0_time(struct msm_rpc_server *server, | |
| + struct rpc_request_hdr *req, | |
| + unsigned len) | |
| +{ | |
| + int err; | |
| + unsigned long tm_sec; | |
| + uint32_t size = 0; | |
| + void *reply; | |
| + uint32_t output_valid; | |
| + uint32_t rpc_status = RPC_ACCEPTSTAT_SYSTEM_ERR; | |
| + struct rtc_time tm; | |
| + struct rtc_device *rtc = rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE); | |
| + | |
| + if (rtc == NULL) { | |
| + pr_err("%s: unable to open rtc device (%s)\n", | |
| + __FILE__, CONFIG_RTC_HCTOSYS_DEVICE); | |
| + goto send_reply; | |
| + } | |
| + | |
| + err = rtc_read_time(rtc, &tm); | |
| + if (err) { | |
| + pr_err("%s: Error reading rtc device (%s) : %d\n", | |
| + __FILE__, CONFIG_RTC_HCTOSYS_DEVICE, err); | |
| + goto close_dev; | |
| + } | |
| + | |
| + err = rtc_valid_tm(&tm); | |
| + if (err) { | |
| + pr_err("%s: Invalid RTC time (%s)\n", | |
| + __FILE__, CONFIG_RTC_HCTOSYS_DEVICE); | |
| + goto close_dev; | |
| + } | |
| + | |
| + rtc_tm_to_time(&tm, &tm_sec); | |
| + rpc_status = RPC_ACCEPTSTAT_SUCCESS; | |
| + | |
| +close_dev: | |
| + rtc_class_close(rtc); | |
| + | |
| +send_reply: | |
| + reply = msm_rpc_server_start_accepted_reply(server, req->xid, | |
| + rpc_status); | |
| + if (rpc_status == RPC_ACCEPTSTAT_SUCCESS) { | |
| + output_valid = *((uint32_t *)(req + 1)); | |
| + *(uint32_t *)reply = output_valid; | |
| + size = sizeof(uint32_t); | |
| + if (be32_to_cpu(output_valid)) { | |
| + reply += sizeof(uint32_t); | |
| + *(uint32_t *)reply = cpu_to_be32(tm_sec); | |
| + size += sizeof(uint32_t); | |
| + } | |
| + } | |
| + err = msm_rpc_server_send_accepted_reply(server, size); | |
| + if (err) | |
| + pr_err("%s: send accepted reply failed: %d\n", __func__, err); | |
| + | |
| + return 1; | |
| +} | |
| + | |
| static int handle_rpc_call(struct msm_rpc_server *server, | |
| struct rpc_request_hdr *req, unsigned len) | |
| { | |
| switch (req->procedure) { | |
| case RPC_TIME_REMOTE_MTOA_NULL: | |
| return 0; | |
| case RPC_TIME_TOD_SET_APPS_BASES: { | |
| @@ -53,38 +110,51 @@ | |
| args->stamp = be64_to_cpu(args->stamp); | |
| printk(KERN_INFO "RPC_TIME_TOD_SET_APPS_BASES:\n" | |
| "\ttick = %d\n" | |
| "\tstamp = %lld\n", | |
| args->tick, args->stamp); | |
| rtc_hctosys(); | |
| return 0; | |
| } | |
| + | |
| + case RPC_TIME_GET_APPS_USER_TIME: | |
| + return read_rtc0_time(server, req, len); | |
| + | |
| default: | |
| return -ENODEV; | |
| } | |
| } | |
| static struct msm_rpc_server rpc_server[] = { | |
| { | |
| .prog = TIME_REMOTE_MTOA_PROG, | |
| + .vers = TIME_REMOTE_MTOA_VERS_OLD, | |
| + .rpc_call = handle_rpc_call, | |
| + }, | |
| + { | |
| + .prog = TIME_REMOTE_MTOA_PROG, | |
| .vers = TIME_REMOTE_MTOA_VERS, | |
| .rpc_call = handle_rpc_call, | |
| }, | |
| { | |
| .prog = TIME_REMOTE_MTOA_PROG, | |
| .vers = TIME_REMOTE_MTOA_VERS_COMP, | |
| .rpc_call = handle_rpc_call, | |
| }, | |
| }; | |
| static int __init rpc_server_init(void) | |
| { | |
| /* Dual server registration to support backwards compatibility vers */ | |
| int ret; | |
| + ret = msm_rpc_create_server(&rpc_server[2]); | |
| + if (ret < 0) | |
| + return ret; | |
| ret = msm_rpc_create_server(&rpc_server[1]); | |
| if (ret < 0) | |
| return ret; | |
| + printk(KERN_ERR "Using very old AMSS modem firmware.\n"); | |
| return msm_rpc_create_server(&rpc_server[0]); | |
| } | |
| module_init(rpc_server_init); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/sh_battery.c kernel/arch/arm/mach-msm/sh_battery.c | |
| --- kernel-msm/arch/arm/mach-msm/sh_battery.c 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/sh_battery.c 2010-08-27 11:17:49.000000000 +0900 | |
| @@ -0,0 +1,1096 @@ | |
| +/* | |
| + * Copyright (C) 2009 SHARP CORPORATION All rights reserved. | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| +*/ | |
| + | |
| +#include "linux/init.h" | |
| +#include "linux/module.h" | |
| +#include "linux/kernel.h" | |
| +#include "linux/err.h" | |
| +#include "linux/power_supply.h" | |
| +#include "linux/platform_device.h" | |
| +#include "linux/wakelock.h" | |
| +#include "mach/msm_rpcrouter.h" | |
| +#include "mach/board.h" | |
| + | |
| +#define SHBATT_REMOTE_A2MPROG 0x300000A0 | |
| +#define SHBATT_REMOTE_A2MVERS 0x00010001 | |
| + | |
| +#define SHBATT_API_INITIALIZE_REMOTE_PROC 2 | |
| +#define SHBATT_API_GET_CHARGER_CABLE_STATUS_REMOTE_PROC 3 | |
| +#define SHBATT_API_GET_BATTERY_CHARGING_STATUS_REMOTE_PROC 4 | |
| +#define SHBATT_API_GET_BATTERY_CAPACITY_REMOTE_PROC 5 | |
| +#define SHBATT_API_GET_BATTERY_VOLTAGE_REMOTE_PROC 6 | |
| +#define SHBATT_API_GET_BATTERY_PRESENT_REMOTE_PROC 7 | |
| +#define SHBATT_API_GET_BATTERY_TEMPERATURE_REMOTE_PROC 8 | |
| +#define SHBATT_API_GET_BATTERY_HEALTH_REMOTE_PROC 9 | |
| +#define SHBATT_API_GET_BATTERY_TECHNOLOGY_REMOTE_PROC 10 | |
| +#define SHBATT_API_GET_FUELGAUGE_CURRENT_REMOTE_PROC 11 | |
| +#define SHBATT_API_GET_FUELGAUGE_VOLTAGE_REMOTE_PROC 12 | |
| +#define SHBATT_API_READ_ADC_CHANNEL_REMOTE_PROC 13 | |
| +#define SHBATT_API_SET_VBATT_CALIBRATION_DATA_REMOTE_PROC 14 | |
| +#define SHBATT_API_REFRESH_VBATT_CALIBRATION_DATA_REMOTE_PROC 15 | |
| +#define SHBATT_API_SET_FUELGAUGE_MODE_REMOTE_PROC 16 | |
| +#define SHBATT_API_GET_FUELGAUGE_DEVICE_ID_REMOTE_PROC 17 | |
| + | |
| +#define SH_BATTERY_REMOTE_M2APROG 0x300000A1 | |
| +#define SH_BATTERY_REMOTE_M2AVERS 0x00010001 | |
| + | |
| +#define SH_BATTERY_UPDATE_CHARGER_CABLE_STATUS_PROC 2 | |
| +#define SH_BATTERY_UPDATE_BATTERY_CHARGING_STATUS_PROC 3 | |
| +#define SH_BATTERY_UPDATE_BATTERY_CAPACITY_PROC 4 | |
| + | |
| +#define SHCHG_REMOTE_A2MPROG 0x300000A2 | |
| +#define SHCHG_REMOTE_A2MVERS 0x00010001 | |
| + | |
| +#define SHCHG_API_INITIALIZE_REMOTE_PROC 2 | |
| +#define SHCHG_API_NOTIFY_USB_CHARGER_CONNECTED_REMOTE_PROC 3 | |
| +#define SHCHG_API_NOTIFY_USB_CHARGER_DISCONNECTED_REMOTE_PROC 4 | |
| +#define SHCHG_API_NOTIFY_USB_CHARGER_I_IS_AVAILABLE_REMOTE 5 | |
| +#define SHCHG_API_NOTIFY_USB_CHARGER_I_IS_NOT_AVAILABLE_REMOTE_PROC 6 | |
| + | |
| +#define SHTHERM_REMOTE_A2MPROG 0x300000A3 | |
| +#define SHTHERM_REMOTE_A2MVERS 0x00010001 | |
| + | |
| +#define SHTHERM_API_INITIALIZE_REMOTE_PROC 2 | |
| +#define SHTHERM_API_GET_BATTERY_TEMPERATURE_REMOTE_PROC 3 | |
| +#define SHTHERM_API_GET_CHARGER_TEMPERATURE_REMOTE_PROC 4 | |
| +#define SHTHERM_API_GET_CAMERA_TEMPERATURE_REMOTE_PROC 5 | |
| +#define SHTHERM_API_GET_PA_TEMPERATURE_REMOTE_PROC 6 | |
| +#define SHTHERM_API_GET_PMIC_TEMPERATURE_REMOTE_PROC 7 | |
| + | |
| +#ifdef SH_BATTERY_TRACE | |
| + | |
| +#define TRACE(x...) printk(KERN_INFO "[SH_BATTERY] " x) | |
| + | |
| +#else | |
| + | |
| +#define TRACE(x...) do {} while(0) | |
| + | |
| +#endif /* SH_BATTERY_TRACE */ | |
| + | |
| +#define SH_BATTERY_ATTR(_name) \ | |
| +{ \ | |
| + .attr = { .name = #_name, .mode = 0444, .owner = THIS_MODULE }, \ | |
| + .show = sh_battery_show_property, \ | |
| + .store = NULL, \ | |
| +} | |
| + | |
| +static ssize_t sh_battery_show_property( struct device* dev, | |
| + struct device_attribute* attr, | |
| + char* buf ); | |
| + | |
| +enum { BATTERY, USB, AC, FUELGAUGE, ADC }; | |
| + | |
| +static struct power_supply sh_battery_power_supplies[] = | |
| +{ | |
| + { | |
| + .name = "battery", | |
| + .type = POWER_SUPPLY_TYPE_BATTERY, | |
| + }, | |
| + | |
| + { | |
| + .name = "usb", | |
| + .type = POWER_SUPPLY_TYPE_USB, | |
| + }, | |
| + | |
| + { | |
| + .name = "ac", | |
| + .type = POWER_SUPPLY_TYPE_MAINS, | |
| + }, | |
| + | |
| + { | |
| + .name = "fuelgauge", | |
| + .type = POWER_SUPPLY_TYPE_BATTERY, | |
| + }, | |
| + | |
| + { | |
| + .name = "adc", | |
| + .type = POWER_SUPPLY_TYPE_BATTERY, | |
| + } | |
| +}; | |
| + | |
| +enum | |
| +{ | |
| + SH_BATTERY_PROPERTY_ONLINE, | |
| + SH_BATTERY_PROPERTY_STATUS, | |
| + SH_BATTERY_PROPERTY_HEALTH, | |
| + SH_BATTERY_PROPERTY_PRESENT, | |
| + SH_BATTERY_PROPERTY_CAPACITY, | |
| + SH_BATTERY_PROPERTY_BATT_VOL, | |
| + SH_BATTERY_PROPERTY_BATT_TEMP, | |
| + SH_BATTERY_PROPERTY_TECHNOLOGY, | |
| + | |
| + SH_BATTERY_PROPERTY_CURRENT, | |
| + SH_BATTERY_PROPERTY_VOLTAGE, | |
| + SH_BATTERY_PROPERTY_DEVICE_ID, | |
| + | |
| + SH_BATTERY_PROPERTY_VCOIN_MV, | |
| + SH_BATTERY_PROPERTY_VBATT_MV, | |
| + SH_BATTERY_PROPERTY_VCHG_MV, | |
| + SH_BATTERY_PROPERTY_ICHG_MV, | |
| + SH_BATTERY_PROPERTY_ICHG_OUT_MV, | |
| + SH_BATTERY_PROPERTY_BATT_ID_MV, | |
| + SH_BATTERY_PROPERTY_BATT_THERM_DEGC, | |
| + SH_BATTERY_PROPERTY_USB_VBUS_MV, | |
| + SH_BATTERY_PROPERTY_PMIC_THERM_DEGC, | |
| + SH_BATTERY_PROPERTY_CHG_THERM_DEGC, | |
| + SH_BATTERY_PROPERTY_PA_THERM_DEGC, | |
| + SH_BATTERY_PROPERTY_MSM_THERM_DEGC, | |
| + SH_BATTERY_PROPERTY_CAMERA_THERM_DEGC | |
| +}; | |
| + | |
| +static struct device_attribute sh_battery_attrs[] = | |
| +{ | |
| + SH_BATTERY_ATTR(online), | |
| + SH_BATTERY_ATTR(status), | |
| + SH_BATTERY_ATTR(health), | |
| + SH_BATTERY_ATTR(present), | |
| + SH_BATTERY_ATTR(capacity), | |
| + SH_BATTERY_ATTR(batt_vol), | |
| + SH_BATTERY_ATTR(batt_temp), | |
| + SH_BATTERY_ATTR(technology), | |
| + | |
| + SH_BATTERY_ATTR(current), | |
| + SH_BATTERY_ATTR(voltage), | |
| + SH_BATTERY_ATTR(device_id), | |
| + | |
| + SH_BATTERY_ATTR(vcoin_mv), | |
| + SH_BATTERY_ATTR(vbatt_mv), | |
| + SH_BATTERY_ATTR(vchg_mv), | |
| + SH_BATTERY_ATTR(ichg_mv), | |
| + SH_BATTERY_ATTR(ichg_out_mv), | |
| + SH_BATTERY_ATTR(batt_id_mv), | |
| + SH_BATTERY_ATTR(batt_therm_degc), | |
| + SH_BATTERY_ATTR(usb_vbus_mv), | |
| + SH_BATTERY_ATTR(pmic_therm_degc), | |
| + SH_BATTERY_ATTR(chg_therm_degc), | |
| + SH_BATTERY_ATTR(pa_therm_degc), | |
| + SH_BATTERY_ATTR(msm_therm_degc), | |
| + SH_BATTERY_ATTR(camera_therm_degc) | |
| +}; | |
| + | |
| +enum | |
| +{ | |
| + SH_BATTERY_CABLE_STATUS_NONE, | |
| + SH_BATTERY_CABLE_STATUS_USB, | |
| + SH_BATTERY_CABLE_STATUS_AC | |
| +}; | |
| + | |
| +enum | |
| +{ | |
| + SH_BATTERY_CHG_STATUS_UNKNOWN, | |
| + SH_BATTERY_CHG_STATUS_CHARGING, | |
| + SH_BATTERY_CHG_STATUS_DISCHARGING, | |
| + SH_BATTERY_CHG_STATUS_NOT_CHARGING, | |
| + SH_BATTERY_CHG_STATUS_FULL | |
| +}; | |
| + | |
| +enum | |
| +{ | |
| + SH_BATTERY_ADC_CHANNEL_VBATT, | |
| + SH_BATTERY_ADC_CHANNEL_VCHG, | |
| + SH_BATTERY_ADC_CHANNEL_VCOIN_MV, | |
| + SH_BATTERY_ADC_CHANNEL_VBATT_MV, | |
| + SH_BATTERY_ADC_CHANNEL_VCHG_MV, | |
| + SH_BATTERY_ADC_CHANNEL_ICHG_MV, | |
| + SH_BATTERY_ADC_CHANNEL_ICHG_OUT_MV, | |
| + SH_BATTERY_ADC_CHANNEL_BATT_ID_MV, | |
| + SH_BATTERY_ADC_CHANNEL_BATT_THERM_DEGC, | |
| + SH_BATTERY_ADC_CHANNEL_USB_VBUS_MV, | |
| + SH_BATTERY_ADC_CHANNEL_PMIC_THERM_DEGC, | |
| + SH_BATTERY_ADC_CHANNEL_CHG_THERM_DEGC, | |
| + SH_BATTERY_ADC_CHANNEL_PA_THERM_DEGC, | |
| + SH_BATTERY_ADC_CHANNEL_MSM_THERM_DEGC, | |
| + SH_BATTERY_ADC_CHANNEL_CAMERA_THERM_DEGC, | |
| +}; | |
| + | |
| +static struct mutex sh_battery_lock; | |
| + | |
| +static struct wake_lock sh_battery_vbus_wake_lock; | |
| + | |
| +static struct msm_rpc_endpoint* ep_shbatt_p; | |
| + | |
| +static struct msm_rpc_endpoint* ep_shchg_p; | |
| + | |
| +static struct msm_rpc_endpoint* ep_shtherm_p; | |
| + | |
| +static int sh_battery_charger_cable_status; | |
| + | |
| +static int sh_battery_battery_charging_status; | |
| + | |
| +static int sh_battery_battery_capacity; | |
| + | |
| +static ssize_t sh_battery_show_property( struct device* dev, | |
| + struct device_attribute* attr, | |
| + char* buf ) | |
| +{ | |
| + static char* status_text[] = | |
| + { | |
| + "Unknown", "Charging", "Discharging", "Not charging", "Full" | |
| + }; | |
| + | |
| + static char* health_text[] = | |
| + { | |
| + "Unknown", "Good", "Overheat", "Dead", "Over voltage", "Unspecified failure", "Cold" | |
| + }; | |
| + | |
| + static char* technology_text[] = | |
| + { | |
| + "Unknown", "NiMH", "Li-ion", "Li-poly", "LiFe", "NiCd", "LiMn" | |
| + }; | |
| + | |
| + struct shbatt_api_remote_req_t1 | |
| + { | |
| + struct rpc_request_hdr hdr; | |
| + } req_t1; | |
| + | |
| + struct shbatt_api_remote_req_t2 | |
| + { | |
| + struct rpc_request_hdr hdr; | |
| + int value; | |
| + } req_t2; | |
| + | |
| + struct shbatt_api_remote_rep_t1 | |
| + { | |
| + struct rpc_reply_hdr hdr; | |
| + int result; | |
| + int value; | |
| + } rep_t1; | |
| + | |
| + const ptrdiff_t property = attr - sh_battery_attrs; | |
| + | |
| + ssize_t size; | |
| + | |
| + int result, value; | |
| + | |
| + TRACE("%s attr = %d\n",__FUNCTION__,property); | |
| + | |
| + mutex_lock(&sh_battery_lock); | |
| + | |
| + if(property == SH_BATTERY_PROPERTY_ONLINE) | |
| + { | |
| + if(dev == sh_battery_power_supplies[USB].dev) | |
| + { | |
| + value = (sh_battery_charger_cable_status == SH_BATTERY_CABLE_STATUS_USB) ? 1 : 0; | |
| + TRACE("/usb/online = %d\n",value); | |
| + } | |
| + else if(dev == sh_battery_power_supplies[AC].dev) | |
| + { | |
| + value = (sh_battery_charger_cable_status == SH_BATTERY_CABLE_STATUS_AC) ? 1 : 0; | |
| + TRACE("/ac/online = %d\n",value); | |
| + } | |
| + else | |
| + { | |
| + value = 0; | |
| + } | |
| + size = sprintf(buf,"%d\n",value); | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_STATUS) | |
| + { | |
| + size = sprintf(buf,"%s\n",status_text[sh_battery_battery_charging_status]); | |
| + TRACE("/battery/status = %s\n",status_text[sh_battery_battery_charging_status]); | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_HEALTH) | |
| + { | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_GET_BATTERY_HEALTH_REMOTE_PROC, | |
| + &req_t1,sizeof(req_t1), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : get battery health failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%s\n",health_text[value]); | |
| + TRACE("/battery/health = %s\n",health_text[value]); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_PRESENT) | |
| + { | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_GET_BATTERY_PRESENT_REMOTE_PROC, | |
| + &req_t1,sizeof(req_t1), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : get battery present failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/battery/present = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_CAPACITY) | |
| + { | |
| + size = sprintf(buf,"%d\n",sh_battery_battery_capacity); | |
| + TRACE("/battery/capacity = %d\n",sh_battery_battery_capacity); | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_BATT_VOL) | |
| + { | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_GET_BATTERY_VOLTAGE_REMOTE_PROC, | |
| + &req_t1,sizeof(req_t1), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : get battery voltage failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/battery/batt_vol = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_BATT_TEMP) | |
| + { | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_GET_BATTERY_TEMPERATURE_REMOTE_PROC, | |
| + &req_t1,sizeof(req_t1), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : get battery temperature failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + value = value * 10; | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/battery/batt_temp = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_TECHNOLOGY) | |
| + { | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_GET_BATTERY_TECHNOLOGY_REMOTE_PROC, | |
| + &req_t1,sizeof(req_t1), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : get battery technology failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%s\n",technology_text[value]); | |
| + TRACE("/battery/technology = %s\n",technology_text[value]); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_CURRENT) | |
| + { | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_GET_FUELGAUGE_CURRENT_REMOTE_PROC, | |
| + &req_t1,sizeof(req_t1), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : get fuelgauge current failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/fuelgauge/current = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_VOLTAGE) | |
| + { | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_GET_FUELGAUGE_VOLTAGE_REMOTE_PROC, | |
| + &req_t1,sizeof(req_t1), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : get fuelgauge voltage failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/fuelgauge/voltage = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_DEVICE_ID) | |
| + { | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_GET_FUELGAUGE_DEVICE_ID_REMOTE_PROC, | |
| + &req_t1,sizeof(req_t1), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : get fuelgauge device_id failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/fuelgauge/device_id = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_VCOIN_MV) | |
| + { | |
| + req_t2.value = cpu_to_be32(SH_BATTERY_ADC_CHANNEL_VCOIN_MV); | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_READ_ADC_CHANNEL_REMOTE_PROC, | |
| + &req_t2,sizeof(req_t2), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : read adc channel (vcoin_mv) failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/adc/vcoin_mv = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_VBATT_MV) | |
| + { | |
| + req_t2.value = cpu_to_be32(SH_BATTERY_ADC_CHANNEL_VBATT_MV); | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_READ_ADC_CHANNEL_REMOTE_PROC, | |
| + &req_t2,sizeof(req_t2), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : read adc channel (vbatt_mv) failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/adc/vbatt_mv = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_VCHG_MV) | |
| + { | |
| + req_t2.value = cpu_to_be32(SH_BATTERY_ADC_CHANNEL_VCHG_MV); | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_READ_ADC_CHANNEL_REMOTE_PROC, | |
| + &req_t2,sizeof(req_t2), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : read adc channel (vchg_mv) failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/adc/vchg_mv = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_ICHG_MV) | |
| + { | |
| + req_t2.value = cpu_to_be32(SH_BATTERY_ADC_CHANNEL_ICHG_MV); | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_READ_ADC_CHANNEL_REMOTE_PROC, | |
| + &req_t2,sizeof(req_t2), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : read adc channel (ichg_mv) failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/adc/ichg_mv = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_ICHG_OUT_MV) | |
| + { | |
| + req_t2.value = cpu_to_be32(SH_BATTERY_ADC_CHANNEL_ICHG_OUT_MV); | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_READ_ADC_CHANNEL_REMOTE_PROC, | |
| + &req_t2,sizeof(req_t2), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : read adc channel (ichg_out_mv) failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/adc/ichg_out_mv = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_BATT_ID_MV) | |
| + { | |
| + req_t2.value = cpu_to_be32(SH_BATTERY_ADC_CHANNEL_BATT_ID_MV); | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_READ_ADC_CHANNEL_REMOTE_PROC, | |
| + &req_t2,sizeof(req_t2), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : read adc channel (batt_id_mv) failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/adc/batt_id_mv = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_BATT_THERM_DEGC) | |
| + { | |
| + req_t2.value = cpu_to_be32(SH_BATTERY_ADC_CHANNEL_BATT_THERM_DEGC); | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_READ_ADC_CHANNEL_REMOTE_PROC, | |
| + &req_t2,sizeof(req_t2), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : read adc channel (batt_therm_degc) failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/adc/batt_therm_degc = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_USB_VBUS_MV) | |
| + { | |
| + req_t2.value = cpu_to_be32(SH_BATTERY_ADC_CHANNEL_USB_VBUS_MV); | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_READ_ADC_CHANNEL_REMOTE_PROC, | |
| + &req_t2,sizeof(req_t2), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : read adc channel (usb_vbus_mv) failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/adc/usb_vbus_mv = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_PMIC_THERM_DEGC) | |
| + { | |
| + req_t2.value = cpu_to_be32(SH_BATTERY_ADC_CHANNEL_PMIC_THERM_DEGC); | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_READ_ADC_CHANNEL_REMOTE_PROC, | |
| + &req_t2,sizeof(req_t2), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : read adc channel (pmic_therm_degc) failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/adc/pmic_therm_degc = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_CHG_THERM_DEGC) | |
| + { | |
| + req_t2.value = cpu_to_be32(SH_BATTERY_ADC_CHANNEL_CHG_THERM_DEGC); | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_READ_ADC_CHANNEL_REMOTE_PROC, | |
| + &req_t2,sizeof(req_t2), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : read adc channel (chg_therm_degc) failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/adc/chg_therm_degc = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_PA_THERM_DEGC) | |
| + { | |
| + req_t2.value = cpu_to_be32(SH_BATTERY_ADC_CHANNEL_PA_THERM_DEGC); | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_READ_ADC_CHANNEL_REMOTE_PROC, | |
| + &req_t2,sizeof(req_t2), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : read adc channel (pa_therm_degc) failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/adc/pa_therm_degc = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_MSM_THERM_DEGC) | |
| + { | |
| + req_t2.value = cpu_to_be32(SH_BATTERY_ADC_CHANNEL_MSM_THERM_DEGC); | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_READ_ADC_CHANNEL_REMOTE_PROC, | |
| + &req_t2,sizeof(req_t2), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : read adc channel (msm_therm_degc) failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/adc/msm_therm_degc = %d\n",value); | |
| + } | |
| + } | |
| + else if(property == SH_BATTERY_PROPERTY_CAMERA_THERM_DEGC) | |
| + { | |
| + req_t2.value = cpu_to_be32(SH_BATTERY_ADC_CHANNEL_CAMERA_THERM_DEGC); | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_READ_ADC_CHANNEL_REMOTE_PROC, | |
| + &req_t2,sizeof(req_t2), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + size = -1; | |
| + TRACE("%s : read adc channel (camera_therm_degc) failed.\n",__FUNCTION__); | |
| + } | |
| + else | |
| + { | |
| + value = be32_to_cpu(rep_t1.value); | |
| + size = sprintf(buf,"%d\n",value); | |
| + TRACE("/adc/camera_therm_degc = %d\n",value); | |
| + } | |
| + } | |
| + else | |
| + { | |
| + size = -1; | |
| + } | |
| + | |
| + mutex_unlock(&sh_battery_lock); | |
| + | |
| + return size; | |
| +} | |
| + | |
| +static int sh_battery_create_attrs( void ) | |
| +{ | |
| + int i, result; | |
| + | |
| + TRACE("%s \n",__FUNCTION__); | |
| + | |
| + for(i = 1; i <= 7; i++) | |
| + { | |
| + result = device_create_file(sh_battery_power_supplies[BATTERY].dev,&sh_battery_attrs[i]); | |
| + | |
| + if(result != 0) | |
| + { | |
| + device_remove_file(sh_battery_power_supplies[BATTERY].dev,&sh_battery_attrs[i]); | |
| + | |
| + TRACE("%s : failed to %s property register.\n",__FUNCTION__,sh_battery_attrs[i].attr.name); | |
| + return -1; | |
| + } | |
| + } | |
| + | |
| + result = device_create_file(sh_battery_power_supplies[USB].dev,&sh_battery_attrs[0]); | |
| + | |
| + if(result != 0) | |
| + { | |
| + device_remove_file(sh_battery_power_supplies[USB].dev,&sh_battery_attrs[0]); | |
| + | |
| + TRACE("%s : failed to %s property register.\n",__FUNCTION__,sh_battery_attrs[0].attr.name); | |
| + return -1; | |
| + } | |
| + | |
| + result = device_create_file(sh_battery_power_supplies[AC].dev,&sh_battery_attrs[0]); | |
| + | |
| + if(result != 0) | |
| + { | |
| + device_remove_file(sh_battery_power_supplies[AC].dev,&sh_battery_attrs[0]); | |
| + | |
| + TRACE("%s : failed to %s property register.\n",__FUNCTION__,sh_battery_attrs[0].attr.name); | |
| + return -1; | |
| + } | |
| + | |
| + for(i = 8; i <= 10; i++) | |
| + { | |
| + result = device_create_file(sh_battery_power_supplies[FUELGAUGE].dev,&sh_battery_attrs[i]); | |
| + | |
| + if(result != 0) | |
| + { | |
| + device_remove_file(sh_battery_power_supplies[FUELGAUGE].dev,&sh_battery_attrs[i]); | |
| + | |
| + TRACE("%s : failed to %s property register.\n",__FUNCTION__,sh_battery_attrs[i].attr.name); | |
| + return -1; | |
| + } | |
| + } | |
| + | |
| + result = device_create_file(sh_battery_power_supplies[FUELGAUGE].dev,&sh_battery_attrs[4]); | |
| + | |
| + if(result != 0) | |
| + { | |
| + device_remove_file(sh_battery_power_supplies[FUELGAUGE].dev,&sh_battery_attrs[4]); | |
| + | |
| + TRACE("%s : failed to %s property register.\n",__FUNCTION__,sh_battery_attrs[4].attr.name); | |
| + return -1; | |
| + } | |
| + | |
| + for(i = 11; i <= 23; i++) | |
| + { | |
| + result = device_create_file(sh_battery_power_supplies[ADC].dev,&sh_battery_attrs[i]); | |
| + | |
| + if(result != 0) | |
| + { | |
| + device_remove_file(sh_battery_power_supplies[ADC].dev,&sh_battery_attrs[i]); | |
| + | |
| + TRACE("%s : failed to %s property register.\n",__FUNCTION__,sh_battery_attrs[i].attr.name); | |
| + return -1; | |
| + } | |
| + } | |
| + | |
| + return result; | |
| +} | |
| + | |
| +static int sh_battery_probe( struct platform_device* dev_p ) | |
| +{ | |
| + struct shbatt_api_remote_req_t1 | |
| + { | |
| + struct rpc_request_hdr hdr; | |
| + } req_t1; | |
| + | |
| + struct shbatt_api_remote_rep_t1 | |
| + { | |
| + struct rpc_reply_hdr hdr; | |
| + int result; | |
| + int value; | |
| + } rep_t1; | |
| + | |
| + int i, result; | |
| + | |
| + TRACE("%s \n",__FUNCTION__); | |
| + | |
| + ep_shbatt_p = msm_rpc_connect_compatible(SHBATT_REMOTE_A2MPROG,SHBATT_REMOTE_A2MVERS,0); | |
| + | |
| + if(IS_ERR(ep_shbatt_p)) | |
| + { | |
| + TRACE("%s : rpc connect failed. rc = %ld\n",__FUNCTION__,PTR_ERR(ep_shbatt_p)); | |
| + return -1; | |
| + } | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_INITIALIZE_REMOTE_PROC, | |
| + &req_t1,sizeof(req_t1), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + TRACE("%s : initialize shbatt failed. rc = %ld\n",__FUNCTION__,PTR_ERR(ep_shbatt_p)); | |
| + return -1; | |
| + } | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_GET_CHARGER_CABLE_STATUS_REMOTE_PROC, | |
| + &req_t1,sizeof(req_t1), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + TRACE("%s : get charger cable status failed. rc = %ld\n",__FUNCTION__,PTR_ERR(ep_shbatt_p)); | |
| + return -1; | |
| + } | |
| + else | |
| + { | |
| + sh_battery_charger_cable_status = be32_to_cpu(rep_t1.value); | |
| + } | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_GET_BATTERY_CHARGING_STATUS_REMOTE_PROC, | |
| + &req_t1,sizeof(req_t1), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + TRACE("%s : get battery charging status failed. rc = %ld\n",__FUNCTION__,PTR_ERR(ep_shbatt_p)); | |
| + return -1; | |
| + } | |
| + else | |
| + { | |
| + sh_battery_battery_charging_status = be32_to_cpu(rep_t1.value); | |
| + } | |
| + | |
| + result = msm_rpc_call_reply(ep_shbatt_p, | |
| + SHBATT_API_GET_BATTERY_CAPACITY_REMOTE_PROC, | |
| + &req_t1,sizeof(req_t1), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + TRACE("%s : get battery capacity failed. rc = %ld\n",__FUNCTION__,PTR_ERR(ep_shbatt_p)); | |
| + return -1; | |
| + } | |
| + else | |
| + { | |
| + sh_battery_battery_capacity = be32_to_cpu(rep_t1.value); | |
| + } | |
| + | |
| + for(i = 0; i < ARRAY_SIZE(sh_battery_power_supplies); i++) | |
| + { | |
| + result = power_supply_register(&dev_p->dev,&sh_battery_power_supplies[i]); | |
| + | |
| + if(result != 0) | |
| + { | |
| + TRACE("%s : failed to power supply register.\n",__FUNCTION__); | |
| + return -1; | |
| + } | |
| + } | |
| + | |
| + result = sh_battery_create_attrs(); | |
| + | |
| + if(result < 0) | |
| + { | |
| + TRACE("%s : failed to property register.\n",__FUNCTION__); | |
| + return -1; | |
| + } | |
| + | |
| + ep_shchg_p = msm_rpc_connect_compatible(SHCHG_REMOTE_A2MPROG,SHCHG_REMOTE_A2MVERS,0); | |
| + | |
| + if(IS_ERR(ep_shchg_p)) | |
| + { | |
| + TRACE("%s : rpc connect failed. rc = %ld\n",__FUNCTION__,PTR_ERR(ep_shchg_p)); | |
| + return -1; | |
| + } | |
| + | |
| + result = msm_rpc_call_reply(ep_shchg_p, | |
| + SHCHG_API_INITIALIZE_REMOTE_PROC, | |
| + &req_t1,sizeof(req_t1), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + TRACE("%s : initialize shchg failed. rc = %ld\n",__FUNCTION__,PTR_ERR(ep_shchg_p)); | |
| + return -1; | |
| + } | |
| + | |
| + ep_shtherm_p = msm_rpc_connect_compatible(SHTHERM_REMOTE_A2MPROG,SHTHERM_REMOTE_A2MVERS,0); | |
| + | |
| + if(IS_ERR(ep_shtherm_p)) | |
| + { | |
| + TRACE("%s : rpc connect failed. rc = %ld\n",__FUNCTION__,PTR_ERR(ep_shtherm_p)); | |
| + return -1; | |
| + } | |
| + | |
| + result = msm_rpc_call_reply(ep_shtherm_p, | |
| + SHTHERM_API_INITIALIZE_REMOTE_PROC, | |
| + &req_t1,sizeof(req_t1), | |
| + &rep_t1,sizeof(rep_t1), | |
| + 5 * HZ); | |
| + if(result < 0) | |
| + { | |
| + TRACE("%s : initialize shtherm failed. rc = %ld\n",__FUNCTION__,PTR_ERR(ep_shtherm_p)); | |
| + return -1; | |
| + } | |
| + | |
| + return 0; | |
| +} | |
| + | |
| +static struct platform_driver sh_battery_driver = | |
| +{ | |
| + .probe = sh_battery_probe, | |
| + .driver = { .name = "sh_battery", .owner = THIS_MODULE, }, | |
| +}; | |
| + | |
| +static void sh_battery_update_charger_cable_status( int status ) | |
| +{ | |
| + TRACE("%s(%d) \n",__FUNCTION__,status); | |
| + | |
| + sh_battery_charger_cable_status = status; | |
| +#if 0 | |
| + msm_hsusb_set_vbus_state(status == SH_BATTERY_CABLE_STATUS_USB); | |
| + | |
| + if(status == SH_BATTERY_CABLE_STATUS_USB) | |
| + { | |
| + wake_lock(&sh_battery_vbus_wake_lock); | |
| + } | |
| + else | |
| + { | |
| + wake_lock_timeout(&sh_battery_vbus_wake_lock,HZ / 2); | |
| + } | |
| +#endif | |
| + power_supply_changed(&sh_battery_power_supplies[USB]); | |
| + power_supply_changed(&sh_battery_power_supplies[AC]); | |
| +} | |
| + | |
| +static void sh_battery_update_battery_charging_status( int status ) | |
| +{ | |
| + TRACE("%s(%d) \n",__FUNCTION__,status); | |
| + | |
| + sh_battery_battery_charging_status = status; | |
| + | |
| + power_supply_changed(&sh_battery_power_supplies[BATTERY]); | |
| +} | |
| + | |
| +static void sh_battery_update_battery_capacity( int capacity ) | |
| +{ | |
| + TRACE("%s(%d) \n",__FUNCTION__,capacity); | |
| + | |
| + sh_battery_battery_capacity = capacity; | |
| + | |
| + power_supply_changed(&sh_battery_power_supplies[BATTERY]); | |
| +} | |
| + | |
| +struct sh_battery_rpc_update_charger_cable_status_args | |
| +{ | |
| + int status; | |
| +}; | |
| + | |
| +struct sh_battery_rpc_update_battery_charging_status_args | |
| +{ | |
| + int status; | |
| +}; | |
| + | |
| +struct sh_battery_rpc_update_battery_capacity_args | |
| +{ | |
| + int capacity; | |
| +}; | |
| + | |
| +static int sh_battery_handle_rpc_call( struct msm_rpc_server* svr_p, | |
| + struct rpc_request_hdr* req_p, | |
| + unsigned len ) | |
| +{ | |
| + int result = 0; | |
| + | |
| + TRACE("[S] %s %d\n",__FUNCTION__,req_p->procedure); | |
| + | |
| + switch(req_p->procedure) | |
| + { | |
| + case SH_BATTERY_UPDATE_CHARGER_CABLE_STATUS_PROC: | |
| + { | |
| + struct sh_battery_rpc_update_charger_cable_status_args* args; | |
| + args = (struct sh_battery_rpc_update_charger_cable_status_args*)(req_p + 1); | |
| + args->status = be32_to_cpu(args->status); | |
| + sh_battery_update_charger_cable_status(args->status); | |
| + break; | |
| + } | |
| + | |
| + case SH_BATTERY_UPDATE_BATTERY_CHARGING_STATUS_PROC: | |
| + { | |
| + struct sh_battery_rpc_update_battery_charging_status_args* args; | |
| + args = (struct sh_battery_rpc_update_battery_charging_status_args*)(req_p + 1); | |
| + args->status = be32_to_cpu(args->status); | |
| + sh_battery_update_battery_charging_status(args->status); | |
| + break; | |
| + } | |
| + | |
| + case SH_BATTERY_UPDATE_BATTERY_CAPACITY_PROC: | |
| + { | |
| + struct sh_battery_rpc_update_battery_capacity_args* args; | |
| + args = (struct sh_battery_rpc_update_battery_capacity_args*)(req_p + 1); | |
| + args->capacity = be32_to_cpu(args->capacity); | |
| + sh_battery_update_battery_capacity(args->capacity); | |
| + break; | |
| + } | |
| + | |
| + default: | |
| + result = -1; | |
| + break; | |
| + } | |
| + | |
| + TRACE("[E] %s %d\n",__FUNCTION__,req_p->procedure); | |
| + | |
| + return result; | |
| +} | |
| + | |
| +static struct msm_rpc_server sh_battery_rpc_server = | |
| +{ | |
| + .prog = SH_BATTERY_REMOTE_M2APROG, | |
| + .vers = SH_BATTERY_REMOTE_M2AVERS, | |
| + .rpc_call = sh_battery_handle_rpc_call, | |
| +}; | |
| + | |
| +static int __init sh_battery_init( void ) | |
| +{ | |
| + wake_lock_init(&sh_battery_vbus_wake_lock,WAKE_LOCK_SUSPEND,"vbus_present"); | |
| + | |
| + mutex_init(&sh_battery_lock); | |
| + | |
| + msm_rpc_create_server(&sh_battery_rpc_server); | |
| + | |
| + platform_driver_register(&sh_battery_driver); | |
| + | |
| + return 0; | |
| +} | |
| + | |
| +module_init(sh_battery_init); | |
| + | |
| +MODULE_DESCRIPTION("SH Battery Driver"); | |
| +MODULE_LICENSE("GPL v2"); | |
| +MODULE_AUTHOR("SHARP CORPORATION"); | |
| +MODULE_VERSION("1.0"); | |
| diff -x .git -rNU 8 kernel-msm/arch/arm/mach-msm/sh_sleepcheck.c kernel/arch/arm/mach-msm/sh_sleepcheck.c | |
| --- kernel-msm/arch/arm/mach-msm/sh_sleepcheck.c 1970-01-01 09:00:00.000000000 +0900 | |
| +++ kernel/arch/arm/mach-msm/sh_sleepcheck.c 2010-08-27 11:17:48.000000000 +0900 | |
| @@ -0,0 +1,817 @@ | |
| +/* arch/arm/mach-msm/sh_sleepcheck.c | |
| + * | |
| + * Copyright (C) 2010 Sharp Corporation | |
| + * | |
| + * This software is licensed under the terms of the GNU General Public | |
| + * License version 2, as published by the Free Software Foundation, and | |
| + * may be copied, distributed, and modified under those terms. | |
| + * | |
| + * This program is distributed in the hope that it will be useful, | |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| + * GNU General Public License for more details. | |
| + * | |
| + */ | |
| + | |
| +/* ========================================================================================== | |
| + * Include files | |
| + * ========================================================================================== */ | |
| +#include <linux/init.h> | |
| +#include <linux/module.h> | |
| +#include <linux/kernel.h> | |
| +#include <linux/err.h> | |
| +#include <linux/platform_device.h> | |
| +#include <linux/wakelock.h> | |
| +#include <linux/pm.h> | |
| +#include <mach/msm_rpcrouter.h> | |
| +#include <smd_private.h> | |
| +#include <sharp/sh_sleepcheck.h> | |
| + | |
| +/* ========================================================================================== | |
| + * Prototype local functions | |
| + * ========================================================================================== */ | |
| +static int sh_sleepcheck_probe( struct platform_device *pdev ); | |
| +static int sh_sleepcheck_remove( struct platform_device *pdev ); | |
| +static ssize_t sh_sleepcheck_show( struct device *dev, struct device_attribute *attr, char *buf ); | |
| +static ssize_t sh_sleepcheck_count_m_show( struct device *dev, struct device_attribute *attr, char *buf ); | |
| +static ssize_t sh_sleepcheck_count_m_store( struct device *dev, struct device_attribute *attr, const char *buf, size_t count ); | |
| +static ssize_t sh_sleepcheck_name_m_show( struct device *dev, struct device_attribute *attr, char *buf ); | |
| +static ssize_t sh_sleepcheck_count_a_show( struct device *dev, struct device_attribute *attr, char *buf ); | |
| +static ssize_t sh_sleepcheck_count_a_store( struct device *dev, struct device_attribute *attr, const char *buf, size_t count ); | |
| +static ssize_t sh_sleepcheck_name_a_show( struct device *dev, struct device_attribute *attr, char *buf ); | |
| +static ssize_t sh_sleepcheck_num_clk_show( struct device *dev, struct device_attribute *attr, char *buf ); | |
| +static ssize_t sh_sleepcheck_name_clk_show( struct device *dev, struct device_attribute *attr, char *buf ); | |
| + | |
| +/* ========================================================================================== | |
| + * Definitions | |
| + * ========================================================================================== */ | |
| +/* RPC */ | |
| +#define SHSYS_A2M_PROG 0x300000d0 | |
| +#define SHSYS_A2M_VERS 0x00010001 | |
| +#define SHSYS_REMOTE_NULL_PROC 0 | |
| +#define SHSYS_REMOTE_RPC_GLUE_CODE_INFO_REMOTE_PROC 1 | |
| +#define SHSYS_API_INITIALIZE_REMOTE_PROC 2 | |
| +#define SHSYS_SLEEP_INFO_PROC 3 | |
| +#define SHSYS_SLEEP_COUNTS_GET_PROC 4 | |
| +#define SHSYS_SLEEP_COUNTS_CLEAR_PROC 5 | |
| + | |
| +/* ========================================================================================== | |
| + * module parameter | |
| + * ========================================================================================== */ | |
| +enum { | |
| + DEBUG_CLOCK = 1U << 0, | |
| +}; | |
| +static int debug_mask = 0; | |
| +module_param_named(debug_mask, debug_mask, int, S_IRUGO | S_IWUSR | S_IWGRP); | |
| + | |
| +/* ========================================================================================== | |
| + * Structure definitions | |
| + * ========================================================================================== */ | |
| +/* Driver definition */ | |
| +static struct platform_driver sh_sleepcheck_driver = { | |
| + .probe = sh_sleepcheck_probe, | |
| + .remove = sh_sleepcheck_remove, | |
| + .driver = { | |
| + .name = "sh_sleep_chk", | |
| + .owner = THIS_MODULE, | |
| + }, | |
| +}; | |
| + | |
| +/* Device definition */ | |
| +static struct platform_device sh_sleepcheck_device = { | |
| + .name = "sh_sleep_chk", | |
| + .id = -1, | |
| + .dev = { | |
| + .platform_data = NULL, | |
| + }, | |
| +}; | |
| + | |
| +/* Device attribute definition */ | |
| +static DEVICE_ATTR( sh_sleepchk, S_IRUGO | S_IWUGO, sh_sleepcheck_show, NULL ); | |
| +static DEVICE_ATTR( sh_sleepchk_cnt_m, S_IRUGO | S_IWUGO, sh_sleepcheck_count_m_show, sh_sleepcheck_count_m_store ); | |
| +static DEVICE_ATTR( sh_sleepchk_name_m, S_IRUGO | S_IWUGO, sh_sleepcheck_name_m_show, NULL ); | |
| +static DEVICE_ATTR( sh_sleepchk_cnt_a, S_IRUGO | S_IWUGO, sh_sleepcheck_count_a_show, sh_sleepcheck_count_a_store ); | |
| +static DEVICE_ATTR( sh_sleepchk_name_a, S_IRUGO | S_IWUGO, sh_sleepcheck_name_a_show, NULL ); | |
| +static DEVICE_ATTR( sh_sleepchk_num_clk, S_IRUGO | S_IWUGO, sh_sleepcheck_num_clk_show, NULL ); | |
| +static DEVICE_ATTR( sh_sleepchk_name_clk, S_IRUGO | S_IWUGO, sh_sleepcheck_name_clk_show, NULL ); | |
| + | |
| +static struct attribute *sh_sleepcheck_attrs[] = { | |
| + &dev_attr_sh_sleepchk.attr, | |
| + &dev_attr_sh_sleepchk_cnt_m.attr, | |
| + &dev_attr_sh_sleepchk_name_m.attr, | |
| + &dev_attr_sh_sleepchk_cnt_a.attr, | |
| + &dev_attr_sh_sleepchk_name_a.attr, | |
| + &dev_attr_sh_sleepchk_num_clk.attr, | |
| + &dev_attr_sh_sleepchk_name_clk.attr, | |
| + NULL, | |
| +}; | |
| + | |
| +static struct attribute_group sh_sleepcheck_attr_group = { | |
| + .attrs = sh_sleepcheck_attrs, | |
| +}; | |
| + | |
| +/* RPC request structure definition */ | |
| +typedef struct sh_sleepcheck_rpc_req_t | |
| +{ | |
| + struct rpc_request_hdr hdr; | |
| +} sh_sleepcheck_rpc_req; | |
| + | |
| +/* RPC response structure definition */ | |
| +/* for "SHSYS_SLEEP_INFO_PROC" */ | |
| +typedef struct sh_sleepcheck_rpc_rsp_t | |
| +{ | |
| + struct rpc_reply_hdr hdr; | |
| + unsigned long timestamp; | |
| + unsigned long t_active; | |
| + unsigned long t_halt; | |
| + unsigned long t_tcxo_off; | |
| + unsigned long sigs; | |
| + unsigned long clients_high; | |
| + unsigned long clients_low; | |
| +} sh_sleepcheck_rpc_rsp; | |
| + | |
| +/* for "SHSYS_SLEEP_COUNTS_GET_PROC" */ | |
| +typedef struct sh_sleepcheck_clt_rpc_rsp_t | |
| +{ | |
| + struct rpc_reply_hdr hdr; | |
| + unsigned long client_num; | |
| + unsigned long client_info[SH_SLEEPCHECK_CLIENTS_MAX_NUM]; | |
| + unsigned long blocked_count; | |
| + unsigned long tasks_count; | |
| +} sh_sleepcheck_clt_rpc_rsp; | |
| + | |
| +/* for "SHSYS_SLEEP_COUNTS_CLEAR_PROC" */ | |
| +typedef struct sh_sleepcheck_clt_clear_rpc_rsp_t | |
| +{ | |
| + struct rpc_reply_hdr hdr; | |
| + unsigned long clear_ret; | |
| +} sh_sleepcheck_clt_clear_rpc_rsp; | |
| + | |
| +/* ========================================================================================== | |
| + * Global variable | |
| + * ========================================================================================== */ | |
| +static sh_sleepcheck_clients_info sh_sleepcheck_info_aarm; | |
| +static sh_sleepcheck_clock_info sh_sleepcheck_info_clk; | |
| +static struct msm_rpc_endpoint *sleepcheck_ep; | |
| + | |
| +/* ========================================================================================== | |
| + * Functions | |
| + * ========================================================================================== */ | |
| +void sh_sleepcheck_register( const char *name, int type ) | |
| +{ | |
| + bool register_flag = false; | |
| + uint8_t index; | |
| + | |
| + if( (type == WAKE_LOCK_SUSPEND) && (SH_SLEEPCHECK_CLIENTS_MAX_NUM > sh_sleepcheck_info_aarm.num_clients) ) | |
| + { | |
| + for( index = 0; index < sh_sleepcheck_info_aarm.num_clients; index++ ) | |
| + { | |
| + if( name == sh_sleepcheck_info_aarm.client[index].name ) | |
| + { | |
| + register_flag = true; | |
| + break; | |
| + } | |
| + } | |
| + | |
| + if( register_flag == true ) | |
| + { | |
| + sh_sleepcheck_info_aarm.client[index].multi_count++; | |
| +// pr_info( "%s() : %s multiplex registered. (count=%lu)\n", __func__, name, sh_sleepcheck_info_aarm.client[index].multi_count ); | |
| + } | |
| + else | |
| + { | |
| + sh_sleepcheck_info_aarm.client[sh_sleepcheck_info_aarm.num_clients].name = name; | |
| + sh_sleepcheck_info_aarm.client[sh_sleepcheck_info_aarm.num_clients].block_count = 0; | |
| + sh_sleepcheck_info_aarm.client[sh_sleepcheck_info_aarm.num_clients].multi_count = 1; | |
| + sh_sleepcheck_info_aarm.num_clients++; | |
| +// pr_info( "%s() : %s is register. (clients_num=%d)\n", __func__, name, sh_sleepcheck_info_aarm.num_clients ); | |
| + } | |
| + } | |
| +} | |
| +EXPORT_SYMBOL( sh_sleepcheck_register ); | |
| + | |
| +void sh_sleepcheck_unregister( const char *name, int flags ) | |
| +{ | |
| + bool register_flag = false; | |
| + uint8_t index1, index2; | |
| + uint64_t Temp_high; | |
| + uint64_t Temp_low; | |
| + int type; | |
| + | |
| + type = flags & 0xf/*WAKE_LOCK_TYPE_MASK*/; | |
| + if( type == WAKE_LOCK_SUSPEND ) | |
| + { | |
| + for( index1 = 0; index1 < sh_sleepcheck_info_aarm.num_clients; index1++ ) | |
| + { | |
| + if( name == sh_sleepcheck_info_aarm.client[index1].name ) | |
| + { | |
| + register_flag = true; | |
| + break; | |
| + } | |
| + } | |
| + if( register_flag == false ) | |
| + { | |
| +// pr_err( "%s() : %s is not register...\n", __func__, name ); | |
| + } | |
| + else | |
| + { | |
| + sh_sleepcheck_info_aarm.client[index1].multi_count--; | |
| + if( sh_sleepcheck_info_aarm.client[index1].multi_count == 0) | |
| + { | |
| + sh_sleepcheck_info_aarm.client[index1].name = NULL; | |
| + sh_sleepcheck_info_aarm.client[index1].block_count = 0; | |
| + for( index2 = index1; index2 < sh_sleepcheck_info_aarm.num_clients - 1; index2++ ) | |
| + { | |
| + sh_sleepcheck_info_aarm.client[index2].name = sh_sleepcheck_info_aarm.client[index2 + 1].name; | |
| + sh_sleepcheck_info_aarm.client[index2].block_count = sh_sleepcheck_info_aarm.client[index2 + 1].block_count; | |
| + sh_sleepcheck_info_aarm.client[index2].multi_count = sh_sleepcheck_info_aarm.client[index2 + 1].multi_count; | |
| + } | |
| + if( sh_sleepcheck_info_aarm.num_clients == SH_SLEEPCHECK_CLIENTS_MAX_NUM ) | |
| + { | |
| + sh_sleepcheck_info_aarm.client[sh_sleepcheck_info_aarm.num_clients - 1].name = NULL; | |
| + sh_sleepcheck_info_aarm.client[sh_sleepcheck_info_aarm.num_clients - 1].block_count = 0; | |
| + sh_sleepcheck_info_aarm.client[sh_sleepcheck_info_aarm.num_clients - 1].multi_count = 0; | |
| + } | |
| + else | |
| + { | |
| + sh_sleepcheck_info_aarm.client[sh_sleepcheck_info_aarm.num_clients].name = NULL; | |
| + sh_sleepcheck_info_aarm.client[sh_sleepcheck_info_aarm.num_clients].block_count = 0; | |
| + sh_sleepcheck_info_aarm.client[sh_sleepcheck_info_aarm.num_clients].multi_count = 0; | |
| + } | |
| + | |
| + Temp_high = sh_sleepcheck_info_aarm.curr_not_okts_mask; | |
| + Temp_low = sh_sleepcheck_info_aarm.curr_not_okts_mask; | |
| + Temp_high = Temp_high >> 1; | |
| + Temp_high = Temp_high & ( 0xFFFFFFFFFFFFFFFFULL << index1 ); | |
| + Temp_low = Temp_low & ~( 0xFFFFFFFFFFFFFFFFULL << index1 ); | |
| + sh_sleepcheck_info_aarm.curr_not_okts_mask = Temp_high | Temp_low; | |
| + | |
| + sh_sleepcheck_info_aarm.num_clients--; | |
| + | |
| +// pr_info( "%s() : %s is unregister. (clients_num=%d)\n", __func__, name, sh_sleepcheck_info_aarm.num_clients ); | |
| + } | |
| + } | |
| + } | |
| +} | |
| +EXPORT_SYMBOL( sh_sleepcheck_unregister ); | |
| + | |
| +void sh_sleepcheck_negate_okts( const char *name ) | |
| +{ | |
| + uint8_t index; | |
| + uint64_t Temp; | |
| + | |
| + for( index = 0; index < sh_sleepcheck_info_aarm.num_clients; index++ ) | |
| + { | |
| + if( name == sh_sleepcheck_info_aarm.client[index].name ) | |
| + { | |
| + Temp = 1 << index; | |
| + sh_sleepcheck_info_aarm.curr_not_okts_mask |= Temp; | |
| +// pr_info( "%s() : %s is negate okts.\n", __func__, name ); | |
| + break; | |
| + } | |
| + } | |
| +} | |
| +EXPORT_SYMBOL( sh_sleepcheck_negate_okts ); | |
| + | |
| +void sh_sleepcheck_assert_okts( const char *name ) | |
| +{ | |
| + uint8_t index; | |
| + uint64_t Temp; | |
| + | |
| + for( index = 0; index < sh_sleepcheck_info_aarm.num_clients; index++ ) | |
| + { | |
| + if( name == sh_sleepcheck_info_aarm.client[index].name ) | |
| + { | |
| + Temp = 1 << index; | |
| + sh_sleepcheck_info_aarm.curr_not_okts_mask &= ~Temp; | |
| +// pr_info( "%s() : %s is assert okts.\n", __func__, name ); | |
| + break; | |
| + } | |
| + } | |
| +} | |
| +EXPORT_SYMBOL( sh_sleepcheck_assert_okts ); | |
| + | |
| +void sh_sleepcheck_suspend_count( void ) | |
| +{ | |
| + int i; | |
| + | |
| + sh_sleepcheck_info_aarm.sleep_count++; | |
| + | |
| + /* when sleep count overflows, other counts are cleared. */ | |
| + if(sh_sleepcheck_info_aarm.sleep_count == 0) | |
| + { | |
| + for (i = 0; i < SH_SLEEPCHECK_CLIENTS_MAX_NUM; i++) | |
| + { | |
| + sh_sleepcheck_info_aarm.client[i].block_count = 0; | |
| + } | |
| + sh_sleepcheck_info_aarm.block_count = 0; | |
| + sh_sleepcheck_info_aarm.sleep_count = 1; | |
| + } | |
| +} | |
| +EXPORT_SYMBOL( sh_sleepcheck_suspend_count ); | |
| + | |
| +void sh_sleepcheck_suspend_block_count( void ) | |
| +{ | |
| + sh_sleepcheck_info_aarm.block_count++; | |
| +} | |
| +EXPORT_SYMBOL( sh_sleepcheck_suspend_block_count ); | |
| + | |
| +void sh_sleepcheck_block_count_client( const char *name, int type ) | |
| +{ | |
| + uint8_t index; | |
| + | |
| + if( type == WAKE_LOCK_SUSPEND ) | |
| + { | |
| + for( index = 0; index < sh_sleepcheck_info_aarm.num_clients; index++ ) | |
| + { | |
| + if( name == sh_sleepcheck_info_aarm.client[index].name ) | |
| + { | |
| + sh_sleepcheck_info_aarm.client[index].block_count++; | |
| + break; | |
| + } | |
| + } | |
| + } | |
| +} | |
| +EXPORT_SYMBOL( sh_sleepcheck_block_count_client ); | |
| + | |
| +void sh_sleepcheck_clock_name_init( const char *name, unsigned n ) | |
| +{ | |
| + if( n < SH_SLEEPCHECK_CLIENTS_MAX_NUM ) | |
| + { | |
| + sh_sleepcheck_info_clk.clock[n].name = name; | |
| +// pr_info( "%s() : clock_name[%d] = %s \n", __func__, n, sh_sleepcheck_info_clk.clock[n].name ); | |
| + } | |
| +} | |
| +EXPORT_SYMBOL( sh_sleepcheck_clock_name_init ); | |
| + | |
| +void sh_sleepcheck_clock_enable( const char *name ) | |
| +{ | |
| + uint8_t index; | |
| + | |
| + for( index = 0; index < SH_SLEEPCHECK_CLIENTS_MAX_NUM; index++ ) | |
| + { | |
| + if( name == sh_sleepcheck_info_clk.clock[index].name ) | |
| + { | |
| + sh_sleepcheck_info_clk.clock[index].onoffflag = 1; | |
| + sh_sleepcheck_info_clk.num_clocks++; | |
| + if (debug_mask & DEBUG_CLOCK) | |
| + { | |
| + pr_info( "%s() : clock_name =%s, onoffflag =%u num_clocks =%u \n", __func__, name, sh_sleepcheck_info_clk.clock[index].onoffflag, sh_sleepcheck_info_clk.num_clocks ); | |
| + } | |
| + break; | |
| + } | |
| + } | |
| +} | |
| +EXPORT_SYMBOL( sh_sleepcheck_clock_enable ); | |
| + | |
| +void sh_sleepcheck_clock_disable( const char *name ) | |
| +{ | |
| + uint8_t index; | |
| + | |
| + for( index = 0; index < SH_SLEEPCHECK_CLIENTS_MAX_NUM; index++ ) | |
| + { | |
| + if( name == sh_sleepcheck_info_clk.clock[index].name ) | |
| + { | |
| + sh_sleepcheck_info_clk.clock[index].onoffflag = 0; | |
| + sh_sleepcheck_info_clk.num_clocks--; | |
| + if (debug_mask & DEBUG_CLOCK) | |
| + { | |
| + pr_info( "%s() : clock_name =%s, onoffflag =%u num_clocks =%u \n", __func__, name, sh_sleepcheck_info_clk.clock[index].onoffflag, sh_sleepcheck_info_clk.num_clocks ); | |
| + } | |
| + break; | |
| + } | |
| + } | |
| +} | |
| +EXPORT_SYMBOL( sh_sleepcheck_clock_disable ); | |
| + | |
| +/* -------------------------------------------------------------------------- | |
| + * probe/remove function | |
| + * -------------------------------------------------------------------------- */ | |
| +static int sh_sleepcheck_probe( struct platform_device *pdev ) | |
| +{ | |
| + int ret = 0; | |
| + | |
| + pr_info( "%s() : Called.\n", __func__ ); | |
| + | |
| + /* Create attributes */ | |
| + ret = sysfs_create_group( &pdev->dev.kobj, &sh_sleepcheck_attr_group ); | |
| + if ( ret ) | |
| + { | |
| + pr_err( "%s() : Device create failed.\n", __func__ ); | |
| + return ret; | |
| + } | |
| + | |
| + /* Get RPC endpoint */ | |
| + sleepcheck_ep = msm_rpc_connect_compatible( SHSYS_A2M_PROG, SHSYS_A2M_VERS, 0 ); | |
| + if( IS_ERR(sleepcheck_ep) ) | |
| + { | |
| + pr_err( "%s(): init rpc failed! rc = %ld PROG = %08x vers = %08x\n", | |
| + __func__, | |
| + PTR_ERR(sleepcheck_ep), | |
| + SHSYS_A2M_PROG, | |
| + SHSYS_A2M_VERS ); | |
| + ret = PTR_ERR(sleepcheck_ep); | |
| + } | |
| + | |
| + return ret; | |
| +} | |
| + | |
| +static int sh_sleepcheck_remove( struct platform_device *pdev ) | |
| +{ | |
| + sysfs_remove_group( &pdev->dev.kobj, &sh_sleepcheck_attr_group ); | |
| + | |
| + return 0; | |
| +} | |
| + | |
| +/* -------------------------------------------------------------------------- | |
| + * show/store function | |
| + * -------------------------------------------------------------------------- */ | |
| +static ssize_t sh_sleepcheck_show( struct device *dev, struct device_attribute *attr, char *buf ) | |
| +{ | |
| + sh_sleepcheck_rpc_rsp sleepcheck_info_marm; | |
| + sh_sleepcheck_rpc_req sleepcheck_rpc_req; | |
| + sleepcheck_aarm_time *sleep_info_aarm = NULL; | |
| + unsigned long active_lock_num; | |
| + unsigned long long not_okts_mask; | |
| + unsigned long long marm_clients; | |
| + struct timespec ts; | |
| + ssize_t len = 0; | |
| + int64_t temp_timestamp_nsec; | |
| + int ret; | |
| + | |
| + /* --------------------------------------------------------------------- */ | |
| + /* Get mARM sleep information by RPC */ | |
| + /* --------------------------------------------------------------------- */ | |
| + memset( &sleepcheck_info_marm, 0x00, sizeof(sleepcheck_info_marm) ); | |
| + ret = msm_rpc_call_reply( sleepcheck_ep, SHSYS_SLEEP_INFO_PROC, | |
| + &sleepcheck_rpc_req, sizeof(sh_sleepcheck_rpc_req), | |
| + &sleepcheck_info_marm, sizeof(sh_sleepcheck_rpc_rsp), 5 * HZ); | |
| + if ( ret < 0 ) | |
| + { | |
| + pr_err( "%s(): shsys mARM call remote error ! ret = %d\n", __func__, ret ); | |
| + return (ssize_t)ret; | |
| + } | |
| + | |
| + /* --------------------------------------------------------------------- */ | |
| + /* Get aARM sleep information */ | |
| + /* --------------------------------------------------------------------- */ | |
| + sleep_info_aarm = sh_sleepcheck_get_time(); | |
| + | |
| + /* Active time culculate from time stamp of mARM */ | |
| + sleepcheck_info_marm.timestamp = be32_to_cpu( sleepcheck_info_marm.timestamp ); /* Get mARM time stamp */ | |
| + ts.tv_sec = sleepcheck_info_marm.timestamp >> 15; /* Convert to second */ | |
| + ts.tv_nsec = 0; | |
| + temp_timestamp_nsec = timespec_to_ns( &ts ); /* Convert to nano second */ | |
| + temp_timestamp_nsec = temp_timestamp_nsec - ((sleep_info_aarm->t_halt) + (sleep_info_aarm->t_pc)); | |
| + ts = ns_to_timespec( temp_timestamp_nsec ); | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%08lx", ts.tv_sec ); | |
| + pr_info( "%s() : aarm act =%08lx sec %08lx nsec\n", __func__, ts.tv_sec, ts.tv_nsec ); | |
| + | |
| + /* Halt time */ | |
| + ts = ns_to_timespec( sleep_info_aarm->t_halt ); | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%08lx", ts.tv_sec ); | |
| + pr_info( "%s() : halt=%08lx sec %08lx nsec\n", __func__, ts.tv_sec, ts.tv_nsec ); | |
| + | |
| + /* TCXO down time */ | |
| + ts = ns_to_timespec( sleep_info_aarm->t_tcxo_off ); | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%08lx", ts.tv_sec ); | |
| + pr_info( "%s() : tcxo=%08lx sec %08lx nsec\n", __func__, ts.tv_sec, ts.tv_nsec ); | |
| + | |
| + /* PC time */ | |
| + ts = ns_to_timespec( sleep_info_aarm->t_pc ); | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%08lx", ts.tv_sec ); | |
| + pr_info( "%s() : pc =%08lx sec %08lx nsec\n", __func__, ts.tv_sec, ts.tv_nsec ); | |
| + | |
| + /* Active wake lock num */ | |
| + active_lock_num = sh_sleepcheck_get_clients(); | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%08lx", active_lock_num ); | |
| + pr_info( "%s() : active_lock_num=%08lx\n", __func__, active_lock_num ); | |
| + | |
| + /* Not okts task */ | |
| + not_okts_mask = sh_sleepcheck_info_aarm.curr_not_okts_mask; | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%016llx", not_okts_mask ); | |
| + pr_info( "%s() : not_okts_clients=%016llx\n", __func__, not_okts_mask ); | |
| + | |
| + /* --------------------------------------------------------------------- */ | |
| + /* mARM sleep information */ | |
| + /* --------------------------------------------------------------------- */ | |
| + /* Time stamp */ | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%08lx", sleepcheck_info_marm.timestamp ); | |
| + | |
| + /* Active time */ | |
| + sleepcheck_info_marm.t_active = be32_to_cpu( sleepcheck_info_marm.t_active ); | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%08lx", sleepcheck_info_marm.t_active ); | |
| + | |
| + /* Halt time */ | |
| + sleepcheck_info_marm.t_halt = be32_to_cpu( sleepcheck_info_marm.t_halt ); | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%08lx", sleepcheck_info_marm.t_halt ); | |
| + | |
| + /* TCXO down time */ | |
| + sleepcheck_info_marm.t_tcxo_off = be32_to_cpu( sleepcheck_info_marm.t_tcxo_off ); | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%08lx", sleepcheck_info_marm.t_tcxo_off ); | |
| + | |
| + /* Not okts flag */ | |
| + sleepcheck_info_marm.sigs = be32_to_cpu( sleepcheck_info_marm.sigs ); | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%08lx", sleepcheck_info_marm.sigs ); | |
| + | |
| + /* Not okts task */ | |
| + sleepcheck_info_marm.clients_high = be32_to_cpu( sleepcheck_info_marm.clients_high ); | |
| + sleepcheck_info_marm.clients_low = be32_to_cpu( sleepcheck_info_marm.clients_low ); | |
| + marm_clients = ((unsigned long long)sleepcheck_info_marm.clients_high << 32); | |
| + marm_clients += (unsigned long long)sleepcheck_info_marm.clients_low; | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%016llx", marm_clients ); | |
| + | |
| + pr_info( "%s() : marm : ts=%08lx, act=%08lx, halt=%08lx, tcxo=%08lx, sigs=%08lx, clnt=%016llx\n", | |
| + __func__, | |
| + sleepcheck_info_marm.timestamp, | |
| + sleepcheck_info_marm.t_active, | |
| + sleepcheck_info_marm.t_halt, | |
| + sleepcheck_info_marm.t_tcxo_off, | |
| + sleepcheck_info_marm.sigs, | |
| + marm_clients ); | |
| + | |
| + return len; | |
| +} | |
| + | |
| +static ssize_t sh_sleepcheck_count_m_show( struct device *dev, struct device_attribute *attr, char *buf ) | |
| +{ | |
| + sh_sleepcheck_clt_rpc_rsp sleepcheck_count; | |
| + sh_sleepcheck_rpc_req sleepcheck_rpc_req; | |
| + ssize_t len = 0; | |
| + int ret; | |
| + int i; | |
| + unsigned char c_num; | |
| + | |
| + /* --------------------------------------------------------------------- */ | |
| + /* Get mARM sleep count by RPC */ | |
| + /* --------------------------------------------------------------------- */ | |
| + memset( &sleepcheck_count, 0x00, sizeof(sh_sleepcheck_clt_rpc_rsp) ); | |
| + ret = msm_rpc_call_reply( sleepcheck_ep, SHSYS_SLEEP_COUNTS_GET_PROC, | |
| + &sleepcheck_rpc_req, sizeof(sh_sleepcheck_rpc_req), | |
| + &sleepcheck_count, sizeof(sh_sleepcheck_clt_rpc_rsp), 5 * HZ); | |
| + if ( ret < 0 ) | |
| + { | |
| + pr_err( "%s(): shsys mARM call remote error ! ret = %d\n", __func__, ret ); | |
| + return (ssize_t)ret; | |
| + } | |
| + | |
| + /* client num */ | |
| + sleepcheck_count.client_num = be32_to_cpu( sleepcheck_count.client_num ); | |
| + c_num = (unsigned char)sleepcheck_count.client_num; | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%02x", c_num ); | |
| + pr_info( "%s() : marm client_num =%02X \n", __func__, c_num ); | |
| + /* client blocked count */ | |
| + for (i = 0; i < SH_SLEEPCHECK_CLIENTS_MAX_NUM; i++) | |
| + { | |
| + sleepcheck_count.client_info[i] = be32_to_cpu( sleepcheck_count.client_info[i] ); | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%08lx", sleepcheck_count.client_info[i] ); | |
| + pr_info( "%s() : marm client_info[%d] =%08lX \n", __func__, i, sleepcheck_count.client_info[i] ); | |
| + } | |
| + /* blocked count */ | |
| + sleepcheck_count.blocked_count = be32_to_cpu( sleepcheck_count.blocked_count ); | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%08lx", sleepcheck_count.blocked_count ); | |
| + pr_info( "%s() : marm blocked_count =%08lX \n", __func__, sleepcheck_count.blocked_count ); | |
| + /* tasks count */ | |
| + sleepcheck_count.tasks_count = be32_to_cpu( sleepcheck_count.tasks_count ); | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%08lx", sleepcheck_count.tasks_count ); | |
| + pr_info( "%s() : marm tasks_count =%08lX \n", __func__, sleepcheck_count.tasks_count ); | |
| + | |
| + pr_info( "%s() : read len =%d \n", __func__, len ); | |
| + | |
| + return len; | |
| +} | |
| + | |
| +static ssize_t sh_sleepcheck_count_m_store( struct device *dev, struct device_attribute *attr, const char *buf, size_t count ) | |
| +{ | |
| + sh_sleepcheck_clt_clear_rpc_rsp sleepcheck_count_clr; | |
| + sh_sleepcheck_rpc_req sleepcheck_rpc_req; | |
| + int ret = 0; | |
| + | |
| + if( !*buf ) | |
| + { | |
| + return (ssize_t)ret; | |
| + } | |
| + | |
| + /* --------------------------------------------------------------------- */ | |
| + /* Clear mARM sleep count by RPC */ | |
| + /* --------------------------------------------------------------------- */ | |
| + memset( &sleepcheck_count_clr, 0x00, sizeof(sh_sleepcheck_clt_clear_rpc_rsp) ); | |
| + ret = msm_rpc_call_reply( sleepcheck_ep, SHSYS_SLEEP_COUNTS_CLEAR_PROC, | |
| + &sleepcheck_rpc_req, sizeof(sh_sleepcheck_rpc_req), | |
| + &sleepcheck_count_clr, sizeof(sh_sleepcheck_clt_clear_rpc_rsp), 5 * HZ); | |
| + if ( ret < 0 ) | |
| + { | |
| + pr_err( "%s(): shsys mARM call remote error ! ret = %d\n", __func__, ret ); | |
| + return (ssize_t)ret; | |
| + } | |
| + | |
| + /* clear result */ | |
| + sleepcheck_count_clr.clear_ret = be32_to_cpu( sleepcheck_count_clr.clear_ret ); | |
| + pr_info( "%s() : marm clear_ret =%lu \n", __func__, sleepcheck_count_clr.clear_ret ); | |
| + | |
| + return (ssize_t)sleepcheck_count_clr.clear_ret; | |
| +} | |
| + | |
| +static ssize_t sh_sleepcheck_name_m_show( struct device *dev, struct device_attribute *attr, char *buf ) | |
| +{ | |
| + ssize_t len = 0; | |
| + int i; | |
| + char *smem_clt_name; | |
| + unsigned smem_size; | |
| + | |
| + /* --------------------------------------------------------------------- */ | |
| + /* Get mARM sleep client name by SMEM */ | |
| + /* --------------------------------------------------------------------- */ | |
| + smem_clt_name = smem_get_entry( SMEM_SLEEP_STATIC, &smem_size ); | |
| + if( smem_clt_name != NULL ) | |
| + { | |
| + for (i = 0; i < SH_SLEEPCHECK_CLIENTS_MAX_NUM; i++) | |
| + { | |
| + scnprintf( buf + len, PAGE_SIZE - len, "%s", smem_clt_name + i * (SH_SLEEP_CLIENT_LIST_MAX_STR_MARM + 1) ); | |
| + len += SH_SLEEP_CLIENT_LIST_MAX_STR_MARM + 1; | |
| + pr_info( "%s() : marm client_name[%d] =%s \n", __func__, i + 1, smem_clt_name + i * (SH_SLEEP_CLIENT_LIST_MAX_STR_MARM + 1) ); | |
| + } | |
| + } | |
| + else | |
| + { | |
| + pr_info( "%s() : get smem address failed.\n", __func__ ); | |
| + } | |
| + | |
| + pr_info( "%s() : read len =%d \n", __func__, len ); | |
| + | |
| + return len; | |
| +} | |
| + | |
| +static ssize_t sh_sleepcheck_count_a_show( struct device *dev, struct device_attribute *attr, char *buf ) | |
| +{ | |
| + ssize_t len = 0; | |
| + int i; | |
| + | |
| + /* --------------------------------------------------------------------- */ | |
| + /* Get aARM sleep count */ | |
| + /* --------------------------------------------------------------------- */ | |
| + /* client num */ | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%02x", sh_sleepcheck_info_aarm.num_clients ); | |
| + pr_info( "%s() : aarm num_clients =%02X \n", __func__, sh_sleepcheck_info_aarm.num_clients ); | |
| + /* client blocked count */ | |
| + for (i = 0; i < SH_SLEEPCHECK_CLIENTS_MAX_NUM; i++) | |
| + { | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%08lx", sh_sleepcheck_info_aarm.client[i].block_count ); | |
| + pr_info( "%s() : aarm block_count[%d] =%08lX \n", __func__, i, sh_sleepcheck_info_aarm.client[i].block_count ); | |
| + } | |
| + /* blocked count */ | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%08lx", sh_sleepcheck_info_aarm.block_count ); | |
| + pr_info( "%s() : aarm block_count =%08lX \n", __func__, sh_sleepcheck_info_aarm.block_count ); | |
| + /* sleep count */ | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%08lx", sh_sleepcheck_info_aarm.sleep_count ); | |
| + pr_info( "%s() : aarm sleep_count =%08lX \n", __func__, sh_sleepcheck_info_aarm.sleep_count ); | |
| + | |
| + pr_info( "%s() : read len =%d \n", __func__, len ); | |
| + | |
| + return len; | |
| +} | |
| + | |
| +static ssize_t sh_sleepcheck_count_a_store( struct device *dev, struct device_attribute *attr, const char *buf, size_t count ) | |
| +{ | |
| + int i; | |
| + | |
| + if( !*buf ) | |
| + { | |
| + return 0; | |
| + } | |
| + | |
| + /* --------------------------------------------------------------------- */ | |
| + /* Clear aARM sleep count */ | |
| + /* --------------------------------------------------------------------- */ | |
| + /* client blocked count */ | |
| + for (i = 0; i < SH_SLEEPCHECK_CLIENTS_MAX_NUM; i++) | |
| + { | |
| + sh_sleepcheck_info_aarm.client[i].block_count = 0; | |
| + } | |
| + /* blocked count */ | |
| + sh_sleepcheck_info_aarm.block_count = 0; | |
| + /* sleep count */ | |
| + sh_sleepcheck_info_aarm.sleep_count = 0; | |
| + | |
| + return 1; | |
| +} | |
| + | |
| +static ssize_t sh_sleepcheck_name_a_show( struct device *dev, struct device_attribute *attr, char *buf ) | |
| +{ | |
| + char temp_buf[SH_SLEEP_CLIENT_LIST_MAX_STR_AARM + 1] = {0}; | |
| + ssize_t len = 0; | |
| + int i; | |
| + | |
| + /* --------------------------------------------------------------------- */ | |
| + /* Get aARM sleep client name */ | |
| + /* --------------------------------------------------------------------- */ | |
| + for (i = 0; i < sh_sleepcheck_info_aarm.num_clients; i++) | |
| + { | |
| + if(sh_sleepcheck_info_aarm.client[i].name != NULL) | |
| + { | |
| + strncpy( temp_buf, sh_sleepcheck_info_aarm.client[i].name, SH_SLEEP_CLIENT_LIST_MAX_STR_AARM ); | |
| + scnprintf( buf + len, PAGE_SIZE - len, "%s", temp_buf ); | |
| + pr_info( "%s() : aarm client_name[%d] =%s \n", __func__, i + 1, temp_buf ); | |
| + } | |
| + else | |
| + { | |
| + pr_info( "%s() : aarm client_name[%d] = NULL!! \n", __func__, i + 1 ); | |
| + } | |
| + len += SH_SLEEP_CLIENT_LIST_MAX_STR_AARM + 1; | |
| + } | |
| + | |
| + pr_info( "%s() : read len =%d \n", __func__, len ); | |
| + | |
| + return len; | |
| +} | |
| + | |
| +static ssize_t sh_sleepcheck_num_clk_show( struct device *dev, struct device_attribute *attr, char *buf ) | |
| +{ | |
| + ssize_t len = 0; | |
| + | |
| + /* --------------------------------------------------------------------- */ | |
| + /* Get "CLKREGIM" enable clock num */ | |
| + /* --------------------------------------------------------------------- */ | |
| + /* clock num */ | |
| + len += scnprintf( buf + len, PAGE_SIZE - len, "%02x", sh_sleepcheck_info_clk.num_clocks ); | |
| + pr_info( "%s() : num_clocks =%u \n", __func__, sh_sleepcheck_info_clk.num_clocks ); | |
| + | |
| + pr_info( "%s() : read len =%d \n", __func__, len ); | |
| + | |
| + return len; | |
| +} | |
| + | |
| +static ssize_t sh_sleepcheck_name_clk_show( struct device *dev, struct device_attribute *attr, char *buf ) | |
| +{ | |
| + char temp_buf[SH_SLEEPCHECK_CLKREGIM_LIST_MAX_STR + 1] = {0}; | |
| + ssize_t len = 0; | |
| + int i; | |
| + | |
| + /* --------------------------------------------------------------------- */ | |
| + /* Get "CLKREGIM" enable clock name */ | |
| + /* --------------------------------------------------------------------- */ | |
| + for (i = 0; i < SH_SLEEPCHECK_CLIENTS_MAX_NUM; i++) | |
| + { | |
| + if(sh_sleepcheck_info_clk.clock[i].onoffflag == 1) | |
| + { | |
| + if(sh_sleepcheck_info_clk.clock[i].name != NULL) | |
| + { | |
| + strncpy( temp_buf, sh_sleepcheck_info_clk.clock[i].name, SH_SLEEPCHECK_CLKREGIM_LIST_MAX_STR ); | |
| + scnprintf( buf + len, PAGE_SIZE - len, "%s", temp_buf ); | |
| + pr_info( "%s() : clock_name[%d] =%s \n", __func__, i + 1 |
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