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@summivox
Created August 21, 2023 06:37
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Minimal example of DCD support in `imxrt-rs`
use std::io::Result;
use imxrt_ral as ral;
macro_rules! reg_addr {
($block:expr, $reg:ident) => {
unsafe { ::core::ptr::addr_of!((*($block)).$reg) as u32 }
}
}
fn build_dcd() -> Result<()> {
use imxrt_dcd::*;
let command = [
// clock gating for GPIO2
Command::Write(Write {
width: Width::B4,
op: WriteOp::Set,
address: reg_addr!(ral::ccm::CCM, CCGR0),
value: (0b11 << ral::ccm::CCGR0::CG15::offset),
})
// clock gating for IOMUXC
Command::Write(Write {
width: Width::B4,
op: WriteOp::Set,
address: reg_addr!(ral::ccm::CCM, CCGR4),
value: (0b11 << ral::ccm::CCGR4::CG1::offset),
})
// LED pin mux to GPIO
Command::Write(Write {
width: Width::B4,
op: WriteOp::Write,
address: reg_addr!(ral::iomuxc::IOMUXC, SW_MUX_CTL_PAD_GPIO_B0_03),
value: 5,
})
// LED pin config --- max strength output
Command::Write(Write {
width: Width::B4,
op: WriteOp::Write,
address: reg_addr!(ral::iomuxc::IOMUXC, SW_PAD_CTL_PAD_GPIO_B0_03),
value: (0b111 << ral::iomuxc::SW_PAD_CTL_PAD_GPIO_B0_03::DSE::offset),
})
Command::Check(Check {
width: Width::B4,
cond: CheckCond::AllSet,
address: reg_addr!(ral::iomuxc::IOMUXC, SW_PAD_CTL_PAD_GPIO_B0_03),
mask: (7 << 3),
count: None,
})
];
let path = std::path::PathBuf::from(std::env::var_os("OUT_DIR").unwrap()).join("dcd.bin");
let f = std::fs::File::create(&path)?;
serialize(f, &command)?;
Ok(())
}
#![no_std]
#![no_main]
use imxrt_ral as ral;
use teensy4_fcb as _;
use teensy4_panic as _;
mod led; // omitted (this really is just teensy4_panic with everything public)
/***************************************************/
static_include_bytes!(
#[no_mangle]
#[link_section = ".dcd"]
DCD = concat!(env!("OUT_DIR"), "/dcd.bin")
);
/***************************************************/
#[imxrt_rt::entry]
fn main() -> ! {
const D1: led::DelayTicks = led::DelayTicks::new(1);
const D3: led::DelayTicks = led::DelayTicks::new(3);
const D6: led::DelayTicks = led::DelayTicks::new(6);
const D9: led::DelayTicks = led::DelayTicks::new(9);
let iomuxc = unsafe { ral::iomuxc::IOMUXC::instance() };
let mux_reg = ral::read_reg!(ral::iomuxc, iomuxc, SW_MUX_CTL_PAD_GPIO_B0_03);
let pad_reg = ral::read_reg!(ral::iomuxc, iomuxc, SW_PAD_CTL_PAD_GPIO_B0_03);
let mut led = unsafe { led::Led::new() };
for i in 0..8 {
led.set();
led::delay(if (mux_reg & (1 << i)) != 0 { D3 } else { D1 });
led.clear();
led::delay(if (mux_reg & (1 << i)) != 0 { D1 } else { D3 });
}
led::delay(D9);
for i in 0..16 {
led.set();
led::delay(if (pad_reg & (1 << i)) != 0 { D3 } else { D1 });
led.clear();
led::delay(if (pad_reg & (1 << i)) != 0 { D1 } else { D3 });
}
loop{}
}
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