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svmlegacy/X5670 Corefreq

Created April 26, 2021 23:44
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Dual Intel Xeon X5670 Corefreq Info
Raw
X5670 Corefreq
$ ./corefreq-cli -s
Processor [Intel(R) Xeon(R) CPU X5670 @ 2.93GHz]
|- Architecture [Westmere/EP]
|- Vendor ID [GenuineIntel]
|- Microcode [0x0000001f]
|- Signature [ 06_2C]
|- Stepping [ 2]
|- Online CPU [ 24/ 24]
|- Base Clock [133.295]
|- Frequency (MHz) Ratio
Min 1599.54 < 12 >
Max 2932.49 < 22 >
|- Factory [133.333]
2930 [ 22 ]
|- Performance
|- P-State
TGT 3065.79 < 23 >
|- Turbo Boost [ LOCK]
1C 3332.38 < 25 >
2C 3332.38 < 25 >
3C 3199.08 < 24 >
4C 3199.08 < 24 >
5C 3199.08 < 24 >
6C 3199.08 < 24 >
|- Uncore [ LOCK]
Min 2665.90 [ 20 ]
Max 2665.90 [ 20 ]
|- TDP Level [ 0:0 ]
|- Programmable [ LOCK]
|- Configuration [ LOCK]
|- Turbo Activation [ LOCK]
Instruction Set Extensions
|- 3DNow!/Ext [N/N] ADX [N] AES [Y] AVX/AVX2 [N/N]
|- AVX512-F [N] AVX512-DQ [N] AVX512-IFMA [N] AVX512-PF [N]
|- AVX512-ER [N] AVX512-CD [N] AVX512-BW [N] AVX512-VL [N]
|- AVX512-VBMI [N] AVX512-VBMI2 [N] AVX512-VNMI [N] AVX512-ALG [N]
|- AVX512-VPOP [N] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N]
|- AVX512-BF16 [N] BMI1/BMI2 [N/N] CLWB [N] CLFLUSH/O [Y/N]
|- CLAC-STAC [N] CMOV [Y] CMPXCHG8B [Y] CMPXCHG16B [Y]
|- F16C [N] FPU [Y] FXSR [Y] LAHF-SAHF [Y]
|- MMX/Ext [Y/N] MON/MWAITX [Y/N] MOVBE [N] PCLMULQDQ [Y]
|- POPCNT [Y] RDRAND [N] RDSEED [N] RDTSCP [Y]
|- SEP [Y] SHA [N] SSE [Y] SSE2 [Y]
|- SSE3 [Y] SSSE3 [Y] SSE4.1/4A [Y/N] SSE4.2 [Y]
|- SERIALIZE [N] SYSCALL [Y] SGX [N] RDPID [N]
Features
|- 1 GB Pages Support 1GB-PAGES [Capable]
|- Advanced Configuration & Power Interface ACPI [Capable]
|- Advanced Programmable Interrupt Controller APIC [Capable]
|- Core Multi-Processing CMP Legacy [Missing]
|- L1 Data Cache Context ID CNXT-ID [Missing]
|- Direct Cache Access DCA [Capable]
|- Debugging Extension DE [Capable]
|- Debug Store & Precise Event Based Sampling DS, PEBS [Capable]
|- CPL Qualified Debug Store DS-CPL [Capable]
|- 64-Bit Debug Store DTES64 [Capable]
|- Fast-String Operation Fast-Strings [Missing]
|- Fused Multiply Add FMA | FMA4 [Missing]
|- Hardware Lock Elision HLE [Missing]
|- Instruction Based Sampling IBS [Missing]
|- Long Mode 64 bits IA64 | LM [Capable]
|- LightWeight Profiling LWP [Missing]
|- Machine-Check Architecture MCA [Capable]
|- Memory Protection Extensions MPX [Missing]
|- Model Specific Registers MSR [Capable]
|- Memory Type Range Registers MTRR [Capable]
|- OS-Enabled Ext. State Management OSXSAVE [Missing]
|- Physical Address Extension PAE [Capable]
|- Page Attribute Table PAT [Capable]
|- Pending Break Enable PBE [Capable]
|- Process Context Identifiers PCID [Capable]
|- Perfmon and Debug Capability PDCM [Capable]
|- Page Global Enable PGE [Capable]
|- Page Size Extension PSE [Capable]
|- 36-bit Page Size Extension PSE36 [Capable]
|- Processor Serial Number PSN [Missing]
|- Resource Director Technology/PQE RDT-A [Missing]
|- Resource Director Technology/PQM RDT-M [Missing]
|- Restricted Transactional Memory RTM [Missing]
|- Safer Mode Extensions SMX [Capable]
|- Self-Snoop SS [Capable]
|- Supervisor-Mode Access Prevention SMAP [Missing]
|- Supervisor-Mode Execution Prevention SMEP [Missing]
|- Time Stamp Counter TSC [Invariant]
|- Time Stamp Counter Deadline TSC-DEADLINE [Missing]
|- TSX Force Abort MSR Register TSX-ABORT [Missing]
|- TSX Suspend Load Address Tracking TSX-LDTRK [Missing]
|- User-Mode Instruction Prevention UMIP [Missing]
|- Virtual Mode Extension VME [Capable]
|- Virtual Machine Extensions VMX [Capable]
|- Extended xAPIC Support x2APIC [Missing]
|- Execution Disable Bit Support XD-Bit [Capable]
|- XSAVE/XSTOR States XSAVE [Missing]
|- xTPR Update Control xTPR [Capable]
Mitigation mechanisms
|- Indirect Branch Restricted Speculation IBRS [Capable]
|- Indirect Branch Prediction Barrier IBPB [Capable]
|- Single Thread Indirect Branch Predictor STIBP [Capable]
|- Speculative Store Bypass Disable SSBD [Capable]
|- Writeback & invalidate the L1 data cache L1D-FLUSH [Capable]
|- Hypervisor - No flush L1D on VM entry L1DFL_VMENTRY_NO [Missing]
|- Architectural - Buffer Overwriting MD-CLEAR [Missing]
|- Architectural - Rogue Data Cache Load RDCL_NO [Missing]
|- Architectural - Enhanced IBRS IBRS_ALL [Missing]
|- Architectural - Return Stack Buffer Alternate RSBA [Missing]
|- Architectural - Speculative Store Bypass SSB_NO [Missing]
|- Architectural - Microarchitectural Data Sampling MDS_NO [Missing]
|- Architectural - TSX Asynchronous Abort TAA_NO [Missing]
|- Architectural - Page Size Change MCE PSCHANGE_MC_NO [Missing]
|- Architectural - Split Locked Access Exception SPLA [Missing]
Technologies
|- Data Cache Unit
|- L1 Prefetcher L1 HW < ON>
|- L1 IP Prefetcher L1 HW IP < ON>
|- L2 Prefetcher L2 HW < ON>
|- L2 Line Prefetcher L2 HW CL < ON>
|- System Management Mode SMM-Dual [ ON]
|- Hyper-Threading HTT [ ON]
|- SpeedStep EIST < ON>
|- Dynamic Acceleration IDA [ ON]
|- Turbo Boost TURBO < ON>
|- Race To Halt Optimization R2H <OFF>
|- Virtualization VMX [ ON]
|- I/O MMU VT-d [ ON]
|- Hypervisor [OFF]
|- Vendor ID [ N/A]
Performance Monitoring
|- Version PM [ 3]
|- Counters: General Fixed
| 4 x 48 bits 3 x 48 bits
|- Enhanced Halt State C1E <OFF>
|- C1 Auto Demotion C1A <OFF>
|- C3 Auto Demotion C3A <OFF>
|- C1 UnDemotion C1U <OFF>
|- C3 UnDemotion C3U <OFF>
|- C6 Core Demotion CC6 <OFF>
|- C6 Module Demotion MC6 <OFF>
|- Legacy Frequency ID control FID [OFF]
|- Legacy Voltage ID control VID [OFF]
|- P-State Hardware Coordination Feedback MPERF/APERF [ ON]
|- Hardware-Controlled Performance States HWP [OFF]
|- Hardware Duty Cycling HDC [OFF]
|- Package C-States
|- Configuration Control CONFIG [ LOCK]
|- Lowest C-State LIMIT < C6>
|- I/O MWAIT Redirection IOMWAIT < Enable>
|- Max C-State Inclusion RANGE < C7>
|- Core C-States
|- C-States Base Address BAR [ 0x914 ]
|- MONITOR/MWAIT
|- State index: #0 #1 #2 #3 #4 #5 #6 #7
|- Sub C-State: 0 2 1 1 0 0 0 0
|- Core Cycles [Capable]
|- Instructions Retired [Capable]
|- Reference Cycles [Missing]
|- Last Level Cache References [Capable]
|- Last Level Cache Misses [Capable]
|- Branch Instructions Retired [Capable]
|- Branch Mispredicts Retired [Capable]
Power, Current & Thermal
|- Clock Modulation ODCM <Disable>
|- DutyCycle [ 0.00%]
|- Power Management PWR MGMT [ UNLOCK]
|- Energy Policy Bias Hint < 6>
|- Energy Policy HWP EPP [ 0]
|- Junction Temperature TjMax [ 0: 96C]
|- Digital Thermal Sensor DTS [Capable]
|- Power Limit Notification PLN [Missing]
|- Package Thermal Management PTM [Missing]
|- Thermal Monitor 1 TM1 [ Enable]
|- Thermal Monitor 2 TM2 [Capable]
|- Thermal Design Power TDP [Missing]
|- Minimum Power Min [Missing]
|- Maximum Power Max [Missing]
|- Package Power Tracking PPT [Missing]
|- Electrical Design Current EDC [Missing]
|- Thermal Design Current TDC [Missing]
|- Units
|- Power watt [ Missing]
|- Energy joule [ Missing]
|- Window second [ Missing]
$ ./corefreq-cli -M
X58/Tylersburg [2D98]
Controller #0 Triple Channel
Bus Rate 6400 MT/s Bus Speed 6398 MT/s DRAM Speed 1332 MHz
Cha CL RCD RP RAS RRD RFC WR RTPr WTPr FAW B2B CWL CMD REFI
#0 9 9 9 24 4 107 10 7 22 20 0 7 1T 318
#1 9 9 9 24 4 107 10 7 22 20 0 7 1T 318
#2 9 9 9 24 4 107 10 7 22 20 0 7 1T 318
ddWR drWR srWR ddRW drRW srRW ddRR drRR srRR ddWW drWW srWW CKE ECC
#0 5 5 16 10 10 11 7 6 4 7 7 4 4 1
#1 5 5 16 10 10 11 7 6 4 7 7 4 4 1
#2 5 5 16 10 10 11 7 6 4 7 7 4 4 1
DIMM Geometry for channel #0
Slot Bank Rank Rows Columns Memory Size (MB)
#0 8 2 32768 2048 8192
#1 8 2 16384 2048 4096
DIMM Geometry for channel #1
Slot Bank Rank Rows Columns Memory Size (MB)
#0 8 2 32768 2048 8192
#1 8 2 16384 2048 4096
DIMM Geometry for channel #2
Slot Bank Rank Rows Columns Memory Size (MB)
#0 8 2 32768 2048 8192
#1 8 2 16384 2048 4096
$ ./corefreq-cli -m
CPU Pkg Apic Core/Thread Caches (w)rite-Back (i)nclusive
# ID ID ID ID L1-Inst Way L1-Data Way L2 Way L3 Way
000:BSP 0 0 0 32768 4 32768 8 262144 8 12582912 16 i
001: 1 32 0 0 32768 4 32768 8 262144 8 12582912 16 i
002: 0 16 8 0 32768 4 32768 8 262144 8 12582912 16 i
003: 1 48 8 0 32768 4 32768 8 262144 8 12582912 16 i
004: 0 4 2 0 32768 4 32768 8 262144 8 12582912 16 i
005: 1 36 2 0 32768 4 32768 8 262144 8 12582912 16 i
006: 0 20 10 0 32768 4 32768 8 262144 8 12582912 16 i
007: 1 52 10 0 32768 4 32768 8 262144 8 12582912 16 i
008: 0 2 1 0 32768 4 32768 8 262144 8 12582912 16 i
009: 1 34 1 0 32768 4 32768 8 262144 8 12582912 16 i
010: 0 18 9 0 32768 4 32768 8 262144 8 12582912 16 i
011: 1 50 9 0 32768 4 32768 8 262144 8 12582912 16 i
012: 0 1 0 1 32768 4 32768 8 262144 8 12582912 16 i
013: 1 33 0 1 32768 4 32768 8 262144 8 12582912 16 i
014: 0 17 8 1 32768 4 32768 8 262144 8 12582912 16 i
015: 1 49 8 1 32768 4 32768 8 262144 8 12582912 16 i
016: 0 5 2 1 32768 4 32768 8 262144 8 12582912 16 i
017: 1 37 2 1 32768 4 32768 8 262144 8 12582912 16 i
018: 0 21 10 1 32768 4 32768 8 262144 8 12582912 16 i
019: 1 53 10 1 32768 4 32768 8 262144 8 12582912 16 i
020: 0 3 1 1 32768 4 32768 8 262144 8 12582912 16 i
021: 1 35 1 1 32768 4 32768 8 262144 8 12582912 16 i
022: 0 19 9 1 32768 4 32768 8 262144 8 12582912 16 i
023: 1 51 9 1 32768 4 32768 8 262144 8 12582912 16 i
$ ./corefreq-cli -k
Linux:
|- Release [5.4.0-67-generic]
|- Version [#75-Ubuntu SMP Fri Feb 19 18:03:38 UTC 2021]
|- Machine [x86_64]
Memory:
|- Total RAM 74208964 KB
|- Shared RAM 9800 KB
|- Free RAM 35530428 KB
|- Buffer RAM 886280 KB
|- Total High 0 KB
|- Free High 0 KB
CPU-Freq driver [ acpi-cpufreq]
Governor [ ondemand]
CPU-Idle driver [ intel_idle]
|- Idle Limit [ C6]
|- State POLL C1 C1E C3 C6
|- CPUIDLE MWAIT 0 MWAIT 0 MWAIT 0 MWAIT 0
|- Power -1 0 0 0 0
|- Latency 0 3 10 20 200
|- Residency 0 6 20 80 800
$ ./corefreq-cli -v
1.84.5
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