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Multiple state var compile results: python chipc/chipmunk.py example_specs/multiple_state.sk example_alus/raw.stateful_alu 3 3 codegen simple serial
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SKETCH version 1.7.5 | |
Benchmark = simple_codegen.sk | |
[0;32m[1554084099.5650 - DEBUG] Running stage 'parse' -- Parse the program from a file[0m | |
[0;31m[1554084099.7080 - ERROR] [SKETCH] Error at node: structure StateAndPacket@ANONYMOUS does not have a field named 'state_group_0_state_1' (at simple_codegen.sk:909)[0m | |
[0;31m[1554084099.7090 - ERROR] [SKETCH] Error at node: Problem with assignment (at simple_codegen.sk:909)[0m | |
[0;31m[1554084099.7091 - ERROR] [SKETCH] Error at node: structure StateAndPacket@ANONYMOUS does not have a field named 'state_group_0_state_1' (at simple_codegen.sk:909)[0m | |
[0;31m[1554084099.7092 - ERROR] [SKETCH] Error at node: The expression state_and_packet.state_group_0_state_1 cannot be typed. (at simple_codegen.sk:910)[0m | |
[0;31m[1554084099.7093 - ERROR] [SKETCH] Error at node: structure StateAndPacket@ANONYMOUS does not have a field named 'state_group_0_state_1' (at simple_codegen.sk:911)[0m | |
[0;31m[1554084099.7094 - ERROR] [SKETCH] Error at node: The expression state_and_packet.state_group_0_state_1 cannot be typed. (at simple_codegen.sk:914)[0m | |
[0;31m[1554084099.7095 - ERROR] [SKETCH] Error at node: structure StateAndPacket@ANONYMOUS does not have a field named 'state_group_0_state_1' (at simple_codegen.sk:915)[0m | |
[0;31m[1554084099.7096 - ERROR] [SKETCH] Error at node: Problem with assignment (at simple_codegen.sk:914)[0m | |
[0;31m[1554084099.7097 - ERROR] [SKETCH] Error at node: The expression state_and_packet.state_group_0_state_1 cannot be typed. (at simple_codegen.sk:914)[0m | |
[0;31m[1554084099.7100 - ERROR] [SKETCH] Error at node: structure StateAndPacket@ANONYMOUS does not have a field named 'state_group_0_state_1' (at simple_codegen.sk:915)[0m | |
[0;31m[1554084099.7210 - ERROR] [SKETCH] Program Parse Error: Semantic check failed[0m | |
[0;32m[1554084099.7211 - DEBUG] [SKETCH] stack trace written to file: /home/taegyunk/.sketch/tmp/stacktrace.txt[0m | |
Total time = 204 | |
Command exited with non-zero status 1 | |
0.77user 0.02system 0:00.38elapsed 210%CPU (0avgtext+0avgdata 84436maxresident)k | |
42192inputs+80outputs (106major+14115minor)pagefaults 0swaps |
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// This is an autogenerated sketch file corresponding to | |
// the router's data path and is used to solve the Chipmunk compilation problem. | |
// program_file = example_specs/multiple_state.sk num_pipeline_stages = 3 | |
// num_alus_per_stage = 3 | |
// num_phv_containers = 3 | |
int simple_stateless_alu_0_0_mux1_ctrl= ??(2); | |
int simple_stateless_alu_0_0_mux2_ctrl= ??(2); | |
int simple_stateless_alu_0_0_opcode= ??(5); | |
int simple_stateless_alu_0_0_immediate= ??(2); | |
int simple_stateless_alu_0_1_mux1_ctrl= ??(2); | |
int simple_stateless_alu_0_1_mux2_ctrl= ??(2); | |
int simple_stateless_alu_0_1_opcode= ??(5); | |
int simple_stateless_alu_0_1_immediate= ??(2); | |
int simple_stateless_alu_0_2_mux1_ctrl= ??(2); | |
int simple_stateless_alu_0_2_mux2_ctrl= ??(2); | |
int simple_stateless_alu_0_2_opcode= ??(5); | |
int simple_stateless_alu_0_2_immediate= ??(2); | |
int simple_stateful_alu_0_0_Mux2_0_global= ??(1); | |
int simple_stateful_alu_0_0_Opt_0_global= ??(1); | |
int simple_stateful_alu_0_0_const_0_global= ??(2); | |
int simple_stateless_alu_1_0_mux1_ctrl= ??(2); | |
int simple_stateless_alu_1_0_mux2_ctrl= ??(2); | |
int simple_stateless_alu_1_0_opcode= ??(5); | |
int simple_stateless_alu_1_0_immediate= ??(2); | |
int simple_stateless_alu_1_1_mux1_ctrl= ??(2); | |
int simple_stateless_alu_1_1_mux2_ctrl= ??(2); | |
int simple_stateless_alu_1_1_opcode= ??(5); | |
int simple_stateless_alu_1_1_immediate= ??(2); | |
int simple_stateless_alu_1_2_mux1_ctrl= ??(2); | |
int simple_stateless_alu_1_2_mux2_ctrl= ??(2); | |
int simple_stateless_alu_1_2_opcode= ??(5); | |
int simple_stateless_alu_1_2_immediate= ??(2); | |
int simple_stateful_alu_1_0_Mux2_0_global= ??(1); | |
int simple_stateful_alu_1_0_Opt_0_global= ??(1); | |
int simple_stateful_alu_1_0_const_0_global= ??(2); | |
int simple_stateless_alu_2_0_mux1_ctrl= ??(2); | |
int simple_stateless_alu_2_0_mux2_ctrl= ??(2); | |
int simple_stateless_alu_2_0_opcode= ??(5); | |
int simple_stateless_alu_2_0_immediate= ??(2); | |
int simple_stateless_alu_2_1_mux1_ctrl= ??(2); | |
int simple_stateless_alu_2_1_mux2_ctrl= ??(2); | |
int simple_stateless_alu_2_1_opcode= ??(5); | |
int simple_stateless_alu_2_1_immediate= ??(2); | |
int simple_stateless_alu_2_2_mux1_ctrl= ??(2); | |
int simple_stateless_alu_2_2_mux2_ctrl= ??(2); | |
int simple_stateless_alu_2_2_opcode= ??(5); | |
int simple_stateless_alu_2_2_immediate= ??(2); | |
int simple_stateful_alu_2_0_Mux2_0_global= ??(1); | |
int simple_stateful_alu_2_0_Opt_0_global= ??(1); | |
int simple_stateful_alu_2_0_const_0_global= ??(2); | |
int simple_stateful_operand_mux_0_0_0_ctrl= ??(2); | |
int simple_stateful_operand_mux_1_0_0_ctrl= ??(2); | |
int simple_stateful_operand_mux_2_0_0_ctrl= ??(2); | |
int simple_output_mux_phv_0_0_ctrl= ??(1); | |
int simple_output_mux_phv_0_1_ctrl= ??(1); | |
int simple_output_mux_phv_0_2_ctrl= ??(1); | |
int simple_output_mux_phv_1_0_ctrl= ??(1); | |
int simple_output_mux_phv_1_1_ctrl= ??(1); | |
int simple_output_mux_phv_1_2_ctrl= ??(1); | |
int simple_output_mux_phv_2_0_ctrl= ??(1); | |
int simple_output_mux_phv_2_1_ctrl= ??(1); | |
int simple_output_mux_phv_2_2_ctrl= ??(1); | |
int simple_salu_config_0_0= ??(1); | |
int simple_salu_config_1_0= ??(1); | |
int simple_salu_config_2_0= ??(1); | |
// Definitions of muxes and ALUs of the router | |
// Operand muxes for each ALU in each stage | |
// Total of 3 * 3 * 3 3-to-1 muxes | |
// The 3 is for two stateless operands and one stateful operand. | |
int simple_stateful_operand_mux_0_0_0(int input0,int input1,int input2, int simple_stateful_operand_mux_0_0_0_ctrl_local) { | |
int mux_ctrl = simple_stateful_operand_mux_0_0_0_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
} | |
int simple_stateful_operand_mux_1_0_0(int input0,int input1,int input2, int simple_stateful_operand_mux_1_0_0_ctrl_local) { | |
int mux_ctrl = simple_stateful_operand_mux_1_0_0_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
} | |
int simple_stateful_operand_mux_2_0_0(int input0,int input1,int input2, int simple_stateful_operand_mux_2_0_0_ctrl_local) { | |
int mux_ctrl = simple_stateful_operand_mux_2_0_0_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
} | |
// Output mux for each PHV container | |
// Allows the container to be written from either its own stateless ALU or any stateful ALU | |
int simple_output_mux_phv_0_0(int input0,int input1, int simple_output_mux_phv_0_0_ctrl_local) { | |
int mux_ctrl = simple_output_mux_phv_0_0_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else { return input1; } | |
} | |
int simple_output_mux_phv_0_1(int input0,int input1, int simple_output_mux_phv_0_1_ctrl_local) { | |
int mux_ctrl = simple_output_mux_phv_0_1_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else { return input1; } | |
} | |
int simple_output_mux_phv_0_2(int input0,int input1, int simple_output_mux_phv_0_2_ctrl_local) { | |
int mux_ctrl = simple_output_mux_phv_0_2_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else { return input1; } | |
} | |
int simple_output_mux_phv_1_0(int input0,int input1, int simple_output_mux_phv_1_0_ctrl_local) { | |
int mux_ctrl = simple_output_mux_phv_1_0_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else { return input1; } | |
} | |
int simple_output_mux_phv_1_1(int input0,int input1, int simple_output_mux_phv_1_1_ctrl_local) { | |
int mux_ctrl = simple_output_mux_phv_1_1_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else { return input1; } | |
} | |
int simple_output_mux_phv_1_2(int input0,int input1, int simple_output_mux_phv_1_2_ctrl_local) { | |
int mux_ctrl = simple_output_mux_phv_1_2_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else { return input1; } | |
} | |
int simple_output_mux_phv_2_0(int input0,int input1, int simple_output_mux_phv_2_0_ctrl_local) { | |
int mux_ctrl = simple_output_mux_phv_2_0_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else { return input1; } | |
} | |
int simple_output_mux_phv_2_1(int input0,int input1, int simple_output_mux_phv_2_1_ctrl_local) { | |
int mux_ctrl = simple_output_mux_phv_2_1_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else { return input1; } | |
} | |
int simple_output_mux_phv_2_2(int input0,int input1, int simple_output_mux_phv_2_2_ctrl_local) { | |
int mux_ctrl = simple_output_mux_phv_2_2_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else { return input1; } | |
} | |
// Definition for ALUs | |
int simple_stateless_alu_0_0_mux1(int input0,int input1,int input2, int simple_stateless_alu_0_0_mux1_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_0_0_mux1_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_0_0_mux2(int input0,int input1,int input2, int simple_stateless_alu_0_0_mux2_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_0_0_mux2_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_0_0(int input0,int input1,int input2, int opcode_hole_local, int immediate_operand_hole_local, int mux1_ctrl_hole_local, int mux2_ctrl_hole_local) { | |
int opcode = opcode_hole_local; | |
int immediate_operand = immediate_operand_hole_local; | |
int x = simple_stateless_alu_0_0_mux1(input0,input1,input2, mux1_ctrl_hole_local); | |
int y = simple_stateless_alu_0_0_mux2(input0,input1,input2, mux2_ctrl_hole_local); | |
if (opcode == 0) { | |
return immediate_operand; | |
} else if (opcode == 1) { | |
return x + y; | |
} else if (opcode == 2) { | |
return x + immediate_operand; | |
} else if (opcode == 3) { | |
return x - y; | |
} else if (opcode == 4) { | |
return x - immediate_operand; | |
} else if (opcode == 5) { | |
return immediate_operand - x; | |
} else if (opcode == 6) { | |
return (x != 0) || (y != 0); | |
} else if (opcode == 7) { | |
return (x != 0) || (immediate_operand != 0); | |
} else if (opcode == 8) { | |
return (x != 0) && (y != 0); | |
} else if (opcode == 9) { | |
return (x != 0) && (immediate_operand != 0); | |
} else if (opcode == 10) { | |
return ! (x != 0); | |
} else if (opcode == 11) { | |
return x != y; | |
} else if (opcode == 12) { | |
return x != immediate_operand; | |
} else if (opcode == 13) { | |
return x == y; | |
} else if (opcode == 14) { | |
return x == immediate_operand; | |
} else if (opcode == 15) { | |
return x >= y; | |
} else if (opcode == 16) { | |
return x >= immediate_operand; | |
} else if (opcode == 17) { | |
return x < y; | |
} else { | |
return x < immediate_operand; | |
} | |
} | |
int simple_stateless_alu_0_1_mux1(int input0,int input1,int input2, int simple_stateless_alu_0_1_mux1_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_0_1_mux1_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_0_1_mux2(int input0,int input1,int input2, int simple_stateless_alu_0_1_mux2_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_0_1_mux2_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_0_1(int input0,int input1,int input2, int opcode_hole_local, int immediate_operand_hole_local, int mux1_ctrl_hole_local, int mux2_ctrl_hole_local) { | |
int opcode = opcode_hole_local; | |
int immediate_operand = immediate_operand_hole_local; | |
int x = simple_stateless_alu_0_1_mux1(input0,input1,input2, mux1_ctrl_hole_local); | |
int y = simple_stateless_alu_0_1_mux2(input0,input1,input2, mux2_ctrl_hole_local); | |
if (opcode == 0) { | |
return immediate_operand; | |
} else if (opcode == 1) { | |
return x + y; | |
} else if (opcode == 2) { | |
return x + immediate_operand; | |
} else if (opcode == 3) { | |
return x - y; | |
} else if (opcode == 4) { | |
return x - immediate_operand; | |
} else if (opcode == 5) { | |
return immediate_operand - x; | |
} else if (opcode == 6) { | |
return (x != 0) || (y != 0); | |
} else if (opcode == 7) { | |
return (x != 0) || (immediate_operand != 0); | |
} else if (opcode == 8) { | |
return (x != 0) && (y != 0); | |
} else if (opcode == 9) { | |
return (x != 0) && (immediate_operand != 0); | |
} else if (opcode == 10) { | |
return ! (x != 0); | |
} else if (opcode == 11) { | |
return x != y; | |
} else if (opcode == 12) { | |
return x != immediate_operand; | |
} else if (opcode == 13) { | |
return x == y; | |
} else if (opcode == 14) { | |
return x == immediate_operand; | |
} else if (opcode == 15) { | |
return x >= y; | |
} else if (opcode == 16) { | |
return x >= immediate_operand; | |
} else if (opcode == 17) { | |
return x < y; | |
} else { | |
return x < immediate_operand; | |
} | |
} | |
int simple_stateless_alu_0_2_mux1(int input0,int input1,int input2, int simple_stateless_alu_0_2_mux1_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_0_2_mux1_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_0_2_mux2(int input0,int input1,int input2, int simple_stateless_alu_0_2_mux2_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_0_2_mux2_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_0_2(int input0,int input1,int input2, int opcode_hole_local, int immediate_operand_hole_local, int mux1_ctrl_hole_local, int mux2_ctrl_hole_local) { | |
int opcode = opcode_hole_local; | |
int immediate_operand = immediate_operand_hole_local; | |
int x = simple_stateless_alu_0_2_mux1(input0,input1,input2, mux1_ctrl_hole_local); | |
int y = simple_stateless_alu_0_2_mux2(input0,input1,input2, mux2_ctrl_hole_local); | |
if (opcode == 0) { | |
return immediate_operand; | |
} else if (opcode == 1) { | |
return x + y; | |
} else if (opcode == 2) { | |
return x + immediate_operand; | |
} else if (opcode == 3) { | |
return x - y; | |
} else if (opcode == 4) { | |
return x - immediate_operand; | |
} else if (opcode == 5) { | |
return immediate_operand - x; | |
} else if (opcode == 6) { | |
return (x != 0) || (y != 0); | |
} else if (opcode == 7) { | |
return (x != 0) || (immediate_operand != 0); | |
} else if (opcode == 8) { | |
return (x != 0) && (y != 0); | |
} else if (opcode == 9) { | |
return (x != 0) && (immediate_operand != 0); | |
} else if (opcode == 10) { | |
return ! (x != 0); | |
} else if (opcode == 11) { | |
return x != y; | |
} else if (opcode == 12) { | |
return x != immediate_operand; | |
} else if (opcode == 13) { | |
return x == y; | |
} else if (opcode == 14) { | |
return x == immediate_operand; | |
} else if (opcode == 15) { | |
return x >= y; | |
} else if (opcode == 16) { | |
return x >= immediate_operand; | |
} else if (opcode == 17) { | |
return x < y; | |
} else { | |
return x < immediate_operand; | |
} | |
} | |
int simple_stateful_alu_0_0_Opt_0(int op1, int enable) { | |
if (enable != 0) return 0; | |
return op1; | |
} | |
int simple_stateful_alu_0_0_C_0(int const) { | |
return const; | |
} | |
int simple_stateful_alu_0_0_Mux2_0(int op1, int op2, int choice) { | |
if (choice == 0) return op1; | |
else return op2; | |
} | |
|StateGroup| simple_stateful_alu_0_0(ref |StateGroup| state_group, int pkt_0, int Mux2_0,int Opt_0,int const_0) { | |
|StateGroup| old_state_group = state_group; | |
int state_0 = state_group.state_0;state_0 = simple_stateful_alu_0_0_Opt_0(state_0,Opt_0)+simple_stateful_alu_0_0_Mux2_0(pkt_0,simple_stateful_alu_0_0_C_0(const_0),Mux2_0); | |
state_group.state_0 = state_0; | |
; return old_state_group; | |
} | |
int simple_stateless_alu_1_0_mux1(int input0,int input1,int input2, int simple_stateless_alu_1_0_mux1_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_1_0_mux1_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_1_0_mux2(int input0,int input1,int input2, int simple_stateless_alu_1_0_mux2_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_1_0_mux2_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_1_0(int input0,int input1,int input2, int opcode_hole_local, int immediate_operand_hole_local, int mux1_ctrl_hole_local, int mux2_ctrl_hole_local) { | |
int opcode = opcode_hole_local; | |
int immediate_operand = immediate_operand_hole_local; | |
int x = simple_stateless_alu_1_0_mux1(input0,input1,input2, mux1_ctrl_hole_local); | |
int y = simple_stateless_alu_1_0_mux2(input0,input1,input2, mux2_ctrl_hole_local); | |
if (opcode == 0) { | |
return immediate_operand; | |
} else if (opcode == 1) { | |
return x + y; | |
} else if (opcode == 2) { | |
return x + immediate_operand; | |
} else if (opcode == 3) { | |
return x - y; | |
} else if (opcode == 4) { | |
return x - immediate_operand; | |
} else if (opcode == 5) { | |
return immediate_operand - x; | |
} else if (opcode == 6) { | |
return (x != 0) || (y != 0); | |
} else if (opcode == 7) { | |
return (x != 0) || (immediate_operand != 0); | |
} else if (opcode == 8) { | |
return (x != 0) && (y != 0); | |
} else if (opcode == 9) { | |
return (x != 0) && (immediate_operand != 0); | |
} else if (opcode == 10) { | |
return ! (x != 0); | |
} else if (opcode == 11) { | |
return x != y; | |
} else if (opcode == 12) { | |
return x != immediate_operand; | |
} else if (opcode == 13) { | |
return x == y; | |
} else if (opcode == 14) { | |
return x == immediate_operand; | |
} else if (opcode == 15) { | |
return x >= y; | |
} else if (opcode == 16) { | |
return x >= immediate_operand; | |
} else if (opcode == 17) { | |
return x < y; | |
} else { | |
return x < immediate_operand; | |
} | |
} | |
int simple_stateless_alu_1_1_mux1(int input0,int input1,int input2, int simple_stateless_alu_1_1_mux1_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_1_1_mux1_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_1_1_mux2(int input0,int input1,int input2, int simple_stateless_alu_1_1_mux2_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_1_1_mux2_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_1_1(int input0,int input1,int input2, int opcode_hole_local, int immediate_operand_hole_local, int mux1_ctrl_hole_local, int mux2_ctrl_hole_local) { | |
int opcode = opcode_hole_local; | |
int immediate_operand = immediate_operand_hole_local; | |
int x = simple_stateless_alu_1_1_mux1(input0,input1,input2, mux1_ctrl_hole_local); | |
int y = simple_stateless_alu_1_1_mux2(input0,input1,input2, mux2_ctrl_hole_local); | |
if (opcode == 0) { | |
return immediate_operand; | |
} else if (opcode == 1) { | |
return x + y; | |
} else if (opcode == 2) { | |
return x + immediate_operand; | |
} else if (opcode == 3) { | |
return x - y; | |
} else if (opcode == 4) { | |
return x - immediate_operand; | |
} else if (opcode == 5) { | |
return immediate_operand - x; | |
} else if (opcode == 6) { | |
return (x != 0) || (y != 0); | |
} else if (opcode == 7) { | |
return (x != 0) || (immediate_operand != 0); | |
} else if (opcode == 8) { | |
return (x != 0) && (y != 0); | |
} else if (opcode == 9) { | |
return (x != 0) && (immediate_operand != 0); | |
} else if (opcode == 10) { | |
return ! (x != 0); | |
} else if (opcode == 11) { | |
return x != y; | |
} else if (opcode == 12) { | |
return x != immediate_operand; | |
} else if (opcode == 13) { | |
return x == y; | |
} else if (opcode == 14) { | |
return x == immediate_operand; | |
} else if (opcode == 15) { | |
return x >= y; | |
} else if (opcode == 16) { | |
return x >= immediate_operand; | |
} else if (opcode == 17) { | |
return x < y; | |
} else { | |
return x < immediate_operand; | |
} | |
} | |
int simple_stateless_alu_1_2_mux1(int input0,int input1,int input2, int simple_stateless_alu_1_2_mux1_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_1_2_mux1_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_1_2_mux2(int input0,int input1,int input2, int simple_stateless_alu_1_2_mux2_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_1_2_mux2_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_1_2(int input0,int input1,int input2, int opcode_hole_local, int immediate_operand_hole_local, int mux1_ctrl_hole_local, int mux2_ctrl_hole_local) { | |
int opcode = opcode_hole_local; | |
int immediate_operand = immediate_operand_hole_local; | |
int x = simple_stateless_alu_1_2_mux1(input0,input1,input2, mux1_ctrl_hole_local); | |
int y = simple_stateless_alu_1_2_mux2(input0,input1,input2, mux2_ctrl_hole_local); | |
if (opcode == 0) { | |
return immediate_operand; | |
} else if (opcode == 1) { | |
return x + y; | |
} else if (opcode == 2) { | |
return x + immediate_operand; | |
} else if (opcode == 3) { | |
return x - y; | |
} else if (opcode == 4) { | |
return x - immediate_operand; | |
} else if (opcode == 5) { | |
return immediate_operand - x; | |
} else if (opcode == 6) { | |
return (x != 0) || (y != 0); | |
} else if (opcode == 7) { | |
return (x != 0) || (immediate_operand != 0); | |
} else if (opcode == 8) { | |
return (x != 0) && (y != 0); | |
} else if (opcode == 9) { | |
return (x != 0) && (immediate_operand != 0); | |
} else if (opcode == 10) { | |
return ! (x != 0); | |
} else if (opcode == 11) { | |
return x != y; | |
} else if (opcode == 12) { | |
return x != immediate_operand; | |
} else if (opcode == 13) { | |
return x == y; | |
} else if (opcode == 14) { | |
return x == immediate_operand; | |
} else if (opcode == 15) { | |
return x >= y; | |
} else if (opcode == 16) { | |
return x >= immediate_operand; | |
} else if (opcode == 17) { | |
return x < y; | |
} else { | |
return x < immediate_operand; | |
} | |
} | |
int simple_stateful_alu_1_0_Opt_0(int op1, int enable) { | |
if (enable != 0) return 0; | |
return op1; | |
} | |
int simple_stateful_alu_1_0_C_0(int const) { | |
return const; | |
} | |
int simple_stateful_alu_1_0_Mux2_0(int op1, int op2, int choice) { | |
if (choice == 0) return op1; | |
else return op2; | |
} | |
|StateGroup| simple_stateful_alu_1_0(ref |StateGroup| state_group, int pkt_0, int Mux2_0,int Opt_0,int const_0) { | |
|StateGroup| old_state_group = state_group; | |
int state_0 = state_group.state_0;state_0 = simple_stateful_alu_1_0_Opt_0(state_0,Opt_0)+simple_stateful_alu_1_0_Mux2_0(pkt_0,simple_stateful_alu_1_0_C_0(const_0),Mux2_0); | |
state_group.state_0 = state_0; | |
; return old_state_group; | |
} | |
int simple_stateless_alu_2_0_mux1(int input0,int input1,int input2, int simple_stateless_alu_2_0_mux1_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_2_0_mux1_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_2_0_mux2(int input0,int input1,int input2, int simple_stateless_alu_2_0_mux2_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_2_0_mux2_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_2_0(int input0,int input1,int input2, int opcode_hole_local, int immediate_operand_hole_local, int mux1_ctrl_hole_local, int mux2_ctrl_hole_local) { | |
int opcode = opcode_hole_local; | |
int immediate_operand = immediate_operand_hole_local; | |
int x = simple_stateless_alu_2_0_mux1(input0,input1,input2, mux1_ctrl_hole_local); | |
int y = simple_stateless_alu_2_0_mux2(input0,input1,input2, mux2_ctrl_hole_local); | |
if (opcode == 0) { | |
return immediate_operand; | |
} else if (opcode == 1) { | |
return x + y; | |
} else if (opcode == 2) { | |
return x + immediate_operand; | |
} else if (opcode == 3) { | |
return x - y; | |
} else if (opcode == 4) { | |
return x - immediate_operand; | |
} else if (opcode == 5) { | |
return immediate_operand - x; | |
} else if (opcode == 6) { | |
return (x != 0) || (y != 0); | |
} else if (opcode == 7) { | |
return (x != 0) || (immediate_operand != 0); | |
} else if (opcode == 8) { | |
return (x != 0) && (y != 0); | |
} else if (opcode == 9) { | |
return (x != 0) && (immediate_operand != 0); | |
} else if (opcode == 10) { | |
return ! (x != 0); | |
} else if (opcode == 11) { | |
return x != y; | |
} else if (opcode == 12) { | |
return x != immediate_operand; | |
} else if (opcode == 13) { | |
return x == y; | |
} else if (opcode == 14) { | |
return x == immediate_operand; | |
} else if (opcode == 15) { | |
return x >= y; | |
} else if (opcode == 16) { | |
return x >= immediate_operand; | |
} else if (opcode == 17) { | |
return x < y; | |
} else { | |
return x < immediate_operand; | |
} | |
} | |
int simple_stateless_alu_2_1_mux1(int input0,int input1,int input2, int simple_stateless_alu_2_1_mux1_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_2_1_mux1_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_2_1_mux2(int input0,int input1,int input2, int simple_stateless_alu_2_1_mux2_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_2_1_mux2_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_2_1(int input0,int input1,int input2, int opcode_hole_local, int immediate_operand_hole_local, int mux1_ctrl_hole_local, int mux2_ctrl_hole_local) { | |
int opcode = opcode_hole_local; | |
int immediate_operand = immediate_operand_hole_local; | |
int x = simple_stateless_alu_2_1_mux1(input0,input1,input2, mux1_ctrl_hole_local); | |
int y = simple_stateless_alu_2_1_mux2(input0,input1,input2, mux2_ctrl_hole_local); | |
if (opcode == 0) { | |
return immediate_operand; | |
} else if (opcode == 1) { | |
return x + y; | |
} else if (opcode == 2) { | |
return x + immediate_operand; | |
} else if (opcode == 3) { | |
return x - y; | |
} else if (opcode == 4) { | |
return x - immediate_operand; | |
} else if (opcode == 5) { | |
return immediate_operand - x; | |
} else if (opcode == 6) { | |
return (x != 0) || (y != 0); | |
} else if (opcode == 7) { | |
return (x != 0) || (immediate_operand != 0); | |
} else if (opcode == 8) { | |
return (x != 0) && (y != 0); | |
} else if (opcode == 9) { | |
return (x != 0) && (immediate_operand != 0); | |
} else if (opcode == 10) { | |
return ! (x != 0); | |
} else if (opcode == 11) { | |
return x != y; | |
} else if (opcode == 12) { | |
return x != immediate_operand; | |
} else if (opcode == 13) { | |
return x == y; | |
} else if (opcode == 14) { | |
return x == immediate_operand; | |
} else if (opcode == 15) { | |
return x >= y; | |
} else if (opcode == 16) { | |
return x >= immediate_operand; | |
} else if (opcode == 17) { | |
return x < y; | |
} else { | |
return x < immediate_operand; | |
} | |
} | |
int simple_stateless_alu_2_2_mux1(int input0,int input1,int input2, int simple_stateless_alu_2_2_mux1_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_2_2_mux1_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_2_2_mux2(int input0,int input1,int input2, int simple_stateless_alu_2_2_mux2_ctrl_local) { | |
int mux_ctrl = simple_stateless_alu_2_2_mux2_ctrl_local; | |
if (mux_ctrl == 0) { | |
return input0; | |
} | |
else if (mux_ctrl == 1) { | |
return input1; | |
} | |
else { return input2; } | |
}int simple_stateless_alu_2_2(int input0,int input1,int input2, int opcode_hole_local, int immediate_operand_hole_local, int mux1_ctrl_hole_local, int mux2_ctrl_hole_local) { | |
int opcode = opcode_hole_local; | |
int immediate_operand = immediate_operand_hole_local; | |
int x = simple_stateless_alu_2_2_mux1(input0,input1,input2, mux1_ctrl_hole_local); | |
int y = simple_stateless_alu_2_2_mux2(input0,input1,input2, mux2_ctrl_hole_local); | |
if (opcode == 0) { | |
return immediate_operand; | |
} else if (opcode == 1) { | |
return x + y; | |
} else if (opcode == 2) { | |
return x + immediate_operand; | |
} else if (opcode == 3) { | |
return x - y; | |
} else if (opcode == 4) { | |
return x - immediate_operand; | |
} else if (opcode == 5) { | |
return immediate_operand - x; | |
} else if (opcode == 6) { | |
return (x != 0) || (y != 0); | |
} else if (opcode == 7) { | |
return (x != 0) || (immediate_operand != 0); | |
} else if (opcode == 8) { | |
return (x != 0) && (y != 0); | |
} else if (opcode == 9) { | |
return (x != 0) && (immediate_operand != 0); | |
} else if (opcode == 10) { | |
return ! (x != 0); | |
} else if (opcode == 11) { | |
return x != y; | |
} else if (opcode == 12) { | |
return x != immediate_operand; | |
} else if (opcode == 13) { | |
return x == y; | |
} else if (opcode == 14) { | |
return x == immediate_operand; | |
} else if (opcode == 15) { | |
return x >= y; | |
} else if (opcode == 16) { | |
return x >= immediate_operand; | |
} else if (opcode == 17) { | |
return x < y; | |
} else { | |
return x < immediate_operand; | |
} | |
} | |
int simple_stateful_alu_2_0_Opt_0(int op1, int enable) { | |
if (enable != 0) return 0; | |
return op1; | |
} | |
int simple_stateful_alu_2_0_C_0(int const) { | |
return const; | |
} | |
int simple_stateful_alu_2_0_Mux2_0(int op1, int op2, int choice) { | |
if (choice == 0) return op1; | |
else return op2; | |
} | |
|StateGroup| simple_stateful_alu_2_0(ref |StateGroup| state_group, int pkt_0, int Mux2_0,int Opt_0,int const_0) { | |
|StateGroup| old_state_group = state_group; | |
int state_0 = state_group.state_0;state_0 = simple_stateful_alu_2_0_Opt_0(state_0,Opt_0)+simple_stateful_alu_2_0_Mux2_0(pkt_0,simple_stateful_alu_2_0_C_0(const_0),Mux2_0); | |
state_group.state_0 = state_0; | |
; return old_state_group; | |
} | |
struct StateGroup { | |
int state_0; | |
} | |
// Data type for holding result from spec and implementation | |
struct StateAndPacket { | |
int pkt_0; | |
int pkt_1; | |
int pkt_2; | |
int state_group_0_state_0; | |
} | |
// Specification | |
// Spec for Sketch | |
| StateAndPacket | program(| StateAndPacket | state_and_packet) { | |
state_and_packet.pkt_1 = state_and_packet.pkt_0 + 1 + state_and_packet.pkt_1; | |
state_and_packet.state_group_0_state_0 = | |
state_and_packet.state_group_0_state_0 + 1; | |
state_and_packet.state_group_0_state_1 = | |
state_and_packet.state_group_0_state_0 + | |
state_and_packet.state_group_0_state_1; | |
state_and_packet.pkt_0 = | |
state_and_packet.state_group_0_state_0 + state_and_packet.pkt_1; | |
state_and_packet.pkt_2 = state_and_packet.state_group_0_state_0 + | |
state_and_packet.state_group_0_state_1; | |
return state_and_packet; | |
} | |
// Implementation | |
|StateAndPacket| pipeline (|StateAndPacket| state_and_packet) { | |
// Any additional constraints to speed up synthesis through parallel execution. | |
// Consolidate all constraints on holes here. | |
assert((simple_stateless_alu_0_0_opcode == 1)|| (simple_stateless_alu_0_0_mux1_ctrl <= simple_stateless_alu_0_0_mux2_ctrl)); | |
assert((simple_stateless_alu_0_1_opcode == 1)|| (simple_stateless_alu_0_1_mux1_ctrl <= simple_stateless_alu_0_1_mux2_ctrl)); | |
assert((simple_stateless_alu_0_2_opcode == 1)|| (simple_stateless_alu_0_2_mux1_ctrl <= simple_stateless_alu_0_2_mux2_ctrl)); | |
assert((simple_stateless_alu_1_0_opcode == 1)|| (simple_stateless_alu_1_0_mux1_ctrl <= simple_stateless_alu_1_0_mux2_ctrl)); | |
assert((simple_stateless_alu_1_1_opcode == 1)|| (simple_stateless_alu_1_1_mux1_ctrl <= simple_stateless_alu_1_1_mux2_ctrl)); | |
assert((simple_stateless_alu_1_2_opcode == 1)|| (simple_stateless_alu_1_2_mux1_ctrl <= simple_stateless_alu_1_2_mux2_ctrl)); | |
assert((simple_stateless_alu_2_0_opcode == 1)|| (simple_stateless_alu_2_0_mux1_ctrl <= simple_stateless_alu_2_0_mux2_ctrl)); | |
assert((simple_stateless_alu_2_1_opcode == 1)|| (simple_stateless_alu_2_1_mux1_ctrl <= simple_stateless_alu_2_1_mux2_ctrl)); | |
assert((simple_stateless_alu_2_2_opcode == 1)|| (simple_stateless_alu_2_2_mux1_ctrl <= simple_stateless_alu_2_2_mux2_ctrl)); | |
assert((simple_salu_config_0_0 + 0) <= 3); | |
assert((simple_salu_config_1_0 + 0) <= 3); | |
assert((simple_salu_config_2_0 + 0) <= 3); | |
assert((simple_salu_config_0_0 + simple_salu_config_1_0 + simple_salu_config_2_0 + 0) <= 1); | |
// One variable for each container in the PHV | |
// Container i will be allocated to packet field i from the spec. | |
int input_0_0 = 0; | |
int input_0_1 = 0; | |
int input_0_2 = 0; | |
// One variable for each stateful ALU's state operand | |
// This will be allocated to a state variable from the program using indicator variables. | |
|StateGroup| state_operand_salu_0_0; | |
|StateGroup| state_operand_salu_1_0; | |
|StateGroup| state_operand_salu_2_0; | |
/*********** Stage 0 *********/ | |
// Inputs | |
// Read each PHV container from corresponding packet field. | |
input_0_0 = state_and_packet.pkt_0; | |
input_0_1 = state_and_packet.pkt_1; | |
input_0_2 = state_and_packet.pkt_2; | |
// Stateless ALUs | |
int destination_0_0 = simple_stateless_alu_0_0( | |
input_0_0, | |
input_0_1, | |
input_0_2 | |
, | |
simple_stateless_alu_0_0_opcode, | |
simple_stateless_alu_0_0_immediate, | |
simple_stateless_alu_0_0_mux1_ctrl, | |
simple_stateless_alu_0_0_mux2_ctrl | |
); | |
int destination_0_1 = simple_stateless_alu_0_1( | |
input_0_0, | |
input_0_1, | |
input_0_2 | |
, | |
simple_stateless_alu_0_1_opcode, | |
simple_stateless_alu_0_1_immediate, | |
simple_stateless_alu_0_1_mux1_ctrl, | |
simple_stateless_alu_0_1_mux2_ctrl | |
); | |
int destination_0_2 = simple_stateless_alu_0_2( | |
input_0_0, | |
input_0_1, | |
input_0_2 | |
, | |
simple_stateless_alu_0_2_opcode, | |
simple_stateless_alu_0_2_immediate, | |
simple_stateless_alu_0_2_mux1_ctrl, | |
simple_stateless_alu_0_2_mux2_ctrl | |
); | |
// Stateful operands | |
int packet_operand_salu0_0_0 = simple_stateful_operand_mux_0_0_0( | |
input_0_0, | |
input_0_1, | |
input_0_2 | |
, simple_stateful_operand_mux_0_0_0_ctrl); | |
// Read stateful ALU slots from allocated state vars. | |
if (simple_salu_config_0_0 == 1) { | |
state_operand_salu_0_0 = | |
|StateGroup|( state_0 = state_and_packet.state_group_0_state_0 | |
);} | |
// Stateful ALUs | |
|StateGroup| old_state_group_0_0 = simple_stateful_alu_0_0(state_operand_salu_0_0, | |
packet_operand_salu0_0_0, | |
simple_stateful_alu_0_0_Mux2_0_global,simple_stateful_alu_0_0_Opt_0_global,simple_stateful_alu_0_0_const_0_global); | |
// Outputs | |
int output_0_0 = simple_output_mux_phv_0_0( | |
old_state_group_0_0.state_0, | |
destination_0_0, | |
simple_output_mux_phv_0_0_ctrl | |
); | |
int output_0_1 = simple_output_mux_phv_0_1( | |
old_state_group_0_0.state_0, | |
destination_0_1, | |
simple_output_mux_phv_0_1_ctrl | |
); | |
int output_0_2 = simple_output_mux_phv_0_2( | |
old_state_group_0_0.state_0, | |
destination_0_2, | |
simple_output_mux_phv_0_2_ctrl | |
); | |
// Write state_0 | |
if (simple_salu_config_0_0 == 1) { | |
state_and_packet.state_group_0_state_0 = state_operand_salu_0_0.state_0; | |
} | |
/*********** Stage 1 *********/ | |
// Inputs | |
// Input of this stage is the output of the previous one. | |
int input_1_0 = output_0_0; | |
int input_1_1 = output_0_1; | |
int input_1_2 = output_0_2; | |
// Stateless ALUs | |
int destination_1_0 = simple_stateless_alu_1_0( | |
input_1_0, | |
input_1_1, | |
input_1_2 | |
, | |
simple_stateless_alu_1_0_opcode, | |
simple_stateless_alu_1_0_immediate, | |
simple_stateless_alu_1_0_mux1_ctrl, | |
simple_stateless_alu_1_0_mux2_ctrl | |
); | |
int destination_1_1 = simple_stateless_alu_1_1( | |
input_1_0, | |
input_1_1, | |
input_1_2 | |
, | |
simple_stateless_alu_1_1_opcode, | |
simple_stateless_alu_1_1_immediate, | |
simple_stateless_alu_1_1_mux1_ctrl, | |
simple_stateless_alu_1_1_mux2_ctrl | |
); | |
int destination_1_2 = simple_stateless_alu_1_2( | |
input_1_0, | |
input_1_1, | |
input_1_2 | |
, | |
simple_stateless_alu_1_2_opcode, | |
simple_stateless_alu_1_2_immediate, | |
simple_stateless_alu_1_2_mux1_ctrl, | |
simple_stateless_alu_1_2_mux2_ctrl | |
); | |
// Stateful operands | |
int packet_operand_salu1_0_0 = simple_stateful_operand_mux_1_0_0( | |
input_1_0, | |
input_1_1, | |
input_1_2 | |
, simple_stateful_operand_mux_1_0_0_ctrl); | |
// Read stateful ALU slots from allocated state vars. | |
if (simple_salu_config_1_0 == 1) { | |
state_operand_salu_1_0 = | |
|StateGroup|( state_0 = state_and_packet.state_group_0_state_0 | |
);} | |
// Stateful ALUs | |
|StateGroup| old_state_group_1_0 = simple_stateful_alu_1_0(state_operand_salu_1_0, | |
packet_operand_salu1_0_0, | |
simple_stateful_alu_1_0_Mux2_0_global,simple_stateful_alu_1_0_Opt_0_global,simple_stateful_alu_1_0_const_0_global); | |
// Outputs | |
int output_1_0 = simple_output_mux_phv_1_0( | |
old_state_group_1_0.state_0, | |
destination_1_0, | |
simple_output_mux_phv_1_0_ctrl | |
); | |
int output_1_1 = simple_output_mux_phv_1_1( | |
old_state_group_1_0.state_0, | |
destination_1_1, | |
simple_output_mux_phv_1_1_ctrl | |
); | |
int output_1_2 = simple_output_mux_phv_1_2( | |
old_state_group_1_0.state_0, | |
destination_1_2, | |
simple_output_mux_phv_1_2_ctrl | |
); | |
// Write state_0 | |
if (simple_salu_config_1_0 == 1) { | |
state_and_packet.state_group_0_state_0 = state_operand_salu_1_0.state_0; | |
} | |
/*********** Stage 2 *********/ | |
// Inputs | |
// Input of this stage is the output of the previous one. | |
int input_2_0 = output_1_0; | |
int input_2_1 = output_1_1; | |
int input_2_2 = output_1_2; | |
// Stateless ALUs | |
int destination_2_0 = simple_stateless_alu_2_0( | |
input_2_0, | |
input_2_1, | |
input_2_2 | |
, | |
simple_stateless_alu_2_0_opcode, | |
simple_stateless_alu_2_0_immediate, | |
simple_stateless_alu_2_0_mux1_ctrl, | |
simple_stateless_alu_2_0_mux2_ctrl | |
); | |
int destination_2_1 = simple_stateless_alu_2_1( | |
input_2_0, | |
input_2_1, | |
input_2_2 | |
, | |
simple_stateless_alu_2_1_opcode, | |
simple_stateless_alu_2_1_immediate, | |
simple_stateless_alu_2_1_mux1_ctrl, | |
simple_stateless_alu_2_1_mux2_ctrl | |
); | |
int destination_2_2 = simple_stateless_alu_2_2( | |
input_2_0, | |
input_2_1, | |
input_2_2 | |
, | |
simple_stateless_alu_2_2_opcode, | |
simple_stateless_alu_2_2_immediate, | |
simple_stateless_alu_2_2_mux1_ctrl, | |
simple_stateless_alu_2_2_mux2_ctrl | |
); | |
// Stateful operands | |
int packet_operand_salu2_0_0 = simple_stateful_operand_mux_2_0_0( | |
input_2_0, | |
input_2_1, | |
input_2_2 | |
, simple_stateful_operand_mux_2_0_0_ctrl); | |
// Read stateful ALU slots from allocated state vars. | |
if (simple_salu_config_2_0 == 1) { | |
state_operand_salu_2_0 = | |
|StateGroup|( state_0 = state_and_packet.state_group_0_state_0 | |
);} | |
// Stateful ALUs | |
|StateGroup| old_state_group_2_0 = simple_stateful_alu_2_0(state_operand_salu_2_0, | |
packet_operand_salu2_0_0, | |
simple_stateful_alu_2_0_Mux2_0_global,simple_stateful_alu_2_0_Opt_0_global,simple_stateful_alu_2_0_const_0_global); | |
// Outputs | |
int output_2_0 = simple_output_mux_phv_2_0( | |
old_state_group_2_0.state_0, | |
destination_2_0, | |
simple_output_mux_phv_2_0_ctrl | |
); | |
int output_2_1 = simple_output_mux_phv_2_1( | |
old_state_group_2_0.state_0, | |
destination_2_1, | |
simple_output_mux_phv_2_1_ctrl | |
); | |
int output_2_2 = simple_output_mux_phv_2_2( | |
old_state_group_2_0.state_0, | |
destination_2_2, | |
simple_output_mux_phv_2_2_ctrl | |
); | |
// Write state_0 | |
if (simple_salu_config_2_0 == 1) { | |
state_and_packet.state_group_0_state_0 = state_operand_salu_2_0.state_0; | |
} | |
// Write pkt_0 | |
state_and_packet.pkt_0 = output_2_0; | |
// Write pkt_1 | |
state_and_packet.pkt_1 = output_2_1; | |
// Write pkt_2 | |
state_and_packet.pkt_2 = output_2_2; | |
// Return updated packet fields and state vars | |
return state_and_packet; | |
} | |
harness void main( | |
int pkt_0,int pkt_1,int pkt_2 | |
, int state_group_0_state_0 | |
) { | |
|StateAndPacket| x = |StateAndPacket|( pkt_0 = pkt_0, | |
pkt_1 = pkt_1, | |
pkt_2 = pkt_2, | |
state_group_0_state_0 = state_group_0_state_0 | |
); | |
assert(pipeline(x) == program(x)); | |
} |
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