taegyunkim

// Disable bold. 
term_.prefs_.set('enable-bold', false) 

// Use this for Solarized Dark 
term_.prefs_.set('background-color', "#002b36");
term_.prefs_.set('foreground-color', "#839496");

term_.prefs_.set('color-palette-overrides', [
  '#073642', 
  '#dc322f', 

taegyunkim

Total number of hole bits is 510
Sketch file is  parallel_codegen.sk
failed for larger size and need repeated testing by sketch
Bit: 2
[]    2
[]   2
Bit: 3
[]    3
[]   3
Bit: 4

taegyunkim

SKETCH version 1.7.5
Benchmark = simple_codegen.sk
    [1554084099.5650 - DEBUG] Running stage 'parse' -- Parse the program from a file
    [1554084099.7080 - ERROR] [SKETCH] Error at node: structure StateAndPacket@ANONYMOUS does not have a field named 'state_group_0_state_1' (at simple_codegen.sk:909)
    [1554084099.7090 - ERROR] [SKETCH] Error at node: Problem with assignment (at simple_codegen.sk:909)
    [1554084099.7091 - ERROR] [SKETCH] Error at node: structure StateAndPacket@ANONYMOUS does not have a field named 'state_group_0_state_1' (at simple_codegen.sk:909)
    [1554084099.7092 - ERROR] [SKETCH] Error at node: The expression state_and_packet.state_group_0_state_1 cannot be typed. (at simple_codegen.sk:910)
    [1554084099.7093 - ERROR] [SKETCH] Error at node: structure StateAndPacket@ANONYMOUS does not have a field named 'state_group_0_state_1' (at simple_codegen.sk:911)
    [1554084099.7094 - ERROR] [SKETCH] Error at node: 

taegyunkim

(assert (forall ((pkt_0_2_2_0  Int  )(state_group_0_state_0_3_3_0  Int  )) (let ((_n0 state_group_0_state_0_3_3_0 ))
(let ((_n1 true ))
(let ((_n2 2 ))
(let ((_n3 (ite (=  _n0  (- 8))  _n2   (ite  _n1  1 0)  ) ))
(let ((_n4 false ))
(let ((_n5 (ite (=  _n0  13)  (ite  _n4  1 0)   _n3  ) ))
(let ((_n6 16 ))
(let ((_n7 (+   _n0   _n6 ) ))
(let ((_n8 (=   _n7   (ite  _n4  1 0) ) ))
(let ((_n9 (not  _n8 ) ))

taegyunkim

SKETCH version 1.7.5
Benchmark = flowlets_pred_raw_stateless_alu_5_4_codegen_iteration_2.sk
    [1557948961.7150 - DEBUG] Running stage 'parse' -- Parse the program from a file
    [1557948962.1240 - DEBUG] Running stage 'preproc' -- Preprocessing (used for all further transformations)
    [1557948962.4090 - DEBUG] Running stage SpmdLowLevelCStage
    [1557948962.4130 - DEBUG]    Running visitor FlattenStmtBlocks2
    [1557948962.4190 - DEBUG]    Running visitor SplitAssignFromVarDef
    [1557948962.4240 - DEBUG]    Running visitor EliminateComplexForLoops
    [1557948962.4300 - DEBUG] Running stage 'lowering' -- Lower for SKETCH backend
    [1557948962.4710 - DEBUG] Running stage 'sten' -- Stencil transformations

taegyunkim

// This is an autogenerated sketch file corresponding to
// the router's data path and is used to solve the Chipmunk compilation problem.
// program_file = /Users/taegyunkim/Workspace/chipmunk/tests/../example_specs/blue_decrease.sk num_pipeline_stages = 4
// num_alus_per_stage = 3
// num_phv_containers = 3

int blue_decrease_sub_stateless_alu_4_3_stateful_alu_2_1_arith_op_1_global = 1;
int blue_decrease_sub_stateless_alu_4_3_stateful_alu_0_1_Mux3_3_global = 2;
int blue_decrease_sub_stateless_alu_4_3_stateful_alu_3_0_Mux3_2_global = 2;
int blue_decrease_sub_stateless_alu_4_3_stateless_alu_3_1_opcode = 2;

taegyunkim

// This is an autogenerated sketch file corresponding to
// the router's data path and is used to solve the Chipmunk compilation problem.
// program_file = /home/taegyunk/Workspace/chipmunk/tests/../example_specs/blue_decrease.sk num_pipeline_stages = 4
// num_alus_per_stage = 3
// num_phv_containers = 3

int blue_decrease_sub_stateless_alu_4_3_output_mux_phv_1_1_ctrl = 3;
int blue_decrease_sub_stateless_alu_4_3_salu_config_2_0 = 0;
int blue_decrease_sub_stateless_alu_4_3_stateful_alu_0_1_Mux3_2_global = 2;
int blue_decrease_sub_stateless_alu_4_3_stateful_alu_3_1_const_1_global = 1;

taegyunkim

// This is an autogenerated sketch file corresponding to
// the router's data path and is used to solve the Chipmunk compilation problem.
// program_file = /Users/taegyunkim/Workspace/chipmunk/tests/../example_specs/blue_decrease.sk num_pipeline_stages = 4
// num_alus_per_stage = 3
// num_phv_containers = 3

int blue_decrease_sub_stateless_alu_4_3_stateful_alu_1_0_Opt_0_global = 0;
int blue_decrease_sub_stateless_alu_4_3_stateful_alu_3_1_arith_op_1_global = 1;
int blue_decrease_sub_stateless_alu_4_3_output_mux_phv_3_1_ctrl = 3;
int blue_decrease_sub_stateless_alu_4_3_stateless_alu_3_2_mux2_ctrl = 0;

taegyunkim

| StateAndPacket | program(| StateAndPacket | state_and_packet) {
  if (state_and_packet.pkt_0 * 2 == state_and_packet.pkt_1) {
    state_and_packet.state_group_0_state_0 = 1;
  } else {
    state_and_packet.state_group_0_state_0 = 0;
  }
  return state_and_packet;
}

taegyunkim

// This is an autogenerated sketch file corresponding to
// the router's data path and is used to solve the Chipmunk compilation problem.
// program_file = example_specs/times_two.sk num_pipeline_stages = 3
// num_alus_per_stage = 3
// num_phv_containers = 3

int times_two_if_else_raw_stateless_alu_3_3_stateful_alu_1_0_Opt_2_global = 1;
int times_two_if_else_raw_stateless_alu_3_3_stateless_alu_0_0_opcode = 1;
int times_two_if_else_raw_stateless_alu_3_3_stateful_alu_2_0_Opt_1_global = 1;
int times_two_if_else_raw_stateless_alu_3_3_stateless_alu_1_2_mux3_ctrl = 1;