kevin cbmem -c

cbmem-c

coreboot-dc417eb Tue Nov 22 20:47:41 UTC 2016 bootblock starting...
ARM64: Exception handlers installed.
PLL at 00000000ff750000: fbdiv=169, refdiv=3, postdiv1=2, postdiv2=1, vco=1352000 khz, output=676000 khz
PLL at 00000000ff760080: fbdiv=99, refdiv=1, postdiv1=4, postdiv2=1, vco=2376000 khz, output=594000 khz
PLL at 00000000ff760060: fbdiv=100, refdiv=1, postdiv1=3, postdiv2=1, vco=2400000 khz, output=800000 khz
Backing address range [0000000000000000:0000008000000000) with new page table @00000000ff8e6000
Mapping address range [0000000000000000:0000000100000000) as     cacheable | read-write |     secure | device
Mapping address range [00000000ff8c0000:00000000ff8f0000) as     cacheable | read-write |     secure | normal
Backing address range [00000000c0000000:0000000100000000) with new page table @00000000ff8e7000
Backing address range [00000000ff800000:00000000ffa00000) with new page table @00000000ff8e8000
ADC reading 579, ID 8
PLL at 00000000ff760000: fbdiv=63, refdiv=1, postdiv1=1, postdiv2=1, vco=1512000 khz, output=1512000 khz
I2C bus 0: 398584Hz (divh = 44, divl = 60)
SF: Detected GD25LQ64C/GD25LB64C with sector size 0x1000, total 0x800000
VBOOT: Loading verstage.
CBFS @ 20000 size 2e0000
CBFS: 'Master Header Locator' located CBFS at [20000:300000)
CBFS: Locating 'fallback/verstage'
CBFS: Found @ offset 15000 size 8363


coreboot-dc417eb Tue Nov 22 20:47:41 UTC 2016 verstage starting...
ARM64: Exception handlers installed.
SF: Detected GD25LQ64C/GD25LB64C with sector size 0x1000, total 0x800000
FMAP: Found "FMAP" version 1.0 at 300000.
FMAP: base = 0 size = 800000 #areas = 22
FMAP: area RW_NVRAM found @ 5f0000 (65536 bytes)
tpm_vendor_probe: ValidSts bit set(1) in TPM_ACCESS register after 1 ms
I2C TPM 0:20 (chip type slb9645tt device-id 0x1A)
TPM: Startup
TPM: command 0x99 returned 0x0
TPM: Asserting physical presence
TPM: command 0x4000000a returned 0x0
TPM: command 0x65 returned 0x0
TPM: flags disable=0, deactivated=0, nvlocked=1
setup_tpm():410: TPM: SetupTPM() succeeded
TPM: tlcl_read(0x1007, 10)
TPM: command 0xcf returned 0x0
out: cmd=0x87: 03 71 87 00 00 00 04 00 01 00 00 00 
in-header: 03 f5 00 00 04 00 00 00 
in-data: 84 20 60 00 
Phase 1
FMAP: area GBB found @ 301000 (913152 bytes)
VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
Phase 2
Phase 3
FMAP: area GBB found @ 301000 (913152 bytes)
FMAP: area VBLOCK_B found @ 4f0000 (8192 bytes)
FMAP: area VBLOCK_B found @ 4f0000 (8192 bytes)
VB2:vb2_verify_keyblock() Checking key block signature...
FMAP: area VBLOCK_B found @ 4f0000 (8192 bytes)
FMAP: area VBLOCK_B found @ 4f0000 (8192 bytes)
VB2:vb2_verify_fw_preamble() Verifying preamble.
Phase 4
FMAP: area FW_MAIN_B found @ 4f2000 (941824 bytes)
VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
Saving nvdata
TPM: command 0x14 returned 0x0
TPM: command 0x14 returned 0x0
TPM: Set global lock
TPM: tlcl_write(0x0, 0)
TPM: command 0xcd returned 0x0
Slot B is selected
CBFS: 'VBOOT' located CBFS at [4f2000:531e00)
CBFS: Locating 'fallback/romstage'
CBFS: Found @ offset 0 size 694a


coreboot-9211c87 Fri Feb  9 21:48:12 UTC 2018 romstage starting...
ARM64: Exception handlers installed.
ADC reading 580, ID 8
Starting DWC3 and TCPHY reset for USB OTG0
Starting DWC3 and TCPHY reset for USB OTG1
ADC reading 62, ID 0
SF: Detected GD25LQ64C/GD25LB64C with sector size 0x1000, total 0x800000
CBFS: 'VBOOT' located CBFS at [4f2000:531e00)
CBFS: Locating 'sdram-lpddr3-hynix-4GB-928'
CBFS: Found @ offset 17b40 size 374
Starting SDRAM initialization...
PLL at 00000000ff760040: fbdiv=116, refdiv=1, postdiv1=3, postdiv2=1, vco=2784000 khz, output=928000 khz
Finish SDRAM initialization...
Mapping address range [0000000000000000:00000000f8000000) as     cacheable | read-write | non-secure | normal
Mapping address range [0000000010000000:0000000010200000) as non-cacheable | read-write | non-secure | normal
Backing address range [0000000000000000:0000000040000000) with new page table @00000000ff8e9000
CBMEM:
IMD: root @ 00000000f7fff000 254 entries.
IMD: root @ 00000000f7ffec00 62 entries.
creating vboot_handoff structure
Copying FW preamble
CBFS: 'VBOOT' located CBFS at [4f2000:531e00)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 69c0 size 9f5a


coreboot-9211c87 Fri Feb  9 21:48:12 UTC 2018 ramstage starting...
SF: Detected GD25LQ64C/GD25LB64C with sector size 0x1000, total 0x800000
FMAP: Found "FMAP" version 1.0 at 300000.
FMAP: base = 0 size = 800000 #areas = 22
FMAP: area RO_VPD found @ 3e0000 (131072 bytes)
FMAP: area RW_VPD found @ 4e8000 (32768 bytes)
FMAP: area RO_VPD found @ 3e0000 (131072 bytes)
FMAP: area RW_VPD found @ 4e8000 (32768 bytes)
ARM64: Exception handlers installed.
BS: BS_PRE_DEVICE times (us): entry 1 run 1 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 1 run 3 exit 1
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
Root Device scanning...
root_dev_scan_bus for Root Device
CPU_CLUSTER: 0 enabled
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 6 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 21 exit 0
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0
  CPU_CLUSTER: 0 resource base 0 size f8000000 align 0 gran 0 limit 0 flags e0004200 index 0
Setting resources...
Root Device assign_resources, bus 0 link: 0
CPU_CLUSTER: 0 missing set_resources
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0
  CPU_CLUSTER: 0 resource base 0 size f8000000 align 0 gran 0 limit 0 flags e0004200 index 0
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 35 exit 0
Enabling resources...
done.
BS: BS_DEV_ENABLE times (us): entry 1 run 3 exit 1
Initializing devices...
Root Device init ...
ADC reading 579, ID 8
DWC3 and TCPHY setup for USB OTG0 finished
out: cmd=0x101: 03 f4 01 01 00 00 04 00 00 03 00 00 
in-header: 03 f6 00 00 04 00 00 00 
in-data: 01 00 00 02 
out: cmd=0x101: 03 f6 01 01 00 00 04 00 00 01 00 00 
in-header: 03 f6 00 00 04 00 00 00 
in-data: 01 00 00 02 
DWC3 and TCPHY setup for USB OTG1 finished
out: cmd=0x101: 03 f3 01 01 00 00 04 00 01 03 00 00 
in-header: 03 f6 00 00 04 00 00 00 
in-data: 01 00 00 02 
out: cmd=0x101: 03 f5 01 01 00 00 04 00 01 01 00 00 
in-header: 03 f6 00 00 04 00 00 00 
in-data: 01 00 00 02 
Root Device init finished in 30011 usecs
CPU_CLUSTER: 0 init ...
Attempting to set up EDP display.
Extracted contents:
header:          00 ff ff ff ff ff ff 00
serial number:   4d 10 71 14 00 00 00 00 24 1a
version:         01 04
basic params:    a5 1a 11 78 06
chroma info:     de 50 a3 54 4c 99 26 0f 50 54
established:     00 00 00
standard:        01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
descriptor 1:    bb 62 60 a0 90 40 2e 60 30 20 3a 00 03 ad 10 00 00 18
descriptor 2:    00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00
descriptor 3:    00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00
descriptor 4:    00 00 00 fc 00 4c 51 31 32 33 50 31 4a 58 33 31 0a 20
extensions:      00
checksum:        c3

Manufacturer: SHP Model 1471 Serial Number 0
Made week 36 of 2016
EDID version: 1.4
Digital display
8 bits per primary color channel
DisplayPort interface
Maximum image size: 26 cm x 17 cm
Gamma: 220%
Check DPMS levels
Supported color formats: RGB 4:4:4
Default (sRGB) color space is primary color space
First detailed timing is preferred timing
Established timings supported:
Standard timings supported:
Detailed timings
Hex of detail: bb6260a090402e6030203a0003ad10000018
Detailed mode (IN HEX): Clock 252750 KHz, 103 mm x ad mm
               0960 0990 09b0 0a00 hborder 0
               0640 0643 064d 066e vborder 0
               -hsync -vsync 
Did detailed timing
Hex of detail: 000000100000000000000000000000000000
Dummy block
Hex of detail: 000000100000000000000000000000000000
Dummy block
Hex of detail: 000000fc004c5131323350314a5833310a20
Monitor name: LQ123P1JX31
Checksum
Checksum: 0xc3 (valid)
PLL at 00000000ff7600c0: fbdiv=337, refdiv=8, postdiv1=4, postdiv2=1, vco=1011000 khz, output=252750 khz
clock recovery at voltage 0 pre-emphasis 0
requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
using signal parameters: voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 0 voltage 0.4V pre_emph 6dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 6dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 6dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 6dB
using signal parameters: voltage 0.4V pre_emph 6dB
requested signal parameters: lane 0 voltage 0.4V pre_emph 0dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 0dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 0dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 0dB
using signal parameters: voltage 0.4V pre_emph 0dB
channel eq at voltage 0 pre-emphasis 0
PLL at 00000000ff760020: fbdiv=75, refdiv=1, postdiv1=3, postdiv2=1, vco=1800000 khz, output=600000 khz
CPU_CLUSTER: 0 init finished in 47673 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
BS: BS_DEV_INIT times (us): entry 0 run 77694 exit 0
FMAP: area RW_ELOG found @ 5d8000 (4096 bytes)
ELOG: NV offset 0x5d8000 size 0x1000
ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
out: cmd=0x44: 03 b9 44 00 00 00 00 00 
in-header: 03 31 00 00 04 00 00 00 
in-data: 5d da 35 5c 
ELOG: Event(17) added with size 13
out: cmd=0x87: 03 71 87 00 00 00 04 00 01 00 00 00 
in-header: 03 f5 00 00 04 00 00 00 
in-data: 84 20 60 00 
FMAP: area RW_NVRAM found @ 5f0000 (65536 bytes)
out: cmd=0x44: 03 b9 44 00 00 00 00 00 
in-header: 03 31 00 00 04 00 00 00 
in-data: 5d da 35 5c 
ELOG: Event(A0) added with size 9
elog_add_boot_reason: Logged dev mode boot
Finalize devices...
Devices finalized
BS: BS_POST_DEVICE times (us): entry 2769 run 2 exit 1
BS: BS_OS_RESUME_CHECK times (us): entry 1 run 1 exit 1
Writing coreboot table at 0xf7ed9000
 0. 0000000000000000-00000000000fffff: RESERVED
 1. 0000000000100000-00000000f7ed8fff: RAM
 2. 00000000f7ed9000-00000000f7ffffff: CONFIGURATION TABLES
out: cmd=0x87: 03 e1 87 00 00 00 04 00 00 60 31 00 
in-header: 03 f5 00 00 04 00 00 00 
in-data: 84 20 60 00 
Passing 6 GPIOs to payload:
            NAME |       PORT | POLARITY |     VALUE
   write protect | 0x00120001 |     high |       low
        recovery |  undefined |     high |      high
       backlight | 0x00110001 |     high | undefined
        EC in RW | 0x00080003 |     high | undefined
    EC interrupt | 0x00010000 |      low | undefined
           reset | 0x000b0000 |     high | undefined
ADC reading 62, ID 0
CBFS: 'VBOOT' located CBFS at [4f2000:531e00)
Wrote coreboot table at: 00000000f7ed9000, 0x2fc bytes, checksum 9a00
coreboot table: 788 bytes.
IMD ROOT    0. 00000000f7fff000 00001000
IMD SMALL   1. 00000000f7ffe000 00001000
CONSOLE     2. 00000000f7fde000 00020000
TIME STAMP  3. 00000000f7fdd000 00000400
VBOOT       4. 00000000f7fdc000 00000c0c
VPD         5. 00000000f7fdb000 000005a3
RAMOOPS     6. 00000000f7edb000 00100000
COREBOOT    7. 00000000f7ed9000 00002000
IMD small region:
  IMD ROOT    0. 00000000f7ffec00 00000400
  VBOOT SEL   1. 00000000f7ffebe0 00000008
BS: BS_WRITE_TABLES times (us): entry 1 run 1752 exit 0
CBFS: 'VBOOT' located CBFS at [4f2000:531e00)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 2a740 size 15682
Loading segment from ROM address 0x0000000000100000
  code (compression=1)
  New segment dstaddr 0x18104800 memsize 0x117fbe0 srcaddr 0x100038 filesize 0x1564a
Loading segment from ROM address 0x000000000010001c
  Entry Point 0x0000000018104800
Loading Segment: addr: 0x0000000018104800 memsz: 0x000000000117fbe0 filesz: 0x000000000001564a
lb: [0x0000000000300000, 0x000000000031fc48)
Post relocation: addr: 0x0000000018104800 memsz: 0x000000000117fbe0 filesz: 0x000000000001564a
using LZMA
[ 0x18104800, 18137750, 0x192843e0) <- 00100038
Clearing Segment: addr: 0x0000000018137750 memsz: 0x000000000114cc90
dest 0000000018104800, end 00000000192843e0, bouncebuffer ffffffffffffffff
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 1 run 45477 exit 1
Jumping to boot code at 0000000018104800(00000000f7ed9000)
CPU0: stack: 00000000ff8ec000 - 00000000ff8f0000, lowest used address 00000000ff8eefa0, stack used: 4192 bytes
CBFS: 'VBOOT' located CBFS at [4f2000:531e00)
CBFS: Locating 'fallback/bl31'
CBFS: Found @ offset 10d80 size 6d6a
Loading segment from ROM address 0x0000000000100000
  code (compression=1)
  New segment dstaddr 0x0 memsize 0x3c000 srcaddr 0x100070 filesize 0x61d6
Loading segment from ROM address 0x000000000010001c
  data (compression=1)
  New segment dstaddr 0xff8c0000 memsize 0x1000 srcaddr 0x106246 filesize 0x152
Loading segment from ROM address 0x0000000000100038
  code (compression=1)
  New segment dstaddr 0xff8c1000 memsize 0x4000 srcaddr 0x106398 filesize 0x9d2
Loading segment from ROM address 0x0000000000100054
  Entry Point 0x0000000000001000
Loading Segment: addr: 0x0000000000000000 memsz: 0x000000000003c000 filesz: 0x00000000000061d6
lb: [0x0000000000300000, 0x000000000031fc48)
Post relocation: addr: 0x0000000000000000 memsz: 0x000000000003c000 filesz: 0x00000000000061d6
using LZMA
[ 0x00000000, 00022098, 0x0003c000) <- 00100070
Clearing Segment: addr: 0x0000000000022098 memsz: 0x0000000000019f68
dest 0000000000000000, end 000000000003c000, bouncebuffer ffffffffffffffff
Loading Segment: addr: 0x00000000ff8c0000 memsz: 0x0000000000001000 filesz: 0x0000000000000152
lb: [0x0000000000300000, 0x000000000031fc48)
Post relocation: addr: 0x00000000ff8c0000 memsz: 0x0000000000001000 filesz: 0x0000000000000152
using LZMA
[ 0xff8c0000, ff8c1000, 0xff8c1000) <- 00106246
dest 00000000ff8c0000, end 00000000ff8c1000, bouncebuffer ffffffffffffffff
Loading Segment: addr: 0x00000000ff8c1000 memsz: 0x0000000000004000 filesz: 0x00000000000009d2
lb: [0x0000000000300000, 0x000000000031fc48)
Post relocation: addr: 0x00000000ff8c1000 memsz: 0x0000000000004000 filesz: 0x00000000000009d2
using LZMA
[ 0xff8c1000, ff8c5000, 0xff8c5000) <- 00106398
dest 00000000ff8c1000, end 00000000ff8c5000, bouncebuffer ffffffffffffffff
Loaded segments


Starting depthcharge on kevin...
The GBB signature is at 0x18004040 and is:  24 47 42 42
ec_init(0): CrosEC protocol v3 supported (544, 168)
Google ChromeOS EC driver ready, id 'kevin_v1.10.234-d3eb899'
Clearing the recovery request.
Wipe memory regions:
	[0x00000000100000, 0x00000015000000)
	[0x00000015000200, 0x00000018000000)
	[0x000000192843e0, 0x000000f7ed9000)
Initializing XHCI USB controller at 0xfe900000.
Initializing XHCI USB controller at 0xfe800000.
Calling VbSelectAndLoadKernel().
VbEcSoftwareSync(devidx=0)
VbEcSoftwareSync() check for RW update.
EcUpdateImage() - Check for RW update
EC-RW hash: e373b36ef9fafe1a9e3b46c39e07f8f5f024e21bfbe5819bd170dc5c7be2b09a
FMAP section too small.
Didn't find precalculated hash subsection 1.
Trying to locate 'ecrw.hash' in CBFS
Expected hash: e373b36ef9fafe1a9e3b46c39e07f8f5f024e21bfbe5819bd170dc5c7be2b09a
TPM: TlclRead(0x1008, 13)
1.2 TPM (chip type slb9645tt device-id 0x1A)
TPM: command 0xcf returned 0x0
TPM: command 0x65 returned 0x0
TPM: RollbackKernelRead 10001
TPM: TlclRead(0x100a, 40)
TPM: command 0xcf returned 0x2
TPM: RollbackFwmpRead() - no FWMP space
Entering VbBootDeveloper()
vboot_draw_screen: screen=0x101 locale=42
vboot_init_locale: Supported locales: en, es-419, pt-BR, fr, es, pt-PT, ca, it, de, el, nl, da, nb, sv, fi, et, lv, lt, ru, pl, cs, sk, hu, sl, sr, hr, bg, ro, uk, tr, he, ar, fa, hi, th, ms, vi, id, fil, zh-CN, zh-TW, ko, ja, bn, gu, kn, ml, mr, ta, te, (50 locales)
load_archive: loading vbgfx.bin
load_archive: loading font.bin
CBGFX: cbgfx initialized: screen:width=2400, height=1600, offset=0 canvas:width=1600, height=1600, offset=400
load_archive: loading locale_ja.bin
VbAudioOpen() - ticks_per_msec is 1000
VbAudioOpen() - VbExBeep() is limited
VbGetDevMusicNotes: use_short is 0, hdr is 0x0, maxsize is 0
VbGetDevMusicNotes: using 5 default notes
VbAudioOpen() - note count 5
Man 00001b Snr 3093104641 Product EC2Q Revision 10.13
VbBootDeveloper() - user pressed Ctrl+D; skip delay
VbBootDeveloper() - trying fixed disk
VbTryLoadKernel() start, get_info_flags=0x2
Man 000011 Snr 3643595631 Product 500073 Revision 0.0
VbTryLoadKernel() found 1 disks
VbTryLoadKernel() trying disk 0
GptNextKernelEntry looking at new prio partition 2
GptNextKernelEntry s1 t0 p1
GptNextKernelEntry looking at new prio partition 4
GptNextKernelEntry s1 t0 p2
GptNextKernelEntry looking at new prio partition 6
GptNextKernelEntry s0 t15 p0
GptNextKernelEntry likes partition 4
Found kernel entry at 53248 size 32768
Checking key block signature...
   - sig_size=512, expecting 512 for algorithm 8
   - sig_size=256, expecting 256 for algorithm 4
Kernel preamble is good.
   - sig_size=256, expecting 256 for algorithm 4
Partition is good.
Same kernel version
Good_partition >= 0
VbTryLoadKernel() LoadKernel() = 0
vboot_draw_screen: screen=0x0 locale=42
TPM: Lock physical presence
TPM: command 0x4000000a returned 0x0
VbSelectAndLoadKernel() returning 0
Boot policy: Match for type 0 with cmdline 1
Modified kernel command line: cros_secure console= loglevel=7 init=/sbin/init cros_secure oops=panic panic=-1 root=/dev/dm-0 rootwait ro dm_verity.error_behavior=3 dm_verity.max_bios=-1 dm_verity.dev_wait=1 dm="1 vroot none ro 1,0 3334144 verity payload=PARTUUID=a769d5a1-b39d-b24d-9717-737c4f9c398f/PARTNROFF=1 hashtree=PARTUUID=a769d5a1-b39d-b24d-9717-737c4f9c398f/PARTNROFF=1 hashstart=3334144 alg=sha1 root_hexdigest=93c8b23bd0200afdaa35e56a2eaca2d06f8aad5a salt=91a07854e53ef5837d978c051fa6351981dfc0d04ff8651b7006405c20f24e17" noinitrd vt.global_cursor_default=0 kern_guid=a769d5a1-b39d-b24d-9717-737c4f9c398f  
Loading FIT.
Image fdt@19 has 60238 bytes.
Image fdt@18 has 65110 bytes.
Image fdt@17 has 65083 bytes.
Image fdt@16 has 64484 bytes.
Image fdt@15 has 64531 bytes.
Image fdt@14 has 65225 bytes.
Image fdt@13 has 63069 bytes.
Image fdt@12 has 61720 bytes.
Image fdt@11 has 72123 bytes.
Image fdt@10 has 71955 bytes.
Image fdt@9 has 64082 bytes.
Image fdt@8 has 63907 bytes.
Image fdt@7 has 69774 bytes.
Image fdt@6 has 69633 bytes.
Image fdt@5 has 69621 bytes.
Image fdt@4 has 48606 bytes.
Image fdt@3 has 23522 bytes.
Image fdt@2 has 22856 bytes.
Image fdt@1 has 24409 bytes.
Image kernel@1 has 6545541 bytes.
Compat preference: google,kevin-rev8
Config conf@19, kernel kernel@1, fdt fdt@19, compat rockchip,rk3399-sapphire-excavator rockchip,rk3399
Config conf@18, kernel kernel@1, fdt fdt@18, compat google,scarlet-rev15-sku6 google,scarlet-rev15 google,scarlet-rev14-sku6 google,scarlet-rev14 google,scarlet-rev13-sku6 google,scarlet-rev13 google,scarlet-rev12-sku6 google,scarlet-rev12 google,scarlet-rev11-sku6 google,scarlet-rev11 google,scarlet-rev10-sku6 google,scarlet-rev10 google,scarlet-rev9-sku6 google,scarlet-rev9 google,scarlet-rev8-sku6 google,scarlet-rev8 google,scarlet-rev7-sku6 google,scarlet-rev7 google,scarlet-rev6-sku6 google,scarlet-rev6 google,scarlet-rev5-sku6 google,scarlet-rev5 google,scarlet-rev4-sku6 google,scarlet-rev4 google,scarlet google,gru rockchip,rk3399
Config conf@17, kernel kernel@1, fdt fdt@17, compat google,scarlet-rev15-sku7 google,scarlet-rev15 google,scarlet-rev14-sku7 google,scarlet-rev14 google,scarlet-rev13-sku7 google,scarlet-rev13 google,scarlet-rev12-sku7 google,scarlet-rev12 google,scarlet-rev11-sku7 google,scarlet-rev11 google,scarlet-rev10-sku7 google,scarlet-rev10 google,scarlet-rev9-sku7 google,scarlet-rev9 google,scarlet-rev8-sku7 google,scarlet-rev8 google,scarlet-rev7-sku7 google,scarlet-rev7 google,scarlet-rev6-sku7 google,scarlet-rev6 google,scarlet-rev5-sku7 google,scarlet-rev5 google,scarlet-rev4-sku7 google,scarlet-rev4 google,scarlet-rev3-sku7 google,scarlet-rev3 google,scarlet google,gru rockchip,rk3399
Config conf@16, kernel kernel@1, fdt fdt@16, compat google,scarlet-rev2-sku7 google,scarlet-rev2 google,scarlet google,gru rockchip,rk3399
Config conf@15, kernel kernel@1, fdt fdt@15, compat google,scarlet-rev1-sku7 google,scarlet-rev1 google,scarlet google,gru rockchip,rk3399
Config conf@14, kernel kernel@1, fdt fdt@14, compat google,scarlet-rev0 google,scarlet google,gru rockchip,rk3399
Config conf@13, kernel kernel@1, fdt fdt@13, compat google,rainier-rev15 google,rainier-rev14 google,rainier-rev13 google,rainier-rev12 google,rainier-rev11 google,rainier-rev10 google,rainier-rev9 google,rainier-rev8 google,rainier-rev7 google,rainier-rev6 google,rainier-rev5 google,rainier-rev4 google,rainier-rev3 google,rainier-rev2 google,rainier-rev1 google,rainier-rev0 google,rainier google,gru rockchip,rk3399
Config conf@12, kernel kernel@1, fdt fdt@12, compat google,nefario-rev15 google,nefario-rev14 google,nefario-rev13 google,nefario-rev12 google,nefario-rev11 google,nefario-rev10 google,nefario-rev9 google,nefario-rev8 google,nefario-rev7 google,nefario-rev6 google,nefario-rev5 google,nefario-rev4 google,nefario-rev3 google,nefario-rev2 google,nefario-rev1 google,nefario-rev0 google,nefario google,gru rockchip,rk3399
Config conf@11, kernel kernel@1, fdt fdt@11, compat google,kevin-rev15 google,kevin-rev14 google,kevin-rev13 google,kevin-rev12 google,kevin-rev11 google,kevin-rev10 google,kevin-rev9 google,kevin-rev8 (match) google,kevin-rev7 google,kevin-rev6 google,kevin google,gru rockchip,rk3399
Config conf@10, kernel kernel@1, fdt fdt@10, compat google,kevin-rev5 google,kevin google,gru rockchip,rk3399
Config conf@9, kernel kernel@1, fdt fdt@9, compat google,gru-rev15 google,gru-rev14 google,gru-rev13 google,gru-rev12 google,gru-rev11 google,gru-rev10 google,gru-rev9 google,gru-rev8 google,gru-rev7 google,gru-rev6 google,gru-rev5 google,gru-rev4 google,gru-rev3 google,gru-rev2 google,gru rockchip,rk3399
Config conf@8, kernel kernel@1, fdt fdt@8, compat google,gru-rev1 google,gru rockchip,rk3399
Config conf@7, kernel kernel@1, fdt fdt@7, compat google,bob-rev13 google,bob-rev12 google,bob-rev11 google,bob-rev10 google,bob-rev9 google,bob-rev8 google,bob-rev7 google,bob-rev6 google,bob-rev5 google,bob-rev4 google,bob google,gru rockchip,rk3399
Config conf@6, kernel kernel@1, fdt fdt@6, compat google,bob-rev2 google,bob-rev3 google,bob google,gru rockchip,rk3399
Config conf@5, kernel kernel@1, fdt fdt@5, compat google,bob-rev1 google,bob-rev0 google,bob google,gru rockchip,rk3399
Config conf@4, kernel kernel@1, fdt fdt@4, compat rockchip,rk3399-evb rockchip,rk3399 google,rk3399evb-rev2
Config conf@3, kernel kernel@1, fdt fdt@3, compat rockchip,r88 rockchip,rk3368
Config conf@2, kernel kernel@1, fdt fdt@2, compat geekbuying,geekbox rockchip,rk3368
Config conf@1 (default), kernel kernel@1, fdt fdt@1, compat rockchip,rk3368-evb-act8846 rockchip,rk3368
Choosing best match conf@11.
Shutting down all USB controllers.
Exiting depthcharge with code 4 at timestamp: 2961153
Decompressing LZ4 kernel to 0x280000
jumping to kernel