STIL Parser - RISCV PULPV32 ISA

stilparser.py

instr2operands = {
    '0011000' : ['add', 'add', 'pv.add.h', 'pv.add.b'],
	'0011001' : ['sub', 'sub', 'pv.sub.h', 'pv.sub.b'],

    '0101111' : ['xor', 'xor', 'pv.xor.sc.h', 'pv.xor.sc.b'],
    '0101110' : ['or', 'or', 'pv.or.sc.h', 'pv.or.sc.b'],
    '0010101' : ['and', 'and', 'pv.and.sc.h', 'pv.and.sc.b'],

    # Shifts
    '0100100' : ['sra', 'sra', 'pv.sra.sc.h', 'pv.sra.sc.b'],
    '0100101' : ['srl', 'srl', 'pv.srl.sc.h', 'pv.srl.sc.b'],
    '0100110' : 'p.ror',
    '0100111' : ['sll', 'sll', 'pv.sll.sc.h', 'pv.sll.sc.b'],


    # sign-/zero-extensions
    #'0111110' : 'exts',
    #'0111111' : 'ext',


    # set lower than operations
    '0000010' : 'slt',
    '0000011' : 'sltu',
    '0000110' : 'p.slet',
    '0000111' : 'p.sletu',


    # insert/extract
    #'0101101' : 'ins',

    # min/max
    '0010000' : ['p.min', 'p.min', 'pv.min.sc.h', 'pv.min.sc.b'],
    '0010001' : ['p.minu', 'p.minu', 'pv.minu.sc.h', 'pv.minu.sc.b'],
    '0010010' : ['p.max', 'p.max', 'pv.max.sc.h', 'pv.max.sc.b'],
    '0010011' : ['p.maxu', 'p.maxu', 'pv.maxu.sc.h', 'pv.maxu.sc.b'],

    # div/rem
    '0110000' : 'divu', # bit 0 is used for signed mode, bit 1 is used for remdiv
    '0110001' : 'div', # bit 0 is used for signed mode, bit 1 is used for remdiv
    '0110010' : 'remu', # bit 0 is used for signed mode, bit 1 is used for remdiv
    '0110011' : 'rem', # bit 0 is used for signed mode, bit 1 is used for remdiv

    #'0111010' : 'shuf',
    #'0111011' : 'shuf2',
    #'0111000' : 'pcklo',
    #'0111001' : 'pckhi',

    # fpu
    #'1111111' : 'fkeep',   # hack, to support fcvt.s.d
    #'1000000' : 'fsgnj',
    #'1000001' : 'fsgnjn',
    #'1000010' : 'fsgnjx',
    #'1000011' : 'feq',
    #'1000100' : 'flt',
    #'1000101' : 'fle',
    #'1000110' : 'fmax',
    #'1000111' : 'fmin',
    #'1001000' : 'fclass'


	#'0011010' : 'addu',
	#'0011011' : 'subu',

	# add others..
}

instr2branch = {

    # comparisons
    '0000000' : 'blt', #ALU_OP = LTS
    '0000001' : 'bltu', #ALU_OP = LTU
    '0000100' : 'ble', #ALU_OP = LES
    '0000101' : 'bleu', #ALU_OP = LEU
    '0001000' : 'bgt', #ALU_OP = GTS
    '0001001' : 'bgtu', #ALU_OP = GTU
    '0001010' : 'bge', #ALU_OP = GES
    '0001011' : 'bgeu', #ALU_OP = GEU
    '0001100' : 'beq',  #ALU_OP = EQ
    '0001101' : 'bne',  #ALU_OP = NE

}

instr2single = {

    # bit counting
    '0110110' : 'p.ff1',
    '0110111' : 'p.fl1',
    '0110100' : 'p.cnt',
    '0110101' : 'p.clb',


    # absolute value
    '0010100' : 'p.abs',
}

inst2shortimm = {

    # absolute value
    '0010110' : 'p.clip',
    '0010111' : 'p.clipu',

}

inst2triple = {

    '0011010' : 'p.adduN',
    '0011011' : 'p.subuN',
    '0011100' : 'p.addRN',
    '0011101' : 'p.subRN',
    '0011110' : 'p.adduRN',
    '0011111' : 'p.subuRN',

}

inst2triple_2imm = {

    # bit manipulation
    #'1001001' : 'brev',
    '0101000' : ['p.extract', 'p.extract', 'pv.extract.h', 'pv.extract.b'],
    '0101001' : ['p.extractu', 'p.extractu', 'pv.extractu.h', 'pv.extractu.b'],
    '0101010' : ['p.insert', 'p.insert', 'pv.insert.h', 'pv.insert.b'],
    '0101100' : 'p.bset',
    '0101011' : 'p.bclr',

}