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�[net/pkt] [DBG] net_pkt_init: (0x20006060): Allocating 50 RX (3600 bytes), 10 TX (720 bytes), 50 RX data (0 bytes) and 10 TX data (0 bytes) buffers
***** Booting Zephyr OS v1.11.0-1267-ge2393a002 *****
Zephyr Shell, Zephyr version: 1.11.99
Type 'help' for a list of available commands
shell> [lib/lwm2m_engine] [DBG] lwm2m_engine_init: LWM2M engine thread started
[lwm2m_obj_security] [DBG] security_create: Create LWM2M security instance: 0
[lwm2m_obj_server] [DBG] server_create: Create LWM2M server instance: 0
[lwm2m_obj_device] [DBG] device_create: Create LWM2M device instance: 0
[lwm2m_obj_firmware] [DBG] firmware_create: Create LWM2M firmware instance: 0
[net/pkt] [DBG] net_pkt_get_reserve_debug: (0x2000c75c): RX [49] pkt 0x20007810 reserve 0 ref 1 (eth_rx():158)

therealprof

#![no_main]
#![no_std]

use panic_halt;

use stm32f0xx_hal as hal;

use cortex_m_rt::entry;

use crate::hal::gpio::{gpiof::PF0, gpiof::PF1, Alternate, AF1};

therealprof

#![no_main]
#![no_std]

use panic_halt;

use stm32f0xx_hal as hal;

use cortex_m_rt::entry;

use crate::hal::gpio::{gpiof::PF0, gpiof::PF1, Alternate, AF1};

therealprof

//! On-board user LEDs

use crate::hal::prelude::*;

use crate::hal::gpio::gpioc::{self, *};
use crate::hal::gpio::{Output, Pin, PushPull};

/// Top LED (orange)
pub type LD3 = PC8<Output<PushPull>>;

therealprof

#![no_main]
#![no_std]

extern crate cortex_m;
extern crate cortex_m_rt;

extern crate stm32f407g_disc as board;

#[macro_use(block)]
extern crate nb;

therealprof

0000548:INFO:board:Target type is cortex_m
0000548:INFO:dap:dap logfile: /Users/egger/OSS/pyOCD/pyocd/pyocd_dap.log
0000555:DEBUG:sequencer:Running task load_svd
0000555:DEBUG:sequencer:Running task create_flash
0000555:DEBUG:sequencer:Running task dp_init
0000558:INFO:dap:DP IDR = 0x0bb11477
0000559:DEBUG:sequencer:Running task power_up
0000561:DEBUG:sequencer:Running task find_aps
0000562:DEBUG:sequencer:Running task create_aps
0000562:DEBUG:sequencer:Running task create_ap.0

therealprof

#![no_main]
#![no_std]

#[allow(unused)]
use panic_halt;

use stm32f0xx_hal as hal;

use crate::hal::delay::Delay;
use crate::hal::prelude::*;

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//! Writes panic messages to the beginning of RAM
//!
//! This crate contains an implementation of `panic_fmt` that logs panic messages to the beginning
//! of RAM, recklessly overwriting the previous contents of that area. After logging the message
//! the panic handler goes into an infinite loop, so a debugging probe can connect and pick up the
//! panic.
//!
//! Unlike other methods this allows to discover the panic reason post-mortem by attaching a
//! debugger probe after the device crashed.
//!

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// WARNING: This output format is intended for human consumers only
// and is subject to change without notice. Knock yourself out.
fn x316576dlwfbgu50() -> ! {
    let mut _0: !;                       // return place
    let mut _1: &(&str, &str, u32, u32);
    let mut _2: &(&str, &str, u32, u32);

    bb0: {                              
        StorageLive(_1);                 // bb0[0]: scope 0 at <::core::macros::panic macros>:4:1: 4:72
        StorageLive(_2);                 // bb0[1]: scope 0 at <::core::macros::panic macros>:4:1: 4:72

therealprof

//! Reset and Clock Control

use core::cmp;

use cast::u32;
use crate::stm32::{rcc, RCC};

use crate::flash::ACR;
use crate::time::Hertz;