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; ModuleID = 'map' | |
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-f32:32:32-f64:64:64-n16:32:64" | |
target triple = "nvptx64-nvidia-cuda" | |
; Function Attrs: nounwind | |
define void @map(i64* noalias nocapture %out.ad0, i64 %out.sh0, i64* noalias nocapture readonly %fv0.ad0, i64 %fv0.sh0) #0 { | |
entry: | |
%0 = trunc i64 %out.sh0 to i32 | |
%1 = tail call i32 @llvm.nvvm.read.ptx.sreg.nctaid.x() #2 | |
%2 = tail call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() #2 | |
%3 = mul i32 %2, %1 | |
%4 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x() #2 | |
%5 = icmp slt i32 %4, %0 | |
br i1 %5, label %loop1.top, label %loop1.exit | |
loop1.top: ; preds = %entry, %loop1.top | |
%6 = phi i32 [ %11, %loop1.top ], [ %4, %entry ] | |
%7 = getelementptr i64* %fv0.ad0, i32 %6 | |
%8 = load i64* %7 | |
%9 = add i64 %8, 1 | |
%10 = getelementptr i64* %out.ad0, i32 %6 | |
store i64 %9, i64* %10 | |
%11 = add i32 %6, %3 | |
%12 = icmp slt i32 %11, %0 | |
br i1 %12, label %loop1.top, label %loop1.exit | |
loop1.exit: ; preds = %loop1.top, %entry | |
ret void | |
} | |
; Function Attrs: nounwind readnone readonly | |
declare i32 @llvm.nvvm.read.ptx.sreg.nctaid.x() #1 | |
; Function Attrs: nounwind readnone readonly | |
declare i32 @llvm.nvvm.read.ptx.sreg.ntid.x() #1 | |
; Function Attrs: nounwind readnone readonly | |
declare i32 @llvm.nvvm.read.ptx.sreg.tid.x() #1 | |
attributes #0 = { nounwind } | |
attributes #1 = { nounwind readnone readonly } | |
attributes #2 = { nounwind readonly } | |
!nvvm.annotations = !{!0} | |
!0 = metadata !{void (i64*, i64, i64*, i64)* @map, metadata !"kernel", i32 1} |
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