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PAL source code for the Sega Mega Drive development kit
Title Sega Megadrive dev system PAL #1
; special 26v12 version
revision 2
date 1994-04-01
company Synchron Data
author Tore
Pattern 0A
;Buggfixes:
;Eprom_cs buggfixed
;changed sega d7 strobe to d15 and same adress as datareadlatch
chip gal1 palce26v12
;INPUT
PIN 1 write_disable ;0=write disabled, 1=normal RW operation
PIN 2 map
PIN 3 HOST_RESET ;aktiv l†g
PIN 4 sega_lo_we
PIN 5 sega_hi_we
PIN 6 sega_cs
PIN 8 sega_oe
PIN 9 reset
PIN 10 A18
PIN 11 A19
PIN 12 A20
PIN 13 A21
PIN 14 toggle_strobe ;toggle bit from ls74
PIN 28 toggle_read_oe
;OUTPUT
PIN 15 EPROM_CS
PIN 16 READ_LATCH1_OE
PIN 17 READ_LATCH2_OE
PIN 18 RESET_BUTTON
PIN 19 WRT_LATCH1_LE
PIN 20 WRT_LATCH2_LE
PIN 22 WRT_LATCH3_LE
PIN 23 sega_d15
PIN 24 Sram_cs
pin 25 sram_lo_we
pin 26 sram_hi_we
pin 27 Write_warning
;----------------------------------------------------------
equations
;Main chipselect f”r srambanken
/Sram_cs = /a21 * /sega_cs * map;
;Write strobe till Srambanken
/sram_lo_we = /a21 * write_disable * /sega_lo_we;
/sram_hi_we = /a21 * write_disable * /sega_hi_we;
;Write warning pulse som kopplas till en extern ls74 eller dyl
Write_warning= /sega_lo_we * /write_disable * /a21 * /sega_cs
+ /sega_hi_we * /write_disable * /a21 * /sega_cs;
;Eprom select signalen
/EPROM_CS =
/sega_cs * /sega_oe * /a18 * /a19 * /a20 * a21 * map + ;normalt
/sega_cs * /sega_oe * /map * /a21 ;boot
/READ_LATCH1_OE = a18 * /a19 * /a20 * a21 * /sega_cs * /sega_oe * map;
sega_d15.TRST = a18 * /a19 * /a20 * a21 * /sega_cs * /sega_oe * map;
/READ_LATCH2_OE =/a18 * a19 * /a20 * a21 * /sega_cs * /sega_oe * map;
WRT_LATCH1_LE =/a18 * /a19 * a20 * a21 * /sega_cs * sega_oe * map;
WRT_LATCH2_LE = a18 * /a19 * a20 * a21 * /sega_cs * sega_oe * map;
WRT_LATCH3_LE =/a18 * a19 * a20 * a21 * /sega_cs * sega_oe * map;
sega_d15 = toggle_strobe;
RESET_BUTTON = /HOST_RESET

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