Created
June 7, 2017 14:42
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diff --git a/lib/Target/Mips/MipsSubtarget.h b/lib/Target/Mips/MipsSubtarget.h | |
index 01114d0fb60..cf0142e75a3 100644 | |
--- a/lib/Target/Mips/MipsSubtarget.h | |
+++ b/lib/Target/Mips/MipsSubtarget.h | |
@@ -323,7 +323,7 @@ public: | |
/// CHERI is not MIPSr6, but provides a hybrid implementation where | |
/// in-cache-line unaligned accesses are handled in software and ones | |
/// spanning cache lines are emulated in the OS. | |
- bool systemSupportsUnalignedAccess() const { return IsCheri || hasMips32r6(); } | |
+ bool systemSupportsUnalignedAccess() const { return false; }; | |
// Set helper classes | |
void setHelperClassesMips16(); |
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