Enable ITM output over the SWO pin for STM32H7 parts. The output is manchester coded and can be received by a debugger - eg. blackmagic probe

itm_en.rs

/// Enables ITM
///
/// If swo_enable is true, then the SWO output pin will be enabled
fn low_level_itm(dbgmcu: &stm32::DBGMCU, swo_enable: bool) {
    // ARMv7-M DEMCR: Set TRCENA. Enables DWT and ITM units
    unsafe { *(0xE000_EDFC as *mut u32) |= 1 << 24 };

    // Ensure debug blocks are clocked before interacting with them
    dbgmcu.cr.modify(|_, w| {
        w.d1dbgcken()
            .set_bit()
            .d3dbgcken()
            .set_bit()
            .traceclken()
            .set_bit()
            .dbgsleep_d1()
            .set_bit()
            .dbgsleep_d2()
            .set_bit()
    });

    if swo_enable {
        // SWO: Unlock
        unsafe { *(0x5c00_3fb0 as *mut u32) = 0xC5ACCE55 };
        // SWTF: Unlock
        unsafe { *(0x5c00_4fb0 as *mut u32) = 0xC5ACCE55 };

        // SWO CODR Register: Set SWO speed
        // 480MHz max. / 400 = 1.2MHz max
        unsafe { *(0x5c00_3010 as *mut _) = 400 - 1 };

        // SWO SPPR Register: Manchester
        unsafe { *(0x5c00_30f0 as *mut _) = 1 };

        // SWTF Trace Funnel: Enable for CM7
        unsafe { *(0x5c00_4000 as *mut u32) |= 1 };
    }

    // ITM: Unlock
    unsafe { *(0xE000_0FB0 as *mut u32) = 0xC5ACCE55 };
    // ITM Trace Enable Register: Enable lower 8 stimulus ports
    unsafe { *(0xE000_0E00 as *mut _) = 0xFF };
    // ITM Trace Control Register: Enable ITM
    unsafe { *(0xE000_0E80 as *mut u32) |= 8 | 1 };
}