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tsukumijima/QuaStation.dts

Last active July 2, 2022 06:35
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QuaStation の dtb (Device Tree Blob) をデコンパイルしたもの (/dev/mmcblk1 から抽出)
Raw
QuaStation.dts
/dts-v1/;
/memreserve/ 0x0000000000000000 0x0000000000030000;
/memreserve/ 0x000000000001f000 0x0000000000001000;
/memreserve/ 0x0000000000030000 0x00000000000d0000;
/memreserve/ 0x0000000002c00000 0x000000000b800000;
/memreserve/ 0x0000000001b00000 0x0000000000400000;
/memreserve/ 0x0000000002600000 0x0000000000600000;
/memreserve/ 0x0000000001ffe000 0x0000000000004000;
/memreserve/ 0x0000000011000000 0x0000000009200000;
/memreserve/ 0x0000000010000000 0x0000000000014000;
/memreserve/ 0x0000000002200000 0x0000000000400000;
/ {
compatible = "Realtek,FPGA_v7", "Realtek,rtd-1295";
interrupt-parent = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x1>;
model = "Realtek_RTD1295";
pinctrl@9801A000 {
compatible = "rtk119x,rtk119x-pinctrl";
reg = <0x9801a000 0x97c 0x9804d000 0x10 0x98012000 0x640 0x98007000 0x340>;
#gpio-range-cells = <0x3>;
pinctrl-names = "default";
pinctrl-0 = <0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10>;
linux,phandle = <0x44>;
phandle = <0x44>;
sdcard_low@0 {
rtk119x,pins = "mmc_data_3", "mmc_data_2", "mmc_data_1", "mmc_data_0", "mmc_clk", "mmc_cmd";
rtk119x,function = "sd_card";
rtk119x,pull_en = <0x1>;
rtk119x,pull_sel = <0x0>;
linux,phandle = <0x2>;
phandle = <0x2>;
};
sdcard_high@0 {
rtk119x,pins = "mmc_cd", "mmc_wp";
rtk119x,function = "sd_card";
rtk119x,pull_en = <0x1>;
rtk119x,pull_sel = <0x1>;
linux,phandle = <0x3>;
phandle = <0x3>;
};
sdio@0 {
rtk119x,pins = "sdio_cmd", "sdio_data_0", "sdio_data_1", "sdio_data_2", "sdio_data_3", "sdio_clk";
rtk119x,function = "sdio";
};
uart0@0 {
rtk119x,pins = "ur0_rx", "ur0_tx";
rtk119x,function = "uart0";
linux,phandle = <0x4>;
phandle = <0x4>;
};
uart1@0 {
rtk119x,pins = "ur1_rx", "ur1_tx", "ur1_cts_n", "ur1_rts_n";
rtk119x,function = "uart1";
linux,phandle = <0x5>;
phandle = <0x5>;
};
uart2@0 {
rtk119x,pins = "ur2_loc", "iso_gpio_2", "iso_gpio_3", "iso_gpio_4", "iso_gpio_5";
rtk119x,function = "uart2_0";
linux,phandle = <0x6>;
phandle = <0x6>;
};
uart2@1 {
rtk119x,pins = "ur2_loc", "iso_gpio_23", "iso_gpio_24", "iso_gpio_33", "iso_gpio_34";
rtk119x,function = "uart2_1";
};
i2c@0 {
rtk119x,pins = "i2c_scl_0", "i2c_sda_0";
rtk119x,function = "i2c0";
linux,phandle = <0x7>;
phandle = <0x7>;
};
i2c@1 {
rtk119x,pins = "i2c_scl_1", "i2c_sda_1";
rtk119x,function = "i2c1";
};
i2c@2 {
rtk119x,pins = "tp1_clk", "tp1_sync";
rtk119x,function = "i2c2";
};
i2c@3 {
rtk119x,pins = "tp1_data", "tp1_valid";
rtk119x,function = "i2c3";
};
i2c@4 {
rtk119x,pins = "i2c_sda_4", "i2c_scl_4";
rtk119x,function = "i2c4";
};
i2c@5 {
rtk119x,pins = "i2c_sda_5", "i2c_scl_5";
rtk119x,function = "i2c5";
linux,phandle = <0x8>;
phandle = <0x8>;
};
i2c@6 {
rtk119x,pins = "i2c_scl_6", "i2c_sda_6";
rtk119x,function = "i2c6";
linux,phandle = <0x9>;
phandle = <0x9>;
};
spi@0 {
rtk119x,pins = "gpio_0", "gpio_1", "gpio_2", "gpio_3", "sf_en";
rtk119x,function = "spi";
};
spi@1 {
rtk119x,pins = "gpio_0", "gpio_1", "gpio_2", "gpio_3", "sf_en";
rtk119x,function = "gpio";
linux,phandle = <0xe>;
phandle = <0xe>;
};
gspi@0 {
rtk119x,pins = "gpio_4", "gpio_5", "gpio_6", "gpio_7";
rtk119x,function = "gspi";
linux,phandle = <0x45>;
phandle = <0x45>;
};
tp0@0 {
rtk119x,pins = "tp0_loc", "tp0_data", "tp0_sync", "tp0_valid", "tp0_clk";
rtk119x,function = "tp0_loc_tp0";
};
tp0@1 {
rtk119x,pins = "tp0_loc", "rgmii0_txd_0", "rgmii0_txd_1", "rgmii0_txd_2", "rgmii0_txd_3";
rtk119x,function = "tp0_loc_rgmii0_tx";
};
tp1@0 {
rtk119x,pins = "tp1_loc", "tp1_data", "tp1_sync", "tp1_valid", "tp1_clk";
rtk119x,function = "tp1_loc_tp1";
};
tp1@1 {
rtk119x,pins = "tp1_loc", "rgmii0_rxd_0", "rgmii0_rxd_1", "rgmii0_rxd_2", "rgmii0_rxd_3";
rtk119x,function = "tp1_loc_rgmii0_rx";
};
ir@0 {
rtk119x,pins = "ir_rx";
rtk119x,function = "ir_rx";
linux,phandle = <0xc>;
phandle = <0xc>;
};
ir@1 {
rtk119x,pins = "ir_tx";
rtk119x,function = "ir_tx";
linux,phandle = <0xd>;
phandle = <0xd>;
};
spdif@0 {
rtk119x,pins = "spdif";
rtk119x,function = "spdif_out";
};
i2s_out@0 {
rtk119x,pins = "ao_lrck", "ao_bck", "aock", "ao_sd_0";
rtk119x,function = "ao";
};
i2s_out@1 {
rtk119x,pins = "ao_lrck", "ao_bck", "aock", "ao_sd_0", "ao_sd_1", "ao_sd_2";
rtk119x,function = "ao";
};
etn_led@0 {
rtk119x,pins = "etn_led_link", "etn_led_rxtx";
rtk119x,function = "etn_led";
linux,phandle = <0x10>;
phandle = <0x10>;
};
rgmii@0 {
rtk119x,pins = "rgmii0_txc", "rgmii0_tx_ctl", "rgmii0_txd_0", "rgmii0_txd_1", "rgmii0_txd_2", "rgmii0_txd_3", "rgmii0_rxc", "rgmii0_rx_ctl", "rgmii0_rxd_0", "rgmii0_rxd_1", "rgmii0_rxd_2", "rgmii0_rxd_3", "rgmii0_mdio", "rgmii0_mdc";
rtk119x,function = "rgmii";
linux,phandle = <0xb>;
phandle = <0xb>;
};
rgmii@1 {
rtk119x,pins = "rgmii1_txc", "rgmii1_tx_ctl", "rgmii1_txd_0", "rgmii1_txd_1", "rgmii1_txd_2", "rgmii1_txd_3", "rgmii1_rxc", "rgmii1_rx_ctl", "rgmii1_rxd_0", "rgmii1_rxd_1", "rgmii1_rxd_2", "rgmii1_rxd_3";
rtk119x,function = "rgmii";
};
pcie@0 {
rtk119x,pins = "pcie_clkreq_0", "pcie_clkreq_1";
rtk119x,function = "pcie";
linux,phandle = <0xa>;
phandle = <0xa>;
};
scpu_ejtag@0 {
rtk119x,pins = "gpio_4", "gpio_5", "gpio_6", "gpio_7", "gpio_8", "ejtag_scpu_loc";
rtk119x,function = "scpu_ejtag_loc_gpio";
};
scpu_ejtag@1 {
rtk119x,pins = "mmc_cmd", "mmc_clk", "mmc_wp", "mmc_data_0", "mmc_data_3", "ejtag_scpu_loc";
rtk119x,function = "scpu_ejtag_loc_cr";
};
acpu_ejtag@0 {
rtk119x,pins = "iso_gpio_4", "iso_gpio_5", "iso_gpio_7", "iso_gpio_2", "iso_gpio_3", "ejtag_avcpu_loc";
rtk119x,function = "acpu_ejtag_loc_iso";
};
dc_fan_sensor@0 {
rtk119x,pins = "gpio_9";
rtk119x,function = "dc_fan_sensor";
linux,phandle = <0xf>;
phandle = <0xf>;
};
pwm0_0@0 {
rtk119x,pins = "iso_gpio_21";
rtk119x,function = "pwm";
};
pwm0_1@0 {
rtk119x,pins = "etn_led_link";
rtk119x,function = "pwm";
};
pwm1_0@0 {
rtk119x,pins = "iso_gpio_22";
rtk119x,function = "pwm";
};
pwm1_1@0 {
rtk119x,pins = "etn_led_rxtx";
rtk119x,function = "pwm";
};
pwm2_0@0 {
rtk119x,pins = "iso_gpio_23";
rtk119x,function = "pwm";
};
pwm2_1@0 {
rtk119x,pins = "nat_led_0";
rtk119x,function = "pwm";
};
pwm3_0@0 {
rtk119x,pins = "iso_gpio_24";
rtk119x,function = "pwm";
};
pwm3_1@0 {
rtk119x,pins = "nat_led_1";
rtk119x,function = "pwm";
};
};
irda@98007400 {
Realtek,irrx-protocol = <0x1>;
Realtek,irtx-protocol = <0x1>;
Realtek,cust-code = <0x7f80>;
Realtek,scancode-msk = <0xff0000>;
Realtek,custcode-msk = <0xffff>;
Realtek,keymap-tbl = <0x18 0x74 0x5a 0x161 0x58 0x9a 0x1a 0x179 0x14 0x66 0x56 0x165 0x54 0x166 0x19 0xe8 0x57 0x9e 0x55 0xcf 0x17 0x80 0x15 0x174 0x4f 0xa8 0x4d 0x67 0x16 0xd0 0xc 0x69 0x4c 0x160 0xe 0x6a 0x8 0x19c 0x48 0x6c 0x9 0x197 0x4b 0x72 0x49 0x73 0xb 0x214 0xa 0x213 0xeeee 0x0 0xeeee 0x1 0xffff 0x110 0xffff 0x71>;
Realtek,reg-ir-dpir = <0x32>;
compatible = "Realtek,rtk-irda";
interrupt-parent = <0x11>;
reg = <0x98007000 0x400 0x98007400 0x100>;
interrupts = <0x1 0x5>;
status = "okay";
};
rtk_usb_power_manager {
compatible = "Realtek,rtd129x-usb-power-manager";
reg = <0x98000000 0x10>;
realtek,type_c-power-gpio = <0x12 0x1 0x1 0x0>;
realtek,u2host-power-gpio = <0x13 0x13 0x1 0x0>;
port0 = <0x14>;
port1 = <0x15>;
port2 = <0x16 0x17>;
port3 = <0x18>;
status = "okay";
};
usb_phy_rle0599 {
compatible = "Realtek,rtd129x-usb_phy_rle0599";
reg = <0x98013824 0x4 0x980130a4 0x4 0x980171cc 0x4>;
portN = <0x0>;
phy_data_page0_size = <0x9>;
phy_data_page0_addr = [e0 e1 e2 e3 e4 e5 e6 e7 f5];
phy_data_page0_data = [e0 30 3a 8d 69 65 91 81 81];
phy_data_page1_size = <0x8>;
phy_data_page1_addr = <0xe0e1e2e3 0xe4e5e6e7>;
phy_data_page1_data = <0x25ef6000 0xf18e3>;
linux,phandle = <0x19>;
phandle = <0x19>;
};
ehci@98013000 {
compatible = "Realtek,rtd129x-ehci";
reg = <0x98013000 0x100>;
interrupts = <0x0 0x15 0x4>;
usb-phy = <0x19>;
delay_probe_work;
status = "okay";
linux,phandle = <0x16>;
phandle = <0x16>;
};
ohci@98013400 {
compatible = "Realtek,rtd129x-ohci";
reg = <0x98013400 0x100>;
interrupts = <0x0 0x15 0x4>;
usb-phy = <0x19>;
delay_probe_work;
status = "okay";
linux,phandle = <0x17>;
phandle = <0x17>;
};
usb2_udc@981E0000 {
compatible = "Realtek,rtd129x-usb2-udc";
reg = <0x981e0000 0x8000 0x98013800 0x80>;
interrupts = <0x0 0x15 0x4>;
usb-phy = <0x19>;
status = "okay";
};
dwc3_drd_usb3phy {
compatible = "Realtek,rtd129x-usb3phy";
reg = <0x98013210 0x4>;
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
portN = <0x0>;
phy_data_size = <0x33>;
phy_data_addr = [00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 09 09 09];
phy_data_revA = [40 08 e0 4a 60 46 27 f1 72 f5 2a d3 00 0e 2e 00 35 91 52 1c a6 00 a9 05 c0 00 ef 1c 20 00 00 00 00 0c 4c 00 fc 00 0c 81 de 01 00 00 00 00 00 00 00 00 40 04 12 60 ff 00 cb 00 a0 3f c2 e0 28 07 94 5a 88 aa 00 57 ab 66 08 00 00 00 04 0a 01 d6 f8 42 30 80 30 82 20 78 ff ff ff ff 00 00 00 40 52 1c 50 1c 52 1c];
linux,phandle = <0x1b>;
phandle = <0x1b>;
};
dwc3_drd_usb2phy {
compatible = "Realtek,rtd129x-usb2phy";
reg = <0x98028280 0x4 0x98013214 0x4>;
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
portN = <0x0>;
phy_data_page0_size = <0x9>;
phy_data_page0_addr = [e0 e1 e2 e3 e4 e5 e6 e7 f5];
phy_data_page0_data = [e0 30 3a 8d 68 65 91 81 81];
phy_data_page1_size = <0x8>;
phy_data_page1_addr = <0xe0e1e2e3 0xe4e5e6e7>;
phy_data_page1_data = <0x25ef6000 0xf18e3>;
linux,phandle = <0x1a>;
phandle = <0x1a>;
};
rtk_dwc3_drd@98013200 {
compatible = "Realtek,rtd129x-dwc3-drd";
reg = <0x98013200 0x200>;
interrupts = <0x0 0x15 0x4>;
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
delay_probe_work;
status = "okay";
linux,phandle = <0x14>;
phandle = <0x14>;
dwc3_drd@98020000 {
compatible = "synopsys,dwc3";
reg = <0x98020000 0x9000>;
interrupts = <0x0 0x15 0x4>;
usb-phy = <0x1a 0x1b>;
dr_mode = "peripheral";
};
rtk_dwc3_drd_type_c {
reg = <0x98013200 0x200>;
realtek,type_c-power-gpio = <0x12 0x1 0x1 0x0>;
realtek,rd_ctrl-gpio = <0x12 0x22 0x1 0x0>;
interrupts = <0x0 0x3c 0x4>;
cc1_rp = "rp4p7k";
cc1_rp_code = <0x9>;
cc1_rd = "internal";
cc1_rd_code = <0x0>;
cc1_vref_ufp = [00 00 00];
cc1_vref_dfp_usb = [00 00 00];
cc1_vref_dfp_1_5 = [00 00 00];
cc1_vref_dfp_3_0 = [00 01 01];
cc2_rp = "rp4p7k";
cc2_rp_code = <0x2>;
cc2_rd = "internal";
cc2_rd_code = <0x0>;
cc2_vref_ufp = [00 00 00];
cc2_vref_dfp_usb = [00 00 00];
cc2_vref_dfp_1_5 = [00 00 00];
cc2_vref_dfp_3_0 = [00 01 00];
compatible = "Realtek,rtd1295-dwc3-type_c";
drd_mode;
};
};
dwc3_u2host_usb2phy {
compatible = "Realtek,rtd129x-usb2phy";
reg = <0x98031280 0x4 0x98013c14 0x4>;
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
portN = <0x0>;
phy_data_page0_size = <0x9>;
phy_data_page0_addr = [e0 e1 e2 e3 e4 e5 e6 e7 f5];
phy_data_page0_data = [e0 30 3a 8d 66 65 91 81 81];
phy_data_page1_size = <0x8>;
phy_data_page1_addr = <0xe0e1e2e3 0xe4e5e6e7>;
phy_data_page1_data = <0x25ef6000 0xf18e3>;
linux,phandle = <0x1c>;
phandle = <0x1c>;
};
rtk_dwc3_u2host@98013E00 {
compatible = "Realtek,rtd129x-dwc3-u2h";
reg = <0x98013c00 0x200>;
interrupts = <0x0 0x15 0x4>;
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
delay_probe_work;
status = "okay";
linux,phandle = <0x15>;
phandle = <0x15>;
dwc3_u2host@98029000 {
compatible = "synopsys,dwc3";
reg = <0x98029000 0x9000>;
interrupts = <0x0 0x15 0x4>;
usb-phy = <0x1c>;
dr_mode = "host";
};
};
dwc3_u3host_usb3phy {
reg = <0x98013e10 0x4>;
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
portN = <0x0>;
phy_data_size = <0x33>;
phy_data_addr = [00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 09 09 09];
phy_data_revA = [40 08 e0 4a 60 46 27 f1 72 f5 2a d3 00 0e 2e 00 35 91 52 1c a6 00 a9 05 c0 00 ef 1c 20 00 00 00 00 0c 4c 00 fc 00 0c 81 de 01 00 00 00 00 00 00 00 00 40 04 12 60 ff 00 cb 00 a0 3f c2 e0 28 07 94 24 28 4a 00 57 ab 66 08 00 00 00 04 0a 01 d6 f8 02 30 80 30 82 20 78 ff ff ff ff 00 00 00 40 52 1c 50 1c 52 1c];
status = "disable";
linux,phandle = <0x1e>;
phandle = <0x1e>;
};
dwc3_u3host_usb2phy {
reg = <0x981f8280 0x4 0x98013e14 0x4>;
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
portN = <0x0>;
phy_data_page0_size = <0x9>;
phy_data_page0_addr = [e0 e1 e2 e3 e4 e5 e6 e7 f5];
phy_data_page0_data = [e0 30 3a 8d 66 65 91 81 81];
phy_data_page1_size = <0x8>;
phy_data_page1_addr = <0xe0e1e2e3 0xe4e5e6e7>;
phy_data_page1_data = <0x25ef6000 0xf18e3>;
status = "disable";
linux,phandle = <0x1d>;
phandle = <0x1d>;
};
rtk_dwc3_u3host@98013E00 {
reg = <0x98013e00 0x200>;
interrupts = <0x0 0x15 0x4>;
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
delay_probe_work;
status = "disable";
linux,phandle = <0x18>;
phandle = <0x18>;
dwc3_u3host@981F0000 {
compatible = "synopsys,dwc3";
reg = <0x981f0000 0x9000>;
interrupts = <0x0 0x15 0x4>;
usb-phy = <0x1d 0x1e>;
dr_mode = "host";
};
};
soft_reset1@98000000 {
reg = <0x98000000 0x4>;
compatible = "realtek,129x-soft-reset";
#reset-cells = <0x1>;
linux,phandle = <0x1f>;
phandle = <0x1f>;
};
soft_reset2@98000004 {
reg = <0x98000004 0x4>;
compatible = "realtek,129x-soft-reset";
#reset-cells = <0x1>;
linux,phandle = <0x20>;
phandle = <0x20>;
};
soft_reset3@98000008 {
reg = <0x98000008 0x4>;
compatible = "realtek,129x-soft-reset";
#reset-cells = <0x1>;
linux,phandle = <0x3b>;
phandle = <0x3b>;
};
soft_reset4@98000050 {
reg = <0x98000050 0x4>;
compatible = "realtek,129x-soft-reset";
#reset-cells = <0x1>;
linux,phandle = <0x21>;
phandle = <0x21>;
};
soft_reset@98007088 {
reg = <0x98007088 0x4>;
compatible = "realtek,129x-soft-reset";
#reset-cells = <0x1>;
linux,phandle = <0x22>;
phandle = <0x22>;
};
rst1_init {
compatible = "realtek,129x-rstc-init";
resets = <0x1f 0x1f 0x1f 0x1e 0x1f 0x1d 0x1f 0x1c 0x1f 0x1b 0x1f 0x1a 0x1f 0x19 0x1f 0x18 0x1f 0x17 0x1f 0x16 0x1f 0x15 0x1f 0x14 0x1f 0x13 0x1f 0x12 0x1f 0x11 0x1f 0x10 0x1f 0xf 0x1f 0xe 0x1f 0xd 0x1f 0xc 0x1f 0xb 0x1f 0xa 0x1f 0x9 0x1f 0x8 0x1f 0x7 0x1f 0x6 0x1f 0x5 0x1f 0x4 0x1f 0x3 0x1f 0x2 0x1f 0x1 0x1f 0x0>;
reset-names = "rstn_rsa", "rstn_mipi", "rstn_nf", "rstn_ae", "rstn_tp", "rstn_md", "rstn_cp", "rstn_dc_phy", "rstn_dcu", "rstn_se", "rstn_lvds", "rstn_vo", "rstn_tve", "rstn_gpu", "rstn_aio", "rstn_etn", "rstn_ve3", "rstn_ve2", "rstn_ve1", "rstn_hdmi", "sata_func_exist_0", "rstn_sata_phy_pow_0", "*rstn_usb_phy1", "*rstn_usb_phy0", "rstn_sata_phy_0", "rstn_usb", "rstn_sata_0", "rstn_usb3_p0_mdio", "rstn_gspi", "*rstn_usb3_phy0_pow", "rstn_nat", "rstn_misc";
};
rst2_init {
compatible = "realtek,129x-rstc-init";
resets = <0x20 0x1f 0x20 0x1e 0x20 0x1d 0x20 0x1c 0x20 0x1b 0x20 0x1a 0x20 0x19 0x20 0x18 0x20 0x17 0x20 0x16 0x20 0x15 0x20 0x14 0x20 0x13 0x20 0x12 0x20 0x11 0x20 0x10 0x20 0xf 0x20 0xe 0x20 0xd 0x20 0xc 0x20 0xb 0x20 0xa 0x20 0x9 0x20 0x8 0x20 0x7 0x20 0x6 0x20 0x5 0x20 0x4 0x20 0x3 0x20 0x2 0x20 0x1 0x20 0x0>;
reset-names = "rstn_sds_phy", "rstn_cbus_tx", "rstn_misc_sc", "rstn_ur1", "rstn_ur2", "rstn_i2c_1", "rstn_i2c_2", "rstn_i2c_3", "rstn_i2c_4", "rstn_pcie1_nonstich", "rstn_pcie1_power", "rstn_pcie1_core", "rstn_pcie1_stitch", "rstn_i2c_5", "rstn_pcie1", "rstn_pcie1_phy", "rstn_pcie0_nonstich", "rstn_pcie0_power", "rstn_pcie0_core", "rstn_sdio", "rstn_emmc", "rstn_cr", "rstn_pcr_cnt", "rstn_pcie0", "rstn_pcie0_phy", "rstn_pcie0_stitch", "rstn_usb3_p1_mdio", "*rstn_usb3_phy1_pow", "*rstn_usb_phy2", "*rstn_usb_phy3", "rstn_jpeg", "rstn_acpu";
};
rst4_init {
compatible = "realtek,129x-rstc-init";
resets = <0x21 0xf 0x21 0xe 0x21 0xd 0x21 0xc 0x21 0xb 0x21 0xa 0x21 0x9 0x21 0x8 0x21 0x7 0x21 0x6 0x21 0x5 0x21 0x4 0x21 0x3 0x21 0x2 0x21 0x1 0x21 0x0>;
reset-names = "rstn_disp", "rstn_pcie1_phy_mdio", "rstn_pcie0_phy_mdio", "rstn_hdmirx_wrap", "rstn_fan", "rstn_sata_1", "rstn_sata_phy_1", "sata_func_exist_1", "rstn_sata_phy_pow_1", "rstn_cbusrx", "rstn_hdmirx", "rstn_dcphy_ssc_dig", "rstn_dcphy_ldo", "rstn_dcphy_ptr", "rstn_dcphy_alert_rx", "rstn_dcphy_crt";
};
iso_rst_init {
compatible = "realtek,129x-rstc-init";
resets = <0x22 0xd 0x22 0xc 0x22 0xb 0x22 0xa 0x22 0x9 0x22 0x8 0x22 0x7 0x22 0x6 0x22 0x5 0x22 0x4 0x22 0x3 0x22 0x2 0x22 0x1>;
reset-names = "iso_rstn_cbus", "iso_rstn_i2c_1", "iso_rstn_i2c_0", "iso_rstn_gphy", "iso_rstn_gmac", "iso_rstn_ur0", "iso_rstn_efuse", "iso_rstn_cbusrx", "iso_rstn_cbustx", "iso_rstn_dp", "iso_rstn_cec1", "iso_rstn_cec0", "iso_rstn_ir";
};
grouped_soft_reset1@98000000 {
reg = <0x98000000 0x4>;
compatible = "realtek,129x-soft-reset";
#reset-cells = <0x1>;
is-grouped;
ignore-in-pm;
};
grouped_soft_reset2@98000004 {
reg = <0x98000004 0x4>;
compatible = "realtek,129x-soft-reset";
#reset-cells = <0x1>;
is-grouped;
ignore-in-pm;
linux,phandle = <0x23>;
phandle = <0x23>;
};
group_rst_init {
compatible = "realtek,129x-rstc-init";
reset-names = "rstn_pcie0_all", "rstn_pcie1_all";
resets = <0x23 0xe1c0 0x23 0x7b0000>;
};
usb_rst {
reg = <0x98000000 0x8>;
#reset-cells = <0x1>;
compatible = "realtek,129x-soft-reset";
is-usb;
ignore-in-pm;
linux,phandle = <0x24>;
phandle = <0x24>;
};
usb_rst_init {
compatible = "realtek,129x-rstc-init";
resets = <0x24 0x8 0x24 0x9 0x24 0x23 0x24 0x22 0x24 0x2 0x24 0x24 0x24 0x4 0x24 0x25 0x24 0x100>;
reset-names = "rstn_usb_phy0", "rstn_usb_phy1", "rstn_usb_phy2", "rstn_usb_phy3", "rstn_usb3_phy0_pow", "rstn_usb3_phy1_pow", "*rstn_usb3_p0_mdio", "*rstn_usb3_p1_mdio", "rstn_usb_apply";
};
clocks {
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
dummy {
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x0>;
};
osc27M {
compatible = "realtek,129x-clk-composite";
#clock-cells = <0x0>;
has-clk-rate = "fixed-rate";
fixed-rate,rate = <0x19bfcc0>;
linux,phandle = <0x25>;
phandle = <0x25>;
};
spll {
compatible = "realtek,129x-pll-generic";
#clock-cells = <0x0>;
clocks = <0x25>;
reg = <0x98000504 0x4 0x98000504 0x4 0x98000030 0x4 0x98000500 0x4 0x9800051c 0x4>;
factor,type = "scpu";
factor,num = <0x3>;
factor,shift = <0xb 0x0 0x7 0x0 0x14>;
factor,width = <0x8 0xb 0x2 0x1 0x1>;
factor,max-rate = <0xb2d05e00>;
factor,min-rate = <0xbebc200>;
scpu,pll,workaround = <0x34055501 0x4038500>;
};
pll_bus {
compatible = "realtek,129x-pll-generic";
#clock-cells = <0x0>;
clocks = <0x25>;
reg = <0x98000524 0x4 0x98000524 0x4>;
factor,type = "nf";
factor,num = <0x2>;
factor,shift = <0xb 0x0>;
factor,width = <0x8 0xb>;
factor,max-rate = <0x23c34600>;
factor,min-rate = <0xbebc200>;
linux,phandle = <0x26>;
phandle = <0x26>;
};
pll_bus_div2 {
compatible = "realtek,129x-clk-composite";
#clock-cells = <0x0>;
clocks = <0x26>;
has-clk-rate = "fixed-factor";
fixed-factor,div = <0x2>;
fixed-factor,mult = <0x1>;
linux,phandle = <0x27>;
phandle = <0x27>;
};
clk_sys {
compatible = "realtek,129x-clk-composite";
#clock-cells = <0x0>;
reg = <0x98000030 0x4>;
clocks = <0x26 0x27>;
clock-names = "pll_bus", "pll_bus_div2";
has-clk-mux;
mux,reg-index = <0x0>;
mux,shift = <0x0>;
mux,width = <0x1>;
linux,phandle = <0x2e>;
phandle = <0x2e>;
};
pll_bus_h {
compatible = "realtek,129x-pll-generic";
#clock-cells = <0x0>;
clocks = <0x25>;
reg = <0x98000544 0x4 0x98000544 0x4>;
factor,type = "nf";
factor,num = <0x2>;
factor,shift = <0xb 0x0>;
factor,width = <0x8 0xb>;
factor,max-rate = <0x23c34600>;
factor,min-rate = <0xbebc200>;
linux,phandle = <0x28>;
phandle = <0x28>;
};
clk_sysh {
compatible = "realtek,129x-clk-composite";
#clock-cells = <0x0>;
clocks = <0x28>;
has-clk-rate = "fixed-factor";
fixed-factor,div = <0x1>;
fixed-factor,mult = <0x1>;
linux,phandle = <0x2a>;
phandle = <0x2a>;
};
pll_ddsa {
compatible = "realtek,129x-pll-generic";
#clock-cells = <0x0>;
clocks = <0x25>;
reg = <0x98000564 0x4 0x98000564 0x4>;
factor,type = "nf";
factor,num = <0x2>;
factor,shift = <0xb 0x0>;
factor,width = <0x8 0xb>;
factor,max-rate = <0x23c34600>;
factor,min-rate = <0xbebc200>;
};
pll_ddsb {
compatible = "realtek,129x-pll-generic";
#clock-cells = <0x0>;
clocks = <0x25>;
reg = <0x98000584 0x4 0x98000584 0x4>;
factor,type = "nf";
factor,num = <0x2>;
factor,shift = <0xb 0x0>;
factor,width = <0x8 0xb>;
factor,max-rate = <0x23c34600>;
factor,min-rate = <0xbebc200>;
};
pll_vodma {
compatible = "realtek,129x-pll-generic";
#clock-cells = <0x0>;
clocks = <0x25>;
reg = <0x98000260 0x4 0x98000260 0x4 0x98000260 0x4>;
factor,type = "mno";
factor,num = <0x3>;
factor,shift = <0x4 0xc 0x11>;
factor,width = <0x8 0x2 0x2>;
factor,max-rate = <0x29b92700>;
factor,min-rate = <0xbebc200>;
linux,phandle = <0x29>;
phandle = <0x29>;
};
clk_vodma {
compatible = "realtek,129x-clk-composite";
#clock-cells = <0x0>;
reg = <0x9800000c 0x4>;
clocks = <0x29>;
has-clk-gate;
gate,reg-index = <0x0>;
gate,shift = <0xf>;
};
pll_ve1 {
compatible = "realtek,129x-pll-generic";
#clock-cells = <0x0>;
clocks = <0x25>;
reg = <0x98000114 0x4 0x98000114 0x4 0x98000114 0x4>;
factor,type = "mno";
factor,num = <0x3>;
factor,shift = <0x4 0xc 0x11>;
factor,width = <0x8 0x2 0x2>;
factor,max-rate = <0x29b92700>;
factor,min-rate = <0xbebc200>;
linux,phandle = <0x2b>;
phandle = <0x2b>;
};
pll_ve2 {
compatible = "realtek,129x-pll-generic";
#clock-cells = <0x0>;
clocks = <0x25>;
reg = <0x980001d0 0x4 0x980001d0 0x4 0x980001d0 0x4>;
factor,type = "mno";
factor,num = <0x3>;
factor,shift = <0x4 0xc 0x11>;
factor,width = <0x8 0x2 0x2>;
factor,max-rate = <0x2cb41780>;
factor,min-rate = <0xbebc200>;
linux,phandle = <0x2c>;
phandle = <0x2c>;
};
clk_ve1 {
compatible = "realtek,129x-clk-composite";
#clock-cells = <0x0>;
reg = <0x9800004c 0x4 0x9800000c 0x4>;
clocks = <0x2a 0x2b 0x2c 0x2c>;
clock-names = "clk_sysh", "pll_ve1", "pll_ve2", "pll_ve2";
has-clk-mux;
mux,reg-index = <0x0>;
mux,shift = <0x0>;
mux,width = <0x2>;
has-clk-gate;
gate,reg-index = <0x1>;
gate,shift = <0xc>;
linux,phandle = <0x2f>;
phandle = <0x2f>;
};
clk_ve2 {
compatible = "realtek,129x-clk-composite";
#clock-cells = <0x0>;
reg = <0x9800004c 0x4 0x9800000c 0x4>;
clocks = <0x2a 0x2b 0x2c 0x2c>;
clock-names = "clk_sysh", "pll_ve1", "pll_ve2", "pll_ve2";
has-clk-mux;
mux,reg-index = <0x0>;
mux,shift = <0x2>;
mux,width = <0x2>;
has-clk-gate;
gate,reg-index = <0x1>;
gate,shift = <0xd>;
linux,phandle = <0x31>;
phandle = <0x31>;
};
clk_ve3 {
compatible = "realtek,129x-clk-composite";
#clock-cells = <0x0>;
reg = <0x9800004c 0x4 0x9800000c 0x4>;
clocks = <0x2a 0x2b 0x2c 0x2c>;
clock-names = "clk_sysh", "pll_ve1", "pll_ve2", "pll_ve2";
has-clk-mux;
mux,reg-index = <0x0>;
mux,shift = <0x4>;
mux,width = <0x2>;
has-clk-gate;
gate,reg-index = <0x1>;
gate,shift = <0x1d>;
linux,phandle = <0x33>;
phandle = <0x33>;
};
pll_gpu {
compatible = "realtek,129x-pll-generic";
#clock-cells = <0x0>;
clocks = <0x25>;
reg = <0x980005a4 0x4 0x980005a4 0x4 0x980005a0 0x4>;
factor,type = "gpu";
factor,num = <0x2>;
factor,shift = <0xb 0x0 0x0>;
factor,width = <0x8 0xb 0x4>;
factor,max-rate = <0x2faf0800>;
factor,min-rate = <0xbebc200>;
linux,phandle = <0x2d>;
phandle = <0x2d>;
};
clk_gpu {
compatible = "realtek,129x-clk-composite";
#clock-cells = <0x0>;
reg = <0x9800000c 0x4>;
clocks = <0x2d>;
has-clk-gate;
gate,reg-index = <0x0>;
gate,shift = <0xb>;
linux,phandle = <0x36>;
phandle = <0x36>;
};
pll_acpu {
compatible = "realtek,129x-pll-generic";
#clock-cells = <0x0>;
clocks = <0x25>;
reg = <0x980005c4 0x4 0x980005c4 0x4>;
factor,type = "nf";
factor,num = <0x2>;
factor,shift = <0xb 0x0>;
factor,width = <0x8 0xb>;
factor,max-rate = <0x23c34600>;
factor,min-rate = <0xbebc200>;
};
jpeg_gates {
compatible = "realtek,129x-clk-gates";
#clock-cells = <0x1>;
reg = <0x98000010 0x4>;
clocks = <0x2e>;
mask = <0x8>;
clock-output-names = "jpeg";
linux,phandle = <0x35>;
phandle = <0x35>;
};
clk_enable@9800000c {
compatible = "realtek,129x-clk-gates";
#clock-cells = <0x1>;
reg = <0x9800000c 0x4>;
clock-output-names = "clk_en_misc", "clk_en_pcie0", "clk_en_sata_0", "clk_en_gspi", "clk_en_usb", "clk_en_pcr", "clk_en_iso_misc", "clk_en_sata_alive_0", "clk_en_hdmi", "clk_en_etn", "clk_en_aio", "clk_en_tve", "clk_en_lvds", "clk_en_se", "clk_en_dcu", "clk_en_cp", "clk_en_md", "clk_en_tp", "clk_en_rsa", "clk_en_nf", "clk_en_emmc", "clk_en_cr", "clk_en_sdio_ip", "clk_en_mipi", "clk_en_emmc_ip", "clk_en_sdio", "clk_en_sd_ip";
mask = <0xdfff47ff>;
linux,phandle = <0x38>;
phandle = <0x38>;
};
clk_enable@98000010 {
compatible = "realtek,129x-clk-gates";
#clock-cells = <0x1>;
reg = <0x98000010 0x4>;
clock-output-names = "clk_en_nat", "clk_en_misc_i2c_5", "clk_en_pcie1", "clk_en_misc_sc", "clk_en_cbus_tx", "clk_en_misc_rtc", "clk_en_misc_i2c_4", "clk_en_misc_i2c_3", "clk_en_misc_i2c_2", "clk_en_misc_i2c_1", "clk_en_aio_au_codec", "clk_en_aio_mod", "clk_en_aio_da", "clk_en_aio_hdmi", "clk_en_aio_spdif", "clk_en_aio_i2s", "clk_en_aio_mclk", "clk_en_hdmirx", "clk_en_sata_1", "clk_en_sata_alive_1", "clk_en_ur2", "clk_en_ur1", "clk_en_fan", "clk_en_dcphy_0", "clk_en_dcphy_1";
mask = <0xffffe4e3>;
linux,phandle = <0x39>;
phandle = <0x39>;
};
clk_enable@9800708c {
compatible = "realtek,129x-clk-gates";
#clock-cells = <0x1>;
reg = <0x9800708c 0x4>;
mask = <0x1ffc>;
clock-output-names = "clk_en_misc_cec0", "clk_en_cbusrx_sys", "clk_en_cbustx_sys", "clk_en_cbus_sys", "clk_en_cbus_osc", "clk_en_misc_ir", "clk_en_misc_ur0", "clk_en_i2c0", "clk_en_i2c1", "clk_en_etn_250m", "clk_en_etn_sys";
linux,phandle = <0x3a>;
phandle = <0x3a>;
};
};
hdmirx@98034000 {
Realtek,edid-table = <0x0 0xff 0xff 0xff 0xff 0xff 0xff 0x0 0x4a 0x8b 0x95 0x12 0x0 0x0 0x0 0x0 0xff 0x1a 0x1 0x3 0x81 0x46 0x27 0x78 0x8a 0xa5 0x8e 0xa6 0x54 0x4a 0x9c 0x26 0x12 0x45 0x46 0x21 0x8 0x0 0xd1 0xc0 0x81 0xc0 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x2 0x3a 0x80 0x18 0x71 0x38 0x2d 0x40 0x58 0x2c 0x45 0x0 0x20 0xc2 0x31 0x0 0x0 0x1e 0x1 0x1d 0x0 0x72 0x51 0xd0 0x1e 0x20 0x6e 0x28 0x55 0x0 0x20 0xc2 0x31 0x0 0x0 0x1e 0x0 0x0 0x0 0xfd 0x0 0x32 0x4b 0x18 0x3c 0xb 0x0 0xa 0x20 0x20 0x20 0x20 0x20 0x20 0x0 0x0 0x0 0xfc 0x0 0x52 0x54 0x44 0x31 0x32 0x39 0x35 0xa 0x20 0x20 0x20 0x20 0x20 0x1 0xac 0x2 0x3 0x29 0x71 0x83 0x1 0x0 0x0 0x6e 0x3 0xc 0x0 0x10 0x0 0x0 0x3c 0x20 0x0 0x80 0x1 0x2 0x3 0x4 0x49 0x90 0x1f 0x22 0x20 0x5 0x14 0x4 0x11 0x2 0x23 0x9 0x7f 0x7 0xe3 0x5 0x3 0x0 0x2 0x3a 0x80 0x18 0x71 0x38 0x2d 0x40 0x58 0x2c 0x45 0x0 0x20 0xc2 0x31 0x0 0x0 0x1e 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x7f>;
Realtek,edid2p0-table = <0x0 0xff 0xff 0xff 0xff 0xff 0xff 0x0 0x4a 0x8b 0x95 0x12 0x0 0x0 0x0 0x0 0xff 0x1a 0x1 0x3 0x81 0x46 0x27 0x78 0x8a 0xa5 0x8e 0xa6 0x54 0x4a 0x9c 0x26 0x12 0x45 0x46 0x21 0x8 0x0 0xd1 0xc0 0x81 0xc0 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x2 0x3a 0x80 0x18 0x71 0x38 0x2d 0x40 0x58 0x2c 0x45 0x0 0x20 0xc2 0x31 0x0 0x0 0x1e 0x1 0x1d 0x0 0x72 0x51 0xd0 0x1e 0x20 0x6e 0x28 0x55 0x0 0x20 0xc2 0x31 0x0 0x0 0x1e 0x0 0x0 0x0 0xfd 0x0 0x32 0x4b 0x18 0x3c 0xb 0x0 0xa 0x20 0x20 0x20 0x20 0x20 0x20 0x0 0x0 0x0 0xfc 0x0 0x52 0x54 0x44 0x31 0x32 0x39 0x35 0xa 0x20 0x20 0x20 0x20 0x20 0x1 0xac 0x2 0x3 0x3a 0x71 0x83 0x1 0x0 0x0 0x6e 0x3 0xc 0x0 0x10 0x0 0x0 0x3c 0x20 0x0 0x80 0x1 0x2 0x3 0x4 0x67 0xd8 0x5d 0xc4 0x1 0x77 0x80 0x0 0x4e 0x90 0x1f 0x22 0x20 0x5 0x14 0x4 0x11 0x2 0x5d 0x5e 0x5f 0x60 0x61 0x23 0x9 0x7f 0x7 0xe3 0x5 0x3 0x0 0xe3 0xe 0x61 0x60 0x8 0xe8 0x0 0x30 0xf2 0x70 0x5a 0x80 0xb0 0x58 0x8a 0x0 0x20 0xc2 0x31 0x0 0x0 0x1e 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x49>;
compatible = "Realtek,rtk-mipi-top";
reg = <0x98037000 0xe0 0x98034000 0xf54 0x98035f00 0x2c 0x98037700 0x98 0x98004000 0xf0 0x98004100 0x104>;
interrupts = <0x0 0x17 0x4>;
gpio-rx-hpd-ctrl = <0x12 0x16 0x1 0x0>;
power-saving = <0x0>;
status = "disabled";
};
power_control {
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
pctrl_clk_en@9800000c {
compatible = "realtek,powerctrl-once";
reg = <0x9800000c 0x4>;
mask = <0x28a03012>;
power-state = "off";
};
pctrl_clk_en@98000010 {
compatible = "realtek,powerctrl-once";
reg = <0x98000010 0x4>;
mask = <0x100e0a2>;
power-state = "off";
};
pctrl_clk_en@9800708c {
compatible = "realtek,powerctrl-once";
reg = <0x9800708c 0x4>;
mask = <0x6f8>;
power-state = "off";
};
pctrl_soft_reset@98000000 {
compatible = "realtek,powerctrl-once";
reg = <0x98000000 0x4>;
mask = <0x68000354>;
power-state = "off";
};
pctrl_soft_reset@98000004 {
compatible = "realtek,powerctrl-once";
reg = <0x98000004 0x4>;
mask = <0x507be1fc>;
power-state = "off";
};
pctrl_soft_reset@98000050 {
compatible = "realtek,powerctrl-once";
reg = <0x98000050 0x4>;
mask = <0x7020>;
power-state = "off";
};
pctrl_soft_reset@98007088 {
compatible = "realtek,powerctrl-once";
reg = <0x98007088 0x4>;
mask = <0x2062>;
power-state = "off";
};
pctrl_ve1 {
#powerctrl-cells = <0x0>;
compatible = "realtek,powerctrl-sram";
reg = <0x98000400 0x4 0x9800038c 0x4 0x98000390 0x4>;
iso-cell-shift = <0x0>;
resets = <0x1f 0xd>;
reset-names = "rstn_ve1";
power-state = "off";
linux,phandle = <0x30>;
phandle = <0x30>;
};
pctrl_l4_icg_ve1 {
compatible = "realtek,powerctrl-simple";
reg = <0x98043000 0x4>;
shift = <0x6>;
width = <0x1>;
on-value = <0x0>;
off-value = <0x1>;
is-l4-icg;
clocks = <0x2f>;
resets = <0x1f 0xd>;
powerctrls = <0x30>;
status = "disabled";
};
pctrl_ve2 {
#powerctrl-cells = <0x0>;
compatible = "realtek,powerctrl-sram";
reg = <0x98000400 0x4 0x980003cc 0x4 0x980003d0 0x4>;
iso-cell-shift = <0x4>;
resets = <0x1f 0xe>;
reset-names = "rstn_ve2";
power-state = "off";
linux,phandle = <0x32>;
phandle = <0x32>;
};
pctrl_l4_icg_ve2 {
compatible = "realtek,powerctrl-simple";
reg = <0x98047e00 0x4>;
shift = <0x6>;
width = <0x1>;
on-value = <0x0>;
off-value = <0x1>;
is-l4-icg;
clocks = <0x31>;
resets = <0x1f 0xe>;
powerctrls = <0x32>;
status = "disabled";
};
pctrl_ve3 {
#powerctrl-cells = <0x0>;
compatible = "realtek,powerctrl-sram";
reg = <0x98000400 0x4 0x980003ec 0x4 0x980003f0 0x4>;
iso-cell-shift = <0x6>;
resets = <0x1f 0xf>;
reset-names = "rstn_ve3";
power-state = "off";
linux,phandle = <0x34>;
phandle = <0x34>;
};
pctrl_l4_icg_ve3 {
compatible = "realtek,powerctrl-simple";
reg = <0x980480e8 0x4>;
shift = <0x6>;
width = <0x1>;
on-value = <0x0>;
off-value = <0x1>;
is-l4-icg;
clocks = <0x33>;
resets = <0x1f 0xf>;
powerctrls = <0x34>;
status = "disabled";
};
pctrl_l4_icg_jpeg {
compatible = "realtek,powerctrl-simple";
reg = <0x9803ef00 0x4>;
shift = <0x1>;
width = <0x1>;
on-value = <0x0>;
off-value = <0x1>;
is-l4-icg;
clocks = <0x35 0x3>;
resets = <0x20 0x1>;
power-state = "managed";
};
pctrl_gpu {
#powerctrl-cells = <0x0>;
compatible = "realtek,powerctrl-sram";
reg = <0x0 0x0 0x9800036c 0x4 0x980003a4 0x4>;
power-state = "off";
linux,phandle = <0x37>;
phandle = <0x37>;
};
pctrl_l4_icg_gpu {
compatible = "realtek,powerctrl-simple";
reg = <0x98055004 0x4 0x980540b4 0x4>;
shift = <0x10 0x0>;
width = <0x1 0x1>;
on-value = <0x1 0x1>;
off-value = <0x0 0x0>;
is-l4-icg;
clocks = <0x36>;
resets = <0x1f 0x12>;
powerctrls = <0x37>;
status = "disabled";
};
pctrl_gpu_core@1 {
compatible = "realtek,powerctrl-gpu-core";
reg = <0x98050180 0x4 0x980501c0 0x4>;
on-shift = <0x0>;
off-shift = <0x0>;
pctrl-name = "pctrl_gpu_core_1";
power-state = "off";
};
pctrl_gpu_core@2 {
compatible = "realtek,powerctrl-gpu-core";
reg = <0x98050180 0x4 0x980501c0 0x4>;
on-shift = <0x1>;
off-shift = <0x1>;
pctrl-name = "pctrl_gpu_core_2";
power-state = "off";
};
pctrl_gpu_core@3 {
compatible = "realtek,powerctrl-gpu-core";
reg = <0x98050180 0x4 0x980501c0 0x4>;
on-shift = <0x2>;
off-shift = <0x2>;
pctrl-name = "pctrl_gpu_core_3";
power-state = "off";
};
pctrl_disp_top {
compatible = "realtek,powerctrl-sram";
reg = <0x98000400 0x4 0x9800036c 0x4 0x98000370 0x4>;
iso-cell-shift = <0x8>;
resets = <0x21 0xf>;
reset-names = "rstn_disp";
};
pctrl_l4_icg_vo {
compatible = "realtek,powerctrl-simple";
reg = <0x98005000 0x4 0x98005000 0x4>;
shift = <0x5 0x7>;
width = <0x1 0xe>;
on-value = <0x0 0x0>;
off-value = <0x1 0x3fff>;
is-l4-icg;
clocks = <0x38 0xf>;
resets = <0x1f 0x14>;
power-state = "managed";
};
pctrl_l4_icg_aio {
compatible = "realtek,powerctrl-simple";
reg = <0x98006508 0x4 0x98006508 0x4>;
shift = <0x0 0x5>;
width = <0x1 0x2>;
is-l4-icg;
clocks = <0x38 0xa>;
resets = <0x1f 0x11>;
power-state = "managed";
};
pctrl_audio_dac {
compatible = "realtek,powerctrl-simple";
reg = <0x98006604 0x4 0x98006604 0x4 0x98006604 0x4 0x98006604 0x4 0x98006604 0x4>;
shift = <0x8 0xa 0xc 0x10 0x12>;
width = <0x2 0x2 0x2 0x2 0x2>;
on-value = <0x3 0x3 0x3 0x3 0x3>;
off-value = <0x2 0x2 0x2 0x2 0x2>;
state,on-value = <0x1 0x1 0x1 0x1 0x1>;
state,off-value = <0x0 0x0 0x0 0x0 0x0>;
is-analog;
clocks = <0x39 0x13>;
power-state = "managed";
};
pctrl_video_dac {
compatible = "realtek,powerctrl-simple";
reg = <0x980183a0 0x4>;
shift = <0x1e>;
width = <0x2>;
is-analog;
clocks = <0x38 0xe>;
resets = <0x1f 0x13>;
power-state = "managed";
};
pctrl_mhl3_en {
compatible = "realtek,powerctrl-simple";
reg = <0x9800d500 0x4>;
shift = <0x0>;
width = <0x1>;
is-analog;
clocks = <0x38 0x8>;
resets = <0x1f 0xc>;
power-state = "off";
};
pctrl_l4_icg_se {
compatible = "realtek,powerctrl-simple";
reg = <0x9800c80c 0x4>;
shift = <0x1b>;
width = <0x5>;
on-value = <0x0>;
off-value = <0x1f>;
is-l4-icg;
clocks = <0x38 0x11>;
resets = <0x1f 0x16>;
power-state = "managed";
};
pctrl_l4_icg_mipi {
compatible = "realtek,powerctrl-simple";
reg = <0x980041dc 0x4>;
shift = <0x6>;
width = <0x3>;
on-value = <0x7>;
off-value = <0x1>;
is-l4-icg;
clocks = <0x38 0x1b>;
resets = <0x1f 0x1e>;
power-state = "managed";
};
pctrl_mipi_aphy {
compatible = "realtek,powerctrl-simple";
reg = <0x9800420c 0x4>;
shift = <0x0>;
width = <0x1>;
on-value = <0x0>;
off-value = <0x1>;
is-analog;
clocks = <0x38 0x1b>;
resets = <0x1f 0x1e>;
ref-status,by-name = "hdmirx";
power-state = "managed";
};
pctrl_cbus {
#powerctrl-cells = <0x0>;
compatible = "realtek,powerctrl-simple";
reg = <0x98037008 0x4 0x98037008 0x4>;
shift = <0x14 0x0>;
width = <0x1 0x1>;
is-analog;
clocks = <0x3a 0x4>;
resets = <0x22 0x5>;
power-state = "default";
linux,phandle = <0x3e>;
phandle = <0x3e>;
};
pctrl_etn_gphy {
compatible = "realtek,powerctrl-simple";
reg = <0x98007088 0x4>;
shift = <0xa>;
width = <0x1>;
is-analog;
clocks = <0x38 0x9>;
resets = <0x1f 0x10>;
ref-status,by-compatible = "Realtek,r8168", "Realtek,rtd1295-hwnat";
power-state = "managed";
};
pctrl_l4_icg_scpu_wrapper {
compatible = "realtek,powerctrl-simple";
reg = <0x9801d000 0x4 0x9801d100 0x4>;
shift = <0x18 0x1f>;
width = <0x8 0x1>;
on-value = <0x0 0x0>;
off-value = <0xff 0x1>;
is-l4-icg;
power-state = "managed";
};
pctrl_l4_icg_ae {
compatible = "realtek,powerctrl-simple";
reg = <0x980020f8 0x4 0x980020f8 0x4 0x980020f8 0x4>;
shift = <0x4 0x2 0x0>;
width = <0x1 0x1 0x1>;
on-value = <0x0 0x0 0x0>;
off-value = <0x1 0x1 0x1>;
is-l4-icg;
resets = <0x1f 0x1c>;
power-state = "managed";
};
pctrl_l4_icg_sb2 {
compatible = "realtek,powerctrl-simple";
reg = <0x9801a308 0x4 0x9801a30c 0x4 0x9801a310 0x4>;
shift = <0x0 0x0 0x0>;
width = <0x20 0x20 0x20>;
on-value = <0x0 0x0 0x0>;
off-value = <0xffffffff 0xffff 0xf>;
is-l4-icg;
resets = <0x3b 0x0>;
power-state = "managed";
};
pctrl_l4_icg_tp {
compatible = "realtek,powerctrl-simple";
reg = <0x98014664 0x4>;
shift = <0x10>;
width = <0x4>;
is-l4-icg;
clocks = <0x38 0x15>;
resets = <0x1f 0x1b>;
power-state = "managed";
};
pctrl_l4_icg_md {
compatible = "realtek,powerctrl-simple";
reg = <0x9800b180 0x4>;
shift = <0x0>;
width = <0x4>;
on-value = <0x0>;
off-value = <0xf>;
is-l4-icg;
clocks = <0x38 0x14>;
resets = <0x1f 0x1a>;
power-state = "managed";
};
pctrl_l4_icg_rsa {
compatible = "realtek,powerctrl-simple";
reg = <0x9804cf2c 0x4>;
shift = <0x0>;
width = <0x1>;
on-value = <0x0>;
off-value = <0x1>;
is-l4-icg;
clocks = <0x38 0x16>;
resets = <0x1f 0x1f>;
power-state = "managed";
};
pctrl_l4_icg_sata {
compatible = "realtek,powerctrl-simple";
reg = <0x9803ff14 0x4>;
shift = <0x0>;
width = <0x2>;
on-value = <0x0>;
off-value = <0x3>;
is-l4-icg;
clocks = <0x38 0x2>;
resets = <0x1f 0x5>;
power-state = "managed";
};
pctrl_l4_icg_cp {
compatible = "realtek,powerctrl-simple";
reg = <0x980151e0 0x4>;
shift = <0x14>;
width = <0x6>;
on-value = <0x0>;
off-value = <0x3f>;
is-l4-icg;
clocks = <0x38 0x13>;
resets = <0x1f 0x19>;
power-state = "managed";
};
pctrl_l4_icg_nand {
compatible = "realtek,powerctrl-simple";
reg = <0x98010168 0x4 0x98010314 0x4 0x9801f168 0x4 0x9801f314 0x4 0x9801013c 0x4 0x98010310 0x4 0x9801f13c 0x4 0x9801f310 0x4>;
shift = <0x0 0x0 0x0 0x0 0x3 0x5 0x3 0x5>;
width = <0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x2>;
on-value = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
off-value = <0x3 0x3 0x3 0x3 0x3 0x3 0x3 0x3>;
is-l4-icg;
clocks = <0x38 0x17>;
resets = <0x1f 0x1d>;
power-state = "managed";
};
pctrl_usb_p0_mac {
compatible = "realtek,powerctrl-sram";
reg = <0x0 0x0 0x98007f7c 0x4 0x98007f80 0x4>;
iso-cell-shift = <0x8>;
power-state = "on";
};
pctrl_usb_p0_phy {
#powerctrl-cells = <0x0>;
compatible = "realtek,powerctrl-simple";
reg = <0x98007fb0 0x4 0x98007fb0 0x4>;
shift = <0x4 0x6>;
width = <0x1 0x1>;
power-state = "on";
linux,phandle = <0x3c>;
phandle = <0x3c>;
};
pctrl_usb_p0_iso {
compatible = "realtek,powerctrl-simple";
reg = <0x98007fb0 0x4>;
shift = <0x8>;
width = <0x1>;
};
pctrl_l4_icg_usb_p0 {
compatible = "realtek,powerctrl-simple";
reg = <0x98013364 0x4>;
shift = <0x0>;
width = <0x1>;
on-value = <0x0>;
off-value = <0x1>;
is-l4-icg;
clocks = <0x38 0x4>;
resets = <0x1f 0x6>;
powerctrls = <0x3c>;
};
pctrl_l4_icg_usb_p1 {
compatible = "realtek,powerctrl-simple";
reg = <0x98013d60 0x4>;
shift = <0x0>;
width = <0x1>;
on-value = <0x0>;
off-value = <0x1>;
is-l4-icg;
clocks = <0x38 0x4>;
resets = <0x1f 0x6>;
powerctrls = <0x3c>;
};
pctrl_l4_icg_usb_p2 {
compatible = "realtek,powerctrl-simple";
reg = <0x98013868 0x4>;
shift = <0x0>;
width = <0x1>;
on-value = <0x0>;
off-value = <0x1>;
is-l4-icg;
clocks = <0x38 0x4>;
resets = <0x1f 0x6>;
powerctrls = <0x3c>;
status = "disabled";
};
pctrl_usb_p3_mac_A {
compatible = "realtek,powerctrl-sram";
reg = <0x0 0x0 0x98007f9c 0x4 0x98007fa0 0x4>;
sram-pwr4-on-value = <0xf05>;
sram-pwr4-off-value = <0xf06>;
pctrl-name = "pctrl_usb_p3_mac";
power-state = "on";
rev,inclusive = <0x0>;
};
pctrl_usb_p3_mac_ECO_B {
compatible = "realtek,powerctrl-sram";
reg = <0x0 0x0 0x98007f9c 0x4 0x98007fa0 0x4>;
pctrl-name = "pctrl_usb_p3_mac";
power-state = "on";
rev,exclusive = <0x0>;
};
pctrl_usb_p3_phy {
#powerctrl-cells = <0x0>;
compatible = "realtek,powerctrl-simple";
reg = <0x98007fb0 0x4>;
shift = <0x5>;
width = <0x1>;
power-state = "on";
linux,phandle = <0x3d>;
phandle = <0x3d>;
};
pctrl_usb_p3_iso {
compatible = "realtek,powerctrl-simple";
reg = <0x98007fb0 0x4>;
shift = <0x9>;
width = <0x1>;
};
pctrl_l4_icg_usb_p3 {
compatible = "realtek,powerctrl-simple";
reg = <0x98013f60 0x4>;
shift = <0x0>;
width = <0x1>;
is-l4-icg;
clocks = <0x38 0x4>;
resets = <0x20 0x2>;
powerctrls = <0x3d>;
};
pctrl_l4_icg_pcie1 {
compatible = "realtek,powerctrl-simple";
reg = <0x9804ec00 0x4>;
shift = <0xb>;
width = <0x1>;
on-value = <0x0>;
off-value = <0x1>;
is-l4-icg;
clocks = <0x38 0x1>;
resets = <0x20 0x8>;
power-state = "managed";
status = "disabled";
};
pctrl_l4_icg_pcie2 {
compatible = "realtek,powerctrl-simple";
reg = <0x9803bc00 0x4>;
shift = <0xb>;
width = <0x1>;
on-value = <0x0>;
off-value = <0x1>;
is-l4-icg;
clocks = <0x39 0x5>;
resets = <0x20 0x11>;
power-state = "managed";
status = "disabled";
};
pctrl_l4_icg_mis {
compatible = "realtek,powerctrl-simple";
reg = <0x9801b0e0 0x4>;
shift = <0x2>;
width = <0x3>;
on-value = <0x0>;
off-value = <0x7>;
is-l4-icg;
clocks = <0x38 0x0>;
resets = <0x1f 0x0>;
power-state = "managed";
};
pctrl_l4_icg_gspi {
compatible = "realtek,powerctrl-simple";
reg = <0x9801bd48 0x4>;
shift = <0x0>;
width = <0x1>;
on-value = <0x0>;
off-value = <0x1>;
is-l4-icg;
clocks = <0x38 0x3>;
resets = <0x1f 0x3>;
power-state = "managed";
};
pctrl_cr {
compatible = "realtek,powerctrl-simple";
reg = <0x980001ec 0x4>;
shift = <0x0>;
width = <0x3>;
is-analog;
clocks = <0x38 0x19>;
resets = <0x20 0xa>;
power-state = "off";
};
pctrl_l4_icg_cr {
compatible = "realtek,powerctrl-simple";
reg = <0x98010420 0x4>;
shift = <0x1>;
width = <0x1>;
is-l4-icg;
clocks = <0x38 0x19>;
resets = <0x20 0xa>;
status = "disabled";
};
pctrl_l4_icg_emmc {
compatible = "realtek,powerctrl-simple";
reg = <0x98012420 0x4>;
shift = <0x0>;
width = <0x1>;
is-l4-icg;
clocks = <0x38 0x18>;
resets = <0x20 0xb>;
power-state = "driver-controlled";
};
pctrl_l4_icg_sdio {
compatible = "realtek,powerctrl-simple";
reg = <0x98010a10 0x4>;
shift = <0x1>;
width = <0x1>;
is-l4-icg;
clocks = <0x38 0x1a>;
resets = <0x20 0xc>;
status = "disabled";
};
pctrl_sdio {
compatible = "realtek,powerctrl-simple";
reg = <0x980001ac 0x4>;
shift = <0x0>;
width = <0x3>;
is-analog;
clocks = <0x38 0x1a>;
resets = <0x20 0xc>;
power-state = "off";
};
pctrl_nat {
compatible = "realtek,powerctrl-sram";
reg = <0x98000400 0x4 0x9800042c 0x4 0x98000430 0x4>;
iso-cell-shift = <0x12>;
resets = <0x1f 0x1>;
reset-names = "rstn_nat";
ref-status,by-compatible = "Realtek,rtd1295-hwnat";
power-state = "managed";
};
pctrl_l4_icg_nat_wrap {
compatible = "realtek,powerctrl-simple";
reg = <0x981c9118 0x4>;
shift = <0x0>;
width = <0x1>;
on-value = <0x0>;
off-value = <0x1>;
is-l4-icg;
clocks = <0x39 0x0>;
resets = <0x1f 0x1>;
power-state = "managed";
};
pctrl_hdmirx {
compatible = "realtek,powerctrl-simple";
reg = <0x98034384 0x4 0x98034404 0x4 0x98034404 0x4 0x98034a00 0x4 0x98034a08 0x4>;
shift = <0x0 0xc 0x0 0x1 0x0>;
width = <0x1 0x1 0x1 0x1 0x1>;
clocks = <0x39 0x18>;
resets = <0x21 0xc>;
power-state = "default";
};
pctrl_dcphy_0_pll {
compatible = "realtek,powerctrl-simple";
reg = <0x9800e00c 0x4 0x9800e004 0x4>;
shift = <0x1d 0x10>;
width = <0x1 0xc>;
on-value = <0x0 0xfff>;
off-value = <0x1 0x0>;
is-analog;
clocks = <0x39 0x1e>;
resets = <0x1f 0x18>;
status = "disabled";
};
pctrl_dcphy_1_pll {
compatible = "realtek,powerctrl-simple";
reg = <0x98007f08 0x4 0x9800f00c 0x4 0x9800f004 0x4>;
shift = <0x1 0x1d 0x10>;
width = <0x1 0x1 0xc>;
is-analog;
clocks = <0x39 0x1f>;
resets = <0x1f 0x18>;
status = "disabled";
};
pctrl_adc {
compatible = "realtek,powerctrl-simple";
reg = <0x98006610 0x4 0x98006610 0x4 0x980066fc 0x4>;
shift = <0x1a 0x1c 0x10>;
width = <0x1 0x1 0x2>;
};
pctrl_cecrx_aphy {
compatible = "realtek,powerctrl-simple";
reg = <0x980372d0 0x4 0x98037204 0x4>;
shift = <0x5 0x10>;
width = <0x1 0x2>;
powerctrls = <0x3e>;
};
pctrl_cectx_aphy {
compatible = "realtek,powerctrl-simple";
reg = <0x980378d0 0x4 0x98037804 0x4>;
shift = <0x5 0x10>;
width = <0x1 0x2>;
powerctrls = <0x3e>;
};
pctrl_pll_ve1 {
compatible = "realtek,powerctrl-simple";
reg = <0x98000118 0x4>;
shift = <0x0>;
width = <0x3>;
on-value = <0x3>;
off-value = <0x4>;
power-state = "off";
};
pctrl_rtc {
compatible = "realtek,powerctrl-simple";
reg = <0x9801b62c 0x4>;
shift = <0x0>;
width = <0x8>;
on-value = <0x5a>;
off-value = <0x0>;
is-analog;
ref-status,by-name = "rtc";
power-state = "managed";
};
pctrl_jd_top {
compatible = "realtek,powerctrl-simple";
reg = <0x98012820 0x4>;
shift = <0x0>;
width = <0x1>;
is-analog;
ref-status,by-name = "rtd1295-lsadc";
power-state = "managed";
};
pctrl_lsadc_top {
compatible = "realtek,powerctrl-simple";
reg = <0x98012920 0x4>;
shift = <0x0>;
width = <0x1>;
is-analog;
ref-status,by-name = "rtd1295-lsadc";
power-state = "managed";
};
pctrl_l4_icg_iso_mis {
compatible = "realtek,powerctrl-simple";
reg = <0x98007068 0x4>;
shift = <0x0>;
width = <0x5>;
on-value = <0x0>;
off-value = <0x17>;
};
};
cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0>;
enable-method = "rtk-spin-table";
cpu-release-addr = <0x0 0x9801aa44>;
next-level-cache = <0x3f>;
linux,phandle = <0x43>;
phandle = <0x43>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x1>;
enable-method = "rtk-spin-table";
cpu-release-addr = <0x0 0x9801aa44>;
next-level-cache = <0x3f>;
linux,phandle = <0x42>;
phandle = <0x42>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x2>;
enable-method = "rtk-spin-table";
cpu-release-addr = <0x0 0x9801aa44>;
next-level-cache = <0x3f>;
linux,phandle = <0x41>;
phandle = <0x41>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x3>;
enable-method = "rtk-spin-table";
cpu-release-addr = <0x0 0x9801aa44>;
next-level-cache = <0x3f>;
linux,phandle = <0x40>;
phandle = <0x40>;
};
l2-cache {
compatible = "cache";
linux,phandle = <0x3f>;
phandle = <0x3f>;
};
};
soc {
#address-cells = <0x1>;
#size-cells = <0x1>;
reg = <0x98000000 0x70000>;
compatible = "simple-bus";
device_type = "soc";
ranges;
};
core_control {
compatible = "Realtek,core-control";
cpu-list = <0x40 0x41 0x42>;
};
rbus@98000000 {
compatible = "Realtek,rtk1295-rbus";
reg = <0x98000000 0x200000>;
};
psci {
compatible = "arm,psci-0.2", "arm,psci";
method = "smc";
};
timer {
compatible = "arm,armv8-timer";
interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
clock-frequency = <0x19bfcc0>;
};
interrupt-controller@FF010000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <0x3>;
interrupt-controller;
reg = <0xff011000 0x1000 0xff012000 0x1000>;
linux,phandle = <0x1>;
phandle = <0x1>;
};
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <0x0 0x30 0x4>;
interrupt-affinity = <0x43 0x42 0x41 0x40>;
};
intc@9801B000 {
compatible = "Realtek,rtk-irq-mux";
Realtek,mux-nr = <0x2>;
#interrupt-cells = <0x2>;
interrupt-controller;
reg = <0x9801b000 0x100 0x98007000 0x100>;
interrupts = <0x0 0x28 0x4 0x0 0x29 0x4>;
intr-status = <0xc 0x0>;
intr-en = <0x80 0x40>;
linux,phandle = <0x11>;
phandle = <0x11>;
};
rtk_misc_gpio@9801b100 {
compatible = "Realtek,rtk-misc-gpio-irq-mux";
gpio-controller;
#gpio-cells = <0x3>;
Realtek,gpio_base = <0x0>;
Realtek,gpio_numbers = <0x65>;
interrupt-parent = <0x11>;
#interrupt-cells = <0x1>;
interrupt-controller;
interrupts = <0x0 0x13 0x0 0x14>;
reg = <0x9801b000 0x100 0x9801b100 0x100>;
gpio-ranges = <0x44 0x0 0x0 0x65>;
gpios = <0x13 0x8 0x0 0x0 0x13 0x64 0x1 0x1>;
linux,phandle = <0x13>;
phandle = <0x13>;
};
rtk_iso_gpio@98007100 {
compatible = "Realtek,rtk-iso-gpio-irq-mux";
gpio-controller;
#gpio-cells = <0x3>;
Realtek,gpio_base = <0x65>;
Realtek,gpio_numbers = <0x23>;
interrupt-parent = <0x11>;
#interrupt-cells = <0x1>;
interrupt-controller;
interrupts = <0x1 0x13 0x1 0x14>;
reg = <0x98007000 0x100 0x98007100 0x100>;
gpio-ranges = <0x44 0x0 0x65 0x23>;
gpios = <0x12 0x15 0x1 0x0>;
linux,phandle = <0x12>;
phandle = <0x12>;
};
gpio-btns {
compatible = "Askey,gpio-btns";
RESET {
gpios = <0x12 0x12 0x0 0x0>;
};
WPS {
gpios = <0x12 0x1f 0x0 0x0>;
};
IMPORT {
gpios = <0x12 0x20 0x0 0x0>;
};
POWER {
gpios = <0x12 0x8 0x0 0x0>;
};
};
leds {
compatible = "gpio-leds";
lte_led_g {
gpios = <0x13 0x13 0x1 0x1>;
default-state = "on";
status = "okay";
};
lte_led_r {
gpios = <0x13 0x11 0x1 0x1>;
default-state = "on";
status = "okay";
};
imp_led_g {
gpios = <0x13 0x5 0x1 0x1>;
default-state = "on";
status = "okay";
};
imp_led_r {
gpios = <0x13 0x64 0x1 0x1>;
default-state = "on";
status = "okay";
};
hdd_led_g {
gpios = <0x13 0x6 0x1 0x1>;
default-state = "on";
status = "okay";
};
hdd_led_r {
gpios = <0x13 0x7 0x1 0x1>;
default-state = "on";
status = "okay";
};
wifi_led_g {
gpios = <0x13 0x8 0x1 0x1>;
default-state = "on";
status = "okay";
};
wifi_led_r {
gpios = <0x12 0x7 0x1 0x1>;
default-state = "on";
status = "okay";
};
pwr_led_g {
gpios = <0x12 0x1d 0x1 0x0>;
default-state = "off";
status = "okay";
linux,default-trigger = "timer";
};
pwr_led_r {
gpios = <0x12 0x1e 0x1 0x1>;
default-state = "on";
status = "okay";
};
led_ctrl {
gpios = <0x12 0x15 0x1 0x0>;
default-state = "off";
status = "okay";
};
led_ctrl1 {
gpios = <0x12 0x14 0x1 0x1>;
default-state = "on";
status = "okay";
};
};
hdmitx@9800D000 {
compatible = "Realtek,rtk119x-hdmitx";
reg = <0x9800d000 0x560 0x98007200 0x4>;
gpios = <0x12 0x6 0x0 0x0>;
interrupt-parent = <0x12>;
interrupts = <0x6>;
status = "okay";
scdc_rr@98007200 {
enable-scdc-rr = <0x0>;
interrupt-parent = <0x11>;
#interrupt-cells = <0x1>;
interrupt-controller;
interrupts = <0x1 0x1f>;
};
};
hdcptx@1800D000 {
compatible = "Realtek,rtk129x-hdcptx";
reg = <0x9800d000 0x400>;
interrupts = <0x0 0x1f 0x4>;
};
serial0@98007800 {
compatible = "snps,dw-apb-uart";
interrupt-parent = <0x11>;
reg = <0x98007800 0x400 0x98007000 0x100>;
interrupts-st-mask = <0x4>;
interrupts = <0x1 0x2>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clock-frequency = <0x19bfcc0>;
};
serial1@9801B200 {
compatible = "snps,dw-apb-uart";
interrupt-parent = <0x11>;
reg = <0x9801b200 0x100 0x9801b00c 0x100>;
interrupts-st-mask = <0x8>;
interrupts = <0x0 0x3 0x0 0x5>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clocks = <0x39 0x1c>;
resets = <0x20 0x1c>;
clock-frequency = <0x19bfcc00>;
};
serial2@9801B400 {
compatible = "snps,dw-apb-uart";
interrupt-parent = <0x11>;
reg = <0x9801b400 0x100 0x9801b00c 0x100>;
interrupts-st-mask = <0x100>;
interrupts = <0x0 0x8 0x0 0xd>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clocks = <0x39 0x1b>;
resets = <0x20 0x1b>;
clock-frequency = <0x19bfcc00>;
status = "okay";
};
gmac@98016000 {
compatible = "Realtek,r8168";
reg = <0x98016000 0x1000 0x98007000 0x1000>;
interrupts = <0x0 0x16 0x4>;
rtl-config = <0x1>;
mac-version = <0x2a>;
rtl-features = <0x2>;
status = "okay";
};
gmac@0x98060000 {
compatible = "Realtek,rtd1295-hwnat";
reg = <0x98060000 0x170000 0x98000000 0x20000 0x9803ff00 0x100>;
interrupts = <0x0 0x18 0x4>;
offload_enable = <0x0>;
rgmii_voltage = <0x1>;
mac0_enable = <0x0>;
mac0_mode = <0x1>;
mac5_conn_to = <0x0>;
mac0_phy_id = <0x3>;
mac4_phy_id = <0x4>;
mac5_phy_id = <0x1>;
status = "disabled";
};
timer0@9801B000 {
compatible = "Realtek,rtd129x-timer0";
reg = <0x9801b000 0x600 0xff018000 0x10>;
interrupts = <0x0 0x11 0x4>;
clock-frequency = <0x325aa0>;
status = "okay";
};
timer1@9801B000 {
compatible = "Realtek,rtd129x-timer1";
reg = <0x9801b000 0x600 0xff018000 0x10>;
interrupts = <0x0 0x12 0x4>;
clock-frequency = <0x325aa0>;
status = "okay";
};
thermal@0x9801D100 {
compatible = "Realtek,rtd1295-thermal";
reg = <0x9801d100 0x70>;
thermal0-disable = <0x0>;
thermal1-disable = <0x0>;
thermal-polling-ms = <0x1f4>;
thermal-trend-urgent = <0x0>;
trip-points = <0x69 0x3 0x0 0x0 0x6e 0x3 0x0 0x1 0x73 0x3 0x0 0x2 0x6e 0x7 0x1 0x0 0x82 0x0 0x3 0x0>;
cpufreq,freqs = <0x155cc0 0x13d620 0x124f80 0x10c8e0 0xf4240 0x493e0>;
cpu-core,cpu-list = <0x40 0x41>;
status = "okay";
};
pcie@9804E000 {
compatible = "Realtek,rtd1295-pcie-slot1";
reg = <0x9804e000 0x1000 0x9804f000 0x1000 0x9801c600 0x100 0x9801a000 0x300 0x98012000 0x1000>;
interrupt-names = "rtk-pcie1-intr";
#interrupt-cells = <0x1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 0x1 0x0 0x3d 0x4>;
bus-range = <0x0 0xff>;
linux,pci-domain = <0x0>;
device_type = "pci";
gpios = <0x13 0x12 0x1 0x1>;
#size-cells = <0x2>;
#address-cells = <0x3>;
num-lanes = <0x1>;
ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x1000000 0x1000000 0x0 0x30000 0x30000 0x0 0x10000>;
status = "okay";
};
pcie2@9803B000 {
compatible = "Realtek,rtd1295-pcie-slot2";
reg = <0x9803b000 0x1000 0x9803c000 0x1000 0x9801c600 0x100 0x9801a000 0x300 0x98012000 0x1000>;
interrupt-names = "rtk-pcie2-intr";
#interrupt-cells = <0x1>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
interrupt-map = <0x0 0x0 0x0 0x0 0x1 0x0 0x3e 0x4>;
bus-range = <0x0 0xff>;
linux,pci-domain = <0x1>;
device_type = "pci";
gpios = <0x13 0x14 0x1 0x1>;
#size-cells = <0x2>;
#address-cells = <0x3>;
num-lanes = <0x1>;
ranges = <0x2000000 0x0 0xc1000000 0xc1000000 0x0 0x1000000 0x1000000 0x0 0x40000 0x40000 0x0 0x10000>;
speed-mode = <0x0>;
status = "okay";
};
sdio@98010A00 {
compatible = "Realtek,rtk1295-sdio";
gpios = <0x12 0x17 0x1 0x1>;
reg = <0x98010c00 0x200 0x98000000 0x200000>;
interrupts = <0x0 0x2d 0x4>;
};
sdmmc@98010400 {
compatible = "Realtek,rtk1295-sdmmc";
gpios = <0x13 0x63 0x1 0x0>;
reg = <0x98000000 0x400 0x98010400 0x200 0x9801a000 0x400 0x98012000 0xa00 0x98010a00 0x40>;
interrupts = <0x0 0x2c 0x4>;
status = "okay";
};
emmc@98012000 {
compatible = "Realtek,rtk1295-emmc";
reg = <0x98012000 0xa00 0x98000000 0x600 0x9801a000 0x80 0x9801b000 0x150>;
interrupts = <0x0 0x2a 0x4>;
speed-step = <0x2>;
pddrive_nf_s0 = <0x1 0x77 0x77 0x77 0x33>;
pddrive_nf_s2 = <0x1 0xbb 0xbb 0xbb 0x33>;
phase_tuning = <0x0 0x0>;
};
gpu@0x98050000 {
compatible = "arm,mali-midgard";
reg = <0x98050000 0xffff>;
interrupts = <0x0 0x43 0x4 0x0 0x44 0x4 0x0 0x42 0x4>;
interrupt-names = "JOB", "MMU", "GPU";
clocks = <0x36>;
clocks-names = "clk_gpu";
operating-points = <0x7ef40 0xf4240 0x493e0 0xdbba0>;
};
pu_pll@98000000 {
compatible = "Realtek,rtk1295-pu_pll";
reg = <0x98000000 0x200>;
};
jpeg@9803e000 {
compatible = "Realtek,rtk1295-jpeg";
reg = <0x9803e000 0x1000 0x98000000 0x200>;
interrupts = <0x0 0x34 0x4>;
};
ve1@98040000 {
compatible = "Realtek,rtk1295-ve1";
reg = <0x98040000 0x8000 0x98000000 0x200>;
interrupts = <0x0 0x35 0x4 0x0 0x36 0x4>;
};
ve3@98048000 {
compatible = "Realtek,rtk1295-ve3";
reg = <0x98048000 0x4000 0x98000000 0x200>;
interrupts = <0x0 0x37 0x4>;
};
md@9800b000 {
compatible = "Realtek,rtk1295-md";
reg = <0x9800b000 0x1000>;
interrupts = <0x0 0x26 0x4>;
};
se@9800c000 {
compatible = "Realtek,rtk1295-se";
reg = <0x9800c000 0x1000>;
interrupts = <0x0 0x14 0x4>;
};
refclk@9801b540 {
compatible = "Realtek,rtk1295-refclk";
reg = <0x9801b000 0x1000>;
};
scpu_wrapper@9801d000 {
compatible = "Realtek,rtk-scpu_wrapper";
reg = <0x9801d000 0x500>;
interrupts = <0x0 0x2e 0x4>;
};
sb2@9801a000 {
compatible = "Realtek,rtk-sb2";
reg = <0x9801a000 0x900>;
interrupts = <0x0 0x24 0x4>;
};
sbx@9801c000 {
compatible = "Realtek,rtk-sbx";
reg = <0x9801c000 0x18 0x9801c200 0x18 0x9801c400 0x10 0x9801c600 0x18>;
};
rpc@9801a104 {
compatible = "Realtek,rtk-rpc";
reg = <0x9801a104 0xc 0x1ffe000 0x4000 0x1f000 0x1000 0x9801a020 0x4>;
interrupts = <0x0 0x21 0x4>;
};
dvfs {
compatible = "Realtek,rtk129x-dvfs";
transition_latency = <0x7a120>;
rm-threshold-uV = <0xe7ef0>;
voltage-step-ctl = <0x0>;
gpios = <0x12 0xf 0x1 0x1 0x12 0x10 0x1 0x1>;
status = "okay";
frequency-table = <0x0 0x1 0x493e0 0x0 0x1 0x61a80 0x0 0x1 0x7a120 0x0 0x1 0x927c0 0x0 0x1 0xaae60 0x0 0x3 0xc3500 0x0 0x4 0xdbba0 0x0 0x5 0xf4240 0x0 0x6 0x10c8e0 0x2 0x7 0x124f80 0x2 0x9 0x13d620 0x2 0xb 0x155cc0>;
frequency-table,rev1 = <0x0 0x0 0x7a120 0x0 0x2 0x927c0 0x0 0x3 0xaae60 0x0 0x4 0xc3500 0x0 0x5 0xdbba0 0x0 0x6 0xf4240 0x0 0x8 0x10c8e0 0x2 0xa 0x124f80 0x2 0xc 0x13d620 0x2 0xd 0x155cc0>;
voltage-table = <0x0 0xc3500 0xc3500 0x1 0xc65d4 0xc65d4 0x2 0xc96a8 0xc96a8 0x3 0xcf850 0xcf850 0x4 0xd59f8 0xd59f8 0x5 0xdbba0 0xdbba0 0x6 0xe1d48 0xe1d48 0x7 0xe7ef0 0xe7ef0 0x8 0xeafc4 0xeafc4 0x9 0xee098 0xee098 0xa 0xf7314 0xf7314 0xb 0xfa3e8 0xfa3e8 0xc 0x103664 0x103664 0xd 0x10c8e0 0x10c8e0>;
l2-voltage-table = <0x0 0xdbba0 0xdbba0 0x1 0xdbba0 0xdbba0 0x2 0xdbba0 0xdbba0 0x3 0xdbba0 0xdbba0 0x4 0xdbba0 0xdbba0 0x5 0xdbba0 0xdbba0 0x6 0xdbba0 0xdbba0 0x7 0xdbba0 0xdbba0 0x8 0xdbba0 0xdbba0 0x9 0xdbba0 0xdbba0 0xa 0xe7ef0 0xe7ef0 0xb 0xe7ef0 0xe7ef0 0xc 0xf4240 0xf4240 0xd 0xf4240 0xf4240>;
};
cpufreq-moniter {
compatible = "Realtek,rtk129x-cpufreq-monitor";
clocks = <0x36 0x2f 0x31 0x33>;
clock-names = "clk_gpu", "clk_ve1", "clk_ve2", "clk_ve3";
enable-ve-monitor;
enable-gpu-monitor;
enable-io-monitor;
status = "okay";
};
rtc@0x9801B600 {
compatible = "Realtek,rtk-rtc";
reg = <0x9801b600 0x100 0x98000000 0x100 0x98007000 0x100>;
rtc-base-year = <0x7e0>;
status = "okay";
};
watchdog@0x98007680 {
compatible = "Realtek,rtk-watchdog";
reg = <0x98007680 0x100>;
};
i2c@0x98007D00 {
compatible = "Realtek,rtk-i2c";
reg = <0x98007d00 0x400>;
interrupt-parent = <0x11>;
interrupts = <0x1 0x8>;
i2c-num = <0x0>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
pmic-gmt@12 {
compatible = "gmt-g2227";
reg = <0x12>;
dcdc1 {
regulator-min-microvolt = <0x2dc6c0>;
regulator-max-microvolt = <0x325aa0>;
};
dcdc2 {
regulator-min-microvolt = <0xc3500>;
regulator-max-microvolt = <0x121eac>;
sleep-volt = <0x0>;
};
dcdc3 {
regulator-min-microvolt = <0xc3500>;
regulator-max-microvolt = <0x121eac>;
sleep-volt = <0x0>;
};
dcdc5 {
regulator-min-microvolt = <0xc3500>;
regulator-max-microvolt = <0x121eac>;
};
dcdc6 {
regulator-min-microvolt = <0xc3500>;
regulator-max-microvolt = <0x121eac>;
sleep-volt = <0x0>;
};
ldo2 {
regulator-min-microvolt = <0x16e360>;
regulator-max-microvolt = <0x1cfde0>;
sleep-volt = <0x0>;
};
ldo3 {
regulator-min-microvolt = <0xc3500>;
regulator-max-microvolt = <0x124f80>;
sleep-volt = <0x0>;
};
};
};
i2c@0x98007C00 {
compatible = "Realtek,rtk-i2c";
reg = <0x98007c00 0x400>;
interrupt-parent = <0x11>;
interrupts = <0x1 0xb>;
i2c-num = <0x1>;
status = "disabled";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
i2c@0x9801B700 {
compatible = "Realtek,rtk-i2c";
reg = <0x9801b700 0x400>;
interrupt-parent = <0x11>;
interrupts = <0x0 0x1a>;
i2c-num = <0x2>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
i2c@0x9801B900 {
compatible = "Realtek,rtk-i2c";
reg = <0x9801b900 0x400>;
interrupt-parent = <0x11>;
interrupts = <0x0 0x17>;
i2c-num = <0x3>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
i2c@0x9801BA00 {
compatible = "Realtek,rtk-i2c";
reg = <0x9801ba00 0x400>;
interrupt-parent = <0x11>;
interrupts = <0x0 0xf>;
i2c-num = <0x4>;
status = "disabled";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
i2c@0x9801BB00 {
compatible = "Realtek,rtk-i2c";
reg = <0x9801bb00 0x400>;
interrupt-parent = <0x11>;
interrupts = <0x0 0xe>;
i2c-num = <0x5>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
spi@9801BD00 {
compatible = "Realtek,rtk129x-spi";
reg = <0x9801bd00 0x32>;
pinctrl-names = "default";
pinctrl-0 = <0x45>;
spi-cs-gpio = <0x13 0x6 0x1 0x1>;
status = "disabled";
};
rtd1295-pwm@pwm {
compatible = "Realtek,rtd1295-pwm";
#pwm-cells = <0x2>;
reg = <0x980070d0 0xc>;
pwm_idx = <0x1>;
enable = <0x1>;
clkout_div = <0xff>;
clksrc_div = <0x1>;
duty_rate = <0x32>;
status = "disabled";
};
rtk_fan@9801BC00 {
compatible = "Realtek,rtd129x-fan";
reg = <0x9801bc00 0x14 0x9801a910 0x4>;
interrupt-parent = <0x11>;
interrupts = <0x0 0x1d>;
status = "okay";
timer_target = <0x100000>;
fan_debounce = <0x0>;
};
rtd1295-lsadc@0x98012800 {
compatible = "Realtek,rtd1295-lsadc";
interrupt-parent = <0x11>;
interrupts = <0x0 0x15 0x0 0x16>;
reg = <0x9801b000 0x100 0x98012800 0x200>;
status = "disabled";
clk_gating_en = <0x1 0x1>;
vdd_mux_sel = <0x0>;
vdd_mux1 = <0x0>;
vdd_mux2 = <0x0>;
vdd_mux_en = <0x1>;
rtd1295-lsadc0-pad0@0 {
activate = <0x1>;
ctrl_mode = <0x0>;
sw_idx = <0x0>;
voltage_threshold = <0x20>;
};
rtd1295-lsadc0-pad1@0 {
activate = <0x1>;
ctrl_mode = <0x0>;
sw_idx = <0x1>;
voltage_threshold = <0x10>;
};
rtd1295-lsadc1-pad0@0 {
activate = <0x1>;
ctrl_mode = <0x0>;
sw_idx = <0x0>;
voltage_threshold = <0x20>;
detect_range_ctrl = <0x0>;
};
rtd1295-lsadc1-pad1@0 {
activate = <0x1>;
ctrl_mode = <0x0>;
sw_idx = <0x0>;
voltage_threshold = <0x10>;
detect_range_ctrl = <0x1>;
};
};
sata@9803F000 {
compatible = "Realtek,ahci-sata";
reg = <0x9803f000 0x1000 0x9801a900 0x100>;
interrupts = <0x0 0x1c 0x4>;
gpios = <0x13 0x10 0x1 0x1>;
tx-driving = <0x6>;
clocks = <0x38 0x2 0x38 0x7>;
hotplug-en = <0x0>;
status = "okay";
};
rfkilligpio@0 {
compatible = "Realtek,rfkill";
gpios = <0x13 0x3f 0x1 0x0>;
status = "okay";
};
rtk-gpio-regulator {
compatible = "rtkgpio-regulator";
gpios = <0x12 0x10 0x1 0x0 0x12 0x11 0x1 0x1>;
status = "okay";
rtkgpio_regulator {
regulator-min-microvolt = <0xcf850>;
regulator-max-microvolt = <0x100590>;
};
};
power-management {
compatible = "Realtek,power-management";
reg = <0x98000000 0x1800 0x98006000 0x1000 0x98007000 0x1000 0x98018000 0x2000 0x9801a000 0x1000 0x9801b000 0x1000>;
suspend-mode = <0x0>;
status = "okay";
wakeup-gpio-enable = <0x0 0x0>;
wakeup-gpio-list = <0x12 0xe 0x0 0x0 0x12 0x21 0x0 0x0>;
wakeup-gpio-activity = <0x1 0x1>;
};
cec0@98037800 {
compatible = "Realtek,rtd1295-cec0";
reg = <0x98037800 0xe0 0x98007000 0x100 0x98037500 0x100>;
interrupts = <0x0 0x1a 0x4>;
module-enable = <0x1>;
status = "okay";
};
dvfs-gpio {
compatible = "Realtek,rtk129x-gpio-dvfs";
transition_latency = <0x7a120>;
frequency-table = <0x0 0x0 0x493e0 0x0 0x0 0x61a80 0x0 0x0 0x7a120 0x0 0x0 0x927c0 0x0 0x0 0xaae60 0x0 0x0 0xc3500 0x0 0x1 0xdbba0 0x0 0x1 0xf4240 0x0 0x1 0x10c8e0 0x0 0x1 0x124f80 0x0 0x2 0x13d620 0x0 0x2 0x155cc0 0x0 0x2 0x16ef18>;
voltage-table = <0x0 0xcf850 0xcf850 0x1 0xe7ef0 0xe7ef0 0x2 0x100590 0x100590>;
};
aliases {
serial0 = "/serial0@98007800";
};
timer0@9801b000 {
clock-frequency = <0x19bfcc0>;
};
timer1@9801b000 {
clock-frequency = <0x19bfcc0>;
};
chosen {
swiotlb-memory-reservation-size = <0x200>;
swiotlb-force = <0x0>;
linux,initrd-start = <0x2200000>;
linux,initrd-end = <0x2600000>;
bootargs = "earlycon=uart8250,mmio32,0x98007800 console=ttyS0,115200 init=/init androidboot.hardware=kylin loglevel=4";
compatible = "Realtek,rtk1295-cma_info";
cma-region-enable = <0x1>;
cma-region-info = <0x0 0x2000000 0x20000000>;
};
rtk,ion {
compatible = "Realtek,rtk-ion";
#address-cells = <0x1>;
#size-cells = <0x0>;
rtk,ion-heap@0 {
compatible = "Realtek,rtk-ion-reserve";
reg = <0x0>;
rtk,memory-reservation-size = <0x0>;
};
rtk,ion-heap@1 {
compatible = "Realtek,rtk-ion-reserve";
reg = <0x1>;
rtk,memory-reservation-size = <0x0>;
};
rtk,ion-heap@4 {
compatible = "Realtek,rtk-ion-reserve";
reg = <0x4>;
rtk,memory-reservation-size = <0x0>;
};
rtk,ion-heap@8 {
compatible = "Realtek,rtk-ion-reserve";
reg = <0x8>;
rtk,memory-reserve = <0x2600000 0x600000 0xe>;
};
rtk,ion-heap@7 {
compatible = "Realtek,rtk-ion-reserve";
reg = <0x7>;
rtk,memory-reserve = <0x2c00000 0xb800000 0xe 0x11000000 0x9200000 0xe>;
};
};
fb {
compatible = "Realtek,rtk-fb";
buffer-cnt = <0x3>;
resolution = <0x780 0x438>;
fps = <0x3c>;
};
test_vo@98005000 {
compatible = "Realtek,rtk1295-test_vo";
reg = <0x98005000 0x1000 0x9800d000 0x1000 0x98000000 0x1000>;
interrupts = <0x0 0x22 0x4>;
};
reserved-memory {
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
ramoops_mem {
reg = <0x22000000 0x200000>;
reg-names = "ramoops_mem";
no-map;
linux,phandle = <0x46>;
phandle = <0x46>;
};
tee {
no-map;
size = <0xf00000>;
alloc-ranges = <0x10100000 0xf00000>;
};
};
ramoops@10014000 {
compatible = "ramoops";
record-size = <0x0 0x4000>;
console-size = <0x0 0x100000>;
ftrace-size = <0x0 0x4000>;
memory-region = <0x46>;
status = "okay";
};
memory {
device_type = "memory";
reg = <0x0 0x80000000>;
};
mem_remap {
compatible = "Realtek,rtk1295-mem_remap";
reg = <0x98000000 0x200000 0x1f000 0x1000 0x2c00000 0xb800000 0x1b00000 0x400000 0x2600000 0x600000 0x1ffe000 0x4000 0x11000000 0x9200000 0x10000000 0x14000>;
};
};
Raw
tmp_factory_layout.txt
#define CREATE_DATE " Jun 8 2016 "
#define CREATE_TIME " 18:30:39 "
#define BOOTTYPE " BOOTTYPE_COMPLETE "
#define SSUWORKPART 0
#define BOOTPART 0
#define FW_FWTBL " target=0 offset=620000 size=300 type= name=package5/fw_tbl.bin "
#define FW_GOLD_RESCUE_DT " target=1f00000 offset=630200 size=f4fa type=bin name=package5/gold.rescue.emmc.dtb "
#define FW_GOLD_AKERNEL " target=1b00000 offset=670200 size=335160 type=bin name=package5/gold.bluecore.audio "
#define FW_GOLD_KERNEL " target=3000000 offset=a70200 size=feec00 type=bin name=package5/gold.emmc.uImage "
#define FW_GOLD_ROOTFS " target=2200000 offset=1a70200 size=c00000 type=bin name=package5/gold.rescue.root.emmc.cpio.gz_pad.img "
#define FW_RESCUE_DT " target=1f00000 offset=2670200 size=f4fa type=bin name=package5/rescue.emmc.dtb "
#define FW_KERNEL_DT " target=1f00000 offset=26b0200 size=f7b4 type=bin name=package5/android.emmc.dtb "
#define FW_AKERNEL " target=1b00000 offset=26f0200 size=335160 type=bin name=package5/bluecore.audio "
#define FW_KERNEL " target=3000000 offset=2a25400 size=feec00 type=bin name=package5/emmc.uImage "
#define FW_RESCUE_ROOTFS " target=2200000 offset=3a14000 size=c00000 type=bin name=package5/rescue.root.emmc.cpio.gz_pad.img "
#define FW_KERNEL_ROOTFS " target=2200000 offset=4614000 size=400000 type=bin name=package5/android.root.emmc.cpio.gz_pad.img "
#define FW_P_UBOOT " target=0 offset=5024a00 size=263e0 type= name=package5/uboot.bin "
#define PART2 " offset=6000000 size=5cd00000 mount_point=/system mount_dev=/dev/block/mmcblk0p1 filesystem=ext4 partname=system type=bin name=package5/system.bin "
#define PART1 " offset=62d00000 size=125700000 mount_point=/data mount_dev=/dev/block/mmcblk0p2 filesystem=ext4 partname=data type=bin name=package5/data.bin "
#define PART0 " offset=188400000 size=19000000 mount_point=/cache mount_dev=/dev/block/mmcblk0p3 filesystem=ext4 partname=cache type=bin name=package5/cache.bin "
#define PART3 " offset=1a1400000 size=400000 mount_point=/uboot mount_dev=/dev/block/mmcblk0p5 filesystem=ext4 partname=uboot type=bin name=package5/uboot_p.bin "
#define PART4 " offset=1a1800000 size=1000000 mount_point=/logo mount_dev=/dev/block/mmcblk0p6 filesystem=ext4 partname=logo type=bin name=package5/logo_p.bin "
#define PART5 " offset=1a2802000 size=1f400000 mount_point=/backup mount_dev=/dev/block/mmcblk0p7 filesystem=ext4 partname=backup type=bin name=package5/backup.bin "
#define PART6 " offset=1c1c02000 size=6400000 mount_point=/verify mount_dev=/dev/block/mmcblk0p8 filesystem=ext4 partname=verify type=bin name=package5/verify_p.bin "
#define TAG 45
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